target/linux/generic/patches-3.13/770-bgmac-backport.patch

   1 --- a/drivers/net/ethernet/broadcom/Kconfig
   2 +++ b/drivers/net/ethernet/broadcom/Kconfig
   3 @@ -23,6 +23,7 @@ config B44
   4         depends on SSB_POSSIBLE && HAS_DMA
   5         select SSB
   6         select MII
   7 +       select PHYLIB
   8         ---help---
   9           If you have a network (Ethernet) controller of this type, say Y
  10           or M and read the Ethernet-HOWTO, available from
  11 --- a/drivers/net/ethernet/broadcom/bgmac.c
  12 +++ b/drivers/net/ethernet/broadcom/bgmac.c
  13 @@ -96,6 +96,19 @@ static void bgmac_dma_tx_enable(struct b
  14         u32 ctl;
  15
  16         ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL);
  17 +       if (bgmac->core->id.rev >= 4) {
  18 +               ctl &= ~BGMAC_DMA_TX_BL_MASK;
  19 +               ctl |= BGMAC_DMA_TX_BL_128 << BGMAC_DMA_TX_BL_SHIFT;
  20 +
  21 +               ctl &= ~BGMAC_DMA_TX_MR_MASK;
  22 +               ctl |= BGMAC_DMA_TX_MR_2 << BGMAC_DMA_TX_MR_SHIFT;
  23 +
  24 +               ctl &= ~BGMAC_DMA_TX_PC_MASK;
  25 +               ctl |= BGMAC_DMA_TX_PC_16 << BGMAC_DMA_TX_PC_SHIFT;
  26 +
  27 +               ctl &= ~BGMAC_DMA_TX_PT_MASK;
  28 +               ctl |= BGMAC_DMA_TX_PT_8 << BGMAC_DMA_TX_PT_SHIFT;
  29 +       }
  30         ctl |= BGMAC_DMA_TX_ENABLE;
  31         ctl |= BGMAC_DMA_TX_PARITY_DISABLE;
  32         bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, ctl);
  33 @@ -240,6 +253,16 @@ static void bgmac_dma_rx_enable(struct b
  34         u32 ctl;
  35
  36         ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_RX_CTL);
  37 +       if (bgmac->core->id.rev >= 4) {
  38 +               ctl &= ~BGMAC_DMA_RX_BL_MASK;
  39 +               ctl |= BGMAC_DMA_RX_BL_128 << BGMAC_DMA_RX_BL_SHIFT;
  40 +
  41 +               ctl &= ~BGMAC_DMA_RX_PC_MASK;
  42 +               ctl |= BGMAC_DMA_RX_PC_8 << BGMAC_DMA_RX_PC_SHIFT;
  43 +
  44 +               ctl &= ~BGMAC_DMA_RX_PT_MASK;
  45 +               ctl |= BGMAC_DMA_RX_PT_1 << BGMAC_DMA_RX_PT_SHIFT;
  46 +       }
  47         ctl &= BGMAC_DMA_RX_ADDREXT_MASK;
  48         ctl |= BGMAC_DMA_RX_ENABLE;
  49         ctl |= BGMAC_DMA_RX_PARITY_DISABLE;
  50 @@ -682,70 +705,6 @@ static int bgmac_phy_write(struct bgmac
  51         return 0;
  52  }
  53
  54 -/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyforce */
  55 -static void bgmac_phy_force(struct bgmac *bgmac)
  56 -{
  57 -       u16 ctl;
  58 -       u16 mask = ~(BGMAC_PHY_CTL_SPEED | BGMAC_PHY_CTL_SPEED_MSB |
  59 -                    BGMAC_PHY_CTL_ANENAB | BGMAC_PHY_CTL_DUPLEX);
  60 -
  61 -       if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
  62 -               return;
  63 -
  64 -       if (bgmac->autoneg)
  65 -               return;
  66 -
  67 -       ctl = bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL);
  68 -       ctl &= mask;
  69 -       if (bgmac->full_duplex)
  70 -               ctl |= BGMAC_PHY_CTL_DUPLEX;
  71 -       if (bgmac->speed == BGMAC_SPEED_100)
  72 -               ctl |= BGMAC_PHY_CTL_SPEED_100;
  73 -       else if (bgmac->speed == BGMAC_SPEED_1000)
  74 -               ctl |= BGMAC_PHY_CTL_SPEED_1000;
  75 -       bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL, ctl);
  76 -}
  77 -
  78 -/* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyadvertise */
  79 -static void bgmac_phy_advertise(struct bgmac *bgmac)
  80 -{
  81 -       u16 adv;
  82 -
  83 -       if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
  84 -               return;
  85 -
  86 -       if (!bgmac->autoneg)
  87 -               return;
  88 -
  89 -       /* Adv selected 10/100 speeds */
  90 -       adv = bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV);
  91 -       adv &= ~(BGMAC_PHY_ADV_10HALF | BGMAC_PHY_ADV_10FULL |
  92 -                BGMAC_PHY_ADV_100HALF | BGMAC_PHY_ADV_100FULL);
  93 -       if (!bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_10)
  94 -               adv |= BGMAC_PHY_ADV_10HALF;
  95 -       if (!bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_100)
  96 -               adv |= BGMAC_PHY_ADV_100HALF;
  97 -       if (bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_10)
  98 -               adv |= BGMAC_PHY_ADV_10FULL;
  99 -       if (bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_100)
 100 -               adv |= BGMAC_PHY_ADV_100FULL;
 101 -       bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV, adv);
 102 -
 103 -       /* Adv selected 1000 speeds */
 104 -       adv = bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV2);
 105 -       adv &= ~(BGMAC_PHY_ADV2_1000HALF | BGMAC_PHY_ADV2_1000FULL);
 106 -       if (!bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_1000)
 107 -               adv |= BGMAC_PHY_ADV2_1000HALF;
 108 -       if (bgmac->full_duplex && bgmac->speed & BGMAC_SPEED_1000)
 109 -               adv |= BGMAC_PHY_ADV2_1000FULL;
 110 -       bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_ADV2, adv);
 111 -
 112 -       /* Restart */
 113 -       bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL,
 114 -                       bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL) |
 115 -                       BGMAC_PHY_CTL_RESTART);
 116 -}
 117 -
 118  /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipphyinit */
 119  static void bgmac_phy_init(struct bgmac *bgmac)
 120  {
 121 @@ -789,11 +748,9 @@ static void bgmac_phy_reset(struct bgmac
 122         if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
 123                 return;
 124
 125 -       bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL,
 126 -                       BGMAC_PHY_CTL_RESET);
 127 +       bgmac_phy_write(bgmac, bgmac->phyaddr, MII_BMCR, BMCR_RESET);
 128         udelay(100);
 129 -       if (bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL) &
 130 -           BGMAC_PHY_CTL_RESET)
 131 +       if (bgmac_phy_read(bgmac, bgmac->phyaddr, MII_BMCR) & BMCR_RESET)
 132                 bgmac_err(bgmac, "PHY reset failed\n");
 133         bgmac_phy_init(bgmac);
 134  }
 135 @@ -811,13 +768,13 @@ static void bgmac_cmdcfg_maskset(struct
 136         u32 cmdcfg = bgmac_read(bgmac, BGMAC_CMDCFG);
 137         u32 new_val = (cmdcfg & mask) | set;
 138
 139 -       bgmac_set(bgmac, BGMAC_CMDCFG, BGMAC_CMDCFG_SR);
 140 +       bgmac_set(bgmac, BGMAC_CMDCFG, BGMAC_CMDCFG_SR(bgmac->core->id.rev));
 141         udelay(2);
 142
 143         if (new_val != cmdcfg || force)
 144                 bgmac_write(bgmac, BGMAC_CMDCFG, new_val);
 145
 146 -       bgmac_mask(bgmac, BGMAC_CMDCFG, ~BGMAC_CMDCFG_SR);
 147 +       bgmac_mask(bgmac, BGMAC_CMDCFG, ~BGMAC_CMDCFG_SR(bgmac->core->id.rev));
 148         udelay(2);
 149  }
 150
 151 @@ -876,31 +833,56 @@ static void bgmac_clear_mib(struct bgmac
 152  }
 153
 154  /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/gmac_speed */
 155 -static void bgmac_speed(struct bgmac *bgmac, int speed)
 156 +static void bgmac_mac_speed(struct bgmac *bgmac)
 157  {
 158         u32 mask = ~(BGMAC_CMDCFG_ES_MASK | BGMAC_CMDCFG_HD);
 159         u32 set = 0;
 160
 161 -       if (speed & BGMAC_SPEED_10)
 162 +       switch (bgmac->mac_speed) {
 163 +       case SPEED_10:
 164                 set |= BGMAC_CMDCFG_ES_10;
 165 -       if (speed & BGMAC_SPEED_100)
 166 +               break;
 167 +       case SPEED_100:
 168                 set |= BGMAC_CMDCFG_ES_100;
 169 -       if (speed & BGMAC_SPEED_1000)
 170 +               break;
 171 +       case SPEED_1000:
 172                 set |= BGMAC_CMDCFG_ES_1000;
 173 -       if (!bgmac->full_duplex)
 174 +               break;
 175 +       case SPEED_2500:
 176 +               set |= BGMAC_CMDCFG_ES_2500;
 177 +               break;
 178 +       default:
 179 +               bgmac_err(bgmac, "Unsupported speed: %d\n", bgmac->mac_speed);
 180 +       }
 181 +
 182 +       if (bgmac->mac_duplex == DUPLEX_HALF)
 183                 set |= BGMAC_CMDCFG_HD;
 184 +
 185         bgmac_cmdcfg_maskset(bgmac, mask, set, true);
 186  }
 187
 188  static void bgmac_miiconfig(struct bgmac *bgmac)
 189  {
 190 -       u8 imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) & BGMAC_DS_MM_MASK) >>
 191 -                       BGMAC_DS_MM_SHIFT;
 192 -       if (imode == 0 || imode == 1) {
 193 -               if (bgmac->autoneg)
 194 -                       bgmac_speed(bgmac, BGMAC_SPEED_100);
 195 -               else
 196 -                       bgmac_speed(bgmac, bgmac->speed);
 197 +       struct bcma_device *core = bgmac->core;
 198 +       struct bcma_chipinfo *ci = &core->bus->chipinfo;
 199 +       u8 imode;
 200 +
 201 +       if (ci->id == BCMA_CHIP_ID_BCM4707 ||
 202 +           ci->id == BCMA_CHIP_ID_BCM53018) {
 203 +               bcma_awrite32(core, BCMA_IOCTL,
 204 +                             bcma_aread32(core, BCMA_IOCTL) | 0x40 |
 205 +                             BGMAC_BCMA_IOCTL_SW_CLKEN);
 206 +               bgmac->mac_speed = SPEED_2500;
 207 +               bgmac->mac_duplex = DUPLEX_FULL;
 208 +               bgmac_mac_speed(bgmac);
 209 +       } else {
 210 +               imode = (bgmac_read(bgmac, BGMAC_DEV_STATUS) &
 211 +                       BGMAC_DS_MM_MASK) >> BGMAC_DS_MM_SHIFT;
 212 +               if (imode == 0 || imode == 1) {
 213 +                       bgmac->mac_speed = SPEED_100;
 214 +                       bgmac->mac_duplex = DUPLEX_FULL;
 215 +                       bgmac_mac_speed(bgmac);
 216 +               }
 217         }
 218  }
 219
 220 @@ -910,7 +892,7 @@ static void bgmac_chip_reset(struct bgma
 221         struct bcma_device *core = bgmac->core;
 222         struct bcma_bus *bus = core->bus;
 223         struct bcma_chipinfo *ci = &bus->chipinfo;
 224 -       u32 flags = 0;
 225 +       u32 flags;
 226         u32 iost;
 227         int i;
 228
 229 @@ -933,26 +915,36 @@ static void bgmac_chip_reset(struct bgma
 230         }
 231
 232         iost = bcma_aread32(core, BCMA_IOST);
 233 -       if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 10) ||
 234 +       if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
 235             (ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
 236 -           (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9))
 237 +           (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188))
 238                 iost &= ~BGMAC_BCMA_IOST_ATTACHED;
 239
 240 -       if (iost & BGMAC_BCMA_IOST_ATTACHED) {
 241 -               flags = BGMAC_BCMA_IOCTL_SW_CLKEN;
 242 -               if (!bgmac->has_robosw)
 243 -                       flags |= BGMAC_BCMA_IOCTL_SW_RESET;
 244 +       /* 3GMAC: for BCM4707, only do core reset at bgmac_probe() */
 245 +       if (ci->id != BCMA_CHIP_ID_BCM4707) {
 246 +               flags = 0;
 247 +               if (iost & BGMAC_BCMA_IOST_ATTACHED) {
 248 +                       flags = BGMAC_BCMA_IOCTL_SW_CLKEN;
 249 +                       if (!bgmac->has_robosw)
 250 +                               flags |= BGMAC_BCMA_IOCTL_SW_RESET;
 251 +               }
 252 +               bcma_core_enable(core, flags);
 253         }
 254
 255 -       bcma_core_enable(core, flags);
 256 -
 257 -       if (core->id.rev > 2) {
 258 -               bgmac_set(bgmac, BCMA_CLKCTLST, 1 << 8);
 259 -               bgmac_wait_value(bgmac->core, BCMA_CLKCTLST, 1 << 24, 1 << 24,
 260 +       /* Request Misc PLL for corerev > 2 */
 261 +       if (core->id.rev > 2 &&
 262 +           ci->id != BCMA_CHIP_ID_BCM4707 &&
 263 +           ci->id != BCMA_CHIP_ID_BCM53018) {
 264 +               bgmac_set(bgmac, BCMA_CLKCTLST,
 265 +                         BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ);
 266 +               bgmac_wait_value(bgmac->core, BCMA_CLKCTLST,
 267 +                                BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
 268 +                                BGMAC_BCMA_CLKCTLST_MISC_PLL_ST,
 269                                  1000);
 270         }
 271
 272 -       if (ci->id == BCMA_CHIP_ID_BCM5357 || ci->id == BCMA_CHIP_ID_BCM4749 ||
 273 +       if (ci->id == BCMA_CHIP_ID_BCM5357 ||
 274 +           ci->id == BCMA_CHIP_ID_BCM4749 ||
 275             ci->id == BCMA_CHIP_ID_BCM53572) {
 276                 struct bcma_drv_cc *cc = &bgmac->core->bus->drv_cc;
 277                 u8 et_swtype = 0;
 278 @@ -967,10 +959,11 @@ static void bgmac_chip_reset(struct bgma
 279                         et_swtype &= 0x0f;
 280                         et_swtype <<= 4;
 281                         sw_type = et_swtype;
 282 -               } else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == 9) {
 283 +               } else if (ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM5358) {
 284                         sw_type = BGMAC_CHIPCTL_1_SW_TYPE_EPHYRMII;
 285 -               } else if ((ci->id != BCMA_CHIP_ID_BCM53572 && ci->pkg == 10) ||
 286 -                          (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == 9)) {
 287 +               } else if ((ci->id == BCMA_CHIP_ID_BCM5357 && ci->pkg == BCMA_PKG_ID_BCM47186) ||
 288 +                          (ci->id == BCMA_CHIP_ID_BCM4749 && ci->pkg == 10) ||
 289 +                          (ci->id == BCMA_CHIP_ID_BCM53572 && ci->pkg == BCMA_PKG_ID_BCM47188)) {
 290                         sw_type = BGMAC_CHIPCTL_1_IF_TYPE_RGMII |
 291                                   BGMAC_CHIPCTL_1_SW_TYPE_RGMII;
 292                 }
 293 @@ -1007,8 +1000,10 @@ static void bgmac_chip_reset(struct bgma
 294                              BGMAC_CMDCFG_PROM |
 295                              BGMAC_CMDCFG_NLC |
 296                              BGMAC_CMDCFG_CFE |
 297 -                            BGMAC_CMDCFG_SR,
 298 +                            BGMAC_CMDCFG_SR(core->id.rev),
 299                              false);
 300 +       bgmac->mac_speed = SPEED_UNKNOWN;
 301 +       bgmac->mac_duplex = DUPLEX_UNKNOWN;
 302
 303         bgmac_clear_mib(bgmac);
 304         if (core->id.id == BCMA_CORE_4706_MAC_GBIT)
 305 @@ -1048,7 +1043,7 @@ static void bgmac_enable(struct bgmac *b
 306
 307         cmdcfg = bgmac_read(bgmac, BGMAC_CMDCFG);
 308         bgmac_cmdcfg_maskset(bgmac, ~(BGMAC_CMDCFG_TE | BGMAC_CMDCFG_RE),
 309 -                            BGMAC_CMDCFG_SR, true);
 310 +                            BGMAC_CMDCFG_SR(bgmac->core->id.rev), true);
 311         udelay(2);
 312         cmdcfg |= BGMAC_CMDCFG_TE | BGMAC_CMDCFG_RE;
 313         bgmac_write(bgmac, BGMAC_CMDCFG, cmdcfg);
 314 @@ -1077,12 +1072,16 @@ static void bgmac_enable(struct bgmac *b
 315                 break;
 316         }
 317
 318 -       rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
 319 -       rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
 320 -       bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) / 1000000;
 321 -       mdp = (bp_clk * 128 / 1000) - 3;
 322 -       rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
 323 -       bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
 324 +       if (ci->id != BCMA_CHIP_ID_BCM4707 &&
 325 +           ci->id != BCMA_CHIP_ID_BCM53018) {
 326 +               rxq_ctl = bgmac_read(bgmac, BGMAC_RXQ_CTL);
 327 +               rxq_ctl &= ~BGMAC_RXQ_CTL_MDP_MASK;
 328 +               bp_clk = bcma_pmu_get_bus_clock(&bgmac->core->bus->drv_cc) /
 329 +                               1000000;
 330 +               mdp = (bp_clk * 128 / 1000) - 3;
 331 +               rxq_ctl |= (mdp << BGMAC_RXQ_CTL_MDP_SHIFT);
 332 +               bgmac_write(bgmac, BGMAC_RXQ_CTL, rxq_ctl);
 333 +       }
 334  }
 335
 336  /* http://bcm-v4.sipsolutions.net/mac-gbit/gmac/chipinit */
 337 @@ -1108,13 +1107,6 @@ static void bgmac_chip_init(struct bgmac
 338
 339         bgmac_write(bgmac, BGMAC_RXMAX_LENGTH, 32 + ETHER_MAX_LEN);
 340
 341 -       if (!bgmac->autoneg) {
 342 -               bgmac_speed(bgmac, bgmac->speed);
 343 -               bgmac_phy_force(bgmac);
 344 -       } else if (bgmac->speed) { /* if there is anything to adv */
 345 -               bgmac_phy_advertise(bgmac);
 346 -       }
 347 -
 348         if (full_init) {
 349                 bgmac_dma_init(bgmac);
 350                 if (1) /* FIXME: is there any case we don't want IRQs? */
 351 @@ -1204,6 +1196,8 @@ static int bgmac_open(struct net_device
 352         }
 353         napi_enable(&bgmac->napi);
 354
 355 +       phy_start(bgmac->phy_dev);
 356 +
 357         netif_carrier_on(net_dev);
 358
 359  err_out:
 360 @@ -1216,6 +1210,8 @@ static int bgmac_stop(struct net_device
 361
 362         netif_carrier_off(net_dev);
 363
 364 +       phy_stop(bgmac->phy_dev);
 365 +
 366         napi_disable(&bgmac->napi);
 367         bgmac_chip_intrs_off(bgmac);
 368         free_irq(bgmac->core->irq, net_dev);
 369 @@ -1252,27 +1248,11 @@ static int bgmac_set_mac_address(struct
 370  static int bgmac_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
 371  {
 372         struct bgmac *bgmac = netdev_priv(net_dev);
 373 -       struct mii_ioctl_data *data = if_mii(ifr);
 374
 375 -       switch (cmd) {
 376 -       case SIOCGMIIPHY:
 377 -               data->phy_id = bgmac->phyaddr;
 378 -               /* fallthru */
 379 -       case SIOCGMIIREG:
 380 -               if (!netif_running(net_dev))
 381 -                       return -EAGAIN;
 382 -               data->val_out = bgmac_phy_read(bgmac, data->phy_id,
 383 -                                              data->reg_num & 0x1f);
 384 -               return 0;
 385 -       case SIOCSMIIREG:
 386 -               if (!netif_running(net_dev))
 387 -                       return -EAGAIN;
 388 -               bgmac_phy_write(bgmac, data->phy_id, data->reg_num & 0x1f,
 389 -                               data->val_in);
 390 -               return 0;
 391 -       default:
 392 -               return -EOPNOTSUPP;
 393 -       }
 394 +       if (!netif_running(net_dev))
 395 +               return -EINVAL;
 396 +
 397 +       return phy_mii_ioctl(bgmac->phy_dev, ifr, cmd);
 398  }
 399
 400  static const struct net_device_ops bgmac_netdev_ops = {
 401 @@ -1294,61 +1274,16 @@ static int bgmac_get_settings(struct net
 402  {
 403         struct bgmac *bgmac = netdev_priv(net_dev);
 404
 405 -       cmd->supported = SUPPORTED_10baseT_Half |
 406 -                        SUPPORTED_10baseT_Full |
 407 -                        SUPPORTED_100baseT_Half |
 408 -                        SUPPORTED_100baseT_Full |
 409 -                        SUPPORTED_1000baseT_Half |
 410 -                        SUPPORTED_1000baseT_Full |
 411 -                        SUPPORTED_Autoneg;
 412 -
 413 -       if (bgmac->autoneg) {
 414 -               WARN_ON(cmd->advertising);
 415 -               if (bgmac->full_duplex) {
 416 -                       if (bgmac->speed & BGMAC_SPEED_10)
 417 -                               cmd->advertising |= ADVERTISED_10baseT_Full;
 418 -                       if (bgmac->speed & BGMAC_SPEED_100)
 419 -                               cmd->advertising |= ADVERTISED_100baseT_Full;
 420 -                       if (bgmac->speed & BGMAC_SPEED_1000)
 421 -                               cmd->advertising |= ADVERTISED_1000baseT_Full;
 422 -               } else {
 423 -                       if (bgmac->speed & BGMAC_SPEED_10)
 424 -                               cmd->advertising |= ADVERTISED_10baseT_Half;
 425 -                       if (bgmac->speed & BGMAC_SPEED_100)
 426 -                               cmd->advertising |= ADVERTISED_100baseT_Half;
 427 -                       if (bgmac->speed & BGMAC_SPEED_1000)
 428 -                               cmd->advertising |= ADVERTISED_1000baseT_Half;
 429 -               }
 430 -       } else {
 431 -               switch (bgmac->speed) {
 432 -               case BGMAC_SPEED_10:
 433 -                       ethtool_cmd_speed_set(cmd, SPEED_10);
 434 -                       break;
 435 -               case BGMAC_SPEED_100:
 436 -                       ethtool_cmd_speed_set(cmd, SPEED_100);
 437 -                       break;
 438 -               case BGMAC_SPEED_1000:
 439 -                       ethtool_cmd_speed_set(cmd, SPEED_1000);
 440 -                       break;
 441 -               }
 442 -       }
 443 -
 444 -       cmd->duplex = bgmac->full_duplex ? DUPLEX_FULL : DUPLEX_HALF;
 445 -
 446 -       cmd->autoneg = bgmac->autoneg;
 447 -
 448 -       return 0;
 449 +       return phy_ethtool_gset(bgmac->phy_dev, cmd);
 450  }
 451
 452 -#if 0
 453  static int bgmac_set_settings(struct net_device *net_dev,
 454                               struct ethtool_cmd *cmd)
 455  {
 456         struct bgmac *bgmac = netdev_priv(net_dev);
 457
 458 -       return -1;
 459 +       return phy_ethtool_sset(bgmac->phy_dev, cmd);
 460  }
 461 -#endif
 462
 463  static void bgmac_get_drvinfo(struct net_device *net_dev,
 464                               struct ethtool_drvinfo *info)
 465 @@ -1359,6 +1294,7 @@ static void bgmac_get_drvinfo(struct net
 466
 467  static const struct ethtool_ops bgmac_ethtool_ops = {
 468         .get_settings           = bgmac_get_settings,
 469 +       .set_settings           = bgmac_set_settings,
 470         .get_drvinfo            = bgmac_get_drvinfo,
 471  };
 472
 473 @@ -1377,9 +1313,35 @@ static int bgmac_mii_write(struct mii_bu
 474         return bgmac_phy_write(bus->priv, mii_id, regnum, value);
 475  }
 476
 477 +static void bgmac_adjust_link(struct net_device *net_dev)
 478 +{
 479 +       struct bgmac *bgmac = netdev_priv(net_dev);
 480 +       struct phy_device *phy_dev = bgmac->phy_dev;
 481 +       bool update = false;
 482 +
 483 +       if (phy_dev->link) {
 484 +               if (phy_dev->speed != bgmac->mac_speed) {
 485 +                       bgmac->mac_speed = phy_dev->speed;
 486 +                       update = true;
 487 +               }
 488 +
 489 +               if (phy_dev->duplex != bgmac->mac_duplex) {
 490 +                       bgmac->mac_duplex = phy_dev->duplex;
 491 +                       update = true;
 492 +               }
 493 +       }
 494 +
 495 +       if (update) {
 496 +               bgmac_mac_speed(bgmac);
 497 +               phy_print_status(phy_dev);
 498 +       }
 499 +}
 500 +
 501  static int bgmac_mii_register(struct bgmac *bgmac)
 502  {
 503         struct mii_bus *mii_bus;
 504 +       struct phy_device *phy_dev;
 505 +       char bus_id[MII_BUS_ID_SIZE + 3];
 506         int i, err = 0;
 507
 508         mii_bus = mdiobus_alloc();
 509 @@ -1411,8 +1373,22 @@ static int bgmac_mii_register(struct bgm
 510
 511         bgmac->mii_bus = mii_bus;
 512
 513 +       /* Connect to the PHY */
 514 +       snprintf(bus_id, sizeof(bus_id), PHY_ID_FMT, mii_bus->id,
 515 +                bgmac->phyaddr);
 516 +       phy_dev = phy_connect(bgmac->net_dev, bus_id, &bgmac_adjust_link,
 517 +                             PHY_INTERFACE_MODE_MII);
 518 +       if (IS_ERR(phy_dev)) {
 519 +               bgmac_err(bgmac, "PHY connecton failed\n");
 520 +               err = PTR_ERR(phy_dev);
 521 +               goto err_unregister_bus;
 522 +       }
 523 +       bgmac->phy_dev = phy_dev;
 524 +
 525         return err;
 526
 527 +err_unregister_bus:
 528 +       mdiobus_unregister(mii_bus);
 529  err_free_irq:
 530         kfree(mii_bus->irq);
 531  err_free_bus:
 532 @@ -1467,9 +1443,6 @@ static int bgmac_probe(struct bcma_devic
 533         bcma_set_drvdata(core, bgmac);
 534
 535         /* Defaults */
 536 -       bgmac->autoneg = true;
 537 -       bgmac->full_duplex = true;
 538 -       bgmac->speed = BGMAC_SPEED_10 | BGMAC_SPEED_100 | BGMAC_SPEED_1000;
 539         memcpy(bgmac->net_dev->dev_addr, mac, ETH_ALEN);
 540
 541         /* On BCM4706 we need common core to access PHY */
 542 @@ -1500,6 +1473,27 @@ static int bgmac_probe(struct bcma_devic
 543
 544         bgmac_chip_reset(bgmac);
 545
 546 +       /* For Northstar, we have to take all GMAC core out of reset */
 547 +       if (core->id.id == BCMA_CHIP_ID_BCM4707 ||
 548 +           core->id.id == BCMA_CHIP_ID_BCM53018) {
 549 +               struct bcma_device *ns_core;
 550 +               int ns_gmac;
 551 +
 552 +               /* Northstar has 4 GMAC cores */
 553 +               for (ns_gmac = 0; ns_gmac < 4; ns_gmac++) {
 554 +                       /* As Northstar requirement, we have to reset all GMACs
 555 +                        * before accessing one. bgmac_chip_reset() call
 556 +                        * bcma_core_enable() for this core. Then the other
 557 +                        * three GMACs didn't reset.  We do it here.
 558 +                        */
 559 +                       ns_core = bcma_find_core_unit(core->bus,
 560 +                                                     BCMA_CORE_MAC_GBIT,
 561 +                                                     ns_gmac);
 562 +                       if (ns_core && !bcma_core_is_enabled(ns_core))
 563 +                               bcma_core_enable(ns_core, 0);
 564 +               }
 565 +       }
 566 +
 567         err = bgmac_dma_alloc(bgmac);
 568         if (err) {
 569                 bgmac_err(bgmac, "Unable to alloc memory for DMA\n");
 570 @@ -1524,14 +1518,12 @@ static int bgmac_probe(struct bcma_devic
 571         err = bgmac_mii_register(bgmac);
 572         if (err) {
 573                 bgmac_err(bgmac, "Cannot register MDIO\n");
 574 -               err = -ENOTSUPP;
 575                 goto err_dma_free;
 576         }
 577
 578         err = register_netdev(bgmac->net_dev);
 579         if (err) {
 580                 bgmac_err(bgmac, "Cannot register net device\n");
 581 -               err = -ENOTSUPP;
 582                 goto err_mii_unregister;
 583         }
 584
 585 --- a/drivers/net/ethernet/broadcom/bgmac.h
 586 +++ b/drivers/net/ethernet/broadcom/bgmac.h
 587 @@ -95,7 +95,11 @@
 588  #define  BGMAC_RXQ_CTL_MDP_SHIFT               24
 589  #define BGMAC_GPIO_SELECT                      0x194
 590  #define BGMAC_GPIO_OUTPUT_EN                   0x198
 591 -/* For 0x1e0 see BCMA_CLKCTLST */
 592 +
 593 +/* For 0x1e0 see BCMA_CLKCTLST. Below are BGMAC specific bits */
 594 +#define  BGMAC_BCMA_CLKCTLST_MISC_PLL_REQ      0x00000100
 595 +#define  BGMAC_BCMA_CLKCTLST_MISC_PLL_ST       0x01000000
 596 +
 597  #define BGMAC_HW_WAR                           0x1e4
 598  #define BGMAC_PWR_CTL                          0x1e8
 599  #define BGMAC_DMA_BASE0                                0x200           /* Tx and Rx controller */
 600 @@ -185,6 +189,7 @@
 601  #define   BGMAC_CMDCFG_ES_10                   0x00000000
 602  #define   BGMAC_CMDCFG_ES_100                  0x00000004
 603  #define   BGMAC_CMDCFG_ES_1000                 0x00000008
 604 +#define   BGMAC_CMDCFG_ES_2500                 0x0000000C
 605  #define  BGMAC_CMDCFG_PROM                     0x00000010      /* Set to activate promiscuous mode */
 606  #define  BGMAC_CMDCFG_PAD_EN                   0x00000020
 607  #define  BGMAC_CMDCFG_CF                       0x00000040
 608 @@ -193,7 +198,9 @@
 609  #define  BGMAC_CMDCFG_TAI                      0x00000200
 610  #define  BGMAC_CMDCFG_HD                       0x00000400      /* Set if in half duplex mode */
 611  #define  BGMAC_CMDCFG_HD_SHIFT                 10
 612 -#define  BGMAC_CMDCFG_SR                       0x00000800      /* Set to reset mode */
 613 +#define  BGMAC_CMDCFG_SR_REV0                  0x00000800      /* Set to reset mode, for other revs */
 614 +#define  BGMAC_CMDCFG_SR_REV4                  0x00002000      /* Set to reset mode, only for core rev 4 */
 615 +#define  BGMAC_CMDCFG_SR(rev)  ((rev == 4) ? BGMAC_CMDCFG_SR_REV4 : BGMAC_CMDCFG_SR_REV0)
 616  #define  BGMAC_CMDCFG_ML                       0x00008000      /* Set to activate mac loopback mode */
 617  #define  BGMAC_CMDCFG_AE                       0x00400000
 618  #define  BGMAC_CMDCFG_CFE                      0x00800000
 619 @@ -216,27 +223,6 @@
 620  #define BGMAC_RX_STATUS                                0xb38
 621  #define BGMAC_TX_STATUS                                0xb3c
 622
 623 -#define BGMAC_PHY_CTL                          0x00
 624 -#define  BGMAC_PHY_CTL_SPEED_MSB               0x0040
 625 -#define  BGMAC_PHY_CTL_DUPLEX                  0x0100          /* duplex mode */
 626 -#define  BGMAC_PHY_CTL_RESTART                 0x0200          /* restart autonegotiation */
 627 -#define  BGMAC_PHY_CTL_ANENAB                  0x1000          /* enable autonegotiation */
 628 -#define  BGMAC_PHY_CTL_SPEED                   0x2000
 629 -#define  BGMAC_PHY_CTL_LOOP                    0x4000          /* loopback */
 630 -#define  BGMAC_PHY_CTL_RESET                   0x8000          /* reset */
 631 -/* Helpers */
 632 -#define  BGMAC_PHY_CTL_SPEED_10                        0
 633 -#define  BGMAC_PHY_CTL_SPEED_100               BGMAC_PHY_CTL_SPEED
 634 -#define  BGMAC_PHY_CTL_SPEED_1000              BGMAC_PHY_CTL_SPEED_MSB
 635 -#define BGMAC_PHY_ADV                          0x04
 636 -#define  BGMAC_PHY_ADV_10HALF                  0x0020          /* advertise 10MBits/s half duplex */
 637 -#define  BGMAC_PHY_ADV_10FULL                  0x0040          /* advertise 10MBits/s full duplex */
 638 -#define  BGMAC_PHY_ADV_100HALF                 0x0080          /* advertise 100MBits/s half duplex */
 639 -#define  BGMAC_PHY_ADV_100FULL                 0x0100          /* advertise 100MBits/s full duplex */
 640 -#define BGMAC_PHY_ADV2                         0x09
 641 -#define  BGMAC_PHY_ADV2_1000HALF               0x0100          /* advertise 1000MBits/s half duplex */
 642 -#define  BGMAC_PHY_ADV2_1000FULL               0x0200          /* advertise 1000MBits/s full duplex */
 643 -
 644  /* BCMA GMAC core specific IO Control (BCMA_IOCTL) flags */
 645  #define BGMAC_BCMA_IOCTL_SW_CLKEN              0x00000004      /* PHY Clock Enable */
 646  #define BGMAC_BCMA_IOCTL_SW_RESET              0x00000008      /* PHY Reset */
 647 @@ -254,9 +240,34 @@
 648  #define  BGMAC_DMA_TX_SUSPEND                  0x00000002
 649  #define  BGMAC_DMA_TX_LOOPBACK                 0x00000004
 650  #define  BGMAC_DMA_TX_FLUSH                    0x00000010
 651 +#define  BGMAC_DMA_TX_MR_MASK                  0x000000C0      /* Multiple outstanding reads */
 652 +#define  BGMAC_DMA_TX_MR_SHIFT                 6
 653 +#define   BGMAC_DMA_TX_MR_1                    0
 654 +#define   BGMAC_DMA_TX_MR_2                    1
 655  #define  BGMAC_DMA_TX_PARITY_DISABLE           0x00000800
 656  #define  BGMAC_DMA_TX_ADDREXT_MASK             0x00030000
 657  #define  BGMAC_DMA_TX_ADDREXT_SHIFT            16
 658 +#define  BGMAC_DMA_TX_BL_MASK                  0x001C0000      /* BurstLen bits */
 659 +#define  BGMAC_DMA_TX_BL_SHIFT                 18
 660 +#define   BGMAC_DMA_TX_BL_16                   0
 661 +#define   BGMAC_DMA_TX_BL_32                   1
 662 +#define   BGMAC_DMA_TX_BL_64                   2
 663 +#define   BGMAC_DMA_TX_BL_128                  3
 664 +#define   BGMAC_DMA_TX_BL_256                  4
 665 +#define   BGMAC_DMA_TX_BL_512                  5
 666 +#define   BGMAC_DMA_TX_BL_1024                 6
 667 +#define  BGMAC_DMA_TX_PC_MASK                  0x00E00000      /* Prefetch control */
 668 +#define  BGMAC_DMA_TX_PC_SHIFT                 21
 669 +#define   BGMAC_DMA_TX_PC_0                    0
 670 +#define   BGMAC_DMA_TX_PC_4                    1
 671 +#define   BGMAC_DMA_TX_PC_8                    2
 672 +#define   BGMAC_DMA_TX_PC_16                   3
 673 +#define  BGMAC_DMA_TX_PT_MASK                  0x03000000      /* Prefetch threshold */
 674 +#define  BGMAC_DMA_TX_PT_SHIFT                 24
 675 +#define   BGMAC_DMA_TX_PT_1                    0
 676 +#define   BGMAC_DMA_TX_PT_2                    1
 677 +#define   BGMAC_DMA_TX_PT_4                    2
 678 +#define   BGMAC_DMA_TX_PT_8                    3
 679  #define BGMAC_DMA_TX_INDEX                     0x04
 680  #define BGMAC_DMA_TX_RINGLO                    0x08
 681  #define BGMAC_DMA_TX_RINGHI                    0x0C
 682 @@ -284,8 +295,33 @@
 683  #define  BGMAC_DMA_RX_DIRECT_FIFO              0x00000100
 684  #define  BGMAC_DMA_RX_OVERFLOW_CONT            0x00000400
 685  #define  BGMAC_DMA_RX_PARITY_DISABLE           0x00000800
 686 +#define  BGMAC_DMA_RX_MR_MASK                  0x000000C0      /* Multiple outstanding reads */
 687 +#define  BGMAC_DMA_RX_MR_SHIFT                 6
 688 +#define   BGMAC_DMA_TX_MR_1                    0
 689 +#define   BGMAC_DMA_TX_MR_2                    1
 690  #define  BGMAC_DMA_RX_ADDREXT_MASK             0x00030000
 691  #define  BGMAC_DMA_RX_ADDREXT_SHIFT            16
 692 +#define  BGMAC_DMA_RX_BL_MASK                  0x001C0000      /* BurstLen bits */
 693 +#define  BGMAC_DMA_RX_BL_SHIFT                 18
 694 +#define   BGMAC_DMA_RX_BL_16                   0
 695 +#define   BGMAC_DMA_RX_BL_32                   1
 696 +#define   BGMAC_DMA_RX_BL_64                   2
 697 +#define   BGMAC_DMA_RX_BL_128                  3
 698 +#define   BGMAC_DMA_RX_BL_256                  4
 699 +#define   BGMAC_DMA_RX_BL_512                  5
 700 +#define   BGMAC_DMA_RX_BL_1024                 6
 701 +#define  BGMAC_DMA_RX_PC_MASK                  0x00E00000      /* Prefetch control */
 702 +#define  BGMAC_DMA_RX_PC_SHIFT                 21
 703 +#define   BGMAC_DMA_RX_PC_0                    0
 704 +#define   BGMAC_DMA_RX_PC_4                    1
 705 +#define   BGMAC_DMA_RX_PC_8                    2
 706 +#define   BGMAC_DMA_RX_PC_16                   3
 707 +#define  BGMAC_DMA_RX_PT_MASK                  0x03000000      /* Prefetch threshold */
 708 +#define  BGMAC_DMA_RX_PT_SHIFT                 24
 709 +#define   BGMAC_DMA_RX_PT_1                    0
 710 +#define   BGMAC_DMA_RX_PT_2                    1
 711 +#define   BGMAC_DMA_RX_PT_4                    2
 712 +#define   BGMAC_DMA_RX_PT_8                    3
 713  #define BGMAC_DMA_RX_INDEX                     0x24
 714  #define BGMAC_DMA_RX_RINGLO                    0x28
 715  #define BGMAC_DMA_RX_RINGHI                    0x2C
 716 @@ -342,10 +378,6 @@
 717  #define BGMAC_CHIPCTL_1_SW_TYPE_RGMII          0x000000C0
 718  #define BGMAC_CHIPCTL_1_RXC_DLL_BYPASS         0x00010000
 719
 720 -#define BGMAC_SPEED_10                         0x0001
 721 -#define BGMAC_SPEED_100                                0x0002
 722 -#define BGMAC_SPEED_1000                       0x0004
 723 -
 724  #define BGMAC_WEIGHT   64
 725
 726  #define ETHER_MAX_LEN   1518
 727 @@ -402,6 +434,7 @@ struct bgmac {
 728         struct net_device *net_dev;
 729         struct napi_struct napi;
 730         struct mii_bus *mii_bus;
 731 +       struct phy_device *phy_dev;
 732
 733         /* DMA */
 734         struct bgmac_dma_ring tx_ring[BGMAC_MAX_TX_RINGS];
 735 @@ -416,10 +449,9 @@ struct bgmac {
 736         u32 int_mask;
 737         u32 int_status;
 738
 739 -       /* Speed-related */
 740 -       int speed;
 741 -       bool autoneg;
 742 -       bool full_duplex;
 743 +       /* Current MAC state */
 744 +       int mac_speed;
 745 +       int mac_duplex;
 746
 747         u8 phyaddr;
 748         bool has_robosw;