target/linux/generic/patches-3.10/771-bgmac-pending.patch

   1 --- a/drivers/net/ethernet/broadcom/bgmac.c
   2 +++ b/drivers/net/ethernet/broadcom/bgmac.c
   3 @@ -725,11 +725,9 @@ static void bgmac_phy_reset(struct bgmac
   4         if (bgmac->phyaddr == BGMAC_PHY_NOREGS)
   5                 return;
   6
   7 -       bgmac_phy_write(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL,
   8 -                       BGMAC_PHY_CTL_RESET);
   9 +       bgmac_phy_write(bgmac, bgmac->phyaddr, MII_BMCR, BMCR_RESET);
  10         udelay(100);
  11 -       if (bgmac_phy_read(bgmac, bgmac->phyaddr, BGMAC_PHY_CTL) &
  12 -           BGMAC_PHY_CTL_RESET)
  13 +       if (bgmac_phy_read(bgmac, bgmac->phyaddr, MII_BMCR) & BMCR_RESET)
  14                 bgmac_err(bgmac, "PHY reset failed\n");
  15         bgmac_phy_init(bgmac);
  16  }
  17 @@ -1200,27 +1198,11 @@ static int bgmac_set_mac_address(struct
  18  static int bgmac_ioctl(struct net_device *net_dev, struct ifreq *ifr, int cmd)
  19  {
  20         struct bgmac *bgmac = netdev_priv(net_dev);
  21 -       struct mii_ioctl_data *data = if_mii(ifr);
  22
  23 -       switch (cmd) {
  24 -       case SIOCGMIIPHY:
  25 -               data->phy_id = bgmac->phyaddr;
  26 -               /* fallthru */
  27 -       case SIOCGMIIREG:
  28 -               if (!netif_running(net_dev))
  29 -                       return -EAGAIN;
  30 -               data->val_out = bgmac_phy_read(bgmac, data->phy_id,
  31 -                                              data->reg_num & 0x1f);
  32 -               return 0;
  33 -       case SIOCSMIIREG:
  34 -               if (!netif_running(net_dev))
  35 -                       return -EAGAIN;
  36 -               bgmac_phy_write(bgmac, data->phy_id, data->reg_num & 0x1f,
  37 -                               data->val_in);
  38 -               return 0;
  39 -       default:
  40 -               return -EOPNOTSUPP;
  41 -       }
  42 +       if (!netif_running(net_dev))
  43 +               return -EINVAL;
  44 +
  45 +       return phy_mii_ioctl(bgmac->phy_dev, ifr, cmd);
  46  }
  47
  48  static const struct net_device_ops bgmac_netdev_ops = {
  49 --- a/drivers/net/ethernet/broadcom/bgmac.h
  50 +++ b/drivers/net/ethernet/broadcom/bgmac.h
  51 @@ -220,27 +220,6 @@
  52  #define BGMAC_RX_STATUS                                0xb38
  53  #define BGMAC_TX_STATUS                                0xb3c
  54
  55 -#define BGMAC_PHY_CTL                          0x00
  56 -#define  BGMAC_PHY_CTL_SPEED_MSB               0x0040
  57 -#define  BGMAC_PHY_CTL_DUPLEX                  0x0100          /* duplex mode */
  58 -#define  BGMAC_PHY_CTL_RESTART                 0x0200          /* restart autonegotiation */
  59 -#define  BGMAC_PHY_CTL_ANENAB                  0x1000          /* enable autonegotiation */
  60 -#define  BGMAC_PHY_CTL_SPEED                   0x2000
  61 -#define  BGMAC_PHY_CTL_LOOP                    0x4000          /* loopback */
  62 -#define  BGMAC_PHY_CTL_RESET                   0x8000          /* reset */
  63 -/* Helpers */
  64 -#define  BGMAC_PHY_CTL_SPEED_10                        0
  65 -#define  BGMAC_PHY_CTL_SPEED_100               BGMAC_PHY_CTL_SPEED
  66 -#define  BGMAC_PHY_CTL_SPEED_1000              BGMAC_PHY_CTL_SPEED_MSB
  67 -#define BGMAC_PHY_ADV                          0x04
  68 -#define  BGMAC_PHY_ADV_10HALF                  0x0020          /* advertise 10MBits/s half duplex */
  69 -#define  BGMAC_PHY_ADV_10FULL                  0x0040          /* advertise 10MBits/s full duplex */
  70 -#define  BGMAC_PHY_ADV_100HALF                 0x0080          /* advertise 100MBits/s half duplex */
  71 -#define  BGMAC_PHY_ADV_100FULL                 0x0100          /* advertise 100MBits/s full duplex */
  72 -#define BGMAC_PHY_ADV2                         0x09
  73 -#define  BGMAC_PHY_ADV2_1000HALF               0x0100          /* advertise 1000MBits/s half duplex */
  74 -#define  BGMAC_PHY_ADV2_1000FULL               0x0200          /* advertise 1000MBits/s full duplex */
  75 -
  76  /* BCMA GMAC core specific IO Control (BCMA_IOCTL) flags */
  77  #define BGMAC_BCMA_IOCTL_SW_CLKEN              0x00000004      /* PHY Clock Enable */
  78  #define BGMAC_BCMA_IOCTL_SW_RESET              0x00000008      /* PHY Reset */