target/linux/generic/patches-3.10/001-Revert-MIPS-microMIPS-Support-dynamic-ASID-sizing.patch

   1 From 8ea6cd7af124ad070b44a7f60e225e45e3f38f79 Mon Sep 17 00:00:00 2001
   2 From: David Daney <david.daney@cavium.com>
   3 Date: Mon, 13 May 2013 13:56:43 -0700
   4 Subject: [PATCH 1/3] Revert "MIPS: microMIPS: Support dynamic ASID sizing."
   5
   6 This reverts commit f6b06d9361a008afb93b97fb3683a6e92d69d0f4.
   7
   8 The next revert depends on this one, so this has to go too.
   9
  10 Signed-off-by: David Daney <david.daney@cavium.com>
  11 Cc: linux-mips@linux-mips.org
  12 Cc: linux-kernel@vger.kernel.org
  13 Cc: "Steven J. Hill" <Steven.Hill@imgtec.com>
  14 Cc: David Daney <david.daney@cavium.com>
  15 Patchwork: https://patchwork.linux-mips.org/patch/5241/
  16 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
  17 ---
  18  arch/mips/mm/tlbex.c |   34 ++--------------------------------
  19  1 file changed, 2 insertions(+), 32 deletions(-)
  20
  21 --- a/arch/mips/mm/tlbex.c
  22 +++ b/arch/mips/mm/tlbex.c
  23 @@ -309,32 +309,13 @@ static int check_for_high_segbits __cpui
  24  static void __cpuinit insn_fixup(unsigned int **start, unsigned int **stop,
  25                                         unsigned int i_const)
  26  {
  27 -       unsigned int **p;
  28 +       unsigned int **p, *ip;
  29
  30         for (p = start; p < stop; p++) {
  31 -#ifndef CONFIG_CPU_MICROMIPS
  32 -               unsigned int *ip;
  33 -
  34                 ip = *p;
  35                 *ip = (*ip & 0xffff0000) | i_const;
  36 -#else
  37 -               unsigned short *ip;
  38 -
  39 -               ip = ((unsigned short *)((unsigned int)*p - 1));
  40 -               if ((*ip & 0xf000) == 0x4000) {
  41 -                       *ip &= 0xfff1;
  42 -                       *ip |= (i_const << 1);
  43 -               } else if ((*ip & 0xf000) == 0x6000) {
  44 -                       *ip &= 0xfff1;
  45 -                       *ip |= ((i_const >> 2) << 1);
  46 -               } else {
  47 -                       ip++;
  48 -                       *ip = i_const;
  49 -               }
  50 -#endif
  51 -               local_flush_icache_range((unsigned long)ip,
  52 -                                        (unsigned long)ip + sizeof(*ip));
  53         }
  54 +       local_flush_icache_range((unsigned long)*p, (unsigned long)((*p) + 1));
  55  }
  56
  57  #define asid_insn_fixup(section, const)                                        \
  58 @@ -354,14 +335,6 @@ static void __cpuinit setup_asid(unsigne
  59         extern asmlinkage void handle_ri_rdhwr_vivt(void);
  60         unsigned long *vivt_exc;
  61
  62 -#ifdef CONFIG_CPU_MICROMIPS
  63 -       /*
  64 -        * Worst case optimised microMIPS addiu instructions support
  65 -        * only a 3-bit immediate value.
  66 -        */
  67 -       if(inc > 7)
  68 -               panic("Invalid ASID increment value!");
  69 -#endif
  70         asid_insn_fixup(__asid_inc, inc);
  71         asid_insn_fixup(__asid_mask, mask);
  72         asid_insn_fixup(__asid_version_mask, version_mask);
  73 @@ -369,9 +342,6 @@ static void __cpuinit setup_asid(unsigne
  74
  75         /* Patch up the 'handle_ri_rdhwr_vivt' handler. */
  76         vivt_exc = (unsigned long *) &handle_ri_rdhwr_vivt;
  77 -#ifdef CONFIG_CPU_MICROMIPS
  78 -       vivt_exc = (unsigned long *)((unsigned long) vivt_exc - 1);
  79 -#endif
  80         vivt_exc++;
  81         *vivt_exc = (*vivt_exc & ~mask) | mask;
  82