2 * B53 register access through MII registers
4 * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
6 * Permission to use, copy, modify, and/or distribute this software for any
7 * purpose with or without fee is hereby granted, provided that the above
8 * copyright notice and this permission notice appear in all copies.
10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19 #include <linux/kernel.h>
20 #include <linux/phy.h>
21 #include <linux/module.h>
25 #define B53_PSEUDO_PHY 0x1e /* Register Access Pseudo PHY */
28 #define REG_MII_PAGE 0x10 /* MII Page register */
29 #define REG_MII_ADDR 0x11 /* MII Address register */
30 #define REG_MII_DATA0 0x18 /* MII Data register 0 */
31 #define REG_MII_DATA1 0x19 /* MII Data register 1 */
32 #define REG_MII_DATA2 0x1a /* MII Data register 2 */
33 #define REG_MII_DATA3 0x1b /* MII Data register 3 */
35 #define REG_MII_PAGE_ENABLE BIT(0)
36 #define REG_MII_ADDR_WRITE BIT(0)
37 #define REG_MII_ADDR_READ BIT(1)
39 static int b53_mdio_op(struct b53_device *dev, u8 page, u8 reg, u16 op)
44 struct mii_bus *bus = dev->priv;
46 if (dev->current_page != page) {
48 v = (page << 8) | REG_MII_PAGE_ENABLE;
49 ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_PAGE, v);
52 dev->current_page = page;
55 /* set register address */
57 ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_ADDR, v);
61 /* check if operation completed */
62 for (i = 0; i < 5; ++i) {
63 v = mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_ADDR);
64 if (!(v & (REG_MII_ADDR_WRITE | REG_MII_ADDR_READ)))
66 usleep_range(10, 100);
75 static int b53_mdio_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val)
77 struct mii_bus *bus = dev->priv;
80 ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
84 *val = mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0) & 0xff;
89 static int b53_mdio_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val)
91 struct mii_bus *bus = dev->priv;
94 ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
98 *val = mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0);
103 static int b53_mdio_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val)
105 struct mii_bus *bus = dev->priv;
108 ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
112 *val = mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0);
113 *val |= mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA1) << 16;
118 static int b53_mdio_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val)
120 struct mii_bus *bus = dev->priv;
125 ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
129 for (i = 2; i >= 0; i--) {
131 temp |= mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i);
139 static int b53_mdio_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val)
141 struct mii_bus *bus = dev->priv;
146 ret = b53_mdio_op(dev, page, reg, REG_MII_ADDR_READ);
150 for (i = 3; i >= 0; i--) {
152 temp |= mdiobus_read(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i);
160 static int b53_mdio_write8(struct b53_device *dev, u8 page, u8 reg, u8 value)
162 struct mii_bus *bus = dev->priv;
165 ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0, value);
169 return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
172 static int b53_mdio_write16(struct b53_device *dev, u8 page, u8 reg,
175 struct mii_bus *bus = dev->priv;
178 ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0, value);
182 return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
185 static int b53_mdio_write32(struct b53_device *dev, u8 page, u8 reg,
188 struct mii_bus *bus = dev->priv;
192 for (i = 0; i < 2; i++) {
193 int ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i,
200 return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
204 static int b53_mdio_write48(struct b53_device *dev, u8 page, u8 reg,
207 struct mii_bus *bus = dev->priv;
211 for (i = 0; i < 3; i++) {
212 int ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i,
219 return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
223 static int b53_mdio_write64(struct b53_device *dev, u8 page, u8 reg,
226 struct mii_bus *bus = dev->priv;
230 for (i = 0; i < 4; i++) {
231 int ret = mdiobus_write(bus, B53_PSEUDO_PHY, REG_MII_DATA0 + i,
238 return b53_mdio_op(dev, page, reg, REG_MII_ADDR_WRITE);
241 static struct b53_io_ops b53_mdio_ops = {
242 .read8 = b53_mdio_read8,
243 .read16 = b53_mdio_read16,
244 .read32 = b53_mdio_read32,
245 .read48 = b53_mdio_read48,
246 .read64 = b53_mdio_read64,
247 .write8 = b53_mdio_write8,
248 .write16 = b53_mdio_write16,
249 .write32 = b53_mdio_write32,
250 .write48 = b53_mdio_write48,
251 .write64 = b53_mdio_write64,
254 static int b53_phy_probe(struct phy_device *phydev)
256 struct b53_device dev;
259 /* allow the generic phy driver to take over */
260 if (phydev->addr != B53_PSEUDO_PHY && phydev->addr != 0)
263 dev.current_page = 0xff;
264 dev.priv = phydev->bus;
265 dev.ops = &b53_mdio_ops;
267 mutex_init(&dev.reg_mutex);
269 ret = b53_switch_detect(&dev);
273 if (is5325(&dev) || is5365(&dev))
274 phydev->supported = SUPPORTED_100baseT_Full;
276 phydev->supported = SUPPORTED_1000baseT_Full;
278 phydev->advertising = phydev->supported;
283 static int b53_phy_config_init(struct phy_device *phydev)
285 struct b53_device *dev;
288 dev = b53_switch_alloc(&phydev->dev, &b53_mdio_ops, phydev->bus);
292 /* we don't use page 0xff, so force a page set */
293 dev->current_page = 0xff;
294 /* force the ethX as alias */
295 dev->sw_dev.alias = phydev->attached_dev->name;
297 ret = b53_switch_register(dev);
299 pr_info("failed to register switch: %i\n", ret);
308 static void b53_phy_remove(struct phy_device *phydev)
310 struct b53_device *priv = phydev->priv;
315 b53_switch_remove(priv);
320 static int b53_phy_config_aneg(struct phy_device *phydev)
325 static int b53_phy_read_status(struct phy_device *phydev)
327 struct b53_device *priv = phydev->priv;
329 if (is5325(priv) || is5365(priv))
332 phydev->speed = 1000;
334 phydev->duplex = DUPLEX_FULL;
336 phydev->state = PHY_RUNNING;
338 netif_carrier_on(phydev->attached_dev);
339 phydev->adjust_link(phydev->attached_dev);
344 /* BCM5325, BCM539x */
345 static struct phy_driver b53_phy_driver_id1 = {
346 .phy_id = 0x0143bc00,
347 .name = "Broadcom B53 (1)",
348 .phy_id_mask = 0x1ffffc00,
350 .probe = b53_phy_probe,
351 .remove = b53_phy_remove,
352 .config_aneg = b53_phy_config_aneg,
353 .config_init = b53_phy_config_init,
354 .read_status = b53_phy_read_status,
356 .owner = THIS_MODULE,
361 static struct phy_driver b53_phy_driver_id2 = {
362 .phy_id = 0x03625c00,
363 .name = "Broadcom B53 (2)",
364 .phy_id_mask = 0x1ffffc00,
366 .probe = b53_phy_probe,
367 .remove = b53_phy_remove,
368 .config_aneg = b53_phy_config_aneg,
369 .config_init = b53_phy_config_init,
370 .read_status = b53_phy_read_status,
372 .owner = THIS_MODULE,
376 int __init b53_phy_driver_register(void)
380 ret = phy_driver_register(&b53_phy_driver_id1);
384 ret = phy_driver_register(&b53_phy_driver_id2);
386 phy_driver_unregister(&b53_phy_driver_id1);
391 void __exit b53_phy_driver_unregister(void)
393 phy_driver_unregister(&b53_phy_driver_id2);
394 phy_driver_unregister(&b53_phy_driver_id1);
397 module_init(b53_phy_driver_register);
398 module_exit(b53_phy_driver_unregister);
400 MODULE_DESCRIPTION("B53 MDIO access driver");
401 MODULE_LICENSE("Dual BSD/GPL");