target/linux/generic/files/drivers/net/phy/b53/b53_common.c

   1 /*
   2  * B53 switch driver main logic
   3  *
   4  * Copyright (C) 2011-2013 Jonas Gorski <jogo@openwrt.org>
   5  *
   6  * Permission to use, copy, modify, and/or distribute this software for any
   7  * purpose with or without fee is hereby granted, provided that the above
   8  * copyright notice and this permission notice appear in all copies.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  11  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  12  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  13  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  14  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  15  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  16  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  17  */
  18
  19 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20
  21 #include <linux/delay.h>
  22 #include <linux/export.h>
  23 #include <linux/gpio.h>
  24 #include <linux/kernel.h>
  25 #include <linux/module.h>
  26 #include <linux/switch.h>
  27 #include <linux/platform_data/b53.h>
  28
  29 #include "b53_regs.h"
  30 #include "b53_priv.h"
  31
  32 /* buffer size needed for displaying all MIBs with max'd values */
  33 #define B53_BUF_SIZE    1188
  34
  35 struct b53_mib_desc {
  36         u8 size;
  37         u8 offset;
  38         const char *name;
  39 };
  40
  41
  42 /* BCM5365 MIB counters */
  43 static const struct b53_mib_desc b53_mibs_65[] = {
  44         { 8, 0x00, "TxOctets" },
  45         { 4, 0x08, "TxDropPkts" },
  46         { 4, 0x10, "TxBroadcastPkts" },
  47         { 4, 0x14, "TxMulticastPkts" },
  48         { 4, 0x18, "TxUnicastPkts" },
  49         { 4, 0x1c, "TxCollisions" },
  50         { 4, 0x20, "TxSingleCollision" },
  51         { 4, 0x24, "TxMultipleCollision" },
  52         { 4, 0x28, "TxDeferredTransmit" },
  53         { 4, 0x2c, "TxLateCollision" },
  54         { 4, 0x30, "TxExcessiveCollision" },
  55         { 4, 0x38, "TxPausePkts" },
  56         { 8, 0x44, "RxOctets" },
  57         { 4, 0x4c, "RxUndersizePkts" },
  58         { 4, 0x50, "RxPausePkts" },
  59         { 4, 0x54, "Pkts64Octets" },
  60         { 4, 0x58, "Pkts65to127Octets" },
  61         { 4, 0x5c, "Pkts128to255Octets" },
  62         { 4, 0x60, "Pkts256to511Octets" },
  63         { 4, 0x64, "Pkts512to1023Octets" },
  64         { 4, 0x68, "Pkts1024to1522Octets" },
  65         { 4, 0x6c, "RxOversizePkts" },
  66         { 4, 0x70, "RxJabbers" },
  67         { 4, 0x74, "RxAlignmentErrors" },
  68         { 4, 0x78, "RxFCSErrors" },
  69         { 8, 0x7c, "RxGoodOctets" },
  70         { 4, 0x84, "RxDropPkts" },
  71         { 4, 0x88, "RxUnicastPkts" },
  72         { 4, 0x8c, "RxMulticastPkts" },
  73         { 4, 0x90, "RxBroadcastPkts" },
  74         { 4, 0x94, "RxSAChanges" },
  75         { 4, 0x98, "RxFragments" },
  76         { },
  77 };
  78
  79 /* BCM63xx MIB counters */
  80 static const struct b53_mib_desc b53_mibs_63xx[] = {
  81         { 8, 0x00, "TxOctets" },
  82         { 4, 0x08, "TxDropPkts" },
  83         { 4, 0x0c, "TxQoSPkts" },
  84         { 4, 0x10, "TxBroadcastPkts" },
  85         { 4, 0x14, "TxMulticastPkts" },
  86         { 4, 0x18, "TxUnicastPkts" },
  87         { 4, 0x1c, "TxCollisions" },
  88         { 4, 0x20, "TxSingleCollision" },
  89         { 4, 0x24, "TxMultipleCollision" },
  90         { 4, 0x28, "TxDeferredTransmit" },
  91         { 4, 0x2c, "TxLateCollision" },
  92         { 4, 0x30, "TxExcessiveCollision" },
  93         { 4, 0x38, "TxPausePkts" },
  94         { 8, 0x3c, "TxQoSOctets" },
  95         { 8, 0x44, "RxOctets" },
  96         { 4, 0x4c, "RxUndersizePkts" },
  97         { 4, 0x50, "RxPausePkts" },
  98         { 4, 0x54, "Pkts64Octets" },
  99         { 4, 0x58, "Pkts65to127Octets" },
 100         { 4, 0x5c, "Pkts128to255Octets" },
 101         { 4, 0x60, "Pkts256to511Octets" },
 102         { 4, 0x64, "Pkts512to1023Octets" },
 103         { 4, 0x68, "Pkts1024to1522Octets" },
 104         { 4, 0x6c, "RxOversizePkts" },
 105         { 4, 0x70, "RxJabbers" },
 106         { 4, 0x74, "RxAlignmentErrors" },
 107         { 4, 0x78, "RxFCSErrors" },
 108         { 8, 0x7c, "RxGoodOctets" },
 109         { 4, 0x84, "RxDropPkts" },
 110         { 4, 0x88, "RxUnicastPkts" },
 111         { 4, 0x8c, "RxMulticastPkts" },
 112         { 4, 0x90, "RxBroadcastPkts" },
 113         { 4, 0x94, "RxSAChanges" },
 114         { 4, 0x98, "RxFragments" },
 115         { 4, 0xa0, "RxSymbolErrors" },
 116         { 4, 0xa4, "RxQoSPkts" },
 117         { 8, 0xa8, "RxQoSOctets" },
 118         { 4, 0xb0, "Pkts1523to2047Octets" },
 119         { 4, 0xb4, "Pkts2048to4095Octets" },
 120         { 4, 0xb8, "Pkts4096to8191Octets" },
 121         { 4, 0xbc, "Pkts8192to9728Octets" },
 122         { 4, 0xc0, "RxDiscarded" },
 123         { }
 124 };
 125
 126 /* MIB counters */
 127 static const struct b53_mib_desc b53_mibs[] = {
 128         { 8, 0x00, "TxOctets" },
 129         { 4, 0x08, "TxDropPkts" },
 130         { 4, 0x10, "TxBroadcastPkts" },
 131         { 4, 0x14, "TxMulticastPkts" },
 132         { 4, 0x18, "TxUnicastPkts" },
 133         { 4, 0x1c, "TxCollisions" },
 134         { 4, 0x20, "TxSingleCollision" },
 135         { 4, 0x24, "TxMultipleCollision" },
 136         { 4, 0x28, "TxDeferredTransmit" },
 137         { 4, 0x2c, "TxLateCollision" },
 138         { 4, 0x30, "TxExcessiveCollision" },
 139         { 4, 0x38, "TxPausePkts" },
 140         { 8, 0x50, "RxOctets" },
 141         { 4, 0x58, "RxUndersizePkts" },
 142         { 4, 0x5c, "RxPausePkts" },
 143         { 4, 0x60, "Pkts64Octets" },
 144         { 4, 0x64, "Pkts65to127Octets" },
 145         { 4, 0x68, "Pkts128to255Octets" },
 146         { 4, 0x6c, "Pkts256to511Octets" },
 147         { 4, 0x70, "Pkts512to1023Octets" },
 148         { 4, 0x74, "Pkts1024to1522Octets" },
 149         { 4, 0x78, "RxOversizePkts" },
 150         { 4, 0x7c, "RxJabbers" },
 151         { 4, 0x80, "RxAlignmentErrors" },
 152         { 4, 0x84, "RxFCSErrors" },
 153         { 8, 0x88, "RxGoodOctets" },
 154         { 4, 0x90, "RxDropPkts" },
 155         { 4, 0x94, "RxUnicastPkts" },
 156         { 4, 0x98, "RxMulticastPkts" },
 157         { 4, 0x9c, "RxBroadcastPkts" },
 158         { 4, 0xa0, "RxSAChanges" },
 159         { 4, 0xa4, "RxFragments" },
 160         { 4, 0xa8, "RxJumboPkts" },
 161         { 4, 0xac, "RxSymbolErrors" },
 162         { 4, 0xc0, "RxDiscarded" },
 163         { }
 164 };
 165
 166 static int b53_do_vlan_op(struct b53_device *dev, u8 op)
 167 {
 168         unsigned int i;
 169
 170         b53_write8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], VTA_START_CMD | op);
 171
 172         for (i = 0; i < 10; i++) {
 173                 u8 vta;
 174
 175                 b53_read8(dev, B53_ARLIO_PAGE, dev->vta_regs[0], &vta);
 176                 if (!(vta & VTA_START_CMD))
 177                         return 0;
 178
 179                 usleep_range(100, 200);
 180         }
 181
 182         return -EIO;
 183 }
 184
 185 static void b53_set_vlan_entry(struct b53_device *dev, u16 vid, u16 members,
 186                                u16 untag)
 187 {
 188         if (is5325(dev)) {
 189                 u32 entry = 0;
 190
 191                 if (members) {
 192                         entry = (untag << VA_UNTAG_S) | members;
 193                         if (dev->core_rev >= 3)
 194                                 entry |= VA_VALID_25_R4 | vid << VA_VID_HIGH_S;
 195                         else
 196                                 entry |= VA_VALID_25;
 197                 }
 198
 199                 b53_write32(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_25, entry);
 200                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, vid |
 201                             VTA_RW_STATE_WR | VTA_RW_OP_EN);
 202         } else if (is5365(dev)) {
 203                 u16 entry = 0;
 204
 205                 if (members)
 206                         entry = (untag << VA_UNTAG_S) | members | VA_VALID_65;
 207
 208                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_WRITE_65, entry);
 209                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_65, vid |
 210                             VTA_RW_STATE_WR | VTA_RW_OP_EN);
 211         } else {
 212                 b53_write16(dev, B53_ARLIO_PAGE, dev->vta_regs[1], vid);
 213                 b53_write32(dev, B53_ARLIO_PAGE, dev->vta_regs[2],
 214                             (untag << VTE_UNTAG_S) | members);
 215
 216                 b53_do_vlan_op(dev, VTA_CMD_WRITE);
 217         }
 218 }
 219
 220 void b53_set_forwarding(struct b53_device *dev, int enable)
 221 {
 222         u8 mgmt;
 223
 224         b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
 225
 226         if (enable)
 227                 mgmt |= SM_SW_FWD_EN;
 228         else
 229                 mgmt &= ~SM_SW_FWD_EN;
 230
 231         b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
 232 }
 233
 234 static void b53_enable_vlan(struct b53_device *dev, int enable)
 235 {
 236         u8 mgmt, vc0, vc1, vc4 = 0, vc5;
 237
 238         b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
 239         b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, &vc0);
 240         b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, &vc1);
 241
 242         if (is5325(dev) || is5365(dev)) {
 243                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
 244                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, &vc5);
 245         } else if (is63xx(dev)) {
 246                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, &vc4);
 247                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, &vc5);
 248         } else {
 249                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, &vc4);
 250                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, &vc5);
 251         }
 252
 253         mgmt &= ~SM_SW_FWD_MODE;
 254
 255         if (enable) {
 256                 vc0 |= VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID;
 257                 vc1 |= VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN;
 258                 vc4 &= ~VC4_ING_VID_CHECK_MASK;
 259                 vc4 |= VC4_ING_VID_VIO_DROP << VC4_ING_VID_CHECK_S;
 260                 vc5 |= VC5_DROP_VTABLE_MISS;
 261
 262                 if (is5325(dev))
 263                         vc0 &= ~VC0_RESERVED_1;
 264
 265                 if (is5325(dev) || is5365(dev))
 266                         vc1 |= VC1_RX_MCST_TAG_EN;
 267
 268                 if (!is5325(dev) && !is5365(dev)) {
 269                         if (dev->allow_vid_4095)
 270                                 vc5 |= VC5_VID_FFF_EN;
 271                         else
 272                                 vc5 &= ~VC5_VID_FFF_EN;
 273                 }
 274         } else {
 275                 vc0 &= ~(VC0_VLAN_EN | VC0_VID_CHK_EN | VC0_VID_HASH_VID);
 276                 vc1 &= ~(VC1_RX_MCST_UNTAG_EN | VC1_RX_MCST_FWD_EN);
 277                 vc4 &= ~VC4_ING_VID_CHECK_MASK;
 278                 vc5 &= ~VC5_DROP_VTABLE_MISS;
 279
 280                 if (is5325(dev) || is5365(dev))
 281                         vc4 |= VC4_ING_VID_VIO_FWD << VC4_ING_VID_CHECK_S;
 282                 else
 283                         vc4 |= VC4_ING_VID_VIO_TO_IMP << VC4_ING_VID_CHECK_S;
 284
 285                 if (is5325(dev) || is5365(dev))
 286                         vc1 &= ~VC1_RX_MCST_TAG_EN;
 287
 288                 if (!is5325(dev) && !is5365(dev))
 289                         vc5 &= ~VC5_VID_FFF_EN;
 290         }
 291
 292         b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL0, vc0);
 293         b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL1, vc1);
 294
 295         if (is5325(dev) || is5365(dev)) {
 296                 /* enable the high 8 bit vid check on 5325 */
 297                 if (is5325(dev) && enable)
 298                         b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3,
 299                                    VC3_HIGH_8BIT_EN);
 300                 else
 301                         b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
 302
 303                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, vc4);
 304                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_25, vc5);
 305         } else if (is63xx(dev)) {
 306                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3_63XX, 0);
 307                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_63XX, vc4);
 308                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5_63XX, vc5);
 309         } else {
 310                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_CTRL3, 0);
 311                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4, vc4);
 312                 b53_write8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL5, vc5);
 313         }
 314
 315         b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
 316 }
 317
 318 static int b53_set_jumbo(struct b53_device *dev, int enable, int allow_10_100)
 319 {
 320         u32 port_mask = 0;
 321         u16 max_size = JMS_MIN_SIZE;
 322
 323         if (is5325(dev) || is5365(dev))
 324                 return -EINVAL;
 325
 326         if (enable) {
 327                 port_mask = dev->enabled_ports;
 328                 max_size = JMS_MAX_SIZE;
 329                 if (allow_10_100)
 330                         port_mask |= JPM_10_100_JUMBO_EN;
 331         }
 332
 333         b53_write32(dev, B53_JUMBO_PAGE, dev->jumbo_pm_reg, port_mask);
 334         return b53_write16(dev, B53_JUMBO_PAGE, dev->jumbo_size_reg, max_size);
 335 }
 336
 337 static int b53_flush_arl(struct b53_device *dev)
 338 {
 339         unsigned int i;
 340
 341         b53_write8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
 342                    FAST_AGE_DONE | FAST_AGE_DYNAMIC | FAST_AGE_STATIC);
 343
 344         for (i = 0; i < 10; i++) {
 345                 u8 fast_age_ctrl;
 346
 347                 b53_read8(dev, B53_CTRL_PAGE, B53_FAST_AGE_CTRL,
 348                           &fast_age_ctrl);
 349
 350                 if (!(fast_age_ctrl & FAST_AGE_DONE))
 351                         return 0;
 352
 353                 mdelay(1);
 354         }
 355
 356         pr_warn("time out while flushing ARL\n");
 357
 358         return -EINVAL;
 359 }
 360
 361 static void b53_enable_ports(struct b53_device *dev)
 362 {
 363         unsigned i;
 364
 365         b53_for_each_port(dev, i) {
 366                 u8 port_ctrl;
 367                 u16 pvlan_mask;
 368
 369                 /*
 370                  * prevent leaking packets between wan and lan in unmanaged
 371                  * mode through port vlans.
 372                  */
 373                 if (dev->enable_vlan || is_cpu_port(dev, i))
 374                         pvlan_mask = 0x1ff;
 375                 else if (is531x5(dev))
 376                         /* BCM53115 may use a different port as cpu port */
 377                         pvlan_mask = BIT(dev->sw_dev.cpu_port);
 378                 else
 379                         pvlan_mask = BIT(B53_CPU_PORT);
 380
 381                 /* BCM5325 CPU port is at 8 */
 382                 if ((is5325(dev) || is5365(dev)) && i == B53_CPU_PORT_25)
 383                         i = B53_CPU_PORT;
 384
 385                 if (dev->chip_id == BCM5398_DEVICE_ID && (i == 6 || i == 7))
 386                         /* disable unused ports 6 & 7 */
 387                         port_ctrl = PORT_CTRL_RX_DISABLE | PORT_CTRL_TX_DISABLE;
 388                 else if (i == B53_CPU_PORT)
 389                         port_ctrl = PORT_CTRL_RX_BCST_EN |
 390                                     PORT_CTRL_RX_MCST_EN |
 391                                     PORT_CTRL_RX_UCST_EN;
 392                 else
 393                         port_ctrl = 0;
 394
 395                 b53_write16(dev, B53_PVLAN_PAGE, B53_PVLAN_PORT_MASK(i),
 396                             pvlan_mask);
 397
 398                 /* port state is handled by bcm63xx_enet driver */
 399                 if (!is63xx(dev))
 400                         b53_write8(dev, B53_CTRL_PAGE, B53_PORT_CTRL(i),
 401                                    port_ctrl);
 402         }
 403 }
 404
 405 static void b53_enable_mib(struct b53_device *dev)
 406 {
 407         u8 gc;
 408
 409         b53_read8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, &gc);
 410
 411         gc &= ~(GC_RESET_MIB | GC_MIB_AC_EN);
 412
 413         b53_write8(dev, B53_CTRL_PAGE, B53_GLOBAL_CONFIG, gc);
 414 }
 415
 416 static int b53_apply(struct b53_device *dev)
 417 {
 418         int i;
 419
 420         /* clear all vlan entries */
 421         if (is5325(dev) || is5365(dev)) {
 422                 for (i = 1; i < dev->sw_dev.vlans; i++)
 423                         b53_set_vlan_entry(dev, i, 0, 0);
 424         } else {
 425                 b53_do_vlan_op(dev, VTA_CMD_CLEAR);
 426         }
 427
 428         b53_enable_vlan(dev, dev->enable_vlan);
 429
 430         /* fill VLAN table */
 431         if (dev->enable_vlan) {
 432                 for (i = 0; i < dev->sw_dev.vlans; i++) {
 433                         struct b53_vlan *vlan = &dev->vlans[i];
 434
 435                         if (!vlan->members)
 436                                 continue;
 437
 438                         b53_set_vlan_entry(dev, i, vlan->members, vlan->untag);
 439                 }
 440
 441                 b53_for_each_port(dev, i)
 442                         b53_write16(dev, B53_VLAN_PAGE,
 443                                     B53_VLAN_PORT_DEF_TAG(i),
 444                                     dev->ports[i].pvid);
 445         } else {
 446                 b53_for_each_port(dev, i)
 447                         b53_write16(dev, B53_VLAN_PAGE,
 448                                     B53_VLAN_PORT_DEF_TAG(i), 1);
 449
 450         }
 451
 452         b53_enable_ports(dev);
 453
 454         if (!is5325(dev) && !is5365(dev))
 455                 b53_set_jumbo(dev, dev->enable_jumbo, 1);
 456
 457         return 0;
 458 }
 459
 460 void b53_switch_reset_gpio(struct b53_device *dev)
 461 {
 462         int gpio = dev->reset_gpio;
 463
 464         if (gpio < 0)
 465                 return;
 466
 467         /*
 468          * Reset sequence: RESET low(50ms)->high(20ms)
 469          */
 470         gpio_set_value(gpio, 0);
 471         mdelay(50);
 472
 473         gpio_set_value(gpio, 1);
 474         mdelay(20);
 475
 476         dev->current_page = 0xff;
 477 }
 478
 479 static int b53_switch_reset(struct b53_device *dev)
 480 {
 481         u8 mgmt;
 482
 483         b53_switch_reset_gpio(dev);
 484
 485         if (is539x(dev)) {
 486                 b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x83);
 487                 b53_write8(dev, B53_CTRL_PAGE, B53_SOFTRESET, 0x00);
 488         }
 489
 490         b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
 491
 492         if (!(mgmt & SM_SW_FWD_EN)) {
 493                 mgmt &= ~SM_SW_FWD_MODE;
 494                 mgmt |= SM_SW_FWD_EN;
 495
 496                 b53_write8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, mgmt);
 497                 b53_read8(dev, B53_CTRL_PAGE, B53_SWITCH_MODE, &mgmt);
 498
 499                 if (!(mgmt & SM_SW_FWD_EN)) {
 500                         pr_err("Failed to enable switch!\n");
 501                         return -EINVAL;
 502                 }
 503         }
 504
 505         /* enable all ports */
 506         b53_enable_ports(dev);
 507
 508         /* configure MII port if necessary */
 509         if (is5325(dev)) {
 510                 u8 mii_port_override;
 511
 512                 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
 513                           &mii_port_override);
 514                 /* reverse mii needs to be enabled */
 515                 if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
 516                         b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
 517                                    mii_port_override | PORT_OVERRIDE_RV_MII_25);
 518                         b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
 519                                   &mii_port_override);
 520
 521                         if (!(mii_port_override & PORT_OVERRIDE_RV_MII_25)) {
 522                                 pr_err("Failed to enable reverse MII mode\n");
 523                                 return -EINVAL;
 524                         }
 525                 }
 526         } else if (is531x5(dev) && dev->sw_dev.cpu_port == B53_CPU_PORT) {
 527                 u8 mii_port_override;
 528
 529                 b53_read8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
 530                           &mii_port_override);
 531                 b53_write8(dev, B53_CTRL_PAGE, B53_PORT_OVERRIDE_CTRL,
 532                            mii_port_override | PORT_OVERRIDE_EN |
 533                            PORT_OVERRIDE_LINK);
 534         }
 535
 536         b53_enable_mib(dev);
 537
 538         return b53_flush_arl(dev);
 539 }
 540
 541 /*
 542  * Swconfig glue functions
 543  */
 544
 545 static int b53_global_get_vlan_enable(struct switch_dev *dev,
 546                                       const struct switch_attr *attr,
 547                                       struct switch_val *val)
 548 {
 549         struct b53_device *priv = sw_to_b53(dev);
 550
 551         val->value.i = priv->enable_vlan;
 552
 553         return 0;
 554 }
 555
 556 static int b53_global_set_vlan_enable(struct switch_dev *dev,
 557                                       const struct switch_attr *attr,
 558                                       struct switch_val *val)
 559 {
 560         struct b53_device *priv = sw_to_b53(dev);
 561
 562         priv->enable_vlan = val->value.i;
 563
 564         return 0;
 565 }
 566
 567 static int b53_global_get_jumbo_enable(struct switch_dev *dev,
 568                                        const struct switch_attr *attr,
 569                                        struct switch_val *val)
 570 {
 571         struct b53_device *priv = sw_to_b53(dev);
 572
 573         val->value.i = priv->enable_jumbo;
 574
 575         return 0;
 576 }
 577
 578 static int b53_global_set_jumbo_enable(struct switch_dev *dev,
 579                                        const struct switch_attr *attr,
 580                                        struct switch_val *val)
 581 {
 582         struct b53_device *priv = sw_to_b53(dev);
 583
 584         priv->enable_jumbo = val->value.i;
 585
 586         return 0;
 587 }
 588
 589 static int b53_global_get_4095_enable(struct switch_dev *dev,
 590                                       const struct switch_attr *attr,
 591                                       struct switch_val *val)
 592 {
 593         struct b53_device *priv = sw_to_b53(dev);
 594
 595         val->value.i = priv->allow_vid_4095;
 596
 597         return 0;
 598 }
 599
 600 static int b53_global_set_4095_enable(struct switch_dev *dev,
 601                                       const struct switch_attr *attr,
 602                                       struct switch_val *val)
 603 {
 604         struct b53_device *priv = sw_to_b53(dev);
 605
 606         priv->allow_vid_4095 = val->value.i;
 607
 608         return 0;
 609 }
 610
 611 static int b53_global_get_ports(struct switch_dev *dev,
 612                                 const struct switch_attr *attr,
 613                                 struct switch_val *val)
 614 {
 615         struct b53_device *priv = sw_to_b53(dev);
 616
 617         val->len = snprintf(priv->buf, B53_BUF_SIZE, "0x%04x",
 618                             priv->enabled_ports);
 619         val->value.s = priv->buf;
 620
 621         return 0;
 622 }
 623
 624 static int b53_port_get_pvid(struct switch_dev *dev, int port, int *val)
 625 {
 626         struct b53_device *priv = sw_to_b53(dev);
 627
 628         *val = priv->ports[port].pvid;
 629
 630         return 0;
 631 }
 632
 633 static int b53_port_set_pvid(struct switch_dev *dev, int port, int val)
 634 {
 635         struct b53_device *priv = sw_to_b53(dev);
 636
 637         if (val > 15 && is5325(priv))
 638                 return -EINVAL;
 639         if (val == 4095 && !priv->allow_vid_4095)
 640                 return -EINVAL;
 641
 642         priv->ports[port].pvid = val;
 643
 644         return 0;
 645 }
 646
 647 static int b53_vlan_get_ports(struct switch_dev *dev, struct switch_val *val)
 648 {
 649         struct b53_device *priv = sw_to_b53(dev);
 650         struct switch_port *port = &val->value.ports[0];
 651         struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
 652         int i;
 653
 654         val->len = 0;
 655
 656         if (!vlan->members)
 657                 return 0;
 658
 659         for (i = 0; i < dev->ports; i++) {
 660                 if (!(vlan->members & BIT(i)))
 661                         continue;
 662
 663
 664                 if (!(vlan->untag & BIT(i)))
 665                         port->flags = BIT(SWITCH_PORT_FLAG_TAGGED);
 666                 else
 667                         port->flags = 0;
 668
 669                 port->id = i;
 670                 val->len++;
 671                 port++;
 672         }
 673
 674         return 0;
 675 }
 676
 677 static int b53_vlan_set_ports(struct switch_dev *dev, struct switch_val *val)
 678 {
 679         struct b53_device *priv = sw_to_b53(dev);
 680         struct switch_port *port;
 681         struct b53_vlan *vlan = &priv->vlans[val->port_vlan];
 682         int i;
 683
 684         /* only BCM5325 and BCM5365 supports VID 0 */
 685         if (val->port_vlan == 0 && !is5325(priv) && !is5365(priv))
 686                 return -EINVAL;
 687
 688         /* VLAN 4095 needs special handling */
 689         if (val->port_vlan == 4095 && !priv->allow_vid_4095)
 690                 return -EINVAL;
 691
 692         port = &val->value.ports[0];
 693         vlan->members = 0;
 694         vlan->untag = 0;
 695         for (i = 0; i < val->len; i++, port++) {
 696                 vlan->members |= BIT(port->id);
 697
 698                 if (!(port->flags & BIT(SWITCH_PORT_FLAG_TAGGED))) {
 699                         vlan->untag |= BIT(port->id);
 700                         priv->ports[port->id].pvid = val->port_vlan;
 701                 };
 702         }
 703
 704         /* ignore disabled ports */
 705         vlan->members &= priv->enabled_ports;
 706         vlan->untag &= priv->enabled_ports;
 707
 708         return 0;
 709 }
 710
 711 static int b53_port_get_link(struct switch_dev *dev, int port,
 712                              struct switch_port_link *link)
 713 {
 714         struct b53_device *priv = sw_to_b53(dev);
 715
 716         if (is_cpu_port(priv, port)) {
 717                 link->link = 1;
 718                 link->duplex = 1;
 719                 link->speed = is5325(priv) || is5365(priv) ?
 720                                 SWITCH_PORT_SPEED_100 : SWITCH_PORT_SPEED_1000;
 721                 link->aneg = 0;
 722         } else if (priv->enabled_ports & BIT(port)) {
 723                 u32 speed;
 724                 u16 lnk, duplex;
 725
 726                 b53_read16(priv, B53_STAT_PAGE, B53_LINK_STAT, &lnk);
 727                 b53_read16(priv, B53_STAT_PAGE, priv->duplex_reg, &duplex);
 728
 729                 lnk = (lnk >> port) & 1;
 730                 duplex = (duplex >> port) & 1;
 731
 732                 if (is5325(priv) || is5365(priv)) {
 733                         u16 tmp;
 734
 735                         b53_read16(priv, B53_STAT_PAGE, B53_SPEED_STAT, &tmp);
 736                         speed = SPEED_PORT_FE(tmp, port);
 737                 } else {
 738                         b53_read32(priv, B53_STAT_PAGE, B53_SPEED_STAT, &speed);
 739                         speed = SPEED_PORT_GE(speed, port);
 740                 }
 741
 742                 link->link = lnk;
 743                 if (lnk) {
 744                         link->duplex = duplex;
 745                         switch (speed) {
 746                         case SPEED_STAT_10M:
 747                                 link->speed = SWITCH_PORT_SPEED_10;
 748                                 break;
 749                         case SPEED_STAT_100M:
 750                                 link->speed = SWITCH_PORT_SPEED_100;
 751                                 break;
 752                         case SPEED_STAT_1000M:
 753                                 link->speed = SWITCH_PORT_SPEED_1000;
 754                                 break;
 755                         }
 756                 }
 757
 758                 link->aneg = 1;
 759         } else {
 760                 link->link = 0;
 761         }
 762
 763         return 0;
 764
 765 }
 766
 767 static int b53_global_reset_switch(struct switch_dev *dev)
 768 {
 769         struct b53_device *priv = sw_to_b53(dev);
 770
 771         /* reset vlans */
 772         priv->enable_vlan = 0;
 773         priv->enable_jumbo = 0;
 774         priv->allow_vid_4095 = 0;
 775
 776         memset(priv->vlans, 0, sizeof(priv->vlans) * dev->vlans);
 777         memset(priv->ports, 0, sizeof(priv->ports) * dev->ports);
 778
 779         return b53_switch_reset(priv);
 780 }
 781
 782 static int b53_global_apply_config(struct switch_dev *dev)
 783 {
 784         struct b53_device *priv = sw_to_b53(dev);
 785
 786         /* disable switching */
 787         b53_set_forwarding(priv, 0);
 788
 789         b53_apply(priv);
 790
 791         /* enable switching */
 792         b53_set_forwarding(priv, 1);
 793
 794         return 0;
 795 }
 796
 797
 798 static int b53_global_reset_mib(struct switch_dev *dev,
 799                                 const struct switch_attr *attr,
 800                                 struct switch_val *val)
 801 {
 802         struct b53_device *priv = sw_to_b53(dev);
 803         u8 gc;
 804
 805         b53_read8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
 806
 807         b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc | GC_RESET_MIB);
 808         mdelay(1);
 809         b53_write8(priv, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc & ~GC_RESET_MIB);
 810         mdelay(1);
 811
 812         return 0;
 813 }
 814
 815 static int b53_port_get_mib(struct switch_dev *sw_dev,
 816                             const struct switch_attr *attr,
 817                             struct switch_val *val)
 818 {
 819         struct b53_device *dev = sw_to_b53(sw_dev);
 820         const struct b53_mib_desc *mibs;
 821         int port = val->port_vlan;
 822         int len = 0;
 823
 824         if (!(BIT(port) & dev->enabled_ports))
 825                 return -1;
 826
 827         if (is5365(dev)) {
 828                 if (port == 5)
 829                         port = 8;
 830
 831                 mibs = b53_mibs_65;
 832         } else if (is63xx(dev)) {
 833                 mibs = b53_mibs_63xx;
 834         } else {
 835                 mibs = b53_mibs;
 836         }
 837
 838         dev->buf[0] = 0;
 839
 840         for (; mibs->size > 0; mibs++) {
 841                 u64 val;
 842
 843                 if (mibs->size == 8) {
 844                         b53_read64(dev, B53_MIB_PAGE(port), mibs->offset, &val);
 845                 } else {
 846                         u32 val32;
 847
 848                         b53_read32(dev, B53_MIB_PAGE(port), mibs->offset,
 849                                    &val32);
 850                         val = val32;
 851                 }
 852
 853                 len += snprintf(dev->buf + len, B53_BUF_SIZE - len,
 854                                 "%-20s: %llu\n", mibs->name, val);
 855         }
 856
 857         val->len = len;
 858         val->value.s = dev->buf;
 859
 860         return 0;
 861 }
 862
 863 static struct switch_attr b53_global_ops_25[] = {
 864         {
 865                 .type = SWITCH_TYPE_INT,
 866                 .name = "enable_vlan",
 867                 .description = "Enable VLAN mode",
 868                 .set = b53_global_set_vlan_enable,
 869                 .get = b53_global_get_vlan_enable,
 870                 .max = 1,
 871         },
 872         {
 873                 .type = SWITCH_TYPE_STRING,
 874                 .name = "ports",
 875                 .description = "Available ports (as bitmask)",
 876                 .get = b53_global_get_ports,
 877         },
 878 };
 879
 880 static struct switch_attr b53_global_ops_65[] = {
 881         {
 882                 .type = SWITCH_TYPE_INT,
 883                 .name = "enable_vlan",
 884                 .description = "Enable VLAN mode",
 885                 .set = b53_global_set_vlan_enable,
 886                 .get = b53_global_get_vlan_enable,
 887                 .max = 1,
 888         },
 889         {
 890                 .type = SWITCH_TYPE_STRING,
 891                 .name = "ports",
 892                 .description = "Available ports (as bitmask)",
 893                 .get = b53_global_get_ports,
 894         },
 895         {
 896                 .type = SWITCH_TYPE_INT,
 897                 .name = "reset_mib",
 898                 .description = "Reset MIB counters",
 899                 .set = b53_global_reset_mib,
 900         },
 901 };
 902
 903 static struct switch_attr b53_global_ops[] = {
 904         {
 905                 .type = SWITCH_TYPE_INT,
 906                 .name = "enable_vlan",
 907                 .description = "Enable VLAN mode",
 908                 .set = b53_global_set_vlan_enable,
 909                 .get = b53_global_get_vlan_enable,
 910                 .max = 1,
 911         },
 912         {
 913                 .type = SWITCH_TYPE_STRING,
 914                 .name = "ports",
 915                 .description = "Available Ports (as bitmask)",
 916                 .get = b53_global_get_ports,
 917         },
 918         {
 919                 .type = SWITCH_TYPE_INT,
 920                 .name = "reset_mib",
 921                 .description = "Reset MIB counters",
 922                 .set = b53_global_reset_mib,
 923         },
 924         {
 925                 .type = SWITCH_TYPE_INT,
 926                 .name = "enable_jumbo",
 927                 .description = "Enable Jumbo Frames",
 928                 .set = b53_global_set_jumbo_enable,
 929                 .get = b53_global_get_jumbo_enable,
 930                 .max = 1,
 931         },
 932         {
 933                 .type = SWITCH_TYPE_INT,
 934                 .name = "allow_vid_4095",
 935                 .description = "Allow VID 4095",
 936                 .set = b53_global_set_4095_enable,
 937                 .get = b53_global_get_4095_enable,
 938                 .max = 1,
 939         },
 940 };
 941
 942 static struct switch_attr b53_port_ops[] = {
 943         {
 944                 .type = SWITCH_TYPE_STRING,
 945                 .name = "mib",
 946                 .description = "Get port's MIB counters",
 947                 .get = b53_port_get_mib,
 948         },
 949 };
 950
 951 static struct switch_attr b53_no_ops[] = {
 952 };
 953
 954 static const struct switch_dev_ops b53_switch_ops_25 = {
 955         .attr_global = {
 956                 .attr = b53_global_ops_25,
 957                 .n_attr = ARRAY_SIZE(b53_global_ops_25),
 958         },
 959         .attr_port = {
 960                 .attr = b53_no_ops,
 961                 .n_attr = ARRAY_SIZE(b53_no_ops),
 962         },
 963         .attr_vlan = {
 964                 .attr = b53_no_ops,
 965                 .n_attr = ARRAY_SIZE(b53_no_ops),
 966         },
 967
 968         .get_vlan_ports = b53_vlan_get_ports,
 969         .set_vlan_ports = b53_vlan_set_ports,
 970         .get_port_pvid = b53_port_get_pvid,
 971         .set_port_pvid = b53_port_set_pvid,
 972         .apply_config = b53_global_apply_config,
 973         .reset_switch = b53_global_reset_switch,
 974         .get_port_link = b53_port_get_link,
 975 };
 976
 977 static const struct switch_dev_ops b53_switch_ops_65 = {
 978         .attr_global = {
 979                 .attr = b53_global_ops_65,
 980                 .n_attr = ARRAY_SIZE(b53_global_ops_65),
 981         },
 982         .attr_port = {
 983                 .attr = b53_port_ops,
 984                 .n_attr = ARRAY_SIZE(b53_port_ops),
 985         },
 986         .attr_vlan = {
 987                 .attr = b53_no_ops,
 988                 .n_attr = ARRAY_SIZE(b53_no_ops),
 989         },
 990
 991         .get_vlan_ports = b53_vlan_get_ports,
 992         .set_vlan_ports = b53_vlan_set_ports,
 993         .get_port_pvid = b53_port_get_pvid,
 994         .set_port_pvid = b53_port_set_pvid,
 995         .apply_config = b53_global_apply_config,
 996         .reset_switch = b53_global_reset_switch,
 997         .get_port_link = b53_port_get_link,
 998 };
 999
1000 static const struct switch_dev_ops b53_switch_ops = {
1001         .attr_global = {
1002                 .attr = b53_global_ops,
1003                 .n_attr = ARRAY_SIZE(b53_global_ops),
1004         },
1005         .attr_port = {
1006                 .attr = b53_port_ops,
1007                 .n_attr = ARRAY_SIZE(b53_port_ops),
1008         },
1009         .attr_vlan = {
1010                 .attr = b53_no_ops,
1011                 .n_attr = ARRAY_SIZE(b53_no_ops),
1012         },
1013
1014         .get_vlan_ports = b53_vlan_get_ports,
1015         .set_vlan_ports = b53_vlan_set_ports,
1016         .get_port_pvid = b53_port_get_pvid,
1017         .set_port_pvid = b53_port_set_pvid,
1018         .apply_config = b53_global_apply_config,
1019         .reset_switch = b53_global_reset_switch,
1020         .get_port_link = b53_port_get_link,
1021 };
1022
1023 struct b53_chip_data {
1024         u32 chip_id;
1025         const char *dev_name;
1026         const char *alias;
1027         u16 vlans;
1028         u16 enabled_ports;
1029         u8 cpu_port;
1030         u8 vta_regs[3];
1031         u8 duplex_reg;
1032         u8 jumbo_pm_reg;
1033         u8 jumbo_size_reg;
1034         const struct switch_dev_ops *sw_ops;
1035 };
1036
1037 #define B53_VTA_REGS    \
1038         { B53_VT_ACCESS, B53_VT_INDEX, B53_VT_ENTRY }
1039 #define B53_VTA_REGS_9798 \
1040         { B53_VT_ACCESS_9798, B53_VT_INDEX_9798, B53_VT_ENTRY_9798 }
1041 #define B53_VTA_REGS_63XX \
1042         { B53_VT_ACCESS_63XX, B53_VT_INDEX_63XX, B53_VT_ENTRY_63XX }
1043
1044 static const struct b53_chip_data b53_switch_chips[] = {
1045         {
1046                 .chip_id = BCM5325_DEVICE_ID,
1047                 .dev_name = "BCM5325",
1048                 .alias = "bcm5325",
1049                 .vlans = 16,
1050                 .enabled_ports = 0x1f,
1051                 .cpu_port = B53_CPU_PORT_25,
1052                 .duplex_reg = B53_DUPLEX_STAT_FE,
1053                 .sw_ops = &b53_switch_ops_25,
1054         },
1055         {
1056                 .chip_id = BCM5365_DEVICE_ID,
1057                 .dev_name = "BCM5365",
1058                 .alias = "bcm5365",
1059                 .vlans = 256,
1060                 .enabled_ports = 0x1f,
1061                 .cpu_port = B53_CPU_PORT_25,
1062                 .duplex_reg = B53_DUPLEX_STAT_FE,
1063                 .sw_ops = &b53_switch_ops_65,
1064         },
1065         {
1066                 .chip_id = BCM5395_DEVICE_ID,
1067                 .dev_name = "BCM5395",
1068                 .alias = "bcm5395",
1069                 .vlans = 4096,
1070                 .enabled_ports = 0x1f,
1071                 .cpu_port = B53_CPU_PORT,
1072                 .vta_regs = B53_VTA_REGS,
1073                 .duplex_reg = B53_DUPLEX_STAT_GE,
1074                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1075                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1076                 .sw_ops = &b53_switch_ops,
1077         },
1078         {
1079                 .chip_id = BCM5397_DEVICE_ID,
1080                 .dev_name = "BCM5397",
1081                 .alias = "bcm5397",
1082                 .vlans = 4096,
1083                 .enabled_ports = 0x1f,
1084                 .cpu_port = B53_CPU_PORT,
1085                 .vta_regs = B53_VTA_REGS_9798,
1086                 .duplex_reg = B53_DUPLEX_STAT_GE,
1087                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1088                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1089                 .sw_ops = &b53_switch_ops,
1090         },
1091         {
1092                 .chip_id = BCM5398_DEVICE_ID,
1093                 .dev_name = "BCM5398",
1094                 .alias = "bcm5398",
1095                 .vlans = 4096,
1096                 .enabled_ports = 0x7f,
1097                 .cpu_port = B53_CPU_PORT,
1098                 .vta_regs = B53_VTA_REGS_9798,
1099                 .duplex_reg = B53_DUPLEX_STAT_GE,
1100                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1101                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1102                 .sw_ops = &b53_switch_ops,
1103         },
1104         {
1105                 .chip_id = BCM53115_DEVICE_ID,
1106                 .dev_name = "BCM53115",
1107                 .alias = "bcm53115",
1108                 .vlans = 4096,
1109                 .enabled_ports = 0x1f,
1110                 .vta_regs = B53_VTA_REGS,
1111                 .cpu_port = B53_CPU_PORT,
1112                 .duplex_reg = B53_DUPLEX_STAT_GE,
1113                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1114                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1115                 .sw_ops = &b53_switch_ops,
1116         },
1117         {
1118                 .chip_id = BCM53125_DEVICE_ID,
1119                 .dev_name = "BCM53125",
1120                 .alias = "bcm53125",
1121                 .vlans = 4096,
1122                 .enabled_ports = 0x1f,
1123                 .cpu_port = B53_CPU_PORT,
1124                 .vta_regs = B53_VTA_REGS,
1125                 .duplex_reg = B53_DUPLEX_STAT_GE,
1126                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK,
1127                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE,
1128                 .sw_ops = &b53_switch_ops,
1129         },
1130         {
1131                 .chip_id = BCM63XX_DEVICE_ID,
1132                 .dev_name = "BCM63xx",
1133                 .alias = "bcm63xx",
1134                 .vlans = 4096,
1135                 .enabled_ports = 0, /* pdata must provide them */
1136                 .cpu_port = B53_CPU_PORT,
1137                 .vta_regs = B53_VTA_REGS_63XX,
1138                 .duplex_reg = B53_DUPLEX_STAT_63XX,
1139                 .jumbo_pm_reg = B53_JUMBO_PORT_MASK_63XX,
1140                 .jumbo_size_reg = B53_JUMBO_MAX_SIZE_63XX,
1141                 .sw_ops = &b53_switch_ops,
1142         },
1143 };
1144
1145 int b53_switch_init(struct b53_device *dev)
1146 {
1147         struct switch_dev *sw_dev = &dev->sw_dev;
1148         unsigned i;
1149         int ret;
1150
1151         for (i = 0; i < ARRAY_SIZE(b53_switch_chips); i++) {
1152                 const struct b53_chip_data *chip = &b53_switch_chips[i];
1153
1154                 if (chip->chip_id == dev->chip_id) {
1155                         sw_dev->name = chip->dev_name;
1156                         if (!sw_dev->alias)
1157                                 sw_dev->alias = chip->alias;
1158                         if (!dev->enabled_ports)
1159                                 dev->enabled_ports = chip->enabled_ports;
1160                         dev->duplex_reg = chip->duplex_reg;
1161                         dev->vta_regs[0] = chip->vta_regs[0];
1162                         dev->vta_regs[1] = chip->vta_regs[1];
1163                         dev->vta_regs[2] = chip->vta_regs[2];
1164                         dev->jumbo_pm_reg = chip->jumbo_pm_reg;
1165                         sw_dev->ops = chip->sw_ops;
1166                         sw_dev->cpu_port = chip->cpu_port;
1167                         sw_dev->vlans = chip->vlans;
1168                         break;
1169                 }
1170         }
1171
1172         if (!sw_dev->name)
1173                 return -EINVAL;
1174
1175         /* check which BCM5325x version we have */
1176         if (is5325(dev)) {
1177                 u8 vc4;
1178
1179                 b53_read8(dev, B53_VLAN_PAGE, B53_VLAN_CTRL4_25, &vc4);
1180
1181                 /* check reserved bits */
1182                 switch (vc4 & 3) {
1183                 case 1:
1184                         /* BCM5325E */
1185                         break;
1186                 case 3:
1187                         /* BCM5325F - do not use port 4 */
1188                         dev->enabled_ports &= ~BIT(4);
1189                         break;
1190                 default:
1191 /* On the BCM47XX SoCs this is the supported internal switch.*/
1192 #ifndef CONFIG_BCM47XX
1193                         /* BCM5325M */
1194                         return -EINVAL;
1195 #else
1196                         break;
1197 #endif
1198                 }
1199         } else if (dev->chip_id == BCM53115_DEVICE_ID) {
1200                 u64 strap_value;
1201
1202                 b53_read48(dev, B53_STAT_PAGE, B53_STRAP_VALUE, &strap_value);
1203                 /* use second IMP port if GMII is enabled */
1204                 if (strap_value & SV_GMII_CTRL_115)
1205                         sw_dev->cpu_port = 5;
1206         }
1207
1208         /* cpu port is always last */
1209         sw_dev->ports = sw_dev->cpu_port + 1;
1210         dev->enabled_ports |= BIT(sw_dev->cpu_port);
1211
1212         dev->ports = devm_kzalloc(dev->dev,
1213                                   sizeof(struct b53_port) * sw_dev->ports,
1214                                   GFP_KERNEL);
1215         if (!dev->ports)
1216                 return -ENOMEM;
1217
1218         dev->vlans = devm_kzalloc(dev->dev,
1219                                   sizeof(struct b53_vlan) * sw_dev->vlans,
1220                                   GFP_KERNEL);
1221         if (!dev->vlans)
1222                 return -ENOMEM;
1223
1224         dev->buf = devm_kzalloc(dev->dev, B53_BUF_SIZE, GFP_KERNEL);
1225         if (!dev->buf)
1226                 return -ENOMEM;
1227
1228         dev->reset_gpio = b53_switch_get_reset_gpio(dev);
1229         if (dev->reset_gpio >= 0) {
1230                 ret = devm_gpio_request_one(dev->dev, dev->reset_gpio, GPIOF_OUT_INIT_HIGH, "robo_reset");
1231                 if (ret)
1232                         return ret;
1233         }
1234
1235         return b53_switch_reset(dev);
1236 }
1237
1238 struct b53_device *b53_switch_alloc(struct device *base, struct b53_io_ops *ops,
1239                                     void *priv)
1240 {
1241         struct b53_device *dev;
1242
1243         dev = devm_kzalloc(base, sizeof(*dev), GFP_KERNEL);
1244         if (!dev)
1245                 return NULL;
1246
1247         dev->dev = base;
1248         dev->ops = ops;
1249         dev->priv = priv;
1250         mutex_init(&dev->reg_mutex);
1251
1252         return dev;
1253 }
1254 EXPORT_SYMBOL(b53_switch_alloc);
1255
1256 int b53_switch_detect(struct b53_device *dev)
1257 {
1258         u32 id32;
1259         u16 tmp;
1260         u8 id8;
1261         int ret;
1262
1263         ret = b53_read8(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id8);
1264         if (ret)
1265                 return ret;
1266
1267         switch (id8) {
1268         case 0:
1269                 /*
1270                  * BCM5325 and BCM5365 do not have this register so reads
1271                  * return 0. But the read operation did succeed, so assume
1272                  * this is one of them.
1273                  *
1274                  * Next check if we can write to the 5325's VTA register; for
1275                  * 5365 it is read only.
1276                  */
1277
1278                 b53_write16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, 0xf);
1279                 b53_read16(dev, B53_VLAN_PAGE, B53_VLAN_TABLE_ACCESS_25, &tmp);
1280
1281                 if (tmp == 0xf)
1282                         dev->chip_id = BCM5325_DEVICE_ID;
1283                 else
1284                         dev->chip_id = BCM5365_DEVICE_ID;
1285                 break;
1286         case BCM5395_DEVICE_ID:
1287         case BCM5397_DEVICE_ID:
1288         case BCM5398_DEVICE_ID:
1289                 dev->chip_id = id8;
1290                 break;
1291         default:
1292                 ret = b53_read32(dev, B53_MGMT_PAGE, B53_DEVICE_ID, &id32);
1293                 if (ret)
1294                         return ret;
1295
1296                 switch (id32) {
1297                 case BCM53115_DEVICE_ID:
1298                 case BCM53125_DEVICE_ID:
1299                         dev->chip_id = id32;
1300                         break;
1301                 default:
1302                         pr_err("unsupported switch detected (BCM53%02x/BCM%x)\n",
1303                                id8, id32);
1304                         return -ENODEV;
1305                 }
1306         }
1307
1308         if (dev->chip_id == BCM5325_DEVICE_ID)
1309                 return b53_read8(dev, B53_STAT_PAGE, B53_REV_ID_25,
1310                                  &dev->core_rev);
1311         else
1312                 return b53_read8(dev, B53_MGMT_PAGE, B53_REV_ID,
1313                                  &dev->core_rev);
1314 }
1315 EXPORT_SYMBOL(b53_switch_detect);
1316
1317 int b53_switch_register(struct b53_device *dev)
1318 {
1319         int ret;
1320
1321         if (dev->pdata) {
1322                 dev->chip_id = dev->pdata->chip_id;
1323                 dev->enabled_ports = dev->pdata->enabled_ports;
1324                 dev->sw_dev.alias = dev->pdata->alias;
1325         }
1326
1327         if (!dev->chip_id && b53_switch_detect(dev))
1328                 return -EINVAL;
1329
1330         ret = b53_switch_init(dev);
1331         if (ret)
1332                 return ret;
1333
1334         pr_info("found switch: %s, rev %i\n", dev->sw_dev.name, dev->core_rev);
1335
1336         return register_switch(&dev->sw_dev, NULL);
1337 }
1338 EXPORT_SYMBOL(b53_switch_register);
1339
1340 MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
1341 MODULE_DESCRIPTION("B53 switch library");
1342 MODULE_LICENSE("Dual BSD/GPL");