gemini: update usb driver and merge registers into one patch
[openwrt.git] / target / linux / gemini / patches-3.10 / 130-usb-ehci-fot2g.patch
1 --- a/arch/arm/mach-gemini/devices.c    2011-04-23 01:00:16.738137491 +0200
2 +++ b/arch/arm/mach-gemini/devices.c    2011-04-23 01:06:55.539299920 +0200
3 @@ -188,3 +188,64 @@
4  
5         return platform_device_register(&ethernet_device);
6  }
7 +
8 +static struct resource usb0_resources[] = {
9 +       {
10 +               .start  = GEMINI_USB0_BASE,
11 +               .end    = GEMINI_USB0_BASE + 0xfff,
12 +               .flags  = IORESOURCE_MEM,
13 +       },
14 +       {
15 +               .start  = IRQ_USB0,
16 +               .end    = IRQ_USB0,
17 +               .flags  = IORESOURCE_IRQ,
18 +       },
19 +};
20 +
21 +static struct resource usb1_resources[] = {
22 +       {
23 +               .start  = GEMINI_USB1_BASE,
24 +               .end    = GEMINI_USB1_BASE + 0xfff,
25 +               .flags  = IORESOURCE_MEM,
26 +       },
27 +       {
28 +               .start  = IRQ_USB1,
29 +               .end    = IRQ_USB1,
30 +               .flags  = IORESOURCE_IRQ,
31 +       },
32 +};
33 +
34 +static u64 usb0_dmamask = 0xffffffffUL;
35 +static u64 usb1_dmamask = 0xffffffffUL;
36 +
37 +static struct platform_device usb_device[] = {
38 +       {
39 +               .name   = "ehci-fotg2",
40 +               .id     = 0,
41 +               .dev    = {
42 +                       .dma_mask = &usb0_dmamask,
43 +                       .coherent_dma_mask = 0xffffffff,
44 +               },
45 +               .num_resources  = ARRAY_SIZE(usb0_resources),
46 +               .resource       = usb0_resources,
47 +       },
48 +       {
49 +               .name   = "ehci-fotg2",
50 +               .id     = 1,
51 +               .dev    = {
52 +                       .dma_mask = &usb1_dmamask,
53 +                       .coherent_dma_mask = 0xffffffff,
54 +               },
55 +               .num_resources  = ARRAY_SIZE(usb1_resources),
56 +               .resource       = usb1_resources,
57 +       },
58 +};
59 +
60 +int __init platform_register_usb(unsigned int id)
61 +{
62 +       if (id > 1)
63 +               return -EINVAL;
64 +
65 +       return platform_device_register(&usb_device[id]);
66 +}
67 +
68 --- a/arch/arm/mach-gemini/common.h     2011-04-23 01:09:31.413161153 +0200
69 +++ b/arch/arm/mach-gemini/common.h     2011-04-23 01:09:52.426358514 +0200
70 @@ -28,6 +28,7 @@
71                                     unsigned int nr_parts);
72  extern int platform_register_watchdog(void);
73  extern int platform_register_ethernet(struct gemini_gmac_platform_data *pdata);
74 +extern int platform_register_usb(unsigned int id);
75  
76  extern void gemini_restart(char mode, const char *cmd);
77  
78 --- a/drivers/usb/Kconfig
79 +++ b/drivers/usb/Kconfig
80 @@ -39,6 +39,7 @@ config USB_ARCH_HAS_EHCI
81         default y if ARCH_MXC
82         default y if ARCH_MXS
83         default y if ARCH_OMAP3
84 +       default y if ARCH_GEMINI
85         default y if ARCH_CNS3XXX
86         default y if ARCH_VT8500
87         default y if PLAT_SPEAR
88 --- a/drivers/usb/host/ehci-hcd.c
89 +++ b/drivers/usb/host/ehci-hcd.c
90 @@ -340,12 +340,14 @@ static void ehci_silence_controller(struct ehci_hcd *ehci)
91         spin_lock_irq(&ehci->lock);
92         ehci->rh_state = EHCI_RH_HALTED;
93         ehci_turn_off_all_ports(ehci);
94
95 +#ifndef CONFIG_ARCH_GEMINI
96         /* make BIOS/etc use companion controller during reboot */
97         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
98  
99         /* unblock posted writes */
100         ehci_readl(ehci, &ehci->regs->configured_flag);
101 +#endif
102         spin_unlock_irq(&ehci->lock);
103  }
104  
105 @@ -600,7 +602,9 @@ static int ehci_run (struct usb_hcd *hcd)
106         // Philips, Intel, and maybe others need CMD_RUN before the
107         // root hub will detect new devices (why?); NEC doesn't
108         ehci->command &= ~(CMD_LRESET|CMD_IAAD|CMD_PSE|CMD_ASE|CMD_RESET);
109 +#ifndef CONFIG_ARCH_GEMINI
110         ehci->command |= CMD_RUN;
111 +#endif
112         ehci_writel(ehci, ehci->command, &ehci->regs->command);
113         dbg_cmd (ehci, "init", ehci->command);
114  
115 @@ -620,9 +624,11 @@ static int ehci_run (struct usb_hcd *hcd)
116          */
117         down_write(&ehci_cf_port_reset_rwsem);
118         ehci->rh_state = EHCI_RH_RUNNING;
119 +#ifndef CONFIG_ARCH_GEMINI
120         ehci_writel(ehci, FLAG_CF, &ehci->regs->configured_flag);
121         ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
122         msleep(5);
123 +#endif
124         up_write(&ehci_cf_port_reset_rwsem);
125         ehci->last_periodic_enable = ktime_get_real();
126  
127 @@ -763,9 +769,10 @@ static irqreturn_t ehci_irq (struct usb_hcd *hcd)
128                 pcd_status = status;
129  
130                 /* resume root hub? */
131 +#ifndef CONFIG_ARCH_GEMINI
132                 if (ehci->rh_state == EHCI_RH_SUSPENDED)
133                         usb_hcd_resume_root_hub(hcd);
134 -
135 +#endif
136                 /* get per-port change detect bits */
137                 if (ehci->has_ppcd)
138                         ppcd = status >> 16;
139 @@ -1228,6 +1241,11 @@ MODULE_DESCRIPTION(DRIVER_DESC);
140  MODULE_AUTHOR (DRIVER_AUTHOR);
141  MODULE_LICENSE ("GPL");
142  
143 +#ifdef CONFIG_ARCH_GEMINI
144 +#include "ehci-fotg2.c"
145 +#define PLATFORM_DRIVER                ehci_fotg2_driver
146 +#endif
147 +
148  #ifdef CONFIG_USB_EHCI_FSL
149  #include "ehci-fsl.c"
150  #define        PLATFORM_DRIVER         ehci_fsl_driver
151 --- a/drivers/usb/host/ehci-timer.c     2012-12-24 18:35:19.695560879 +0100
152 +++ b/drivers/usb/host/ehci-timer.c     2012-12-24 18:39:39.813308000 +0100
153 @@ -207,7 +207,9 @@
154  
155         /* Clean up the mess */
156         ehci->rh_state = EHCI_RH_HALTED;
157 +#ifndef CONFIG_ARCH_GEMINI
158         ehci_writel(ehci, 0, &ehci->regs->configured_flag);
159 +#endif
160         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
161         ehci_work(ehci);
162         end_unlink_async(ehci);
163 --- a/drivers/usb/host/ehci.h
164 +++ b/drivers/usb/host/ehci.h
165 @@ -600,7 +600,12 @@ static inline unsigned int
166  ehci_port_speed(struct ehci_hcd *ehci, unsigned int portsc)
167  {
168         if (ehci_is_TDI(ehci)) {
169 -               switch ((portsc >> (ehci->has_hostpc ? 25 : 26)) & 3) {
170 +#ifdef CONFIG_ARCH_GEMINI
171 +               portsc = readl(ehci_to_hcd(ehci)->regs + 0x80);
172 +               switch ((portsc>>22)&3) {
173 +#else
174 +               switch ((portsc>>26)&3) {
175 +#endif
176                 case 0:
177                         return 0;
178                 case 1:
179 --- a/drivers/usb/host/ehci-hub.c
180 +++ b/drivers/usb/host/ehci-hub.c
181 @@ -912,6 +912,11 @@ static int ehci_hub_control (
182                         /* see what we found out */
183                         temp = check_reset_complete (ehci, wIndex, status_reg,
184                                         ehci_readl(ehci, status_reg));
185 +#ifdef CONFIG_ARCH_GEMINI
186 +                       /* restart schedule */
187 +                       ehci->command |= CMD_RUN;
188 +                       ehci_writel(ehci, ehci->command, &ehci->regs->command);
189 +#endif
190                 }
191  
192                 if (!(temp & (PORT_RESUME|PORT_RESET))) {
193 --- a/include/linux/usb/ehci_def.h      2012-12-24 15:01:10.168320497 +0100
194 +++ b/include/linux/usb/ehci_def.h      2012-12-24 15:11:43.335575000 +0100
195 @@ -110,9 +110,14 @@
196         u32             frame_list;     /* points to periodic list */
197         /* ASYNCLISTADDR: offset 0x18 */
198         u32             async_next;     /* address of next async queue head */
199 -
200 +#ifndef CONFIG_ARCH_GEMINI
201         u32             reserved1[2];
202 -
203 +#else
204 +       u32             reserved1;
205 +       /* PORTSC: offset 0x20 for Faraday OTG */
206 +       u32             port_status[1];
207 +#endif
208 +
209         /* TXFILLTUNING: offset 0x24 */
210         u32             txfill_tuning;  /* TX FIFO Tuning register */
211  #define TXFIFO_DEFAULT (8<<16)         /* FIFO burst threshold 8 */
212 @@ -123,8 +128,11 @@
213         u32             configured_flag;
214  #define FLAG_CF                (1<<0)          /* true: we'll support "high speed" */
215  
216 +#ifndef CONFIG_ARCH_GEMINI
217         /* PORTSC: offset 0x44 */
218         u32             port_status[0]; /* up to N_PORTS */
219 +#endif
220 +
221  /* EHCI 1.1 addendum */
222  #define PORTSC_SUSPEND_STS_ACK 0
223  #define PORTSC_SUSPEND_STS_NYET 1