[ep93xx] target supports usb
[openwrt.git] / target / linux / ep93xx / patches-2.6.30 / 009-ep93xx-fb.patch
1 --- a/drivers/video/Kconfig
2 +++ b/drivers/video/Kconfig
3 @@ -255,6 +255,25 @@ config FB_CIRRUS
4           Say N unless you have such a graphics board or plan to get one
5           before you next recompile the kernel.
6  
7 +config FB_EP93XX
8 +       tristate "EP93xx frame buffer support"
9 +       depends on FB
10 +       select FB_CFB_FILLRECT
11 +       select FB_CFB_COPYAREA
12 +       select FB_CFB_IMAGEBLIT
13 +       help
14 +         This is the frame buffer device driver for the internal raster engine
15 +         on certain members of the EP93xx family.  For VGA and LCD output.
16 +
17 +config FB_EP93XX_MONO
18 +       tristate "EP93xx Mono frame buffer support"
19 +       depends on FB
20 +       select FB_CFB_FILLRECT
21 +       select FB_CFB_COPYAREA
22 +       help
23 +         This is the frame buffer device driver for the internal raster engine
24 +         on certain members of the EP93xx family. For LCD output.
25 +
26  config FB_PM2
27         tristate "Permedia2 support"
28         depends on FB && ((AMIGA && BROKEN) || PCI)
29 --- a/drivers/video/Makefile
30 +++ b/drivers/video/Makefile
31 @@ -95,6 +95,8 @@ obj-$(CONFIG_FB_ARMCLCD)        += amba-clcd.
32  obj-$(CONFIG_FB_68328)            += 68328fb.o
33  obj-$(CONFIG_FB_GBE)              += gbefb.o
34  obj-$(CONFIG_FB_CIRRUS)                  += cirrusfb.o
35 +obj-$(CONFIG_FB_EP93XX)                  += ep93xxfb.o
36 +obj-$(CONFIG_FB_EP93XX_MONO)     += ep93xxfb_mono.o
37  obj-$(CONFIG_FB_ASILIANT)        += asiliantfb.o
38  obj-$(CONFIG_FB_PXA)             += pxafb.o
39  obj-$(CONFIG_FB_W100)            += w100fb.o
40 --- /dev/null
41 +++ b/drivers/video/ep93xxfb.c
42 @@ -0,0 +1,1628 @@
43 +#include <linux/module.h>
44 +#include <linux/kernel.h>
45 +#include <linux/reboot.h>
46 +#include <linux/errno.h>
47 +#include <linux/string.h>
48 +#include <linux/mm.h>
49 +#include <linux/delay.h>
50 +#include <linux/fb.h>
51 +#include <linux/init.h>
52 +#include <linux/ioport.h>
53 +#include <linux/interrupt.h>
54 +#include <linux/dma-mapping.h>
55 +#include <asm/io.h>
56 +#include <asm/uaccess.h>
57 +#include "ep93xxfb.h"
58 +#include <mach/hardware.h>
59 +#include <linux/platform_device.h>
60 +
61 +#include "console/fbcon.h"
62 +
63 +
64 +#if defined(CONFIG_MACH_EDB9312) || defined(CONFIG_MACH_EDB9315) || defined(CONFIG_MACH_EDB9307) || defined(CONFIG_MACH_EDB9301) || defined(CONFIG_MACH_EDB9302)
65 +#define CONFIG_EP93XX_SDCS3
66 +#else
67 +#define CONFIG_EP93XX_SDCS0
68 +#endif
69 +
70 +//#define DEBUG 1
71 +#ifdef DEBUG
72 +#define DPRINTK( fmt, arg... )  printk( fmt, ##arg )
73 +#else
74 +#define DPRINTK( fmt, arg... )
75 +#endif
76 +
77 +#define FBDEV_NAME "ep93xxfb"
78 +
79 +#define ep93xxfb_outl(value, reg)              \
80 +{                                              \
81 +    outl(RASTER_SWLOCK_VALUE, RASTER_SWLOCK);  \
82 +    outl(value, reg);                          \
83 +}
84 +
85 +#define DEFAULT_OUT   CRT_OUT
86 +#define DEFAULT_MODE   7
87 +#define DEFAULT_BPP    24
88 +
89 +static DECLARE_WAIT_QUEUE_HEAD(ep93xxfb_wait_in);
90 +
91 +static unsigned int pseudo_palette[256];
92 +static unsigned long *cursor_data = NULL;
93 +static struct ep93xxfb_info epinfo;
94 +
95 +static int vout =  DEFAULT_OUT;
96 +static int vmode = DEFAULT_MODE;
97 +static int depth = DEFAULT_BPP;
98 +
99 +
100 +static int ep93xxfb_setcol(struct fb_info *info, int bpp);
101 +
102 +
103 +static struct ep93xxfb_videomodes ep93xxfb_vmods[] = {
104 +    {
105 +       "Philips-LB064V02-640x480x60",
106 +        640, 24, 96, 40, 480, 10, 2, 33, 60,
107 +        CLK_INTERNAL, EDGE_FALLING, POL_LOW, POL_LOW, POL_LOW,
108 +    },
109 +    { // 1
110 +        "CRT-640x480-60",
111 +        640, 24, 96, 40, 480, 11, 2, 32, 60,
112 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
113 +    },
114 +    { // 2
115 +        "CRT-640x480-72",
116 +        640, 40, 40, 144, 480, 8, 3, 30, 72,
117 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
118 +    },
119 +    { // 3
120 +        "CRT-640x480-75",
121 +       640, 16, 76, 120, 480, 1, 3, 16, 75,
122 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
123 +    },
124 +    { // 4
125 +       "CRT-640x480-85",
126 +       640, 56, 56, 80, 480, 1, 3, 25, 85,
127 +       CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
128 +    },
129 +    { // 5
130 +       "CTR-640x480-100",
131 +       640, 32, 96, 96, 480, 8, 6, 36, 100,
132 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
133 +    },
134 +    { // 6
135 +       "CRT-800x600-56",
136 +       800, 24, 72, 128, 600, 1, 2, 22, 56,
137 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
138 +    },
139 +    { // 7
140 +        "CRT-800x600-60",
141 +        800, 40, 128, 88, 600, 1, 4, 23, 60,
142 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_HIGH, POL_HIGH,
143 +    },
144 +    { // 8
145 +       "CRT-800x600-72",
146 +       800, 56, 120, 64, 600, 37, 6, 23, 72,
147 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
148 +    },
149 +    { // 9
150 +       "CRT-800x600-85",
151 +       800, 64, 64, 160, 600, 16, 5, 36, 85,
152 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
153 +    },
154 +    { // 10
155 +        "CRT-800x600-100",
156 +       800, 64, 64, 160, 600, 4, 6, 30, 100,
157 +       CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
158 +    },
159 +    { // 11
160 +        "CRT-1024x768-60",
161 +       1024, 8, 144, 168, 768, 3, 6, 29, 60,
162 +       CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
163 +    },
164 +    { // 12
165 +       "CRT-1024x768-70",
166 +       1024, 24, 136, 144, 768, 3, 6, 29, 70,
167 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_LOW, POL_LOW,
168 +    },
169 +    { // 13
170 +       "CRT-1024x768-75",
171 +       1024, 16, 96, 176, 768, 1, 3, 28, 75,
172 +       CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_HIGH, POL_HIGH,
173 +    },
174 +    { // 14
175 +       "CRT-1024x768-85",
176 +       1024, 48, 96, 208, 768, 1, 3, 36, 85,
177 +       CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_HIGH, POL_HIGH,
178 +    },
179 +    { // 15
180 +        "CRT-1280x720-60",
181 +       1280, 48, 112, 248, 720, 1, 3, 38, 60,
182 +        CLK_INTERNAL, EDGE_RISING, POL_LOW, POL_HIGH, POL_HIGH,
183 +    }
184 +};
185 +
186 +static void philips_lb064v02_on(unsigned char value)
187 +{
188 +    DPRINTK("philips_lb064v02_on \n");
189 +    outl(inl(GPIO_PADDR) | 2, GPIO_PADDR);
190 +    outl(inl(GPIO_PADR) | 2, GPIO_PADR);
191 +}
192 +
193 +static void philips_lb064v02_off(unsigned char value)
194 +{
195 +    DPRINTK("philips_lb064v02_off \n");
196 +    outl(inl(GPIO_PADR) & ~2, GPIO_PADR);
197 +}
198 +
199 +static irqreturn_t ep93xxfb_irq_handler(int i, void *blah)
200 +{
201 +    outl(0x00000000, BLOCKCTRL);
202 +    wake_up(&ep93xxfb_wait_in);
203 +    return IRQ_HANDLED;
204 +}
205 +
206 +static void ep93xxfb_wait(void)
207 +{
208 +    DECLARE_WAITQUEUE(wait, current);
209 +    add_wait_queue(&ep93xxfb_wait_in, &wait);
210 +    set_current_state(TASK_UNINTERRUPTIBLE);
211 +
212 +    while (inl(BLOCKCTRL) & 0x00000001){
213 +       if(/*(pls_proba==1)&&*/(!in_atomic()))
214 +           schedule();
215 +    }
216 +
217 +    remove_wait_queue(&ep93xxfb_wait_in, &wait);
218 +    set_current_state(TASK_RUNNING);
219 +
220 +}
221 +
222 +void ep93xxfb_fillrect(struct fb_info *p, const struct fb_fillrect *fill)
223 +{
224 +    unsigned long blkdestwidth,tmp;
225 +
226 +    if (!fill->width || !fill->height ||
227 +       (fill->dx >= p->var.xres) ||
228 +       (fill->dy >= p->var.yres) ||
229 +        ((fill->dx + fill->width - 1) >= p->var.xres) ||
230 +        ((fill->dy + fill->height - 1) >= p->var.yres))
231 +        return;
232 +
233 +    tmp =  (( fill->dx + fill->width ) * epinfo.bpp );
234 +    blkdestwidth = tmp / 32;
235 +    if(blkdestwidth > 0 && (tmp % 32 == 0))
236 +       blkdestwidth--;
237 +    blkdestwidth = blkdestwidth - (fill->dx * epinfo.bpp) / 32;
238 +
239 +    outl(fill->color, BLOCKMASK);
240 +    outl( ((fill->dx * epinfo.bpp) & 0x1F) |
241 +         ((((fill->dx + fill->width - 1) * epinfo.bpp ) & 0x1F) << 16),
242 +         DESTPIXELSTRT);
243 +    outl( ((epinfo.xres * epinfo.bpp) / 32), DESTLINELENGTH);
244 +    outl( blkdestwidth, BLKDESTWIDTH );
245 +    outl(fill->height - 1, BLKDESTHEIGHT);
246 +    outl((epinfo.fb_phys + (fill->dy * epinfo.xres * epinfo.bpp ) / 8 +
247 +        (fill->dx * epinfo.bpp ) / 8 )
248 +        , BLKDSTSTRT);
249 +    outl( epinfo.pixformat | 0x0000000B, BLOCKCTRL);
250 +    ep93xxfb_wait();
251 +
252 +}
253 +
254 +void ep93xxfb_copyarea(struct fb_info *p, const struct fb_copyarea *area)
255 +{
256 +    unsigned long startsx,stopsx,startdx,stopdx,startsy,startdy;
257 +    unsigned long blksrcwidth,blkdestwidth,tmp;
258 +    unsigned long val = 0;
259 +
260 +    if( !area->width || !area->width ||
261 +       (area->sx >= p->var.xres) || (area->sy >= p->var.yres) ||
262 +        (area->dx >= p->var.xres) || (area->dy >= p->var.yres) ||
263 +        ((area->dx + area->width - 1) >= p->var.xres) ||
264 +        ((area->dy + area->height - 1) >= p->var.yres))
265 +       return;
266 +
267 +    if(area->sx == area->dx && area->sy == area->dy)
268 +       return;
269 +
270 +    if ((area->dy == area->sy) && (area->dx > area->sx) &&
271 +       (area->dx < (area->sx + area->width - 1))) {
272 +       startdx = area->dx + area->width - 1;
273 +        stopdx = area->dx;
274 +        startsx = area->sx + area->width - 1;
275 +        stopsx = area->sx;
276 +        val |= 0x000000A0;
277 +    }
278 +    else {
279 +       startdx = area->dx;
280 +        stopdx = area->dx + area->width - 1;
281 +        startsx = area->sx;
282 +        stopsx = area->sx + area->width - 1;
283 +    }
284 +
285 +    if (area->dy <= area->sy) {
286 +        startdy = area->dy;
287 +        startsy = area->sy;
288 +    }
289 +    else {
290 +       startdy = area->dy + area->height -1;
291 +       startsy = area->sy + area->height -1;
292 +       val |= 0x00000140;
293 +    }
294 +
295 +    tmp =  (( area->sx + area->width ) * epinfo.bpp );
296 +    blksrcwidth = tmp / 32;
297 +    if(blksrcwidth > 0 && (tmp % 32 == 0))
298 +       blksrcwidth--;
299 +    blksrcwidth = blksrcwidth - (area->sx * epinfo.bpp) / 32;
300 +
301 +    tmp =  (( area->dx + area->width ) * epinfo.bpp );
302 +    blkdestwidth = tmp / 32;
303 +    if(blkdestwidth > 0 && (tmp % 32 == 0))
304 +        blkdestwidth--;
305 +    blkdestwidth = blkdestwidth - (area->dx * epinfo.bpp) / 32;
306 +
307 +    outl( 0x00000000 , BLOCKCTRL);
308 +
309 +    /*** src ***/
310 +    outl((((startsx * epinfo.bpp) & 0x1F) |
311 +         (((stopsx * epinfo.bpp ) & 0x1F) << 16))
312 +        , SRCPIXELSTRT);
313 +    outl((epinfo.fb_phys + (startsy * epinfo.xres * epinfo.bpp ) / 8 +
314 +         (startsx * epinfo.bpp ) / 8 )
315 +        , BLKSRCSTRT);
316 +    outl(((epinfo.xres * epinfo.bpp) / 32), SRCLINELENGTH);
317 +    outl( blksrcwidth, BLKSRCWIDTH );
318 +
319 +    /*** dest ***/
320 +    outl((((startdx * epinfo.bpp) & 0x1F) |
321 +        (((stopdx * epinfo.bpp ) & 0x1F) << 16))
322 +        , DESTPIXELSTRT);
323 +    outl((epinfo.fb_phys + (startdy * epinfo.xres * epinfo.bpp ) / 8 +
324 +         (startdx * epinfo.bpp ) / 8 )
325 +        , BLKDSTSTRT);
326 +    outl( ((epinfo.xres * epinfo.bpp) / 32), DESTLINELENGTH);
327 +    outl( blkdestwidth, BLKDESTWIDTH);
328 +    outl( area->height - 1 , BLKDESTHEIGHT);
329 +    outl( epinfo.pixformat | val | 0x00000003, BLOCKCTRL);
330 +    ep93xxfb_wait();
331 +}
332 +
333 +void ep93xxfb_imageblit(struct fb_info *p, const struct fb_image *image)
334 +{
335 +//    unsigned long blkdestwidth,tmp;
336 +//    void * pucBlitBuf;
337 +    cfb_imageblit( p , image );
338 +    return;
339 +/*
340 +    if ((image->dx >= p->var.xres) ||
341 +        (image->dy >= p->var.yres) ||
342 +        ((image->dx + image->width - 1) >= p->var.xres) ||
343 +        ((image->dy + image->height - 1) >= p->var.yres))
344 +        return;
345 +    if (epinfo.bpp != image->depth )
346 +       return;
347 +
348 +    tmp =  (( image->dx + image->width ) * epinfo.bpp );
349 +    blkdestwidth = tmp / 32;
350 +    if(blkdestwidth > 0 && (tmp % 32 == 0))
351 +       blkdestwidth--;
352 +    blkdestwidth = blkdestwidth - (image->dx * epinfo.bpp) / 32;
353 +
354 +    pucBlitBuf = kmalloc(1024*8,GFP_KERNEL);
355 +    copy_from_user(pucBlitBuf, image->data, 5000);
356 +
357 +    outl( 0x00000000 , BLOCKCTRL);
358 +
359 +    outl( 0x00000000, SRCPIXELSTRT);
360 +    outl( virt_to_phys(pucBlitBuf), BLKSRCSTRT);
361 +    outl( (image->width * epinfo.bpp) / 32 , SRCLINELENGTH);
362 +    outl(((image->width - 1) * epinfo.bpp) / 32, BLKSRCWIDTH );
363 +
364 +    outl(((image->dx * epinfo.bpp) & 0x1F) |
365 +         ((((image->dx + image->width - 1) * epinfo.bpp ) & 0x1F) << 16)
366 +         , DESTPIXELSTRT);
367 +    outl((epinfo.fb_phys + (image->dy * epinfo.xres * epinfo.bpp ) / 8 +
368 +         (image->dx * epinfo.bpp ) / 8 )
369 +         , BLKDSTSTRT);
370 +    outl( ((epinfo.xres * epinfo.bpp) / 32), DESTLINELENGTH );
371 +    outl( blkdestwidth, BLKDESTWIDTH );
372 +    outl( image->height - 1 , BLKDESTHEIGHT);
373 +    outl(image->fg_color, BLOCKMASK);
374 +    outl(image->bg_color, BACKGROUND);
375 +    outl( epinfo.pixformat | 0x00000003, BLOCKCTRL );
376 +    ep93xxfb_wait();
377 +*/
378 +}
379 +
380 +
381 +static unsigned long isqrt(unsigned long a)
382 +{
383 +    unsigned long rem = 0;
384 +    unsigned long root = 0;
385 +    int i;
386 +
387 +    for (i = 0; i < 16; i++) {
388 +        root <<= 1;
389 +        rem = ((rem << 2) + (a >> 30));
390 +        a <<= 2;
391 +        root++;
392 +        if (root <= rem) {
393 +            rem -= root;
394 +            root++;
395 +        }
396 +       else
397 +            root--;
398 +    }
399 +    return root >> 1;
400 +}
401 +
402 +int ep93xxfb_line(struct fb_info *info,  struct ep93xx_line *line)
403 +{
404 +    unsigned long value = 0;
405 +    long x, y, dx, dy, count, xinc, yinc, xval, yval, incr;
406 +
407 +    if ((line->x1 > info->var.xres) ||
408 +        (line->x2 > info->var.xres) ||
409 +        (line->y1 > info->var.yres) ||
410 +        (line->y2 > info->var.yres))
411 +       return -EFAULT;
412 +    x = line->x1;
413 +    y = line->y1;
414 +    dx = line->x2 - line->x1;
415 +    dy = line->y2 - line->y1;
416 +
417 +    if ( !dx || !dy )
418 +       return -EFAULT;
419 +
420 +    if ( dx < 0 && dy < 0 ) {
421 +       x = line->x2;
422 +       y = line->y2;
423 +       dx *= -1;
424 +       dy *= -1;
425 +    }
426 +    else if ( dx < 0 && dy > 0 ){
427 +        dx *= -1;
428 +       value = 0x000000A0;
429 +    }
430 +    else if( dy < 0 && dx > 0 ){
431 +       dy *= -1;
432 +        value = 0x00000140;
433 +    }
434 +
435 +    if (line->flags & LINE_PRECISE) {
436 +       count = isqrt(((dy * dy) + (dx * dx)) * 4096);
437 +       xinc = (4095 * 64 * dx) / count;
438 +       yinc = (4095 * 64 * dy) / count;
439 +       xval = 2048;
440 +       yval = 2048;
441 +       count = 0;
442 +       while (dx || dy) {
443 +           incr = 0;
444 +           xval -= xinc;
445 +           if (xval <= 0) {
446 +               xval += 4096;
447 +               dx--;
448 +               incr = 1;
449 +           }
450 +           yval -= yinc;
451 +           if (yval <= 0) {
452 +               yval += 4096;
453 +               dy--;
454 +               incr = 1;
455 +           }
456 +           count += incr;
457 +       }
458 +    }
459 +    else {
460 +        if ( dx == dy ) {
461 +            xinc = 4095;
462 +            yinc = 4095;
463 +            count = dx;
464 +
465 +        }
466 +       else if ( dx < dy ) {
467 +            xinc = ( dx * 4095 ) / dy;
468 +            yinc = 4095;
469 +           count = dy;
470 +
471 +       }
472 +       else {
473 +            xinc = 4095;
474 +            yinc = ( dy * 4095 ) / dx;
475 +            count = dx;
476 +        }
477 +    }
478 +
479 +    outl(0x08000800, LINEINIT);
480 +    if (line->flags & LINE_PATTERN)
481 +        outl(line->pattern, LINEPATTRN);
482 +    else
483 +        outl(0x000fffff, LINEPATTRN);
484 +    outl(epinfo.fb_phys + ((y * epinfo.xres * epinfo.bpp) / 8) +
485 +         ((x * epinfo.bpp ) / 8 ), BLKDSTSTRT);
486 +
487 +    outl(((x * epinfo.bpp) & 0x1F) |
488 +         ((((x + dx - 1) * epinfo.bpp) & 0x1F ) << 16),
489 +         DESTPIXELSTRT);
490 +    outl((epinfo.xres * epinfo.bpp) / 32, DESTLINELENGTH);
491 +    outl(line->fgcolor, BLOCKMASK);
492 +    outl(line->bgcolor, BACKGROUND);
493 +    outl((yinc << 16) | xinc, LINEINC);
494 +    outl( count & 0xFFF, BLKDESTWIDTH);
495 +    outl( 0  , BLKDESTHEIGHT);
496 +    value |= (line->flags & LINE_BACKGROUND) ? 0x00004000 : 0;
497 +    outl(epinfo.pixformat | value | 0x00000013, BLOCKCTRL);
498 +    ep93xxfb_wait();
499 +    return 0;
500 +}
501 +
502 +int ioctl_cursor=0;
503 +
504 +int ep93xxfb_cursor(struct fb_info *info, struct ep93xx_cursor *cursor)
505 +{
506 +    unsigned long x,y,save;
507 +
508 +    if((cursor->width ==0)  || (cursor->height ==0) )
509 +    {
510 +       struct fb_cursor *fbcon_cursor =(struct fb_cursor *)cursor;
511 +       struct fbcon_ops *ops = (struct fbcon_ops *)info->fbcon_par;
512 +       unsigned int scan_align = info->pixmap.scan_align - 1;
513 +       unsigned int buf_align = info->pixmap.buf_align - 1;
514 +       unsigned int i, size, dsize, s_pitch, d_pitch;
515 +       struct fb_image *image;
516 +       u8 *src, *dst;
517 +
518 +       if(ioctl_cursor==1 ){
519 +               DPRINTK("softcursor error return\n");
520 +               return 0;
521 +       }
522 +
523 +
524 +        if (info->state != FBINFO_STATE_RUNNING)
525 +                return 0;
526 +
527 +        s_pitch = (fbcon_cursor->image.width + 7) >> 3;
528 +        dsize = s_pitch * fbcon_cursor->image.height;
529 +
530 +        if (dsize + sizeof(struct fb_image) != ops->cursor_size) {
531 +                if (ops->cursor_src != NULL)
532 +                        kfree(ops->cursor_src);
533 +                ops->cursor_size = dsize + sizeof(struct fb_image);
534 +
535 +                ops->cursor_src = kmalloc(ops->cursor_size, GFP_ATOMIC);
536 +                if (!ops->cursor_src) {
537 +                        ops->cursor_size = 0;
538 +                        return -ENOMEM;
539 +                }
540 +        }
541 +        src = ops->cursor_src + sizeof(struct fb_image);
542 +        image = (struct fb_image *)ops->cursor_src;
543 +        *image = fbcon_cursor->image;
544 +        d_pitch = (s_pitch + scan_align) & ~scan_align;
545 +
546 +        size = d_pitch * image->height + buf_align;
547 +        size &= ~buf_align;
548 +        dst = fb_get_buffer_offset(info, &info->pixmap, size);
549 +
550 +        if (fbcon_cursor->enable) {
551 +                switch (fbcon_cursor->rop) {
552 +                case ROP_XOR:
553 +                        for (i = 0; i < dsize; i++)
554 +                                src[i] = image->data[i] ^ fbcon_cursor->mask[i];
555 +                        break;
556 +                case ROP_COPY:
557 +                default:
558 +                        for (i = 0; i < dsize; i++)
559 +                                src[i] = image->data[i] & fbcon_cursor->mask[i];
560 +                        break;
561 +                }
562 +        } else
563 +                memcpy(src, image->data, dsize);
564 +
565 +        fb_pad_aligned_buffer(dst, d_pitch, src, s_pitch, image->height);
566 +        image->data = dst;
567 +        info->fbops->fb_imageblit(info, image);
568 +        return 0;
569 +
570 +    }
571 +    else{
572 +       ioctl_cursor = 1;
573 +
574 +       /*if (cursor->width > 16 || cursor->height > 16){
575 +       DPRINTK("%s width %d or heright %d error\n",__FUNCTION__,cursor->width,cursor->height);
576 +       return -ENXIO;
577 +       }*/
578 +
579 +       if (cursor->flags & CURSOR_OFF)
580 +               outl(inl(CURSORXYLOC) & ~0x00008000, CURSORXYLOC);
581 +
582 +       if (cursor->flags & CURSOR_SETSHAPE) {
583 +               copy_from_user(cursor_data, cursor->data,
584 +                       cursor->width * cursor->height / 4);
585 +               save = inl(CURSORXYLOC);
586 +               outl(save & ~0x00008000, CURSORXYLOC);
587 +
588 +               outl(virt_to_phys(cursor_data), CURSOR_ADR_START);
589 +               outl(virt_to_phys(cursor_data), CURSOR_ADR_RESET);
590 +               outl(((cursor->width - 1) & 0x30) << 4 | ((cursor->height - 1) << 2) |
591 +                       ((cursor->width - 1) >> 4), CURSORSIZE);
592 +               outl(save, CURSORXYLOC);
593 +
594 +       }
595 +
596 +       if (cursor->flags & CURSOR_SETCOLOR) {
597 +               outl(cursor->color1, CURSORCOLOR1);
598 +               outl(cursor->color2, CURSORCOLOR2);
599 +               outl(cursor->blinkcolor1, CURSORBLINK1);
600 +               outl(cursor->blinkcolor2, CURSORBLINK2);
601 +       }
602 +
603 +       if (cursor->flags & CURSOR_BLINK) {
604 +               if (cursor->blinkrate)
605 +                       outl(0x00000100 | cursor->blinkrate, CURSORBLINK);
606 +               else
607 +                       outl(0x0000000FF, CURSORBLINK);
608 +       }
609 +
610 +       if (cursor->flags & CURSOR_MOVE) {
611 +                       x = (inl(HACTIVESTRTSTOP) & 0x000007ff) - cursor->dx - 2;
612 +               y = (inl(VACTIVESTRTSTOP) & 0x000007ff) - cursor->dy;
613 +               outl((inl(CURSORXYLOC) & 0x8000) | (y << 16) | x, CURSORXYLOC);
614 +       }
615 +
616 +       if(cursor->flags & CURSOR_ON)
617 +               outl(inl(CURSORXYLOC) | 0x00008000, CURSORXYLOC);
618 +
619 +       return 0;
620 +    }
621 +}
622 +
623 +
624 +
625 +static inline void
626 +ep93xxfb_palette_write(u_int regno, u_int red, u_int green,
627 +                       u_int blue, u_int trans)
628 +{
629 +    unsigned int cont, i, pal;
630 +    DPRINTK("ep93xxfb_palette_write - enter\n");
631 +    pal = ((red & 0xFF00) << 8) | (green & 0xFF00) | ((blue & 0xFF00) >> 8);
632 +    pseudo_palette[regno] = pal;
633 +    outl( pal, ( COLOR_LUT + ( regno << 2 )));
634 +    cont = inl( LUTCONT );
635 +
636 +    if (( cont & LUTCONT_STAT && cont & LUTCONT_RAM1 ) ||
637 +        ( !( cont & LUTCONT_STAT ) && !( cont&LUTCONT_RAM1 ))) {
638 +       for ( i = 0; i < 256; i++ ) {
639 +           outl( pseudo_palette[i], ( COLOR_LUT + ( i << 2 )) );
640 +       }
641 +        outl( cont ^ LUTCONT_RAM1, LUTCONT );
642 +    }
643 +}
644 +
645 +int ep93xxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
646 +                          unsigned blue, unsigned transp,
647 +                          struct fb_info *info)
648 +{
649 +
650 +#define CNVT_TOHW(val,width) ((((val)<<(width))+0x7FFF-(val))>>16)
651 +
652 +    switch ( info->fix.visual )
653 +    {
654 +       case FB_VISUAL_PSEUDOCOLOR:
655 +           ep93xxfb_palette_write(regno, red, green, blue, transp);
656 +           break;
657 +       case FB_VISUAL_TRUECOLOR:
658 +           if (regno >= 16)
659 +               return 1;
660 +            red = CNVT_TOHW(red, info->var.red.length);
661 +            green = CNVT_TOHW(green, info->var.green.length);
662 +            blue = CNVT_TOHW(blue, info->var.blue.length);
663 +            transp = CNVT_TOHW(transp, info->var.transp.length);
664 +            ((u32 *)(info->pseudo_palette))[regno] =
665 +                    (red << info->var.red.offset) |
666 +                    (green << info->var.green.offset) |
667 +                    (blue << info->var.blue.offset) |
668 +                    (transp << info->var.transp.offset);
669 +           break;
670 +        case FB_VISUAL_DIRECTCOLOR:
671 +            red = CNVT_TOHW(red, 8);
672 +           green = CNVT_TOHW(green, 8);
673 +           blue = CNVT_TOHW(blue, 8);
674 +           transp = CNVT_TOHW(transp, 8);
675 +           break;
676 +    }
677 +#undef CNVT_TOHW
678 +    return 0;
679 +}
680 +
681 +static int ep93xx_pan_display(struct fb_var_screeninfo *var,
682 +                        struct fb_info *info)
683 +{
684 +    DPRINTK("ep93xx_pan_display - enter\n");
685 +
686 +    if (var->yoffset < 0
687 +        || var->yoffset + var->yres > info->var.yres_virtual
688 +        || var->xoffset)
689 +           return -EINVAL;
690 +
691 +    outl(epinfo.fb_phys + info->fix.line_length * var->yoffset
692 +        , VIDSCRNPAGE);
693 +
694 +    info->var.xoffset = var->xoffset;
695 +    info->var.yoffset = var->yoffset;
696 +
697 +    DPRINTK("ep93xx_pan_display - exit\n");
698 +    return 0;
699 +}
700 +
701 +
702 +static int
703 +ep93xxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
704 +{
705 +    struct fb_var_screeninfo tmp_var;
706 +    unsigned long pclk;
707 +    DPRINTK("ep93xxfb_check_var - enter\n");
708 +
709 +    if( vout != 0) {
710 +  printk("  ep93xxfb_check_var - vout != 0\n");
711 +       return -EINVAL;
712 +    }
713 +
714 +    memcpy (&tmp_var, var, sizeof (tmp_var));
715 +
716 +    if( (tmp_var.vmode & FB_VMODE_MASK) != FB_VMODE_NONINTERLACED ) {
717 +       printk("  ep93xxfb_check_var - unsupported video mode\n");
718 +       return -EINVAL;
719 +    }
720 +
721 +    if( ((tmp_var.xres * tmp_var.yres * tmp_var.bits_per_pixel) / 8) >
722 +         MAX_FBMEM_SIZE ) {
723 +       printk("  ep93xxfb_check_var - memory error \n");
724 +       return -ENOMEM;
725 +    }
726 +
727 +    if( ((tmp_var.xres_virtual * tmp_var.yres_virtual * tmp_var.bits_per_pixel) / 8) >
728 +          MAX_FBMEM_SIZE ) {
729 +       printk("  ep93xxfb_check_var - memory error \n");
730 +        return -ENOMEM;
731 +    }
732 +
733 +    pclk = 1000 * (1000000000 / tmp_var.pixclock);
734 +
735 +    if( pclk > ep93xx_get_max_video_clk() ) {
736 +        printk("  ep93xxfb_check_var - pixel clock error %lu\n",pclk);
737 +       return -EINVAL;
738 +    }
739 +
740 +    if (var->xres_virtual != var->xres)
741 +       var->xres_virtual = var->xres;
742 +    if (var->yres_virtual < var->yres)
743 +        var->yres_virtual = var->yres;
744 +
745 +    if (var->xoffset < 0)
746 +        var->xoffset = 0;
747 +    if (var->yoffset < 0)
748 +        var->yoffset = 0;
749 +
750 +    switch (tmp_var.bits_per_pixel) {
751 +       case 8:
752 +           break;
753 +        case 16:
754 +           break;
755 +        case 24:
756 +            break;
757 +        case 32:
758 +           break;
759 +       default:
760 +           return -EINVAL;
761 +    }
762 +
763 +    DPRINTK("ep93xxfb_check_var - exit\n");
764 +    return 0;
765 +}
766 +
767 +
768 +static int ep93xxfb_set_par(struct fb_info *info)
769 +{
770 +    struct fb_var_screeninfo tmp_var;
771 +    unsigned long attribs;
772 +
773 +    DPRINTK("ep93xxfb_set_par - enter\n");
774 +
775 +    if( ep93xxfb_check_var(&info->var,info) < 0 )
776 +        return -EINVAL;
777 +
778 +    if( !ep93xxfb_setcol(info,info->var.bits_per_pixel) )
779 +       return -EINVAL;
780 +
781 +
782 +       info->fix.line_length = (info->var.xres * info->var.bits_per_pixel) / 8;
783 +
784 +    ep93xxfb_blank( 1 , info );
785 +
786 +    memcpy(&tmp_var,&info->var,sizeof(tmp_var));
787 +
788 +    epinfo.xres = tmp_var.xres;
789 +    epinfo.xsync = tmp_var.hsync_len;
790 +    epinfo.xfp = tmp_var.right_margin;
791 +    epinfo.xbp = tmp_var.left_margin;
792 +    epinfo.xtotal = epinfo.xres + epinfo.xsync +
793 +                    epinfo.xfp + epinfo.xbp;
794 +
795 +    epinfo.yres = tmp_var.yres;
796 +    epinfo.ysync = tmp_var.vsync_len;
797 +    epinfo.yfp = tmp_var.lower_margin;
798 +    epinfo.ybp = tmp_var.upper_margin;
799 +    epinfo.ytotal = epinfo.yres + epinfo.ysync +
800 +                   epinfo.yfp + epinfo.ybp;
801 +
802 +    epinfo.pixclock = tmp_var.pixclock ;
803 +    epinfo.refresh = 1000 * (1000000000 / tmp_var.pixclock) ;
804 +
805 +    if( epinfo.refresh > ep93xx_get_max_video_clk())
806 +       epinfo.refresh = ep93xx_get_max_video_clk();
807 +    epinfo.bpp = tmp_var.bits_per_pixel;
808 +
809 +    ep93xxfb_setclk();
810 +    ep93xxfb_timing_signal_generation();
811 +
812 +    // set video memory parameters
813 +    outl(epinfo.fb_phys, VIDSCRNPAGE);
814 +    outl(epinfo.yres , SCRNLINES);
815 +    outl(((epinfo.xres * epinfo.bpp) / 32) - 1, LINELENGTH);
816 +    outl((epinfo.xres * epinfo.bpp) / 32, VLINESTEP);
817 +
818 +    // set pixel mode
819 +    ep93xxfb_pixelmod(epinfo.bpp);
820 +
821 +    attribs = 0;
822 +#ifdef CONFIG_EP93XX_SDCS0
823 +    attribs |= 0 << VIDEOATTRIBS_SDSEL_SHIFT;
824 +#endif
825 +#ifdef CONFIG_EP93XX_SDCS1
826 +    attribs |= 1 << VIDEOATTRIBS_SDSEL_SHIFT;
827 +#endif
828 +#ifdef CONFIG_EP93XX_SDCS2
829 +    attribs |= 2 << VIDEOATTRIBS_SDSEL_SHIFT;
830 +#endif
831 +#ifdef CONFIG_EP93XX_SDCS3
832 +    attribs |= 3 << VIDEOATTRIBS_SDSEL_SHIFT;
833 +#endif
834 +
835 +    attribs |= VIDEOATTRIBS_INVCLK;
836 +    if( tmp_var.sync & FB_SYNC_HOR_HIGH_ACT )
837 +        attribs |= VIDEOATTRIBS_HSPOL;
838 +    if( tmp_var.sync & FB_SYNC_VERT_HIGH_ACT )
839 +        attribs |= VIDEOATTRIBS_VCPOL;
840 +
841 +    ep93xxfb_outl(attribs, VIDEOATTRIBS);
842 +    ep93xxfb_blank( 0 , info );
843 +
844 +    DPRINTK("ep93xxfb_set_par - exit\n");
845 +
846 +    return 0;
847 +}
848 +
849 +
850 +static int ep93xxfb_blank(int blank_mode,struct fb_info *info)
851 +{
852 +    unsigned long attribs;
853 +    DPRINTK("ep93xxfb_blank - enter\n");
854 +    attribs = inl(VIDEOATTRIBS);
855 +
856 +#ifdef CONFIG_EP93XX_SDCS0
857 +    attribs |= 0 << VIDEOATTRIBS_SDSEL_SHIFT;
858 +#endif
859 +#ifdef CONFIG_EP93XX_SDCS1
860 +    attribs |= 1 << VIDEOATTRIBS_SDSEL_SHIFT;
861 +#endif
862 +#ifdef CONFIG_EP93XX_SDCS2
863 +    attribs |= 2 << VIDEOATTRIBS_SDSEL_SHIFT;
864 +#endif
865 +#ifdef CONFIG_EP93XX_SDCS3
866 +    attribs |= 3 << VIDEOATTRIBS_SDSEL_SHIFT;
867 +#endif
868 +
869 +    if (blank_mode) {
870 +       if (epinfo.off)
871 +            (epinfo.off)( 0 );
872 +
873 +       ep93xxfb_outl(attribs & ~(VIDEOATTRIBS_DATAEN |
874 +                 VIDEOATTRIBS_SYNCEN | VIDEOATTRIBS_PCLKEN |
875 +                VIDEOATTRIBS_EN), VIDEOATTRIBS);
876 +    }
877 +    else {
878 +       if (epinfo.clk_src == CLK_INTERNAL)
879 +           attribs |= VIDEOATTRIBS_PCLKEN;
880 +       else
881 +           attribs &= ~VIDEOATTRIBS_PCLKEN;
882 +
883 +       ep93xxfb_outl(attribs | VIDEOATTRIBS_DATAEN |
884 +                VIDEOATTRIBS_SYNCEN | VIDEOATTRIBS_EN,
885 +                VIDEOATTRIBS);
886 +
887 +       if (epinfo.configure)
888 +               (epinfo.configure)( epinfo.automods );
889 +       if (epinfo.on)
890 +              (epinfo.on)( 0 );
891 +    }
892 +    return 0;
893 +}
894 +
895 +static int ep93xxfb_mmap(struct fb_info *info,struct vm_area_struct *vma)
896 +{
897 +    unsigned long off, start, len;
898 +
899 +    DPRINTK("ep93xxfb_mmap - enter\n");
900 +
901 +    off = vma->vm_pgoff << PAGE_SHIFT;
902 +    start = info->fix.smem_start;
903 +    len = PAGE_ALIGN(start & ~PAGE_MASK) + info->fix.smem_len;
904 +    start &= PAGE_MASK;
905 +    if ((vma->vm_end - vma->vm_start + off) > len)
906 +       return -EINVAL;
907 +
908 +    off += start;
909 +    vma->vm_pgoff = off >> PAGE_SHIFT;
910 +
911 +    vma->vm_flags |= VM_IO;
912 +    vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
913 +
914 +    if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
915 +       vma->vm_end - vma->vm_start, vma->vm_page_prot)) {
916 +       DPRINTK("ep93xxfb_mmap error\n");
917 +       return -EAGAIN;
918 +    }
919 +
920 +    DPRINTK("ep93xxfb_mmap - exit\n");
921 +    return 0;
922 +}
923 +
924 +static unsigned long ep93xx_get_pll_frequency(unsigned long pll)
925 +{
926 +    unsigned long fb1, fb2, ipd, ps, freq;
927 +
928 +    if (pll == 1)
929 +       pll = inl(EP93XX_SYSCON_CLOCK_SET1);
930 +    else if (pll == 2)
931 +       pll = inl(EP93XX_SYSCON_CLOCK_SET2);
932 +    else
933 +       return 0;
934 +
935 +    ps = (pll & SYSCON_CLKSET1_PLL1_PS_MASK) >>        SYSCON_CLKSET1_PLL1_PS_SHIFT;
936 +    fb1 = ((pll & SYSCON_CLKSET1_PLL1_X1FBD1_MASK) >> SYSCON_CLKSET1_PLL1_X1FBD1_SHIFT);
937 +    fb2 = ((pll & SYSCON_CLKSET1_PLL1_X2FBD2_MASK) >> SYSCON_CLKSET1_PLL1_X2FBD2_SHIFT);
938 +    ipd = ((pll & SYSCON_CLKSET1_PLL1_X2IPD_MASK) >> SYSCON_CLKSET1_PLL1_X2IPD_SHIFT);
939 +
940 +    freq = (((0x00e10000 * (fb1+1)) / (ipd+1)) * (fb2+1)) >> ps;
941 +    return freq;
942 +}
943 +
944 +static int ep93xx_get_max_video_clk()
945 +{
946 +    unsigned long f,freq = 0;
947 +
948 +    freq = 14745600 / 4;
949 +    f = ep93xx_get_pll_frequency(1) / 4;
950 +    if ( f > freq )
951 +       freq = f;
952 +    f = ep93xx_get_pll_frequency(2) / 4;
953 +    if ( f > freq )
954 +       freq = f;
955 +
956 +    return freq;
957 +}
958 +
959 +static int ep93xx_set_video_div(unsigned long freq)
960 +{
961 +    unsigned long pdiv = 0, div = 0, psel = 0, esel = 0;
962 +    unsigned long err, f, i, j, k;
963 +
964 +    err = -1;
965 +
966 +    for (i = 0; i < 3; i++) {
967 +       if (i == 0)
968 +           f = 14745600 * 2;
969 +       else if (i == 1)
970 +           f = ep93xx_get_pll_frequency(1) * 2;
971 +       else
972 +           f = ep93xx_get_pll_frequency(2) * 2;
973 +
974 +       for (j = 4; j <= 6; j++) {
975 +           k = f / (freq * j);
976 +           if (k < 2)
977 +               continue;
978 +
979 +           if (abs(((f / (j * k))) - freq ) < err ) {
980 +               pdiv = j - 3;
981 +               div = k;
982 +               psel = (i == 2) ? 1 : 0;
983 +               esel = (i == 0) ? 0 : 1;
984 +               err = (f / (j * k)) - freq;
985 +           }
986 +       }
987 +    }
988 +
989 +    if (err == -1)
990 +       return -1;
991 +
992 +    SysconSetLocked(SYSCON_VIDDIV,SYSCON_VIDDIV_VENA | (esel ? SYSCON_VIDDIV_ESEL : 0) |
993 +                       (psel ? SYSCON_VIDDIV_PSEL : 0) |
994 +                       (pdiv << SYSCON_VIDDIV_PDIV_SHIFT) |
995 +                       (div << SYSCON_VIDDIV_VDIV_SHIFT)
996 +                  );
997 +
998 +    return freq + err;
999 +}
1000 +
1001 +static void ep93xxfb_pixelmod(int bpp)
1002 +{
1003 +    unsigned long tmpdata = 0;
1004 +
1005 +    DPRINTK("ep93xxfb_pixelmod %dbpp -enter\n",bpp);
1006 +    switch(bpp) {
1007 +       case 8:
1008 +            tmpdata = PIXELMODE_P_8BPP |
1009 +                     PIXELMODE_S_1PPCMAPPED |
1010 +                      PIXELMODE_C_LUT;
1011 +           epinfo.pixformat = PIXEL_FORMAT_8;
1012 +           break;
1013 +       case 16:
1014 +           tmpdata = PIXELMODE_P_16BPP |
1015 +                     PIXELMODE_S_1PPCMAPPED |
1016 +                     PIXELMODE_C_565;
1017 +            epinfo.pixformat = PIXEL_FORMAT_16;
1018 +           break;
1019 +       case 24:
1020 +            tmpdata = PIXELMODE_P_24BPP |
1021 +                     PIXELMODE_S_1PPC |
1022 +                     PIXELMODE_C_888;
1023 +            epinfo.pixformat = PIXEL_FORMAT_24;
1024 +           break;
1025 +        case 32:
1026 +            tmpdata = PIXELMODE_P_32BPP |
1027 +                     PIXELMODE_S_1PPC |
1028 +                     PIXELMODE_C_888;
1029 +            epinfo.pixformat = PIXEL_FORMAT_32;
1030 +           break;
1031 +       default:
1032 +           break;
1033 +    }
1034 +    outl(tmpdata,PIXELMODE);
1035 +}
1036 +
1037 +static void ep93xxfb_timing_signal_generation(void)
1038 +{
1039 +    unsigned long vlinestotal,vsyncstart,vsyncstop,
1040 +                 vactivestart,vactivestop,
1041 +                 vblankstart,vblankstop,
1042 +                 vclkstart,vclkstop;
1043 +
1044 +    unsigned long hclkstotal,hsyncstart,hsyncstop,
1045 +                  hactivestart,hactivestop,
1046 +                 hblankstart,hblankstop,
1047 +                 hclkstart,hclkstop;
1048 +
1049 +    DPRINTK("ep93xxfb_timing_signal_generation - enter\n");
1050 +
1051 +    vlinestotal = epinfo.ytotal - 1;
1052 +    vsyncstart = vlinestotal;
1053 +    vsyncstop = vlinestotal - epinfo.ysync;
1054 +    vblankstart = vlinestotal - epinfo.ysync - epinfo.ybp;
1055 +    vblankstop = epinfo.yfp - 1;
1056 +    vactivestart = vblankstart;
1057 +    vactivestop = vblankstop;
1058 +    vclkstart = vlinestotal;
1059 +    vclkstop = vlinestotal + 1;
1060 +
1061 +    hclkstotal = epinfo.xtotal - 1;
1062 +    hsyncstart = hclkstotal;
1063 +    hsyncstop = hclkstotal - epinfo.xsync;
1064 +    hblankstart = hclkstotal - epinfo.xsync - epinfo.xbp;
1065 +    hblankstop = epinfo.xfp - 1;
1066 +    hactivestart = hblankstart;
1067 +    hactivestop = hblankstop;
1068 +    hclkstart = hclkstotal ;
1069 +    hclkstop = hclkstotal ;
1070 +
1071 +    ep93xxfb_outl(0, VIDEOATTRIBS);
1072 +
1073 +    ep93xxfb_outl( vlinestotal , VLINESTOTAL );
1074 +    ep93xxfb_outl( vsyncstart + (vsyncstop << 16), VSYNCSTRTSTOP );
1075 +    ep93xxfb_outl( vactivestart + (vactivestop << 16), VACTIVESTRTSTOP );
1076 +    ep93xxfb_outl( vblankstart + (vblankstop << 16), VBLANKSTRTSTOP );
1077 +    ep93xxfb_outl( vclkstart + (vclkstop << 16), VCLKSTRTSTOP );
1078 +
1079 +    ep93xxfb_outl( hclkstotal , HCLKSTOTAL );
1080 +    ep93xxfb_outl( hsyncstart + (hsyncstop << 16), HSYNCSTRTSTOP );
1081 +    ep93xxfb_outl( hactivestart + (hactivestop << 16) , HACTIVESTRTSTOP );
1082 +    ep93xxfb_outl( hblankstart + (hblankstop << 16) , HBLANKSTRTSTOP );
1083 +    ep93xxfb_outl( hclkstart + (hclkstop << 16) , HCLKSTRTSTOP );
1084 +
1085 +    ep93xxfb_outl(0, LINECARRY);
1086 +
1087 +}
1088 +
1089 +static int ep93xxfb_setcol(struct fb_info *info, int bpp)
1090 +{
1091 +
1092 +    DPRINTK("ep93xxfb_setcol %dbpp\n",bpp);
1093 +    switch(bpp) {
1094 +       case 8:
1095 +            info->var.bits_per_pixel = 8;
1096 +           info->var.red.length = 8;
1097 +           info->var.green.length = 8;
1098 +           info->var.blue.length = 8;
1099 +           info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
1100 +           break;
1101 +       case 16:
1102 +            info->var.bits_per_pixel = 16;
1103 +           info->var.red.offset = 11;
1104 +           info->var.red.length = 5;
1105 +           info->var.green.offset = 5;
1106 +           info->var.green.length = 6;
1107 +           info->var.blue.offset = 0;
1108 +           info->var.blue.length = 5;
1109 +           info->fix.visual = FB_VISUAL_TRUECOLOR;
1110 +           break;
1111 +       case 24:
1112 +           info->var.bits_per_pixel = 24;
1113 +           info->var.red.length = 8;
1114 +           info->var.blue.length = 8;
1115 +           info->var.green.length = 8;
1116 +           info->var.red.offset = 16;
1117 +           info->var.green.offset = 8;
1118 +           info->var.blue.offset = 0;
1119 +           info->fix.visual = FB_VISUAL_TRUECOLOR;
1120 +           break;
1121 +       case 32:
1122 +            info->var.bits_per_pixel = 32;
1123 +           info->var.red.length = 8;
1124 +           info->var.blue.length = 8;
1125 +           info->var.green.length = 8;
1126 +           info->var.transp.length = 0;
1127 +           info->var.red.offset = 16;
1128 +           info->var.green.offset = 8;
1129 +           info->var.blue.offset = 0;
1130 +           info->var.transp.offset = 0;
1131 +           info->fix.visual = FB_VISUAL_TRUECOLOR;
1132 +           break;
1133 +       default:
1134 +           return 0;
1135 +    }
1136 +    return 1;
1137 +}
1138 +
1139 +static int ep93xxfb_setclk()
1140 +{
1141 +    unsigned long calc_clk,act_clk;
1142 +
1143 +    if ( epinfo.clk_src == CLK_INTERNAL ) {
1144 +       SysconSetLocked(EP93XX_SYSCON_DEVICE_CONFIG,inl(EP93XX_SYSCON_DEVICE_CONFIG) & ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE);
1145 +        calc_clk = epinfo.refresh;
1146 +        act_clk = ep93xx_set_video_div( calc_clk );
1147 +       if ( act_clk == -1 )
1148 +               return -ENODEV;
1149 +
1150 +       epinfo.refresh = act_clk;
1151 +       epinfo.pixclock = 1000000000 / (act_clk / 1000);
1152 +    }
1153 +    else {
1154 +       SysconSetLocked(SYSCON_VIDDIV,0);
1155 +       SysconSetLocked(EP93XX_SYSCON_DEVICE_CONFIG,inl(EP93XX_SYSCON_DEVICE_CONFIG) | EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE);
1156 +
1157 +    }
1158 +
1159 +    return 0;
1160 +}
1161 +
1162 +
1163 +static void ep93xxfb_get_par(struct fb_info *info)
1164 +{
1165 +
1166 +    DPRINTK("ep93xxfb_get_par - enter\n");
1167 +    epinfo.configure = NULL;
1168 +    epinfo.on = NULL;
1169 +    epinfo.off = NULL;
1170 +
1171 +    switch( vout ) {
1172 +       case LCD_OUT:
1173 +            epinfo.on = philips_lb064v02_on;
1174 +           epinfo.off = philips_lb064v02_off;
1175 +
1176 +       case CRT_OUT:
1177 +           epinfo.xres = ep93xxfb_vmods[vmode].hres;
1178 +           epinfo.xsync = ep93xxfb_vmods[vmode].hsync;
1179 +           epinfo.xfp = ep93xxfb_vmods[vmode].hfp;
1180 +           epinfo.xbp = ep93xxfb_vmods[vmode].hbp;
1181 +           epinfo.xtotal = epinfo.xres + epinfo.xsync +
1182 +                           epinfo.xfp + epinfo.xbp;
1183 +
1184 +           epinfo.yres = ep93xxfb_vmods[vmode].vres;
1185 +           epinfo.ysync = ep93xxfb_vmods[vmode].vsync;
1186 +           epinfo.yfp = ep93xxfb_vmods[vmode].vfp;
1187 +           epinfo.ybp = ep93xxfb_vmods[vmode].vbp;
1188 +           epinfo.ytotal = epinfo.yres + epinfo.ysync +
1189 +                       epinfo.yfp + epinfo.ybp;
1190 +
1191 +           epinfo.refresh = ep93xxfb_vmods[vmode].refresh;
1192 +           epinfo.refresh = epinfo.xtotal * epinfo.ytotal * epinfo.refresh;
1193 +           epinfo.pixclock = 1000000000 / ( epinfo.refresh / 1000);
1194 +           epinfo.bpp = depth;
1195 +
1196 +           epinfo.clk_src = ep93xxfb_vmods[vmode].clk_src;
1197 +           epinfo.clk_edge = ep93xxfb_vmods[vmode].clk_edge;
1198 +           epinfo.pol_blank = ep93xxfb_vmods[vmode].pol_blank;
1199 +           epinfo.pol_xsync = ep93xxfb_vmods[vmode].pol_hsync;
1200 +           epinfo.pol_ysync = ep93xxfb_vmods[vmode].pol_vsync;
1201 +           break;
1202 +
1203 +    }
1204 +}
1205 +
1206 +static int ep93xxfb_alloc_videomem(void)
1207 +{
1208 +    unsigned long adr,size,pgsize;
1209 +    int order;
1210 +
1211 +    DPRINTK("ep93xxfb_alloc_videomem - enter \n");
1212 +
1213 +    epinfo.fb_log = NULL;
1214 +    epinfo.fb_size = PAGE_ALIGN( MAX_FBMEM_SIZE/*ep93xxfb_vmods[vmode].hres * ep93xxfb_vmods[vmode].vres * (depth / 8)*/ );
1215 +    order = get_order( epinfo.fb_size );
1216 +    epinfo.fb_log = (void*) __get_free_pages( GFP_KERNEL, order );
1217 +
1218 +    if (epinfo.fb_log) {
1219 +       epinfo.fb_phys = __virt_to_phys((int) epinfo.fb_log );
1220 +        adr = (unsigned long)epinfo.fb_log;
1221 +       size = epinfo.fb_size;
1222 +       pgsize = 1 << order;
1223 +        do {
1224 +            adr += pgsize;
1225 +            SetPageReserved(virt_to_page(adr));
1226 +       } while(size -= pgsize);
1227 +    }
1228 +    else{
1229 +        printk("%s memory fail \n",__FUNCTION__);
1230 +        return -ENOMEM;
1231 +    }
1232 +
1233 +    memset(epinfo.fb_log,0x00,epinfo.fb_size);
1234 +    DPRINTK("   fb_log_addres = 0x%x\n",epinfo.fb_log);
1235 +    DPRINTK("   fb_phys_address = 0x%x\n",epinfo.fb_phys);
1236 +    DPRINTK("   fb_size = %lu\n",epinfo.fb_size);
1237 +    DPRINTK("   fb_page_order = %d\n",order);
1238 +    DPRINTK("ep93xxfb_alloc_videomem - exit \n");
1239 +    return 0;
1240 +}
1241 +
1242 +static void ep93xxfb_release_videomem(void)
1243 +{
1244 +    unsigned long adr,size,psize;
1245 +    int order;
1246 +
1247 +    DPRINTK("ep93xxfb_release_videomem - enter \n");
1248 +
1249 +    if (epinfo.fb_log) {
1250 +       order = get_order(epinfo.fb_size);
1251 +        adr = (unsigned long)epinfo.fb_log;
1252 +        size = epinfo.fb_size;
1253 +       psize = 1 << order ;
1254 +        do {
1255 +            adr += psize;
1256 +            ClearPageReserved(virt_to_page(adr));
1257 +       } while(size -= psize);
1258 +       free_pages((unsigned long)epinfo.fb_log, order );
1259 +    }
1260 +
1261 +
1262 +    DPRINTK("ep93xxfb_release_videomem - exit \n");
1263 +}
1264 +
1265 +static void ep93xxfb_setinfo(struct fb_info *info)
1266 +{
1267 +
1268 +    info->pseudo_palette = pseudo_palette;
1269 +    info->var.xres = epinfo.xres;
1270 +    info->var.yres = epinfo.yres;
1271 +    info->var.xres_virtual = epinfo.xres;
1272 +    info->var.yres_virtual = epinfo.yres;
1273 +
1274 +    ep93xxfb_setcol( info, depth );
1275 +
1276 +    info->var.activate = FB_ACTIVATE_NOW;
1277 +    info->var.left_margin = epinfo.xbp;
1278 +    info->var.right_margin = epinfo.xfp;
1279 +    info->var.upper_margin = epinfo.ybp;
1280 +    info->var.lower_margin = epinfo.yfp;
1281 +    info->var.hsync_len = epinfo.xsync;
1282 +    info->var.vsync_len = epinfo.ysync;
1283 +
1284 +    if( epinfo.pol_xsync == POL_HIGH )
1285 +        info->var.sync |= FB_SYNC_HOR_HIGH_ACT;
1286 +    if( epinfo.pol_ysync == POL_HIGH )
1287 +        info->var.sync |= FB_SYNC_VERT_HIGH_ACT;
1288 +
1289 +    info->var.vmode = FB_VMODE_NONINTERLACED | FB_VMODE_YWRAP;
1290 +    info->fix.smem_start = epinfo.fb_phys;
1291 +    info->fix.smem_len = epinfo.fb_size;
1292 +    info->fix.type = FB_TYPE_PACKED_PIXELS;
1293 +    info->fix.line_length = epinfo.xres * (epinfo.bpp / 8);
1294 +    info->screen_base = epinfo.fb_log;
1295 +    info->var.pixclock = epinfo.pixclock;
1296 +    info->fix.ypanstep = 1;
1297 +    info->fix.ywrapstep = 1;
1298 +
1299 +}
1300 +
1301 +static int ep93xxfb_config(struct fb_info *info)
1302 +{
1303 +    unsigned long attribs;
1304 +
1305 +    DPRINTK("ep93xxfb_config - enter\n");
1306 +
1307 +    ep93xxfb_get_par( info );
1308 +    if( ep93xxfb_alloc_videomem() != 0 ) {
1309 +        printk("Unable to allocate video memory\n");
1310 +        return -ENOMEM;
1311 +    }
1312 +
1313 +    if( ep93xxfb_setclk() != 0 ) {
1314 +       printk("Unable to set pixel clock\n");
1315 +        ep93xxfb_release_videomem();
1316 +       return -ENODEV;
1317 +    }
1318 +
1319 +    SysconSetLocked(EP93XX_SYSCON_DEVICE_CONFIG, inl(EP93XX_SYSCON_DEVICE_CONFIG)  |EP93XX_SYSCON_DEVCFG_RasOnP3);
1320 +    ep93xxfb_timing_signal_generation();
1321 +
1322 +    /* set video memory parameters */
1323 +    outl(epinfo.fb_phys, VIDSCRNPAGE);
1324 +    outl(epinfo.yres , SCRNLINES);
1325 +    outl(((epinfo.xres * epinfo.bpp) / 32) - 1, LINELENGTH);
1326 +    outl((epinfo.xres * epinfo.bpp) / 32, VLINESTEP);
1327 +
1328 +
1329 +    /* set pixel mode */
1330 +    ep93xxfb_pixelmod(depth);
1331 +
1332 +    attribs = 0;
1333 +
1334 +#ifdef CONFIG_EP93XX_SDCS0
1335 +    attribs |= 0 << VIDEOATTRIBS_SDSEL_SHIFT;
1336 +#endif
1337 +#ifdef CONFIG_EP93XX_SDCS1
1338 +    attribs |= 1 << VIDEOATTRIBS_SDSEL_SHIFT;
1339 +#endif
1340 +#ifdef CONFIG_EP93XX_SDCS2
1341 +    attribs |= 2 << VIDEOATTRIBS_SDSEL_SHIFT;
1342 +#endif
1343 +#ifdef CONFIG_EP93XX_SDCS3
1344 +    attribs |= 3 << VIDEOATTRIBS_SDSEL_SHIFT;
1345 +#endif
1346 +
1347 +    if(epinfo.clk_edge == EDGE_RISING)
1348 +       attribs |= VIDEOATTRIBS_INVCLK;
1349 +    if(epinfo.pol_blank == POL_HIGH)
1350 +       attribs |= VIDEOATTRIBS_BLKPOL;
1351 +    if(epinfo.pol_xsync == POL_HIGH)
1352 +       attribs |= VIDEOATTRIBS_HSPOL;
1353 +    if(epinfo.pol_ysync == POL_HIGH)
1354 +       attribs |= VIDEOATTRIBS_VCPOL;
1355 +
1356 +    ep93xxfb_outl(attribs, VIDEOATTRIBS);
1357 +    ep93xxfb_setinfo( info );
1358 +
1359 +    if(epinfo.configure)
1360 +       (epinfo.configure)( epinfo.automods );
1361 +
1362 +    ep93xxfb_blank( 0 , info );
1363 +
1364 +    DPRINTK("ep93xxfb_config - exit\n");
1365 +    return 0;
1366 +}
1367 +
1368 +int ep93xxfb_ioctl(struct fb_info *info,unsigned int cmd, unsigned long arg)
1369 +{
1370 +    struct fb_fillrect fill;
1371 +    struct fb_copyarea cparea;
1372 +    struct fb_image img;
1373 +    struct ep93xx_line line;
1374 +    struct ep93xx_cursor cursor;
1375 +
1376 +    switch (cmd) {
1377 +        case FBIO_EP93XX_CURSOR:
1378 +            copy_from_user(&cursor, (void *)arg, sizeof(struct ep93xx_cursor));
1379 +           ep93xxfb_cursor(info,&cursor);
1380 +           break;
1381 +       case FBIO_EP93XX_LINE:
1382 +            copy_from_user(&line, (void *)arg, sizeof(struct ep93xx_line));
1383 +           ep93xxfb_line(info,&line);
1384 +           break;
1385 +       case FBIO_EP93XX_FILL:
1386 +           copy_from_user(&fill, (void *)arg, sizeof(struct fb_fillrect));
1387 +           ep93xxfb_fillrect(info,&fill);
1388 +           break;
1389 +       case FBIO_EP93XX_BLIT:
1390 +            copy_from_user(&img, (void *)arg, sizeof(struct fb_image));
1391 +           ep93xxfb_imageblit(info, &img);
1392 +           break;
1393 +        case FBIO_EP93XX_COPY:
1394 +           copy_from_user(&cparea, (void *)arg, sizeof(struct fb_copyarea));
1395 +           ep93xxfb_copyarea(info,&cparea);
1396 +           break;
1397 +        default:
1398 +           return -EFAULT;
1399 +    }
1400 +    return 0;
1401 +}
1402 +
1403 +
1404 +static struct fb_ops ep93xxfb_ops = {
1405 +    .owner          = THIS_MODULE,
1406 +    .fb_setcolreg   = ep93xxfb_setcolreg,
1407 +    .fb_check_var   = ep93xxfb_check_var,
1408 +    .fb_set_par     = ep93xxfb_set_par,
1409 +    .fb_blank       = ep93xxfb_blank,
1410 +    .fb_pan_display = ep93xx_pan_display,
1411 +    .fb_fillrect    = ep93xxfb_fillrect,
1412 +    .fb_copyarea    = ep93xxfb_copyarea,
1413 +    .fb_imageblit   = cfb_imageblit,
1414 +    .fb_cursor      = ep93xxfb_cursor,
1415 +    .fb_ioctl       = ep93xxfb_ioctl,
1416 +    .fb_mmap        = ep93xxfb_mmap,
1417 +};
1418 +
1419 +
1420 +static struct resource ep93xxfb_raster_resources = {
1421 +    .start          = EP93XX_RASTER_PHYS_BASE,
1422 +    .end            = EP93XX_RASTER_PHYS_BASE + 0x1ffff,
1423 +    .flags          = IORESOURCE_MEM,
1424 +};
1425 +
1426 +
1427 +static int __init ep93xxfb_probe(struct platform_device *device)
1428 +{
1429 +    struct fb_info *info = NULL;
1430 +    struct resource *res = NULL;
1431 +    int ret = 0;
1432 +    int arb = 0;
1433 +
1434 +    DPRINTK("ep93xxfb_probe - enter \n");
1435 +
1436 +
1437 +    if(!device) {
1438 +       printk("error : to_platform_device\n");
1439 +        return -ENODEV;
1440 +    }
1441 +    res = platform_get_resource( device, IORESOURCE_MEM, 0);
1442 +    if(!res) {
1443 +        printk("error : platform_get_resource \n");
1444 +        return -ENODEV;
1445 +    }
1446 +    cursor_data = kmalloc( 64 * 64 * 2, GFP_KERNEL );
1447 +    memset( cursor_data, 0x00, 64 * 64 * 2 );
1448 +    if(!cursor_data) {
1449 +        printk("Unable to allocate memory for hw_cursor\n");
1450 +       return -ENOMEM;
1451 +    }
1452 +    if (!request_mem_region(res->start,res->end - res->start + 1, FBDEV_NAME ))
1453 +       return -EBUSY;
1454 +
1455 +    info = framebuffer_alloc(sizeof(u32) * 256, &device->dev);
1456 +
1457 +    if(!info) {
1458 +       printk("Unable to allocate memory for frame buffer\n");
1459 +       return -ENOMEM;
1460 +    }
1461 +
1462 +    info->flags = FBINFO_DEFAULT;
1463 +    strncpy(info->fix.id, FBDEV_NAME, sizeof(info->fix.id));
1464 +    info->fix.mmio_start = res->start;
1465 +    info->fix.mmio_len = res->end - res->start + 1;
1466 +    info->fbops = &ep93xxfb_ops;
1467 +    info->pseudo_palette = info->par;
1468 +    info->state = FBINFO_STATE_RUNNING;
1469 +
1470 +    if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
1471 +       ret = -ENOMEM;
1472 +       goto fbuff;
1473 +    }
1474 +
1475 +    if ((ret = ep93xxfb_config(info)) < 0)
1476 +       goto clmap;
1477 +
1478 +    if (register_framebuffer(info) < 0) {
1479 +       printk(KERN_ERR "Unable to register ep93xxfb frame buffer\n");
1480 +       ret = -EINVAL;
1481 +       goto clmap;
1482 +    }
1483 +    platform_set_drvdata(device, info);
1484 +    printk(KERN_INFO "fb%d: EP93xx frame buffer at %dx%dx%dbpp\n", info->node,
1485 +               info->var.xres, info->var.yres, info->var.bits_per_pixel);
1486 +
1487 +    /*change the raster arb to the highest one--Bo*/
1488 +    arb = inl(EP93XX_SYSCON_BMAR);
1489 +    arb = (arb & 0x3f8) | 0x01;
1490 +    outl(arb,EP93XX_SYSCON_BMAR);
1491 +
1492 +    DPRINTK("ep93xxfb_probe - exit \n");
1493 +    return 0;
1494 +
1495 +clmap:
1496 +    fb_dealloc_cmap(&info->cmap);
1497 +
1498 +fbuff:
1499 +    framebuffer_release(info);
1500 +    return ret;
1501 +}
1502 +
1503 +static int ep93xxfb_remove(struct platform_device *device)
1504 +{
1505 +    struct resource *res;
1506 +    struct fb_info *info;
1507 +    struct ep93xx_cursor cursor;
1508 +
1509 +    DPRINTK("ep93xxfb_remove - enter \n");
1510 +
1511 +    info = platform_get_drvdata(device);
1512 +
1513 +    ep93xxfb_release_videomem();
1514 +
1515 +    res = platform_get_resource( device, IORESOURCE_MEM, 0);
1516 +    release_mem_region(res->start, res->end - res->start + 1);
1517 +
1518 +    platform_set_drvdata(device, NULL);
1519 +    unregister_framebuffer(info);
1520 +
1521 +    fb_dealloc_cmap(&info->cmap);
1522 +    framebuffer_release(info);
1523 +
1524 +    cursor.flags = CURSOR_OFF;
1525 +    ep93xxfb_cursor(info,&cursor);
1526 +    if(cursor_data!=NULL)
1527 +       kfree(cursor_data);
1528 +
1529 +    ep93xxfb_blank( 1, info );
1530 +
1531 +    DPRINTK("ep93xxfb_remove - exit \n");
1532 +    return 0;
1533 +}
1534 +
1535 +static void ep93xxfb_platform_release(struct device *device)
1536 +{
1537 +    DPRINTK("ep93xxfb_platform_release - enter\n");
1538 +}
1539 +
1540 +static int ep93xxfb_check_param(void)
1541 +{
1542 +
1543 +    switch(vout) {
1544 +       case CRT_OUT:
1545 +           if( vmode >=(sizeof(ep93xxfb_vmods)/sizeof(ep93xxfb_vmods[0]))){
1546 +               vmode = 1;
1547 +               depth = DEFAULT_BPP;
1548 +               return 0;
1549 +           }
1550 +           break;
1551 +        case LCD_OUT:
1552 +           if( vmode != 0 || depth != 16 ) {
1553 +               vmode = 0;
1554 +               depth = DEFAULT_BPP;
1555 +               return 0;
1556 +           }
1557 +           break;
1558 +       default:
1559 +           vmode = DEFAULT_MODE;
1560 +           depth = DEFAULT_BPP;
1561 +           vout = DEFAULT_OUT;
1562 +           return 0;
1563 +           break;
1564 +    }
1565 +
1566 +    if(!((depth == 8) || (depth == 16) || (depth == 24) || (depth == 32)))
1567 +       depth = DEFAULT_BPP;
1568 +
1569 +    return 1;
1570 +}
1571 +
1572 +int __init ep93xxfb_setup(char *options)
1573 +{
1574 +    char *opt;
1575 +
1576 +    DPRINTK("ep93xxfb_setup - %s\n",options);
1577 +
1578 +    if (!options || !*options)
1579 +       return 0;
1580 +
1581 +    while ((opt = strsep(&options, ",")) != NULL) {
1582 +       if (!strncmp(opt, "vout=", 5))
1583 +           vout = simple_strtoul(opt + 5, NULL, 0);
1584 +       else if (!strncmp(opt, "vmode=", 6))
1585 +           vmode = simple_strtoul(opt + 6, NULL, 0);
1586 +       else if (!strncmp(opt, "depth=", 6))
1587 +           depth = simple_strtoul(opt + 6, NULL, 0);
1588 +    }
1589 +    ep93xxfb_check_param();
1590 +    return 0;
1591 +}
1592 +
1593 +
1594 +static struct platform_driver ep93xxfb_driver = {
1595 +    .probe  = ep93xxfb_probe,
1596 +    .remove = ep93xxfb_remove,
1597 +    .driver = {
1598 +                .name   = FBDEV_NAME,
1599 +             },
1600 +};
1601 +
1602 +static struct platform_device ep93xxfb_device = {
1603 +    .name      = FBDEV_NAME,
1604 +    .id        = -1,
1605 +    .dev    = {
1606 +               .release = ep93xxfb_platform_release,
1607 +             },
1608 +    .num_resources  = 1,
1609 +    .resource       = &ep93xxfb_raster_resources,
1610 +};
1611 +
1612 +int __init ep93xxfb_init(void)
1613 +{
1614 +    int ret = 0;
1615 +    char *option = NULL;
1616 +
1617 +    DPRINTK("ep93xxfb_init - enter\n");
1618 +
1619 +    if (fb_get_options("ep93xxfb", &option))
1620 +            return -ENODEV;
1621 +    ep93xxfb_setup(option);
1622 +
1623 +
1624 +    if( !ep93xxfb_check_param() ) {
1625 +       printk("Unsupported format \n");
1626 +       return -1;
1627 +    }
1628 +    /*Add the Hardware accel irq */
1629 +    outl(0x00000000, BLOCKCTRL);
1630 +    ret = request_irq(IRQ_EP93XX_GRAPHICS, ep93xxfb_irq_handler, IRQF_DISABLED,"graphics",NULL);
1631 +
1632 +    if (ret != 0) {
1633 +       printk("%s: can't get irq %i, err %d\n",__FUNCTION__, IRQ_EP93XX_GRAPHICS, ret);
1634 +                return -EBUSY;
1635 +    }
1636 +
1637 +    /*-------------------------------*/
1638 +    ret = platform_driver_register(&ep93xxfb_driver);
1639 +
1640 +    if (!ret) {
1641 +       ret = platform_device_register(&ep93xxfb_device);
1642 +       if (ret)
1643 +           platform_driver_unregister(&ep93xxfb_driver);
1644 +    }
1645 +
1646 +    DPRINTK("ep93xxfb_init - exit\n");
1647 +    return ret;
1648 +}
1649 +
1650 +
1651 +
1652 +static void __exit ep93xxfb_exit(void)
1653 +{
1654 +    DPRINTK("ep93xxfb_exit - enter\n");
1655 +    platform_driver_unregister(&ep93xxfb_driver);
1656 +    platform_device_unregister(&ep93xxfb_device);
1657 +    DPRINTK("ep93xxfb_exit - exit\n");
1658 +}
1659 +
1660 +module_init(ep93xxfb_init);
1661 +module_exit(ep93xxfb_exit);
1662 +
1663 +
1664 +module_param( vmode, int,  S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
1665 +MODULE_PARM_DESC(vmode, "Specify the video mode number that should be used");
1666 +module_param( vout , int ,  S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP );
1667 +MODULE_PARM_DESC(vout ,"Specify video output (0 = CRT ,1 = LCD )");
1668 +module_param( depth , int,  S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP);
1669 +MODULE_PARM_DESC(depth ,"Color depth (8,16,24,32)");
1670 +MODULE_LICENSE("GPL");
1671 --- /dev/null
1672 +++ b/drivers/video/ep93xxfb.h
1673 @@ -0,0 +1,236 @@
1674 +#ifndef __EP93XXFB_H__
1675 +#define __EP93XXFB_H__
1676 +
1677 +
1678 +#define POL_HIGH               1
1679 +#define POL_LOW                        0
1680 +#define EDGE_RISING            1
1681 +#define EDGE_FALLING           0
1682 +#define CLK_INTERNAL           1
1683 +#define CLK_EXTERNAL           0
1684 +
1685 +#define CRT_OUT                0
1686 +#define LCD_OUT                1
1687 +#define TV_OUT                 2
1688 +
1689 +#define MAX_XRES                1280
1690 +#define MAX_YRES                1024
1691 +#define MAX_BPP                 16
1692 +#define MAX_FBMEM_SIZE          3686400/*1920000*/
1693 +
1694 +#define MAX_XRES_CRT            MAX_XRES
1695 +#define MAX_YRES_CRT            MAX_YRES
1696 +#define MAX_XRES_SVIDEO         1024
1697 +#define MAX_YRES_SVIDEO         768
1698 +
1699 +#define PIXEL_FORMAT_SHIFT      17
1700 +#define PIXEL_FORMAT_4          ( 1 << PIXEL_FORMAT_SHIFT )
1701 +#define PIXEL_FORMAT_8          ( 2 << PIXEL_FORMAT_SHIFT )
1702 +#define PIXEL_FORMAT_16         ( 4 << PIXEL_FORMAT_SHIFT )
1703 +#define PIXEL_FORMAT_24         ( 6 << PIXEL_FORMAT_SHIFT )
1704 +#define PIXEL_FORMAT_32         ( 7 << PIXEL_FORMAT_SHIFT )
1705 +
1706 +
1707 +struct ep93xxfb_videomodes
1708 +{
1709 +    const char *name;
1710 +
1711 +    unsigned long hres;        // Horizontal Valid
1712 +    unsigned long hfp;         // Horizontal Front Porch
1713 +    unsigned long hsync;       // Horizontal Sync Width
1714 +    unsigned long hbp;         // Horizontal Back Porch
1715 +
1716 +    unsigned long vres;                // Vertical Valid
1717 +    unsigned long vfp;         // Vertical Front Porch
1718 +    unsigned long vsync;       // Vertical Sync Width
1719 +    unsigned long vbp;         // Vertical Back Porch
1720 +
1721 +    unsigned long refresh;     // Vertical Sync Frequency
1722 +
1723 +    unsigned long clk_src;
1724 +    unsigned long clk_edge;
1725 +    unsigned long pol_blank;
1726 +    unsigned long pol_hsync;
1727 +    unsigned long pol_vsync;
1728 +};
1729 +
1730 +
1731 +struct ep93xxfb_info
1732 +{
1733 +
1734 +
1735 +    dma_addr_t                  fb_phys;
1736 +    void                      *fb_log;
1737 +    unsigned long               fb_size;
1738 +    unsigned long              fb_actsize;
1739 +
1740 +    unsigned long               xtotal;
1741 +    unsigned long               ytotal;
1742 +
1743 +    unsigned int                xres;
1744 +    unsigned int               xfp;
1745 +    unsigned int               xsync;
1746 +    unsigned int               xbp;
1747 +
1748 +    unsigned int                yres;
1749 +    unsigned int               yfp;
1750 +    unsigned int               ysync;
1751 +    unsigned int               ybp;
1752 +    unsigned int                bpp;
1753 +
1754 +    unsigned long              refresh;
1755 +    unsigned long              pixclock;
1756 +    unsigned long               pixformat;
1757 +
1758 +    unsigned int clk_src;
1759 +    unsigned int clk_edge;
1760 +    unsigned int pol_blank;
1761 +    unsigned int pol_xsync;
1762 +    unsigned int pol_ysync;
1763 +
1764 +    unsigned char automods;
1765 +
1766 +    void (*configure)(unsigned char value);
1767 +    void (*on)(unsigned char value);
1768 +    void (*off)(unsigned char value);
1769 +};
1770 +
1771 +static int  ep93xxfb_setclk(void);
1772 +static int  ep93xx_get_max_video_clk(void);
1773 +static void ep93xxfb_pixelmod(int bpp);
1774 +static void ep93xxfb_timing_signal_generation(void);
1775 +static int  ep93xxfb_blank(int blank_mode,struct fb_info *info);
1776 +
1777 +#define EE_DELAY_USEC                   2
1778 +#define EE_READ_TIMEOUT                 100
1779 +#define CX25871_DEV_ADDRESS             0x88
1780 +#define GPIOG_EEDAT                    2
1781 +#define GPIOG_EECLK                    1
1782 +#define CXMODES_COUNT                  24
1783 +
1784 +struct cx25871_vmodes
1785 +{
1786 +
1787 +    const char          *name;
1788 +    unsigned char       automode;
1789 +    unsigned int        hres;
1790 +    unsigned int        vres;
1791 +    unsigned int        hclktotal;
1792 +    unsigned int        vclktotal;
1793 +    unsigned int        hblank;
1794 +    unsigned int        vblank;
1795 +    unsigned long       clkfrequency;
1796 +
1797 +};
1798 +
1799 +
1800 +int write_reg(unsigned char ucRegAddr, unsigned char ucRegValue);
1801 +void cx25871_on(unsigned char value);
1802 +void cx25871_off(unsigned char value);
1803 +void cx25871_config(unsigned char value);
1804 +
1805 +static void philips_lb064v02_on(unsigned char value);
1806 +static void philips_lb064v02_off(unsigned char value);
1807 +
1808 +
1809 +#define FBIO_EP93XX_CURSOR      0x000046c1
1810 +#define FBIO_EP93XX_LINE        0x000046c2
1811 +#define FBIO_EP93XX_FILL        0x000046c3
1812 +#define FBIO_EP93XX_BLIT        0x000046c4
1813 +#define FBIO_EP93XX_COPY        0x000046c5
1814 +
1815 +
1816 +#define CURSOR_BLINK            0x00000001
1817 +#define CURSOR_MOVE             0x00000002
1818 +#define CURSOR_SETSHAPE         0x00000004
1819 +#define CURSOR_SETCOLOR         0x00000008
1820 +#define CURSOR_ON               0x00000010
1821 +#define CURSOR_OFF              0x00000020
1822 +
1823 +
1824 +/*
1825 +* ioctl(fd, FBIO_EP93XX_CURSOR, ep93xx_cursor *)
1826 +*
1827 +* "data" points to an array of pixels that define the cursor; each row should
1828 +* be a multiple of 32-bit values (i.e. 16 pixels).  Each pixel is two bits,
1829 +* where the values are:
1830 +*
1831 +*     00 => transparent    01 => invert    10 => color1    11 => color2
1832 +*
1833 +* The data is arranged as follows (per word):
1834 +*
1835 +*    bits: |31-30|29-28|27-26|25-24|23-22|21-20|19-18|17-16|
1836 +*   pixel: | 12  | 13  | 14  | 15  |  8  |  9  | 10  | 11  |
1837 +*    bits: |15-14|13-12|11-10| 9-8 | 7-6 | 5-4 | 3-2 | 1-0 |
1838 +*   pixel: |  4  |  5  |  6  |  7  |  0  |  1  |  2  |  3  |
1839 +*
1840 +* Regardless of the frame buffer color depth, "color1", "color2",
1841 +* "blinkcolor1", and "blinkcolor2" are 24-bit colors since the cursor is
1842 +* injected into the data stream right before the video DAC.
1843 +*
1844 +* When "blinkrate" is not zero, pixel value 10 will alternate between "color1"
1845 +* and "blinkcolor1" (similar for pixel value 11 and "color2"/"blinkcolor2").
1846 +*
1847 +* "blinkrate" ranges between 0 and 255.  When 0, blinking is disabled.  255 is
1848 +* the fastest blink rate and 1 is the slowest.
1849 +*
1850 +* Both "width" and "height" must be between 1 and 64; it is preferable to have
1851 +* "width" a multiple of 16.
1852 +*/
1853 +struct ep93xx_cursor {
1854 +    unsigned long flags;
1855 +    unsigned long dx;           // Only used if CURSOR_MOVE is set
1856 +    unsigned long dy;           // Only used if CURSOR_MOVE is set
1857 +    unsigned long width;        // Only used if CURSOR_SETSHAPE is set
1858 +    unsigned long height;       // Only used if CURSOR_SETSHAPE is set
1859 +    const char *data;   // Only used if CURSOR_SETSHAPE is set
1860 +    unsigned long blinkrate;    // Only used if CURSOR_BLINK is set
1861 +    unsigned long color1;       // Only used if CURSOR_SETCOLOR is set
1862 +    unsigned long color2;       // Only used if CURSOR_SETCOLOR is set
1863 +    unsigned long blinkcolor1;  // Only used if CURSOR_SETCOLOR is set
1864 +    unsigned long blinkcolor2;  // Only used if CURSOR_SETCOLOR is set
1865 +};
1866 +
1867 +
1868 +/*
1869 + * The bits in the flags field of ep93xx_line.
1870 +*/
1871 +/*
1872 +* ioctl(fd, FBIO_EP93XX_LINE, ep93xx_line *)
1873 +*
1874 +* The line starts at ("x1","y1") and ends at ("x2","y2").  This means that
1875 +* when using a pattern, the two coordinates are not transitive (i.e. swapping
1876 +* ("x1","y1") with ("x2","y2") will not necessarily draw the exact same line,
1877 +* pattern-wise).
1878 +*
1879 +* "pattern" is a 2 to 16 bit pattern (since a 1 bit pattern isn't much of a
1880 +* pattern).  The lower 16 bits define the pattern (1 being foreground, 0 being
1881 +* background or transparent), and bits 19-16 define the length of the pattern
1882 +* (as pattern length - 1).  So, for example, "0xf00ff" defines a 16 bit
1883 +* with the first 8 pixels in the foreground color and the next 8 pixels in the
1884 +* background color or transparent.
1885 +*
1886 +* LINE_PRECISE is used to apply angularly corrected patterns to line.  It
1887 +* should only be used when LINE_PATTERN is also set.  The pattern will be
1888 +* applied along the length of the line, instead of along the length of the
1889 +* major axis.  This may result in the loss of fine details in the pattern, and
1890 +* will take more time to draw the line in most cases.
1891 +*/
1892 +
1893 +#define LINE_PATTERN            0x00000001
1894 +#define LINE_PRECISE            0x00000002
1895 +#define LINE_BACKGROUND         0x00000004
1896 +
1897 +struct ep93xx_line {
1898 +    unsigned long flags;
1899 +    unsigned long x1;
1900 +    unsigned long y1;
1901 +    unsigned long x2;
1902 +    unsigned long y2;
1903 +    unsigned long fgcolor;
1904 +    unsigned long bgcolor;      // Only used if LINE_BACKGROUND is set
1905 +    unsigned long pattern;      // Only used if LINE_PATTERN is set
1906 +};
1907 +
1908 +#endif /* __EP93XXFB_H__ */
1909 +
1910 --- /dev/null
1911 +++ b/drivers/video/ep93xxfb_mono.c
1912 @@ -0,0 +1,1281 @@
1913 +/*
1914 + *  drivers/video/ep93xxfb_mono.c -- grayscale on mono LCD driver for
1915 + *  Cirrus Logic EP93xx.
1916 + *
1917 + *  Copyright (C) 2007 Cirrus Logic
1918 + *
1919 + *  This file is subject to the terms and conditions of the GNU General Public
1920 + *  License. See the file COPYING in the main directory of this archive for
1921 + *  more details.
1922 + *
1923 + *  This driver works for the following two LCD:
1924 + *  SHARP LM121VB1T01   -   A dual scan 640x480 monochrome LCD.
1925 + *  HOSIDEN HLM6323     -   A single scan 320x240 monochrome LCD.
1926 + *
1927 + *  And support two gray modes:
1928 + *  8 levels of gray    -   Actually is 7 levels of gray. Two of the levels
1929 + *                          have the same gray.
1930 + *  16 levels of gray   -   Extending the gray levels by switching the LUT
1931 + *                          for each frame.
1932 + *
1933 + *  HW connection for SHARP LM121VB1T01:
1934 + *      P12 <------> LCD_U0
1935 + *      P8  <------> LCD_U1
1936 + *      P4  <------> LCD_U2
1937 + *      P0  <------> LCD_U3
1938 + *      P14 <------> LCD_L0
1939 + *      P10 <------> LCD_L1
1940 + *      P6  <------> LCD_L2
1941 + *      P2  <------> LCD_L3
1942 + *  HW connection for HOSIDEN HLM6323:
1943 + *      P12 <------> LCD_0
1944 + *      P8  <------> LCD_1
1945 + *      P4  <------> LCD_2
1946 + *      P0  <------> LCD_3
1947 + *
1948 + */
1949 +
1950 +#include <linux/version.h>
1951 +#include <linux/module.h>
1952 +#include <linux/kernel.h>
1953 +#include <linux/reboot.h>
1954 +#include <linux/errno.h>
1955 +#include <linux/string.h>
1956 +#include <linux/mm.h>
1957 +#include <linux/delay.h>
1958 +#include <linux/fb.h>
1959 +#include <linux/init.h>
1960 +#include <linux/ioport.h>
1961 +#include <linux/interrupt.h>
1962 +#include <linux/dma-mapping.h>
1963 +#include <asm/io.h>
1964 +#include <asm/uaccess.h>
1965 +#include <mach/hardware.h>
1966 +
1967 +
1968 +#include <linux/platform_device.h>
1969 +
1970 +#define CONFIG_EP93XX_SDCS0
1971 +
1972 +#undef DEBUG
1973 +#ifdef DEBUG
1974 +#define DPRINTK( fmt, arg... )  printk( fmt, ##arg )
1975 +#else
1976 +#define DPRINTK( fmt, arg... )
1977 +#endif
1978 +
1979 +#define FBDEV_NAME "ep93xxfb"
1980 +
1981 +#define ep93xxfb_lock_outl(value, reg)              \
1982 +{                                              \
1983 +    outl(RASTER_SWLOCK_VALUE, RASTER_SWLOCK);  \
1984 +    outl(value, reg);                          \
1985 +    DPRINTK(#reg"=0x%08x\n", (unsigned int)(value));         \
1986 +}
1987 +
1988 +#define ep93xxfb_outl(value, reg)              \
1989 +{                                              \
1990 +    outl(value, reg);                          \
1991 +    DPRINTK(#reg"=0x%08x\n", (unsigned int)(value));         \
1992 +}
1993 +
1994 +static unsigned int pseudo_palette[256];
1995 +
1996 +struct ep93xxfb_mono_videomodes
1997 +{
1998 +    const char *name;
1999 +
2000 +    unsigned long hres;        // Horizontal Valid
2001 +    unsigned long vres;                // Vertical Valid
2002 +    unsigned int  freq;
2003 +    unsigned int  dualscan;
2004 +    unsigned int  bpp;
2005 +    unsigned int  graylevel;
2006 +
2007 +    void (*configure)(unsigned char value);
2008 +    void (*on)(unsigned char value);
2009 +    void (*off)(unsigned char value);
2010 +};
2011 +
2012 +struct ep93xxfb_mono_info
2013 +{
2014 +    dma_addr_t          fb_phys;
2015 +    void                   *fb_log;
2016 +    unsigned long       fb_size;
2017 +    unsigned long              fb_actsize;
2018 +
2019 +    unsigned int        xres;
2020 +    unsigned int        yres;
2021 +
2022 +    unsigned int        freq;
2023 +    unsigned int        dualscan;
2024 +    unsigned int        bpp;
2025 +    unsigned int        graylevel;
2026 +
2027 +    void (*configure)(unsigned char value);
2028 +    void (*on)(unsigned char value);
2029 +    void (*off)(unsigned char value);
2030 +};
2031 +
2032 +
2033 +void LM121VB1T01_configure(unsigned char value);
2034 +void HOSIDEN_HLM6323_configure(unsigned char value);
2035 +
2036 +static int vmode = 1;
2037 +
2038 +static struct ep93xxfb_mono_info epinfo;
2039 +static struct ep93xxfb_mono_videomodes ep93xxfb_vmods[] =
2040 +{
2041 +    {
2042 +        "SHARP-LM121VB1T01-8GRAY",
2043 +        640, 480, 100,
2044 +        1,  //dual scan
2045 +        4,  //4bpp
2046 +        8,  //8-level grayscale
2047 +        LM121VB1T01_configure,
2048 +        NULL,
2049 +        NULL,
2050 +    },
2051 +    {
2052 +        "SHARP-LM121VB1T01-16GRAY",
2053 +        640, 480, 120,
2054 +        1,  //dual scan
2055 +        4,  //4bpp
2056 +        16, //16-level grayscale
2057 +        LM121VB1T01_configure,
2058 +        NULL,
2059 +        NULL,
2060 +    },
2061 +    {
2062 +        "HOSIDEN HLM6323",
2063 +        320, 240, 115,
2064 +        0,  //single scan
2065 +        4,  //4bpp
2066 +        8,  //8-level grayscale
2067 +        HOSIDEN_HLM6323_configure,
2068 +        NULL,
2069 +        NULL,
2070 +    },
2071 +    {
2072 +        "HOSIDEN HLM6323",
2073 +        320, 240, 115,
2074 +        0,  //single scan
2075 +        4,  //4bpp
2076 +        16, //16-level grayscale
2077 +        HOSIDEN_HLM6323_configure,
2078 +        NULL,
2079 +        NULL,
2080 +    },
2081 +};
2082 +
2083 +
2084 +#define EP93XX_GS_OFFSET(lut, frame, pixel) ( (lut) + ( (pixel) << 2) + ((frame) << 5 ))
2085 +
2086 +static unsigned long DY_LUT[2][16];
2087 +
2088 +static unsigned long GSLUT[32] =
2089 +{
2090 +    0x00070000, 0x00070000, 0x00070000, 0x00070000,     /*0%*/
2091 +    0x00078241, 0x00074182, 0x00071428, 0x00072814,     /*25%*/
2092 +    0x00000412, 0x00000241, 0x00000124, 0x00000000,     /*33%*/
2093 +    0x0007aa55, 0x000755aa, 0x000755aa, 0x0007aa55,     /*50%*/
2094 +    0x00000bed, 0x00000dbe, 0x00000edb, 0x00000000,     /*66%*/
2095 +    0x00077dbe, 0x0007be7d, 0x0007ebd7, 0x0007d7eb,     /*75%*/
2096 +    0x0007ffff, 0x0007ffff, 0x0007ffff, 0x0007ffff,     /*100%*/
2097 +    0x0007ffff, 0x0007ffff, 0x0007ffff, 0x0007ffff,
2098 +};
2099 +
2100 +static void ep93xxfb_8gray_palette_init(void)
2101 +{
2102 +    unsigned int cont, i, n;
2103 +    unsigned int frame, pixval, gslut;
2104 +    cont = inl(LUTCONT);
2105 +    for (i=0; i< 16; i++)
2106 +    {
2107 +        n = (i & 0xe) << 4;
2108 +        outl( n, (COLOR_LUT+(i<<2)) );
2109 +    }
2110 +    for (pixval=0; pixval < 8; pixval++)
2111 +    {
2112 +        for (frame=0; frame < 4; frame++)
2113 +        {
2114 +            gslut = GSLUT[pixval*4 + frame];
2115 +            outl(gslut,EP93XX_GS_OFFSET(GS_LUT,  frame, pixval));
2116 +        }
2117 +    }
2118 +    outl( cont ^ LUTCONT_RAM1, LUTCONT );
2119 +}
2120 +
2121 +static void ep93xxfb_16gray_palette_switch(int index)
2122 +{
2123 +    unsigned int cont, i, n;
2124 +    cont = inl(LUTCONT);
2125 +    n = index & 0x1;
2126 +    for (i=0; i< 16; i++)
2127 +    {
2128 +        outl( DY_LUT[n][i], (COLOR_LUT+(i<<2)) );
2129 +    }
2130 +    outl( cont ^ LUTCONT_RAM1, LUTCONT );
2131 +}
2132 +
2133 +static void ep93xxfb_16gray_palette_init(void)
2134 +{
2135 +    int i;
2136 +    unsigned int cont;
2137 +    unsigned int frame, pixval, gslut;
2138 +    int split_table[16][2] =
2139 +    {
2140 +        {0,  0 },
2141 +        {0,  2 },
2142 +        {1,  1 },
2143 +        {3,  0 },
2144 +
2145 +        {2,  2 },
2146 +        {4,  0 },
2147 +        {3,  2 },
2148 +        {4,  2 },
2149 +
2150 +        {3,  3 },       //  {6,  0 },
2151 +        {3,  4 },
2152 +        {4,  4 },
2153 +        {6,  2 },
2154 +
2155 +        {5,  5 },
2156 +        {3,  6 },
2157 +        {4,  6 },
2158 +        {6,  6 },
2159 +    };
2160 +
2161 +    cont = inl(LUTCONT);
2162 +    for (i=0; i< 16; i++)
2163 +    {
2164 +        DY_LUT[0][i]=split_table[i][0] << 5;
2165 +        DY_LUT[1][i]=split_table[i][1] << 5;
2166 +
2167 +        outl( DY_LUT[0][i], (COLOR_LUT+(i<<2)) );
2168 +    }
2169 +
2170 +    for (pixval=0; pixval < 8; pixval++)
2171 +    {
2172 +        for (frame=0; frame < 4; frame++)
2173 +        {
2174 +            gslut = GSLUT[pixval*4 + frame];
2175 +            outl(gslut,EP93XX_GS_OFFSET(GS_LUT,  frame, pixval));
2176 +            outl(gslut,EP93XX_GS_OFFSET(GS_LUT2,  frame, pixval));
2177 +            outl(gslut,EP93XX_GS_OFFSET(GS_LUT3,  frame, pixval));
2178 +        }
2179 +    }
2180 +    outl( cont ^ LUTCONT_RAM1, LUTCONT );
2181 +}
2182 +
2183 +static int ep93xxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
2184 +{
2185 +    struct fb_var_screeninfo tmp_var;
2186 +    DPRINTK("ep93xxfb_check_var - enter\n");
2187 +
2188 +    memcpy (&tmp_var, var, sizeof (tmp_var));
2189 +
2190 +    if (var->xres_virtual != var->xres)
2191 +        var->xres_virtual = var->xres;
2192 +    if (var->yres_virtual < var->yres)
2193 +        var->yres_virtual = var->yres;
2194 +
2195 +    if (var->xoffset < 0)
2196 +        var->xoffset = 0;
2197 +    if (var->yoffset < 0)
2198 +        var->yoffset = 0;
2199 +
2200 +    switch (tmp_var.bits_per_pixel)
2201 +    {
2202 +        case 4:
2203 +            break;
2204 +        default:
2205 +            return -EINVAL;
2206 +    }
2207 +
2208 +    DPRINTK("ep93xxfb_check_var - exit\n");
2209 +    return 0;
2210 +}
2211 +
2212 +static int ep93xxfb_set_par(struct fb_info *info)
2213 +{
2214 +    DPRINTK("ep93xxfb_set_par\n");
2215 +    switch (info->var.bits_per_pixel) {
2216 +        case 4:
2217 +            info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
2218 +            break;
2219 +
2220 +        default:
2221 +            return -EINVAL;
2222 +    }
2223 +
2224 +    return 0;
2225 +}
2226 +
2227 +
2228 +static int ep93xxfb_blank(int blank_mode,struct fb_info *info)
2229 +{
2230 +    unsigned long attribs;
2231 +    DPRINTK("ep93xxfb_blank - enter\n");
2232 +    attribs = inl(VIDEOATTRIBS);
2233 +
2234 +    if (blank_mode) {
2235 +        if (epinfo.off)
2236 +            (epinfo.off)( 0 );
2237 +
2238 +        ep93xxfb_lock_outl(attribs & ~(VIDEOATTRIBS_DATAEN |
2239 +                    VIDEOATTRIBS_SYNCEN | VIDEOATTRIBS_PCLKEN |
2240 +                    VIDEOATTRIBS_EN), VIDEOATTRIBS);
2241 +    }
2242 +    else {
2243 +
2244 +        if (epinfo.configure)
2245 +            (epinfo.configure)( (unsigned char) epinfo.graylevel );
2246 +        if (epinfo.on)
2247 +            (epinfo.on)( 0 );
2248 +    }
2249 +    return 0;
2250 +}
2251 +
2252 +static void ep93xxfb_get_par(struct fb_info *info)
2253 +{
2254 +
2255 +    DPRINTK("ep93xxfb_get_par - enter\n");
2256 +
2257 +    epinfo.configure = ep93xxfb_vmods[vmode].configure;
2258 +    epinfo.on = ep93xxfb_vmods[vmode].on;
2259 +    epinfo.off = ep93xxfb_vmods[vmode].off;
2260 +
2261 +    epinfo.freq = ep93xxfb_vmods[vmode].freq;
2262 +    epinfo.dualscan = ep93xxfb_vmods[vmode].dualscan;
2263 +    epinfo.bpp = ep93xxfb_vmods[vmode].bpp;
2264 +    epinfo.graylevel = ep93xxfb_vmods[vmode].graylevel;
2265 +
2266 +    epinfo.xres = ep93xxfb_vmods[vmode].hres;
2267 +    epinfo.yres = ep93xxfb_vmods[vmode].vres;
2268 +
2269 +}
2270 +
2271 +static int ep93xxfb_alloc_videomem(void)
2272 +{
2273 +    unsigned long adr,size,pgsize;
2274 +    int order;
2275 +
2276 +    DPRINTK("ep93xxfb_alloc_videomem - enter \n");
2277 +
2278 +    epinfo.fb_log = NULL;
2279 +    epinfo.fb_size = epinfo.xres*epinfo.yres*epinfo.bpp/8;
2280 +    order = get_order( epinfo.fb_size );
2281 +    epinfo.fb_log = (void*) __get_free_pages( GFP_KERNEL, order );
2282 +
2283 +    if (epinfo.fb_log) {
2284 +        epinfo.fb_phys = __virt_to_phys((int) epinfo.fb_log );
2285 +        adr = (unsigned long)epinfo.fb_log;
2286 +        size = epinfo.fb_size;
2287 +        pgsize = 1 << order;
2288 +        do {
2289 +            adr += pgsize;
2290 +            SetPageReserved(virt_to_page(adr));
2291 +        } while(size -= pgsize);
2292 +    }
2293 +    else
2294 +        return -ENOMEM;
2295 +
2296 +    memset(epinfo.fb_log,0x00,epinfo.fb_size);
2297 +
2298 +    DPRINTK("   fb_log_addres = 0x%x\n",    (unsigned int)epinfo.fb_log);
2299 +    DPRINTK("   fb_phys_address = 0x%x\n",  (unsigned int)epinfo.fb_phys);
2300 +    DPRINTK("   fb_size = %lu\n",           (unsigned long)epinfo.fb_size);
2301 +    DPRINTK("   fb_page_order = %d\n",      (unsigned int)order);
2302 +    DPRINTK("ep93xxfb_alloc_videomem - exit \n");
2303 +    return 0;
2304 +}
2305 +
2306 +static void ep93xxfb_release_videomem(void)
2307 +{
2308 +    unsigned long adr,size,psize;
2309 +    int order;
2310 +
2311 +    DPRINTK("ep93xxfb_release_videomem - enter \n");
2312 +    if (epinfo.fb_log) {
2313 +        order = get_order(epinfo.fb_size);
2314 +        adr = (unsigned long)epinfo.fb_log;
2315 +        size = epinfo.fb_size;
2316 +        psize = 1 << order ;
2317 +        do {
2318 +            adr += psize;
2319 +            ClearPageReserved(virt_to_page(adr));
2320 +        } while(size -= psize);
2321 +        free_pages((unsigned long)epinfo.fb_log, order );
2322 +    }
2323 +    DPRINTK("ep93xxfb_release_videomem - exit \n");
2324 +}
2325 +
2326 +static void ep93xxfb_setinfo(struct fb_info *info)
2327 +{
2328 +
2329 +    DPRINTK("ep93xxfb_setinfo - enter \n");
2330 +    info->pseudo_palette = pseudo_palette;
2331 +    info->var.xres = epinfo.xres;
2332 +    info->var.yres = epinfo.yres;
2333 +    info->var.xres_virtual = epinfo.xres;
2334 +    info->var.yres_virtual = epinfo.yres;
2335 +
2336 +    info->var.bits_per_pixel = epinfo.bpp;
2337 +    info->var.red.length = epinfo.bpp;
2338 +    info->var.green.length = epinfo.bpp;
2339 +    info->var.blue.length = epinfo.bpp;
2340 +    info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
2341 +    info->var.red.offset = 0;
2342 +    info->var.green.offset =0;
2343 +    info->var.blue.offset = 0;
2344 +
2345 +    info->fix.smem_start = epinfo.fb_phys;
2346 +    info->fix.smem_len = epinfo.fb_size;
2347 +    info->fix.type = FB_TYPE_PACKED_PIXELS;
2348 +    info->fix.line_length = (epinfo.xres * epinfo.bpp) / 8;
2349 +    info->fix.accel = FB_ACCEL_NONE;
2350 +    info->screen_base = epinfo.fb_log;
2351 +    info->fix.ypanstep = 1;
2352 +    info->fix.ywrapstep = 1;
2353 +
2354 +    DPRINTK("ep93xxfb_setinfo - exit \n");
2355 +}
2356 +
2357 +static int ep93xxfb_config(struct fb_info *info)
2358 +{
2359 +    DPRINTK("ep93xxfb_config - enter\n");
2360 +
2361 +    ep93xxfb_get_par( info );
2362 +    if( ep93xxfb_alloc_videomem() != 0 ) {
2363 +        printk("Unable to allocate video memory\n");
2364 +        return -ENOMEM;
2365 +    }
2366 +
2367 +    /* set video memory parameters */
2368 +    ep93xxfb_outl(epinfo.fb_phys, VIDSCRNPAGE);
2369 +    if(epinfo.dualscan)
2370 +    {
2371 +        ep93xxfb_outl(epinfo.fb_phys + (epinfo.bpp*epinfo.xres*epinfo.yres/16)
2372 +                , VIDSCRNHPG);
2373 +    }
2374 +
2375 +    DPRINTK("   fb_phys = 0x%x\n",  inl(VIDSCRNPAGE) );
2376 +    DPRINTK("   fb_phys_hpg = 0x%x\n",  inl(VIDSCRNHPG));
2377 +
2378 +    ep93xxfb_outl(epinfo.yres , SCRNLINES);
2379 +    ep93xxfb_outl(((epinfo.xres * epinfo.bpp) / 32) - 1, LINELENGTH);
2380 +    ep93xxfb_outl((epinfo.xres * epinfo.bpp) / 32, VLINESTEP);
2381 +
2382 +    if(epinfo.configure)
2383 +        (epinfo.configure)( (unsigned char) epinfo.graylevel );
2384 +
2385 +    ep93xxfb_setinfo( info );
2386 +
2387 +
2388 +    DPRINTK("ep93xxfb_config - exit\n");
2389 +    return 0;
2390 +}
2391 +
2392 +static unsigned long ep93xx_get_pll_frequency(unsigned long pll)
2393 +{
2394 +    unsigned long fb1, fb2, ipd, ps, freq;
2395 +
2396 +    if (pll == 1)
2397 +        pll = inl(EP93XX_SYSCON_CLOCK_SET1);
2398 +    else if (pll == 2)
2399 +        pll = inl(EP93XX_SYSCON_CLOCK_SET2);
2400 +    else
2401 +        return 0;
2402 +
2403 +    ps = (pll & SYSCON_CLKSET1_PLL1_PS_MASK) >>        SYSCON_CLKSET1_PLL1_PS_SHIFT;
2404 +    fb1 = ((pll & SYSCON_CLKSET1_PLL1_X1FBD1_MASK) >> SYSCON_CLKSET1_PLL1_X1FBD1_SHIFT);
2405 +    fb2 = ((pll & SYSCON_CLKSET1_PLL1_X2FBD2_MASK) >> SYSCON_CLKSET1_PLL1_X2FBD2_SHIFT);
2406 +    ipd = ((pll & SYSCON_CLKSET1_PLL1_X2IPD_MASK) >> SYSCON_CLKSET1_PLL1_X2IPD_SHIFT);
2407 +
2408 +    freq = (((0x00e10000 * (fb1+1)) / (ipd+1)) * (fb2+1)) >> ps;
2409 +    return freq;
2410 +}
2411 +
2412 +static int ep93xx_set_video_div(unsigned long freq)
2413 +{
2414 +    unsigned long pdiv = 0, div = 0, psel = 0, esel = 0;
2415 +    unsigned long err, f, i, j, k;
2416 +
2417 +    err = -1;
2418 +
2419 +    for (i = 0; i < 3; i++) {
2420 +        if (i == 0)
2421 +            f = 14745600 * 2;
2422 +        else if (i == 1)
2423 +            f = ep93xx_get_pll_frequency(1) * 2;
2424 +        else
2425 +            f = ep93xx_get_pll_frequency(2) * 2;
2426 +
2427 +        for (j = 4; j <= 6; j++) {
2428 +            k = f / (freq * j);
2429 +            if (k < 2)
2430 +                continue;
2431 +
2432 +            if (abs(((f / (j * k))) - freq ) < err ) {
2433 +                pdiv = j - 3;
2434 +                div = k;
2435 +                psel = (i == 2) ? 1 : 0;
2436 +                esel = (i == 0) ? 0 : 1;
2437 +                err = (f / (j * k)) - freq;
2438 +            }
2439 +        }
2440 +    }
2441 +
2442 +    if (err == -1)
2443 +        return -1;
2444 +
2445 +    f = SYSCON_VIDDIV_VENA | (esel ? SYSCON_VIDDIV_ESEL : 0) |
2446 +        (psel ? SYSCON_VIDDIV_PSEL : 0) |
2447 +        (pdiv << SYSCON_VIDDIV_PDIV_SHIFT) |
2448 +        (div << SYSCON_VIDDIV_VDIV_SHIFT);
2449 +    outl(0xaa, EP93XX_SYSCON_SWLOCK);
2450 +    outl(f, SYSCON_VIDDIV);
2451 +
2452 +    return freq + err;
2453 +}
2454 +
2455 +static int interrupt_hooked = 0;
2456 +static int vs_counter = 0;
2457 +
2458 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,17)
2459 +static irqreturn_t ep93xxfb_irq_handler(int i, void *blah)
2460 +#else
2461 +static irqreturn_t ep93xxfb_irq_handler(int i, void *blah, struct pt_regs *regs)
2462 +#endif
2463 +{
2464 +
2465 +    outl(RASTER_SWLOCK_VALUE, RASTER_SWLOCK);
2466 +    outl(
2467 +#ifdef CONFIG_EP93XX_SDCS0
2468 +            (0 << VIDEOATTRIBS_SDSEL_SHIFT) |
2469 +#endif
2470 +#ifdef CONFIG_EP93XX_SDCS1
2471 +            (1 << VIDEOATTRIBS_SDSEL_SHIFT) |
2472 +#endif
2473 +#ifdef CONFIG_EP93XX_SDCS2
2474 +            (2 << VIDEOATTRIBS_SDSEL_SHIFT) |
2475 +#endif
2476 +#ifdef CONFIG_EP93XX_SDCS3
2477 +            (3 << VIDEOATTRIBS_SDSEL_SHIFT) |
2478 +#endif
2479 +            VIDEOATTRIBS_VCPOL | VIDEOATTRIBS_HSPOL |
2480 +            VIDEOATTRIBS_DATAEN | VIDEOATTRIBS_SYNCEN | VIDEOATTRIBS_INVCLK |
2481 +            VIDEOATTRIBS_PCLKEN | VIDEOATTRIBS_EN | VIDEOATTRIBS_INTEN ,
2482 +            VIDEOATTRIBS       );
2483 +
2484 +    ep93xxfb_16gray_palette_switch(vs_counter++);
2485 +
2486 +    return IRQ_HANDLED;
2487 +}
2488 +
2489 +void LM121VB1T01_configure(unsigned char value)
2490 +{
2491 +
2492 +    int n;
2493 +    unsigned long attribs;
2494 +    printk("LM121VB1T01_configure\n");
2495 +
2496 +    switch(value)
2497 +    {
2498 +        case 8:
2499 +            ep93xxfb_8gray_palette_init();
2500 +            break;
2501 +        case 16:
2502 +            ep93xxfb_16gray_palette_init();
2503 +            break;
2504 +        default:
2505 +            return;
2506 +    }
2507 +
2508 +    SysconSetLocked(EP93XX_SYSCON_DEVICE_CONFIG, (inl(EP93XX_SYSCON_DEVICE_CONFIG) & ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE) | EP93XX_SYSCON_DEVCFG_RasOnP3);
2509 +
2510 +    ep93xx_set_video_div(epinfo.freq*240*1280);
2511 +
2512 +    ep93xxfb_lock_outl( 0x00000000   ,   VIDEOATTRIBS       );
2513 +
2514 +    n = 240;
2515 +    ep93xxfb_lock_outl( n + 3  ,   VLINESTOTAL        );
2516 +    ep93xxfb_lock_outl( ((n)<<16) + n+1   ,   VSYNCSTRTSTOP      );
2517 +    ep93xxfb_lock_outl( ((2)<<16) + n+2   ,   VACTIVESTRTSTOP    );
2518 +    ep93xxfb_lock_outl( ((3)<<16) + n+3   ,   VBLANKSTRTSTOP     );
2519 +    ep93xxfb_lock_outl( ((n+3)<<16) + n+3    ,   VCLKSTRTSTOP       );
2520 +
2521 +    n = 1280;
2522 +    ep93xxfb_lock_outl( n + 15  ,   HCLKSTOTAL         );
2523 +    ep93xxfb_lock_outl( ((n+5)<<16) + n+ 14    ,   HSYNCSTRTSTOP      );
2524 +    ep93xxfb_lock_outl( ((15)<<16) + n + 15   ,   HACTIVESTRTSTOP    );
2525 +    ep93xxfb_lock_outl( ((n+15)<<16) + 15 ,   HBLANKSTRTSTOP       );
2526 +    ep93xxfb_lock_outl( ((n)<<16) + n   ,   HCLKSTRTSTOP       );
2527 +
2528 +    ep93xxfb_lock_outl( 14   ,   LINECARRY          );
2529 +
2530 +    attribs = 0;
2531 +
2532 +#ifdef CONFIG_EP93XX_SDCS0
2533 +    attribs |= 0 << VIDEOATTRIBS_SDSEL_SHIFT;
2534 +#endif
2535 +#ifdef CONFIG_EP93XX_SDCS1
2536 +    attribs |= 1 << VIDEOATTRIBS_SDSEL_SHIFT;
2537 +#endif
2538 +#ifdef CONFIG_EP93XX_SDCS2
2539 +    attribs |= 2 << VIDEOATTRIBS_SDSEL_SHIFT;
2540 +#endif
2541 +#ifdef CONFIG_EP93XX_SDCS3
2542 +    attribs |= 3 << VIDEOATTRIBS_SDSEL_SHIFT;
2543 +#endif
2544 +
2545 +    switch(value)
2546 +    {
2547 +        case 8:
2548 +            ep93xxfb_lock_outl( PIXELMODE_DSCAN |
2549 +                PIXELMODE_S_8PPC | PIXELMODE_P_4BPP |
2550 +                PIXELMODE_C_GSLUT   ,   PIXELMODE          );
2551 +
2552 +            ep93xxfb_lock_outl(
2553 +                    attribs | VIDEOATTRIBS_VCPOL | VIDEOATTRIBS_HSPOL |
2554 +                    VIDEOATTRIBS_DATAEN | VIDEOATTRIBS_SYNCEN | VIDEOATTRIBS_INVCLK |
2555 +                    VIDEOATTRIBS_PCLKEN | VIDEOATTRIBS_EN ,
2556 +                    VIDEOATTRIBS       );
2557 +            break;
2558 +        case 16:
2559 +            if(!interrupt_hooked)
2560 +            {
2561 +                request_irq(IRQ_EP93XX_VSYNC, ep93xxfb_irq_handler, IRQF_DISABLED, "lut switch interrupt", NULL);
2562 +                interrupt_hooked = 1;
2563 +            }
2564 +            ep93xxfb_lock_outl( PIXELMODE_DSCAN |
2565 +                PIXELMODE_S_8PPC | PIXELMODE_P_4BPP | PIXELMODE_C_GSLUT, PIXELMODE );
2566 +
2567 +            ep93xxfb_lock_outl(
2568 +                    attribs | VIDEOATTRIBS_VCPOL | VIDEOATTRIBS_HSPOL |
2569 +                    VIDEOATTRIBS_DATAEN | VIDEOATTRIBS_SYNCEN | VIDEOATTRIBS_INVCLK |
2570 +                    VIDEOATTRIBS_PCLKEN | VIDEOATTRIBS_EN | VIDEOATTRIBS_INTEN,
2571 +                    VIDEOATTRIBS       );
2572 +            break;
2573 +        default:
2574 +            return;
2575 +    }
2576 +
2577 +}
2578 +
2579 +void HOSIDEN_HLM6323_configure(unsigned char value)
2580 +{
2581 +    int n;
2582 +    unsigned long attribs;
2583 +
2584 +    printk("HOSIDEN_HLM6323_configure\n");
2585 +
2586 +    switch(value)
2587 +    {
2588 +        case 8:
2589 +            ep93xxfb_8gray_palette_init();
2590 +            break;
2591 +        case 16:
2592 +            ep93xxfb_16gray_palette_init();
2593 +            break;
2594 +        default:
2595 +            return;
2596 +    }
2597 +
2598 +    SysconSetLocked(EP93XX_SYSCON_DEVICE_CONFIG, inl(EP93XX_SYSCON_DEVICE_CONFIG)  |EP93XX_SYSCON_DEVCFG_RasOnP3);
2599 +
2600 +    ep93xxfb_lock_outl( 0x00000000   ,   VIDEOATTRIBS       );
2601 +
2602 +    ep93xx_set_video_div(epinfo.freq*320*240);
2603 +    mdelay(10);
2604 +
2605 +    n = 240;
2606 +    ep93xxfb_lock_outl( n + 3 ,   VLINESTOTAL        );
2607 +    ep93xxfb_lock_outl( ((n+1)<<16) + n +2   ,   VSYNCSTRTSTOP      );
2608 +    ep93xxfb_lock_outl( ((3)<<16) + n +3 ,   VACTIVESTRTSTOP    );
2609 +    ep93xxfb_lock_outl( ((3)<<16) + n +3 ,   VBLANKSTRTSTOP     );
2610 +    ep93xxfb_lock_outl( ((n+3)<<16) + n +3,   VCLKSTRTSTOP       );
2611 +
2612 +    n = 320;
2613 +    ep93xxfb_lock_outl( n + 3,   HCLKSTOTAL         );
2614 +    ep93xxfb_lock_outl( ((n+1)<<16) + n+2    ,   HSYNCSTRTSTOP      );
2615 +    ep93xxfb_lock_outl( ((3)<<16) + n+3  ,   HACTIVESTRTSTOP    );
2616 +    ep93xxfb_lock_outl( ((3)<<16) + n+3 ,   HBLANKSTRTSTOP       );
2617 +    ep93xxfb_lock_outl( ((n+3)<<16) + n+3  ,   HCLKSTRTSTOP       );
2618 +
2619 +    ep93xxfb_lock_outl( 3   ,   LINECARRY          );
2620 +
2621 +    attribs = 0;
2622 +
2623 +#ifdef CONFIG_EP93XX_SDCS0
2624 +    attribs |= 0 << VIDEOATTRIBS_SDSEL_SHIFT;
2625 +#endif
2626 +#ifdef CONFIG_EP93XX_SDCS1
2627 +    attribs |= 1 << VIDEOATTRIBS_SDSEL_SHIFT;
2628 +#endif
2629 +#ifdef CONFIG_EP93XX_SDCS2
2630 +    attribs |= 2 << VIDEOATTRIBS_SDSEL_SHIFT;
2631 +#endif
2632 +#ifdef CONFIG_EP93XX_SDCS3
2633 +    attribs |= 3 << VIDEOATTRIBS_SDSEL_SHIFT;
2634 +#endif
2635 +
2636 +    switch(value)
2637 +    {
2638 +        case 8:
2639 +            ep93xxfb_lock_outl(
2640 +                PIXELMODE_S_4PPC | PIXELMODE_P_4BPP | PIXELMODE_C_GSLUT,   PIXELMODE );
2641 +            ep93xxfb_lock_outl(
2642 +                    attribs | VIDEOATTRIBS_VCPOL | VIDEOATTRIBS_HSPOL |
2643 +                    VIDEOATTRIBS_DATAEN | VIDEOATTRIBS_SYNCEN | VIDEOATTRIBS_INVCLK |
2644 +                    VIDEOATTRIBS_PCLKEN | VIDEOATTRIBS_EN ,
2645 +                    VIDEOATTRIBS       );
2646 +            break;
2647 +        case 16:
2648 +            ep93xxfb_lock_outl(
2649 +                PIXELMODE_S_4PPC | PIXELMODE_P_4BPP | PIXELMODE_C_GSLUT,   PIXELMODE );
2650 +            if(!interrupt_hooked)
2651 +            {
2652 +                request_irq(IRQ_EP93XX_VSYNC, ep93xxfb_irq_handler, IRQF_DISABLED, "lut switch interrupt", NULL);
2653 +                interrupt_hooked = 1;
2654 +            }
2655 +            ep93xxfb_lock_outl(
2656 +                    attribs | VIDEOATTRIBS_VCPOL | VIDEOATTRIBS_HSPOL |
2657 +                    VIDEOATTRIBS_DATAEN | VIDEOATTRIBS_SYNCEN | VIDEOATTRIBS_INVCLK |
2658 +                    VIDEOATTRIBS_PCLKEN | VIDEOATTRIBS_EN | VIDEOATTRIBS_INTEN,
2659 +                    VIDEOATTRIBS       );
2660 +            break;
2661 +        default:
2662 +            return;
2663 +    }
2664 +}
2665 +
2666 +#define FB_WRITEL fb_writel
2667 +#define FB_READL  fb_readl
2668 +#define LEFT_POS(bpp)          (0)
2669 +#define SHIFT_HIGH(val, bits)  ((val) << (bits))
2670 +#define SHIFT_LOW(val, bits)   ((val) >> (bits))
2671 +static inline void color_imageblit(const struct fb_image *image,
2672 +        struct fb_info *p, u8 *dst1,
2673 +        u32 start_index,
2674 +        u32 pitch_index)
2675 +{
2676 +    /* Draw the penguin */
2677 +    u32 *dst, *dst2;
2678 +    u32 color = 0, val, shift;
2679 +    int i, n, bpp = p->var.bits_per_pixel;
2680 +    u32 null_bits = 32 - bpp;
2681 +    u32 *palette = (u32 *) p->pseudo_palette;
2682 +    const u8 *src = image->data;
2683 +
2684 +    dst2 = (u32 *) dst1;
2685 +    for (i = image->height; i--; ) {
2686 +        n = image->width;
2687 +        dst = (u32 *) dst1;
2688 +        shift = 0;
2689 +        val = 0;
2690 +
2691 +        if (start_index) {
2692 +            u32 start_mask = ~(SHIFT_HIGH(~(u32)0, start_index));
2693 +            val = FB_READL(dst) & start_mask;
2694 +            shift = start_index;
2695 +        }
2696 +        while (n--) {
2697 +            if (p->fix.visual == FB_VISUAL_TRUECOLOR ||
2698 +                    p->fix.visual == FB_VISUAL_DIRECTCOLOR )
2699 +                color = palette[*src];
2700 +            else
2701 +                color = *src;
2702 +            color <<= LEFT_POS(bpp);
2703 +            val |= SHIFT_HIGH(color, shift);
2704 +            if (shift >= null_bits) {
2705 +                FB_WRITEL(val, dst++);
2706 +
2707 +                val = (shift == null_bits) ? 0 :
2708 +                    SHIFT_LOW(color, 32 - shift);
2709 +            }
2710 +            shift += bpp;
2711 +            shift &= (32 - 1);
2712 +            src++;
2713 +        }
2714 +        if (shift) {
2715 +            u32 end_mask = SHIFT_HIGH(~(u32)0, shift);
2716 +
2717 +            FB_WRITEL((FB_READL(dst) & end_mask) | val, dst);
2718 +        }
2719 +        dst1 += p->fix.line_length;
2720 +        if (pitch_index) {
2721 +            dst2 += p->fix.line_length;
2722 +            dst1 = (u8 *)((long __force)dst2 & ~(sizeof(u32) - 1));
2723 +
2724 +            start_index += pitch_index;
2725 +            start_index &= 32 - 1;
2726 +        }
2727 +    }
2728 +}
2729 +
2730 +static const int reversebit[]=
2731 +{
2732 +    7, 6, 5, 4, 3, 2, 1, 0,
2733 +    15,14,13,12,11,10, 9, 8,
2734 +    23,22,21,20,19,18,17,16,
2735 +    31,30,29,28,27,26,25,24,
2736 +};
2737 +static inline void slow_imageblit(const struct fb_image *image, struct fb_info *p,
2738 +        u8 *dst1, u32 fgcolor,
2739 +        u32 bgcolor,
2740 +        u32 start_index,
2741 +        u32 pitch_index)
2742 +{
2743 +    u32 shift, color = 0, bpp = p->var.bits_per_pixel;
2744 +    u32 *dst, *dst2;
2745 +    u32 val, pitch = p->fix.line_length;
2746 +    u32 null_bits = 32 - bpp;
2747 +    u32 spitch = (image->width+7)/8;
2748 +    const u8 *src = image->data, *s;
2749 +    u32 i, j, l;
2750 +
2751 +    dst2 = (u32 *) dst1;
2752 +    fgcolor <<= LEFT_POS(bpp);
2753 +    bgcolor <<= LEFT_POS(bpp);
2754 +    for (i = image->height; i--; ) {
2755 +        shift = val = 0;
2756 +        l = 8;
2757 +        j = image->width;
2758 +        dst = (u32 *) dst1;
2759 +        s = src;
2760 +
2761 +        /* write leading bits */
2762 +        if (start_index) {
2763 +            u32 start_mask = ~(SHIFT_HIGH(~(u32)0,start_index));
2764 +            val = FB_READL(dst) & start_mask;
2765 +            shift = start_index;
2766 +        }
2767 +
2768 +        while (j--) {
2769 +            l--;
2770 +            color = (*s & (1 << l)) ? fgcolor : bgcolor;
2771 +            val |= SHIFT_HIGH(color, reversebit[shift]);
2772 +            /* Did the bitshift spill bits to the next long? */
2773 +            if (shift >= null_bits) {
2774 +                FB_WRITEL(val, dst++);
2775 +                val = (shift == null_bits) ? 0 :
2776 +                    SHIFT_LOW(color, 32 - reversebit[shift]);
2777 +            }
2778 +            shift += bpp;
2779 +            shift &= (32 - 1);
2780 +            if (!l) { l = 8; s++; };
2781 +        }
2782 +
2783 +        /* write trailing bits */
2784 +        if (shift) {
2785 +            u32 end_mask = SHIFT_HIGH(~(u32)0, shift);
2786 +
2787 +            FB_WRITEL((FB_READL(dst) & end_mask) | val, dst);
2788 +        }
2789 +
2790 +        dst1 += pitch;
2791 +        src += spitch;
2792 +        if (pitch_index) {
2793 +            dst2 += pitch;
2794 +            dst1 = (u8 *)((long __force)dst2 & ~(sizeof(u32) - 1));
2795 +            start_index += pitch_index;
2796 +            start_index &= 32 - 1;
2797 +        }
2798 +
2799 +    }
2800 +}
2801 +
2802 +static void ep93xx_imageblit(struct fb_info *p, const struct fb_image *image)
2803 +{
2804 +    u32 fgcolor, bgcolor, start_index, bitstart, pitch_index = 0;
2805 +    u32 bpl = sizeof(u32), bpp = p->var.bits_per_pixel;
2806 +    u32 dx = image->dx, dy = image->dy;
2807 +    u8 *dst1;
2808 +
2809 +    if (p->state != FBINFO_STATE_RUNNING)
2810 +        return;
2811 +
2812 +    bitstart = (dy * p->fix.line_length * 8) + (dx * bpp);
2813 +    start_index = bitstart & (32 - 1);
2814 +    pitch_index = (p->fix.line_length & (bpl - 1)) * 8;
2815 +
2816 +    bitstart /= 8;
2817 +    bitstart &= ~(bpl - 1);
2818 +    dst1 = p->screen_base + bitstart;
2819 +
2820 +    if (p->fbops->fb_sync)
2821 +        p->fbops->fb_sync(p);
2822 +
2823 +    if (image->depth == 1) {
2824 +        if (p->fix.visual == FB_VISUAL_TRUECOLOR ||
2825 +                p->fix.visual == FB_VISUAL_DIRECTCOLOR) {
2826 +            fgcolor = ((u32*)(p->pseudo_palette))[image->fg_color];
2827 +            bgcolor = ((u32*)(p->pseudo_palette))[image->bg_color];
2828 +        } else {
2829 +            fgcolor = image->fg_color;
2830 +            bgcolor = image->bg_color;
2831 +        }
2832 +        slow_imageblit(image, p, dst1, fgcolor, bgcolor,
2833 +                start_index, pitch_index);
2834 +    } else
2835 +        color_imageblit(image, p, dst1, start_index, pitch_index);
2836 +}
2837 +
2838 +
2839 +#if LINUX_VERSION_CODE > KERNEL_VERSION(2,6,8)
2840 +
2841 +int ep93xxfb_ioctl(struct fb_info *info,unsigned int cmd, unsigned long arg)
2842 +{
2843 +    return 0;
2844 +}
2845 +
2846 +static int ep93xxfb_mmap(struct fb_info *info,struct vm_area_struct *vma)
2847 +{
2848 +    unsigned long off, start, len;
2849 +
2850 +    DPRINTK("ep93xxfb_mmap - enter\n");
2851 +
2852 +    off = vma->vm_pgoff << PAGE_SHIFT;
2853 +    start = info->fix.smem_start;
2854 +    len = PAGE_ALIGN(start & ~PAGE_MASK) + info->fix.smem_len;
2855 +    start &= PAGE_MASK;
2856 +    if ((vma->vm_end - vma->vm_start + off) > len)
2857 +        return -EINVAL;
2858 +
2859 +    off += start;
2860 +    vma->vm_pgoff = off >> PAGE_SHIFT;
2861 +
2862 +    vma->vm_flags |= VM_IO;
2863 +    vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
2864 +
2865 +    if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT,
2866 +                vma->vm_end - vma->vm_start, vma->vm_page_prot)) {
2867 +        DPRINTK("ep93xxfb_mmap error\n");
2868 +        return -EAGAIN;
2869 +    }
2870 +
2871 +    DPRINTK("ep93xxfb_mmap - exit\n");
2872 +    return 0;
2873 +}
2874 +
2875 +
2876 +static struct fb_ops ep93xxfb_ops = {
2877 +    .owner          = THIS_MODULE,
2878 +    .fb_check_var   = ep93xxfb_check_var,
2879 +    .fb_set_par     = ep93xxfb_set_par,
2880 +    .fb_blank       = ep93xxfb_blank,
2881 +    .fb_fillrect    = cfb_fillrect,
2882 +    .fb_copyarea    = cfb_copyarea,
2883 +    //    .fb_imageblit   = cfb_imageblit,
2884 +    .fb_imageblit   = ep93xx_imageblit,
2885 +    .fb_ioctl       = ep93xxfb_ioctl,
2886 +    .fb_mmap        = ep93xxfb_mmap,
2887 +};
2888 +
2889 +
2890 +static struct resource ep93xxfb_raster_resources = {
2891 +    .start          = EP93XX_RASTER_PHYS_BASE,
2892 +    .end            = EP93XX_RASTER_PHYS_BASE + 0x1ffff,
2893 +    .flags          = IORESOURCE_MEM,
2894 +};
2895 +
2896 +
2897 +static int __init ep93xxfb_probe(struct platform_device *device)
2898 +{
2899 +    struct fb_info *info = NULL;
2900 +    struct resource *res = NULL;
2901 +    int ret = 0;
2902 +    int arb = 0;
2903 +
2904 +    DPRINTK("ep93xxfb_probe - enter \n");
2905 +
2906 +    if(!device) {
2907 +        printk("error : to_platform_device\n");
2908 +        return -ENODEV;
2909 +    }
2910 +    res = platform_get_resource( device, IORESOURCE_MEM, 0);
2911 +    if(!res) {
2912 +        printk("error : platform_get_resource \n");
2913 +        return -ENODEV;
2914 +    }
2915 +    if (!request_mem_region(res->start,res->end - res->start + 1, FBDEV_NAME ))
2916 +        return -EBUSY;
2917 +
2918 +    info = framebuffer_alloc(sizeof(u32) * 256, &device->dev);
2919 +
2920 +    if(!info) {
2921 +        printk("Unable to allocate memory for frame buffer\n");
2922 +        return -ENOMEM;
2923 +    }
2924 +
2925 +    info->flags = FBINFO_DEFAULT;
2926 +    strncpy(info->fix.id, FBDEV_NAME, sizeof(info->fix.id));
2927 +    info->fix.mmio_start = res->start;
2928 +    info->fix.mmio_len = res->end - res->start + 1;
2929 +    info->fbops = &ep93xxfb_ops;
2930 +    info->pseudo_palette = info->par;
2931 +    info->state = FBINFO_STATE_RUNNING;
2932 +
2933 +    printk("mmio_start = 0x%08x\n", res->start);
2934 +    printk("mmio_len = 0x%08x\n", res->end - res->start + 1);
2935 +
2936 +    if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
2937 +        ret = -ENOMEM;
2938 +        goto fbuff;
2939 +    }
2940 +
2941 +    if ((ret = ep93xxfb_config(info)) < 0)
2942 +        goto clmap;
2943 +
2944 +    if (register_framebuffer(info) < 0) {
2945 +        printk(KERN_ERR "Unable to register ep93xxfb frame buffer\n");
2946 +        ret = -EINVAL;
2947 +        goto clmap;
2948 +    }
2949 +    platform_set_drvdata(device, info);
2950 +    printk(KERN_INFO "fb%d: EP93xx frame buffer at %dx%dx%dbpp\n", info->node,
2951 +            info->var.xres, info->var.yres, info->var.bits_per_pixel);
2952 +
2953 +    /*change the raster arb to the highest one--Bo*/
2954 +    arb = inl(EP93XX_SYSCON_BMAR);
2955 +    arb = (arb & 0x3f8) | 0x01;
2956 +    ep93xxfb_outl(arb,EP93XX_SYSCON_BMAR);
2957 +
2958 +    DPRINTK("ep93xxfb_probe - exit \n");
2959 +    return 0;
2960 +
2961 +clmap:
2962 +    fb_dealloc_cmap(&info->cmap);
2963 +
2964 +fbuff:
2965 +    framebuffer_release(info);
2966 +    return ret;
2967 +}
2968 +
2969 +static int ep93xxfb_remove(struct platform_device *device)
2970 +{
2971 +    struct resource *res;
2972 +    struct fb_info *info;
2973 +
2974 +    DPRINTK("ep93xxfb_remove - enter \n");
2975 +
2976 +    info = platform_get_drvdata(device);
2977 +
2978 +    ep93xxfb_release_videomem();
2979 +
2980 +    res = platform_get_resource( device, IORESOURCE_MEM, 0);
2981 +    release_mem_region(res->start, res->end - res->start + 1);
2982 +
2983 +    platform_set_drvdata(device, NULL);
2984 +    unregister_framebuffer(info);
2985 +
2986 +    fb_dealloc_cmap(&info->cmap);
2987 +    framebuffer_release(info);
2988 +
2989 +    ep93xxfb_blank( 1, info );
2990 +
2991 +    DPRINTK("ep93xxfb_remove - exit \n");
2992 +    return 0;
2993 +}
2994 +
2995 +static void ep93xxfb_platform_release(struct device *device)
2996 +{
2997 +    DPRINTK("ep93xxfb_platform_release - enter\n");
2998 +}
2999 +
3000 +
3001 +static struct platform_driver ep93xxfb_driver = {
3002 +    .probe  = ep93xxfb_probe,
3003 +    .remove = ep93xxfb_remove,
3004 +    .driver = {
3005 +        .name   = FBDEV_NAME,
3006 +    },
3007 +};
3008 +
3009 +static struct platform_device ep93xxfb_device = {
3010 +    .name      = FBDEV_NAME,
3011 +    .id        = -1,
3012 +    .dev    = {
3013 +        .release = ep93xxfb_platform_release,
3014 +    },
3015 +    .num_resources  = 1,
3016 +    .resource       = &ep93xxfb_raster_resources,
3017 +};
3018 +
3019 +int __init ep93xxfb_init(void)
3020 +{
3021 +    int ret = 0;
3022 +
3023 +    DPRINTK("ep93xxfb_init - enter\n");
3024 +
3025 +    ret = platform_driver_register(&ep93xxfb_driver);
3026 +
3027 +    if (!ret) {
3028 +        ret = platform_device_register(&ep93xxfb_device);
3029 +        if (ret)
3030 +            platform_driver_unregister(&ep93xxfb_driver);
3031 +    }
3032 +    DPRINTK("ep93xxfb_init - exit\n");
3033 +    return ret;
3034 +}
3035 +
3036 +static void __exit ep93xxfb_exit(void)
3037 +{
3038 +    DPRINTK("ep93xxfb_exit - enter\n");
3039 +    platform_driver_unregister(&ep93xxfb_driver);
3040 +    platform_device_unregister(&ep93xxfb_device);
3041 +    DPRINTK("ep93xxfb_exit - exit\n");
3042 +}
3043 +
3044 +#else  //  LINUX_VERSION_CODE
3045 +
3046 +
3047 +int ep93xxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
3048 +        unsigned blue, unsigned transp,
3049 +        struct fb_info *info)
3050 +{
3051 +    return 0;
3052 +}
3053 +static struct fb_ops ep93xxfb_ops = {
3054 +    .owner          = THIS_MODULE,
3055 +    .fb_setcolreg   = ep93xxfb_setcolreg,
3056 +    .fb_check_var   = ep93xxfb_check_var,
3057 +    .fb_set_par     = ep93xxfb_set_par,
3058 +    .fb_blank       = ep93xxfb_blank,
3059 +    .fb_fillrect    = cfb_fillrect,
3060 +    .fb_copyarea    = cfb_copyarea,
3061 +    .fb_imageblit   = ep93xx_imageblit,
3062 +    .fb_cursor = soft_cursor,
3063 +};
3064 +
3065 +static int __init ep93xxfb_probe(struct device *device)
3066 +{
3067 +    struct platform_device *pdev = to_platform_device(device);
3068 +    struct fb_info *info = NULL;
3069 +    struct resource *res = NULL;
3070 +    int ret = 0;
3071 +    int arb = 0;
3072 +
3073 +    DPRINTK("ep93xxfb_probe - enter \n");
3074 +
3075 +
3076 +    if(!device) {
3077 +        printk("error : to_platform_device\n");
3078 +        return -ENODEV;
3079 +    }
3080 +    res = platform_get_resource( pdev, IORESOURCE_MEM, 0);
3081 +    if(!res) {
3082 +        printk("error : platform_get_resource \n");
3083 +        return -ENODEV;
3084 +    }
3085 +    if (!request_mem_region(res->start,res->end - res->start + 1, FBDEV_NAME ))
3086 +        return -EBUSY;
3087 +
3088 +    info = framebuffer_alloc(sizeof(u32) * 256, &pdev->dev);
3089 +
3090 +    if(!info) {
3091 +        printk("Unable to allocate memory for frame buffer\n");
3092 +        return -ENOMEM;
3093 +    }
3094 +
3095 +    info->flags = FBINFO_DEFAULT;
3096 +    strncpy(info->fix.id, FBDEV_NAME, sizeof(info->fix.id));
3097 +    info->fix.mmio_start = res->start;
3098 +    info->fix.mmio_len = res->end - res->start + 1;
3099 +    info->fbops = &ep93xxfb_ops;
3100 +    info->pseudo_palette = info->par;
3101 +    info->state = FBINFO_STATE_RUNNING;
3102 +
3103 +    if (fb_alloc_cmap(&info->cmap, 256, 0) < 0) {
3104 +        ret = -ENOMEM;
3105 +        goto fbuff;
3106 +    }
3107 +
3108 +    if ((ret = ep93xxfb_config(info)) < 0)
3109 +        goto clmap;
3110 +
3111 +    if (register_framebuffer(info) < 0) {
3112 +        printk(KERN_ERR "Unable to register ep93xxfb frame buffer\n");
3113 +        ret = -EINVAL;
3114 +        goto clmap;
3115 +    }
3116 +    dev_set_drvdata(device, info);
3117 +    printk(KERN_INFO "fb%d: EP93xx frame buffer at %dx%dx%dbpp\n", info->node,
3118 +            info->var.xres, info->var.yres, info->var.bits_per_pixel);
3119 +
3120 +    /*change the raster arb to the highest one--Bo*/
3121 +    arb = inl(EP93XX_SYSCON_BMAR);
3122 +    arb = (arb & 0x3f8) | 0x01;
3123 +    ep93xxfb_outl(arb,EP93XX_SYSCON_BMAR);
3124 +
3125 +    DPRINTK("ep93xxfb_probe - exit \n");
3126 +    return 0;
3127 +
3128 +clmap:
3129 +    fb_dealloc_cmap(&info->cmap);
3130 +
3131 +fbuff:
3132 +    framebuffer_release(info);
3133 +    return ret;
3134 +}
3135 +
3136 +static int ep93xxfb_remove(struct device *device)
3137 +{
3138 +    struct platform_device *pdev = to_platform_device(device);
3139 +    struct resource *res;
3140 +    struct fb_info *info;
3141 +
3142 +    DPRINTK("ep93xxfb_remove - enter \n");
3143 +
3144 +    info = dev_get_drvdata(device);
3145 +
3146 +    ep93xxfb_release_videomem();
3147 +
3148 +    res = platform_get_resource( pdev, IORESOURCE_MEM, 0);
3149 +    release_mem_region(res->start, res->end - res->start + 1);
3150 +
3151 +    dev_set_drvdata(device, NULL);
3152 +    unregister_framebuffer(info);
3153 +
3154 +    fb_dealloc_cmap(&info->cmap);
3155 +    framebuffer_release(info);
3156 +
3157 +    ep93xxfb_blank( 1, info );
3158 +
3159 +    DPRINTK("ep93xxfb_remove - exit \n");
3160 +    return 0;
3161 +}
3162 +static struct device_driver ep93xxfb_driver = {
3163 +    .name              = FBDEV_NAME,
3164 +    .bus               = &platform_bus_type,
3165 +    .probe             = ep93xxfb_probe,
3166 +    .remove            = ep93xxfb_remove,
3167 +};
3168 +int __init ep93xxfb_init(void)
3169 +{
3170 +    DPRINTK("ep93xxfb_init\n");
3171 +    return driver_register(&ep93xxfb_driver);
3172 +}
3173 +
3174 +static void __exit ep93xxfb_exit(void)
3175 +{
3176 +    DPRINTK("ep93xxfb_exit\n");
3177 +    return driver_unregister(&ep93xxfb_driver);
3178 +}
3179 +
3180 +int __init ep93xxfb_setup(char *options)
3181 +{
3182 +    DPRINTK("ep93xxfb_setup\n");
3183 +    return 0;
3184 +}
3185 +
3186 +#endif  //  LINUX_VERSION_CODE
3187 +
3188 +
3189 +module_init(ep93xxfb_init);
3190 +module_exit(ep93xxfb_exit);
3191 +MODULE_AUTHOR("John Zheng <yujiang.zheng@cirrus.com>");
3192 +MODULE_LICENSE("GPL");
3193 +
3194 --- a/arch/arm/mach-ep93xx/include/mach/hardware.h
3195 +++ b/arch/arm/mach-ep93xx/include/mach/hardware.h
3196 @@ -7,6 +7,7 @@
3197  #include "ep93xx-regs.h"
3198  
3199  #define pcibios_assign_all_busses()    0
3200 +#include "regs_raster.h"
3201  #include "regs_touch.h"
3202  
3203  #include "platform.h"
3204 --- a/arch/arm/mach-ep93xx/include/mach/irqs.h
3205 +++ b/arch/arm/mach-ep93xx/include/mach/irqs.h
3206 @@ -34,7 +34,8 @@
3207  #define IRQ_EP93XX_UART3TX             28
3208  #define IRQ_EP93XX_KEY                 29
3209  #define IRQ_EP93XX_TOUCH               30
3210 -#define EP93XX_VIC1_VALID_IRQ_MASK     0x7ffffffc
3211 +#define IRQ_EP93XX_GRAPHICS            31
3212 +#define EP93XX_VIC1_VALID_IRQ_MASK     0xfffffffc
3213  
3214  #define IRQ_EP93XX_EXT0                        32
3215  #define IRQ_EP93XX_EXT1                        33
3216 --- /dev/null
3217 +++ b/arch/arm/mach-ep93xx/include/mach/regs_raster.h
3218 @@ -0,0 +1,347 @@
3219 +/*=============================================================================
3220 + *
3221 + *  FILE:              regs_raster.h
3222 + *
3223 + *  DESCRIPTION:    ep93xx Raster Engine Register Definition
3224 + *
3225 + *  Copyright Cirrus Logic, 2001-2003
3226 + *
3227 + * This program is free software; you can redistribute it and/or modify
3228 + * it under the terms of the GNU General Public License as published by
3229 + * the Free Software Foundation; either version 2 of the License, or
3230 + * (at your option) any later version.
3231 + *
3232 + * This program is distributed in the hope that it will be useful,
3233 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
3234 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
3235 + * GNU General Public License for more details.
3236 + *
3237 + * You should have received a copy of the GNU General Public License
3238 + * along with this program; if not, write to the Free Software
3239 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
3240 + *
3241 + *=============================================================================
3242 + */
3243 +#ifndef _REGS_RASTER_H_
3244 +#define _REGS_RASTER_H_
3245 +
3246 +//-----------------------------------------------------------------------------
3247 +// VLINESTOTAL Register Definitions
3248 +//-----------------------------------------------------------------------------
3249 +#define VLINESTOTAL_MASK            0x000007ff
3250 +
3251 +//-----------------------------------------------------------------------------
3252 +// VSYNCSTRTSTOP Register Definitions
3253 +//-----------------------------------------------------------------------------
3254 +#define VSYNCSTRTSTOP_STRT_MASK     0x07ff0000
3255 +#define VSYNCSTRTSTOP_STRT_SHIFT    0
3256 +#define VSYNCSTRTSTOP_STOP_MASK     0x000007ff
3257 +#define VSYNCSTRTSTOP_STOP_SHIFT    16
3258 +
3259 +//-----------------------------------------------------------------------------
3260 +// VACTIVESTRTSTOP Register Definitions
3261 +//-----------------------------------------------------------------------------
3262 +#define VACTIVESTRTSTOP_STRT_MASK   0x07ff0000
3263 +#define VACTIVESTRTSTOP_STRT_SHIFT  0
3264 +#define VACTIVESTRTSTOP_STOP_MASK   0x000007ff
3265 +#define VACTIVESTRTSTOP_STOP_SHIFT  16
3266 +
3267 +//-----------------------------------------------------------------------------
3268 +// VCLKSTRTSTOP Register Definitions
3269 +//-----------------------------------------------------------------------------
3270 +#define VCLKSTRTSTOP_STRT_MASK      0x07ff0000
3271 +#define VCLKSTRTSTOP_STRT_SHIFT     0
3272 +#define VCLKSTRTSTOP_STOP_MASK      0x000007ff
3273 +#define VCLKSTRTSTOP_STOP_SHIFT     16
3274 +
3275 +//-----------------------------------------------------------------------------
3276 +// VBLANKSTRTSTOP Register Definitions
3277 +//-----------------------------------------------------------------------------
3278 +#define VBLANKSTRTSTOP_STRT_MASK  0x07ff0000
3279 +#define VBLANKSTRTSTOP_STRT_SHIFT 0
3280 +#define VBLANKSTRTSTOP_STOP_MASK  0x000007ff
3281 +#define VBLANKSTRTSTOP_STOP_SHIFT 16
3282 +
3283 +//-----------------------------------------------------------------------------
3284 +// HSYNCSTRTSTOP Register Definitions
3285 +//-----------------------------------------------------------------------------
3286 +#define HSYNCSTRTSTOP_STRT_MASK      0x07ff0000
3287 +#define HSYNCSTRTSTOP_STRT_SHIFT     0
3288 +#define HSYNCSTRTSTOP_STOP_MASK      0x000007ff
3289 +#define HSYNCSTRTSTOP_STOP_SHIFT     16
3290 +
3291 +//-----------------------------------------------------------------------------
3292 +// HACTIVESTRTSTOP Register Definitions
3293 +//-----------------------------------------------------------------------------
3294 +#define HACTIVESTRTSTOP_STRT_MASK    0x07ff0000
3295 +#define HACTIVESTRTSTOP_STRT_SHIFT   0
3296 +#define HACTIVESTRTSTOP_STOP_MASK    0x000007ff
3297 +#define HACTIVESTRTSTOP_STOP_SHIFT   16
3298 +
3299 +//-----------------------------------------------------------------------------
3300 +// HCLKSTRTSTOP Register Definitions
3301 +//-----------------------------------------------------------------------------
3302 +#define HCLKSTRTSTOP_STRT_MASK      0x07ff0000
3303 +#define HCLKSTRTSTOP_STRT_SHIFT     0
3304 +#define HCLKSTRTSTOP_STOP_MASK      0x000007ff
3305 +#define HCLKSTRTSTOP_STOP_SHIFT     16
3306 +
3307 +//-----------------------------------------------------------------------------
3308 +// BRIGHTNESS Register Definitions
3309 +//-----------------------------------------------------------------------------
3310 +#define BRIGHTNESS_MASK             0x0000ffff
3311 +#define BRIGHTNESS_CNT_MASK         0x000000ff
3312 +#define BRIGHTNESS_CNT_SHIFT        0
3313 +#define BRIGHTNESS_CMP_MASK         0x0000ff00
3314 +#define BRIGHTNESS_CMP_SHIFT        8
3315 +
3316 +//-----------------------------------------------------------------------------
3317 +// VIDEOATTRIBS Register Definitions
3318 +//-----------------------------------------------------------------------------
3319 +#define VIDEOATTRIBS_MASK           0x001fffff
3320 +#define VIDEOATTRIBS_EN             0x00000001
3321 +#define VIDEOATTRIBS_PCLKEN         0x00000002
3322 +#define VIDEOATTRIBS_SYNCEN         0x00000004
3323 +#define VIDEOATTRIBS_DATAEN         0x00000008
3324 +#define VIDEOATTRIBS_CSYNC          0x00000010
3325 +#define VIDEOATTRIBS_VCPOL          0x00000020
3326 +#define VIDEOATTRIBS_HSPOL          0x00000040
3327 +#define VIDEOATTRIBS_BLKPOL         0x00000080
3328 +#define VIDEOATTRIBS_INVCLK         0x00000100
3329 +#define VIDEOATTRIBS_ACEN           0x00000200
3330 +#define VIDEOATTRIBS_LCDEN          0x00000400
3331 +#define VIDEOATTRIBS_CCIREN         0x00001000
3332 +#define VIDEOATTRIBS_PIFEN          0x00002000
3333 +#define VIDEOATTRIBS_INTEN          0x00004000
3334 +#define VIDEOATTRIBS_INT            0x00008000
3335 +#define VIDEOATTRIBS_INTRLC         0x00010000
3336 +#define VIDEOATTRIBS_EQUSER         0x00020000
3337 +#define VIDEOATTRIBS_DHORZ          0x00040000
3338 +#define VIDEOATTRIBS_DVERT          0x00080000
3339 +#define VIDEOATTRIBS_BKPXD          0x00100000
3340 +
3341 +#define VIDEOATTRIBS_SDSEL_MASK     0x00600000
3342 +#define VIDEOATTRIBS_SDSEL_SHIFT    21
3343 +
3344 +//-----------------------------------------------------------------------------
3345 +// HBLANKSTRTSTOP Register Definitions
3346 +//-----------------------------------------------------------------------------
3347 +#define HBLANKSTRTSTOP_STRT_MASK    0x07ff0000
3348 +#define HBLANKSTRTSTOP_STRT_SHIFT   0
3349 +#define HBLANKSTRTSTOP_STOP_MASK    0x000007ff
3350 +#define HBLANKSTRTSTOP_STOP_SHIFT   16
3351 +
3352 +//-----------------------------------------------------------------------------
3353 +// LINECARRY Register Definitions
3354 +//-----------------------------------------------------------------------------
3355 +#define LINECARRY_LCARY_MASK        0x000007ff
3356 +#define LINECARRY_LCARY_SHIFT       0
3357 +
3358 +//-----------------------------------------------------------------------------
3359 +// BLINKRATE Register Definitons
3360 +//-----------------------------------------------------------------------------
3361 +#define BLINKRATE_MASK              0x000000ff
3362 +
3363 +//-----------------------------------------------------------------------------
3364 +// BLINKMASK Register Definitons
3365 +//-----------------------------------------------------------------------------
3366 +#define BLINKMASK_MASK              0x00ffffff
3367 +
3368 +//-----------------------------------------------------------------------------
3369 +// VIDSCRNPAGE Register Definitons
3370 +//-----------------------------------------------------------------------------
3371 +#define VIDSCRNPAGE_PAGE_MASK       0x0ffffffc
3372 +
3373 +//-----------------------------------------------------------------------------
3374 +// VIDSCRNHPG Register Definitons
3375 +//-----------------------------------------------------------------------------
3376 +#define VIDSCRNHPG_MASK             0x0ffffffc
3377 +
3378 +//-----------------------------------------------------------------------------
3379 +// SCRNLINES Register Definitons
3380 +//-----------------------------------------------------------------------------
3381 +#define SCRNLINES_MASK              0x000007ff
3382 +
3383 +//-----------------------------------------------------------------------------
3384 +// LINELENGTH Register Definitons
3385 +//-----------------------------------------------------------------------------
3386 +#define LINELENGTH_MASK             0x000007ff
3387 +
3388 +//-----------------------------------------------------------------------------
3389 +// VLINESTEP Register Definitons
3390 +//-----------------------------------------------------------------------------
3391 +#define VLINESTEP_MASK              0x00000fff
3392 +
3393 +//-----------------------------------------------------------------------------
3394 +// RASTER_SWLOCK Register Definitons
3395 +//-----------------------------------------------------------------------------
3396 +#define RASTER_SWLOCK_MASK_WR      0xff
3397 +#define RASTER_SWLOCK_MASK_R       0x1
3398 +#define RASTER_SWLOCK_VALUE        0xaa
3399 +
3400 +//-----------------------------------------------------------------------------
3401 +// LUTCONT Register Definitions
3402 +//-----------------------------------------------------------------------------
3403 +#define LUTCONT_MASK                0x00000003
3404 +#define LUTCONT_SWTCH               0x00000001
3405 +#define LUTCONT_STAT                0x00000002
3406 +#define LUTCONT_RAM0                0
3407 +#define LUTCONT_RAM1                1
3408 +
3409 +//-----------------------------------------------------------------------------
3410 +// CURSORBLINK1 Register Definitions
3411 +//-----------------------------------------------------------------------------
3412 +#define CURSORBLINK1_MASK           0x00ffffff
3413 +//-----------------------------------------------------------------------------
3414 +// CURSORBLINK2 Register Definitions
3415 +//-----------------------------------------------------------------------------
3416 +#define CURSORBLINK2_MASK           0x00ffffff
3417 +
3418 +//-----------------------------------------------------------------------------
3419 +// CURSORBLINK Register Definitions
3420 +//-----------------------------------------------------------------------------
3421 +#define CURSORBLINK_MASK            0x000001ff
3422 +#define CURSORBLINK_RATE_MASK       0x000000ff
3423 +#define CURSORBLINK_RATE_SHIFT      0
3424 +#define CURSORBLINK_EN              0x00000100
3425 +
3426 +//-----------------------------------------------------------------------------
3427 +// BLINKPATRN Register Definitions
3428 +//-----------------------------------------------------------------------------
3429 +#define BLINKPATRN_MASK             0x00ffffff
3430 +
3431 +//-----------------------------------------------------------------------------
3432 +// PATRNMASK Register Definitions
3433 +//-----------------------------------------------------------------------------
3434 +#define PATRNMASK_MASK              0x00ffffff
3435 +
3436 +//-----------------------------------------------------------------------------
3437 +// BG_OFFSET Register Definitions
3438 +//-----------------------------------------------------------------------------
3439 +#define BG_OFFSET_MASK              0x00ffffff
3440 +
3441 +//-----------------------------------------------------------------------------
3442 +// PIXELMODE Register Definitions
3443 +//-----------------------------------------------------------------------------
3444 +#define PIXELMODE_P_MASK            0x00000007
3445 +#define PIXELMODE_P_MUX_DISABLE     0x00000000
3446 +#define PIXELMODE_P_4BPP            0x00000001
3447 +#define PIXELMODE_P_8BPP            0x00000002
3448 +#define PIXELMODE_P_16BPP           0x00000004
3449 +#define PIXELMODE_P_24BPP           0x00000006
3450 +#define PIXELMODE_P_32BPP           0x00000007
3451 +
3452 +#define PIXELMODE_S_MASK            0x00000038
3453 +#define PIXELMODE_S_1PPC            0x00000000
3454 +#define PIXELMODE_S_1PPCMAPPED      0x00000008
3455 +#define PIXELMODE_S_2PPC            0x00000010
3456 +#define PIXELMODE_S_4PPC            0x00000018
3457 +#define PIXELMODE_S_8PPC            0x00000020
3458 +#define PIXELMODE_S_223PPC          0x00000028
3459 +#define PIXELMODE_S_DS223PPC        0x00000030
3460 +#define PIXELMODE_S_UNDEF           0x00000038
3461 +
3462 +#define PIXELMODE_M_MASK            0x000003c0
3463 +#define PIXELMODE_M_NOBLINK         0x00000000
3464 +#define PIXELMODE_M_ANDBLINK        0x00000040
3465 +#define PIXELMODE_M_ORBLINK         0x00000080
3466 +#define PIXELMODE_M_XORBLINK        0x000000c0
3467 +#define PIXELMODE_M_BGBLINK         0x00000100
3468 +#define PIXELMODE_M_OFFSINGBLINK    0x00000140
3469 +#define PIXELMODE_M_OFF888BLINK     0x00000180
3470 +#define PIXELMODE_M_DIMBLINK        0x00000300
3471 +#define PIXELMODE_M_BRTBLINK        0x00000340
3472 +#define PIXELMODE_M_DIM888BLINK     0x00000380
3473 +#define PIXELMODE_M_BRT888BLINK     0x000003c0
3474 +
3475 +#define PIXELMODE_C_MASK            0x00003c00
3476 +#define PIXELMODE_C_LUT             0x00000000
3477 +#define PIXELMODE_C_888             0x00001000
3478 +#define PIXELMODE_C_565             0x00001400
3479 +#define PIXELMODE_C_555             0x00001800
3480 +#define PIXELMODE_C_GSLUT           0x00002000
3481 +
3482 +#define PIXELMODE_DSCAN             0x00004000
3483 +#define PIXELMODE_TRBSW             0x00008000
3484 +
3485 +//-----------------------------------------------------------------------------
3486 +//PARLLIFOUT Register Defintions
3487 +//-----------------------------------------------------------------------------
3488 +#define PARLLIFOUT_DAT_MASK         0x0000000f
3489 +#define PARLLIFOUT_DAT_SHIFT        0
3490 +#define PARLLIFOUT_RD               0x00000010
3491 +
3492 +//-----------------------------------------------------------------------------
3493 +//PARLLIFIN Register Defintions
3494 +//-----------------------------------------------------------------------------
3495 +#define PARLLIFIN_DAT_MASK          0x0000000f
3496 +#define PARLLIFIN_DAT_SHIFT         0
3497 +#define PARLLIFIN_CNT_MASK          0x000f0000
3498 +#define PARLLIFIN_CNT_SHIFT         16
3499 +#define PARLLIFIN_ESTRT_MASK        0x00f00000
3500 +#define PARLLIFIN_ESTRT_SHIFT       20
3501 +
3502 +//-----------------------------------------------------------------------------
3503 +// CURSORADRSTART Register Defintions
3504 +//-----------------------------------------------------------------------------
3505 +#define CURSOR_ADR_START_MASK         0xfffffffc
3506 +
3507 +//-----------------------------------------------------------------------------
3508 +// CURSORADRSTART Register Defintions
3509 +//-----------------------------------------------------------------------------
3510 +#define CURSOR_ADR_RESET_MASK         0xfffffffc
3511 +
3512 +//-----------------------------------------------------------------------------
3513 +// CURSORCOLOR1 Register Definitions
3514 +//-----------------------------------------------------------------------------
3515 +#define CURSORCOLOR1_MASK               0x00ffffff
3516 +//-----------------------------------------------------------------------------
3517 +// CURSORCOLOR2 Register Definitions
3518 +//-----------------------------------------------------------------------------
3519 +#define CURSORCOLOR2_MASK               0x00ffffff
3520 +
3521 +//-----------------------------------------------------------------------------
3522 +// CURSORXYLOC Register Definitions
3523 +//-----------------------------------------------------------------------------
3524 +#define CURSORXYLOC_MASK                0x07ff87ff
3525 +#define CURSORXYLOC_XLOC_MASK           0x000007ff
3526 +#define CURSORXYLOC_XLOC_SHIFT          0
3527 +#define CURSORXYLOC_CEN                 0x00008000
3528 +#define CURSORXYLOC_YLOC_MASK           0x07ff0000
3529 +#define CURSORXYLOC_YLOC_SHIFT          16
3530 +
3531 +//-----------------------------------------------------------------------------
3532 +// CURSOR_DSCAN_LH_YLOC Register Definitions
3533 +//-----------------------------------------------------------------------------
3534 +#define CURSOR_DSCAN_LH_YLOC_MASK       0x000087ff
3535 +
3536 +#define CURSOR_DSCAN_LH_YLOC_YLOC_MASK  0x000007ff
3537 +#define CURSOR_DSCAN_LH_YLOC_YLOC_SHIFT 0
3538 +#define CURSOR_DSCAN_LH_YLOC_CLHEN      0x00008000
3539 +
3540 +//-----------------------------------------------------------------------------
3541 +// CURSORSIZE Register Definitions
3542 +//-----------------------------------------------------------------------------
3543 +#define CURSORSIZE_MASK                 0x0000ffff
3544 +
3545 +#define CURSORSIZE_CWID_MASK            0x00000003
3546 +#define CURSORSIZE_CWID_SHIFT           0
3547 +#define CURSORSIZE_CWID_1_WORD          0
3548 +#define CURSORSIZE_CWID_2_WORD          1
3549 +#define CURSORSIZE_CWID_3_WORD          2
3550 +#define CURSORSIZE_CWID_4_WORD          3
3551 +
3552 +#define CURSORSIZE_CLINS_MASK           0x000000fc
3553 +#define CURSORSIZE_CLINS_SHIFT          2
3554 +
3555 +#define CURSORSIZE_CSTEP_MASK           0x00000300
3556 +#define CURSORSIZE_CSTEP_SHIFT          8
3557 +#define CURSORSIZE_CSTEP_1_WORD         0
3558 +#define CURSORSIZE_CSTEP_2_WORD         1
3559 +#define CURSORSIZE_CSTEP_3_WORD         2
3560 +#define CURSORSIZE_CSTEP_4_WORD         3
3561 +
3562 +#define CURSORSIZE_DLNS_MASK            0x0000fc00
3563 +#define CURSORSIZE_DLNS_SHIFT           10
3564 +
3565 +#endif /* _REGS_RASTER_H_ */