cns21xx: switch to 3.6.11
[openwrt.git] / target / linux / cns21xx / patches-3.3 / 302-cns21xx-mach-nsb3ast.patch
1 --- a/arch/arm/mach-cns21xx/Kconfig
2 +++ b/arch/arm/mach-cns21xx/Kconfig
3 @@ -2,6 +2,15 @@ if ARCH_CNS21XX
4  
5  menu "Cavium Networks CNS21xx based machines"
6  
7 +config MACH_NSB3AST
8 +       bool "AGESTAR NSB3AST support"
9 +       select CNS21XX_DEV_GEC
10 +       select CNS21XX_DEV_SPI_MASTER
11 +       select CNS21XX_DEV_USB
12 +       help
13 +         Say Y here if you intend to run this kernel on the
14 +         AGESTAR NSB3AST board.
15 +
16  config MACH_NS_K330
17         bool "NS-K330 NAS"
18         select CNS21XX_DEV_GEC
19 --- /dev/null
20 +++ b/arch/arm/mach-cns21xx/mach-nsb3ast.c
21 @@ -0,0 +1,173 @@
22 +/*
23 + *  AGESTAR NSB3AST board support
24 + *
25 + *  Copyright (c) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
26 + *
27 + *  This file is free software; you can redistribute it and/or modify
28 + *  it under the terms of the GNU General Public License, Version 2, as
29 + *  published by the Free Software Foundation.
30 + */
31 +
32 +#include <linux/kernel.h>
33 +#include <linux/init.h>
34 +#include <linux/mtd/mtd.h>
35 +#include <linux/mtd/map.h>
36 +#include <linux/mtd/partitions.h>
37 +#include <linux/spi/spi.h>
38 +#include <linux/spi/flash.h>
39 +#include <linux/platform_device.h>
40 +#include <linux/gpio.h>
41 +#include <linux/leds.h>
42 +#include <linux/gpio_keys.h>
43 +#include <linux/input.h>
44 +
45 +#include <asm/setup.h>
46 +#include <asm/mach-types.h>
47 +#include <asm/mach/arch.h>
48 +#include <asm/mach/time.h>
49 +#include <mach/hardware.h>
50 +#include <mach/cns21xx.h>
51 +#include <mach/cns21xx_misc.h>
52 +
53 +#include "common.h"
54 +#include "dev-gec.h"
55 +
56 +static struct mtd_partition nsb3ast_partitions[] =  {
57 +       {
58 +               .name           = "armboot",
59 +               .offset         = 0x0,
60 +               .size           = 0x040000,
61 +               .mask_flags     = MTD_WRITEABLE,
62 +       }, {
63 +               .name           = "kernel",
64 +               .offset         = 0x040000,
65 +               .size           = 0x100000,
66 +       }, {
67 +               .name           = "rootfs",
68 +               .offset         = 0x140000,
69 +               .size           = 0x6c0000,
70 +       }, {
71 +               .name           = "firmware",
72 +               .offset         = 0x040000,
73 +               .size           = 0x7c0000,
74 +       }, {
75 +               .name           = "wholeflash",
76 +               .offset         = 0x0,
77 +               .size           = 0x800000,
78 +               .mask_flags     = MTD_WRITEABLE,
79 +       },
80 +};
81 +
82 +static struct flash_platform_data nsb3ast_flash_data = {
83 +        .parts          = nsb3ast_partitions,
84 +        .nr_parts       = ARRAY_SIZE(nsb3ast_partitions),
85 +};
86 +
87 +static struct spi_board_info nsb3ast_spi_board_info[] = {
88 +       {
89 +               .bus_num        = 0,
90 +               .chip_select    = 0,
91 +               .max_speed_hz   = 25000000,
92 +               .modalias       = "m25p80",
93 +               .platform_data  = &nsb3ast_flash_data,
94 +       }
95 +};
96 +
97 +static struct gpio_led nsb3ast_gpio_leds[] = {
98 +       {
99 +               .name           = "nsb3ast:red:d1",
100 +               .gpio           = 15,
101 +               .active_low     = 1,
102 +       }, {
103 +               .name           = "nsb3ast:amber:eth",
104 +               .gpio           = 22,
105 +               .active_low     = 1,
106 +       }
107 +};
108 +
109 +static struct gpio_led_platform_data nsb3ast_gpio_leds_data = {
110 +       .num_leds               = ARRAY_SIZE(nsb3ast_gpio_leds),
111 +       .leds                   = nsb3ast_gpio_leds,
112 +};
113 +
114 +static struct platform_device nsb3ast_gpio_leds_device = {
115 +       .name                   = "leds-gpio",
116 +       .id                     = -1,
117 +       .dev.platform_data      = &nsb3ast_gpio_leds_data,
118 +};
119 +
120 +static struct gpio_keys_button nsb3ast_gpio_keys[] = {
121 +       {
122 +               .code           = KEY_RESTART,
123 +               .gpio           = 0,
124 +               .desc           = "Reset Button",
125 +               .active_low     = 1,
126 +       },
127 +       {
128 +               .code           = BTN_0,
129 +               .gpio           = 2,
130 +               .desc           = "USB Button",
131 +               .active_low     = 0,
132 +       },
133 +};
134 +
135 +static struct gpio_keys_platform_data nsb3ast_gpio_keys_data = {
136 +       .buttons        = nsb3ast_gpio_keys,
137 +       .nbuttons       = ARRAY_SIZE(nsb3ast_gpio_keys),
138 +};
139 +
140 +static struct platform_device nsb3ast_gpio_keys_device = {
141 +       .name           = "gpio-keys",
142 +       .id             = -1,
143 +       .num_resources  = 0,
144 +       .dev            = {
145 +               .platform_data  = &nsb3ast_gpio_keys_data,
146 +       },
147 +};
148 +
149 +static void __init nsb3ast_fixup(struct tag *tags, char **cmdline,
150 +                                struct meminfo *mi)
151 +{
152 +       struct tag *t;
153 +
154 +       /* The board has 32MB of RAM mapped at 0. */
155 +       mi->nr_banks = 1;
156 +       mi->bank[0].start = 0;
157 +       mi->bank[0].size = SZ_32M;
158 +
159 +       for (t = tags; t->hdr.size; t = tag_next(t)) {
160 +               switch (t->hdr.tag) {
161 +               case ATAG_CORE:
162 +                       if (t->u.core.rootdev == 255)
163 +                               t->u.core.rootdev = 0;
164 +                       break;
165 +               }
166 +       }
167 +}
168 +
169 +static void __init nsb3ast_init(void)
170 +{
171 +       cns21xx_gpio_init();
172 +       cns21xx_register_uart0();
173 +       cns21xx_register_uart1();
174 +       cns21xx_register_wdt();
175 +       cns21xx_register_usb();
176 +       cns21xx_register_spi_master(-1, nsb3ast_spi_board_info,
177 +                                   ARRAY_SIZE(nsb3ast_spi_board_info));
178 +
179 +       cns21xx_gec_data.phy_type = CNS21XX_GEC_PHY_TYPE_INTERNAL;
180 +       cns21xx_register_gec();
181 +
182 +       HAL_MISC_DISABLE_LED012_PINS();
183 +       platform_device_register(&nsb3ast_gpio_leds_device);
184 +       platform_device_register(&nsb3ast_gpio_keys_device);
185 +}
186 +
187 +MACHINE_START(NSB3AST, "AGESTAR NSB3AST")
188 +       .fixup          = nsb3ast_fixup,
189 +       .map_io         = cns21xx_map_io,
190 +       .init_irq       = cns21xx_init_irq,
191 +       .timer          = &cns21xx_timer,
192 +       .init_machine   = nsb3ast_init,
193 +       .restart        = cns21xx_restart,
194 +MACHINE_END
195 --- a/arch/arm/mach-cns21xx/Makefile
196 +++ b/arch/arm/mach-cns21xx/Makefile
197 @@ -13,3 +13,4 @@ obj-$(CONFIG_CNS21XX_DEV_SPI_MASTER)  +=
198  
199  # machine specific files
200  obj-$(CONFIG_MACH_NS_K330)             += mach-ns-k330.o
201 +obj-$(CONFIG_MACH_NSB3AST)             += mach-nsb3ast.o