31d210b4fc43dfe73f352dd0945746ed5613e43e
[openwrt.git] / target / linux / cns21xx / patches-3.3 / 203-cns21xx-add-spi-master-device.patch
1 --- /dev/null
2 +++ b/arch/arm/mach-cns21xx/dev-spi-master.c
3 @@ -0,0 +1,83 @@
4 +/*
5 + *  Copyright (c) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
6 + *
7 + *  This file is free software; you can redistribute it and/or modify
8 + *  it under the terms of the GNU General Public License, Version 2, as
9 + *  published by the Free Software Foundation.
10 + */
11 +
12 +#include <linux/kernel.h>
13 +#include <linux/init.h>
14 +#include <linux/spi/spi.h>
15 +#include <linux/dma-mapping.h>
16 +#include <linux/platform_device.h>
17 +
18 +#include <mach/hardware.h>
19 +#include <mach/cns21xx.h>
20 +#include <mach/cns21xx_misc.h>
21 +#include <mach/cns21xx_powermgmt.h>
22 +#include <mach/irqs.h>
23 +
24 +#include "common.h"
25 +
26 +static u64 spi_dmamask = DMA_BIT_MASK(32);
27 +static struct resource cns21xx_spi_resources[] = {
28 +       [0] = {
29 +               .start  = CNS21XX_SPI_BASE,
30 +               .end    = CNS21XX_SPI_BASE + SZ_4K - 1,
31 +               .flags  = IORESOURCE_MEM,
32 +       },
33 +       [1] = {
34 +               .start  = CNS21XX_IRQ_SPI,
35 +               .end    = CNS21XX_IRQ_SPI,
36 +               .flags  = IORESOURCE_IRQ,
37 +       },
38 +};
39 +
40 +static struct platform_device cns21xx_spi_master_device = {
41 +       .name           = "cns21xx-spi",
42 +       .id             = -1,
43 +       .dev            = {
44 +               .dma_mask               = &spi_dmamask,
45 +               .coherent_dma_mask      = DMA_BIT_MASK(32),
46 +       },
47 +       .resource       = cns21xx_spi_resources,
48 +       .num_resources  = ARRAY_SIZE(cns21xx_spi_resources),
49 +};
50 +
51 +void __init cns21xx_register_spi_master(int id, struct spi_board_info *info,
52 +                                       unsigned int n)
53 +{
54 +       unsigned int i;
55 +
56 +       /* Enable SPI pins */
57 +       HAL_MISC_ENABLE_SPIDR_PINS();
58 +       HAL_MISC_ENABLE_SPICLK_PINS();
59 +       for (i = 0; i < n; i++) {
60 +               switch (info[i].chip_select) {
61 +               case 0:
62 +                       HAL_MISC_ENABLE_SPICSN0_PINS();
63 +                       break;
64 +               case 1:
65 +                       HAL_MISC_ENABLE_SPICSN1_PINS();
66 +                       break;
67 +               case 2:
68 +                       HAL_MISC_ENABLE_SPICSN2_PINS();
69 +                       break;
70 +               case 3:
71 +                       HAL_MISC_ENABLE_SPICSN3_PINS();
72 +                       break;
73 +               }
74 +       }
75 +
76 +       /* Disable SPI serial flash access through 0x30000000 region */
77 +       HAL_MISC_DISABLE_SPI_SERIAL_FLASH_BANK_ACCESS();
78 +
79 +       /* Enable SPI clock */
80 +       HAL_PWRMGT_ENABLE_SPI_CLOCK();
81 +
82 +       cns21xx_spi_master_device.id = id;
83 +
84 +       spi_register_board_info(info, n);
85 +       platform_device_register(&cns21xx_spi_master_device);
86 +}
87 --- a/arch/arm/mach-cns21xx/Kconfig
88 +++ b/arch/arm/mach-cns21xx/Kconfig
89 @@ -6,4 +6,7 @@ endmenu
90  config CNS21XX_DEV_USB
91         def_bool n
92  
93 +config CNS21XX_DEV_SPI_MASTER
94 +       def_bool n
95 +
96  endif
97 --- a/arch/arm/mach-cns21xx/Makefile
98 +++ b/arch/arm/mach-cns21xx/Makefile
99 @@ -8,6 +8,7 @@ obj-y           := core.o devices.o gpio.o irq.o
100  
101  # devices
102  obj-$(CONFIG_CNS21XX_DEV_USB)          += dev-usb.o
103 +obj-$(CONFIG_CNS21XX_DEV_SPI_MASTER)   += dev-spi-master.o
104  
105  # machine specific files
106  
107 --- a/arch/arm/mach-cns21xx/common.h
108 +++ b/arch/arm/mach-cns21xx/common.h
109 @@ -22,4 +22,8 @@ int cns21xx_register_uart1(void);
110  int cns21xx_register_usb(void);
111  int cns21xx_register_wdt(void);
112  
113 +struct spi_board_info;
114 +void __init cns21xx_register_spi_master(int id, struct spi_board_info *info,
115 +                                       unsigned int n);
116 +
117  #endif /* _MACH_CNS21XX_COMMON_H */