target/linux/brcm63xx/patches-3.9/407-bcm63xx_enet-add-support-for-bcm6368-internal-ethern.patch

   1 From d16c1a1410f6c35a835baaa445774b4421db6c96 Mon Sep 17 00:00:00 2001
   2 From: Maxime Bizon <mbizon@freebox.fr>
   3 Date: Sat, 23 Jan 2010 03:01:02 +0100
   4 Subject: [PATCH 8/8] bcm63xx_enet: add support for bcm6368 internal ethernet
   5  switch.
   6
   7 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
   8 ---
   9  arch/mips/bcm63xx/boards/board_bcm963xx.c          |    4 +
  10  arch/mips/bcm63xx/dev-enet.c                       |  113 ++-
  11  .../include/asm/mach-bcm63xx/bcm63xx_dev_enet.h    |   28 +
  12  arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h  |   50 +
  13  .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h |    2 +
  14  drivers/net/ethernet/broadcom/bcm63xx_enet.c       | 1018 +++++++++++++++++++-
  15  drivers/net/ethernet/broadcom/bcm63xx_enet.h       |   75 ++
  16  8 files changed, 1239 insertions(+), 66 deletions(-)
  17
  18 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
  19 +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
  20 @@ -924,6 +924,10 @@ int __init board_register_devices(void)
  21             !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
  22                 bcm63xx_enet_register(1, &board.enet1);
  23
  24 +       if (board.has_enetsw &&
  25 +           !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
  26 +               bcm63xx_enetsw_register(&board.enetsw);
  27 +
  28         if (board.has_usbd)
  29                 bcm63xx_usbd_register(&board.usbd);
  30
  31 --- a/arch/mips/bcm63xx/dev-enet.c
  32 +++ b/arch/mips/bcm63xx/dev-enet.c
  33 @@ -104,6 +104,64 @@ static struct platform_device bcm63xx_en
  34         },
  35  };
  36
  37 +static struct resource enetsw_res[] = {
  38 +       {
  39 +               /* start & end filled at runtime */
  40 +               .flags          = IORESOURCE_MEM,
  41 +       },
  42 +       {
  43 +               /* start filled at runtime */
  44 +               .flags          = IORESOURCE_IRQ,
  45 +       },
  46 +       {
  47 +               /* start filled at runtime */
  48 +               .flags          = IORESOURCE_IRQ,
  49 +       },
  50 +};
  51 +
  52 +static struct bcm63xx_enetsw_platform_data enetsw_pd;
  53 +
  54 +static struct platform_device bcm63xx_enetsw_device = {
  55 +       .name           = "bcm63xx_enetsw",
  56 +       .num_resources  = ARRAY_SIZE(enetsw_res),
  57 +       .resource       = enetsw_res,
  58 +       .dev            = {
  59 +               .platform_data = &enetsw_pd,
  60 +       },
  61 +};
  62 +
  63 +static int __init register_shared(void)
  64 +{
  65 +       int ret, chan_count;
  66 +
  67 +       if (shared_device_registered)
  68 +               return 0;
  69 +
  70 +       shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
  71 +       shared_res[0].end = shared_res[0].start;
  72 +       shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
  73 +
  74 +       if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
  75 +               chan_count = 32;
  76 +       else
  77 +               chan_count = 8;
  78 +
  79 +       shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
  80 +       shared_res[1].end = shared_res[1].start;
  81 +       shared_res[1].end += RSET_ENETDMAC_SIZE(chan_count)  - 1;
  82 +
  83 +       shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
  84 +       shared_res[2].end = shared_res[2].start;
  85 +       shared_res[2].end += RSET_ENETDMAS_SIZE(chan_count)  - 1;
  86 +
  87 +       ret = platform_device_register(&bcm63xx_enet_shared_device);
  88 +       if (ret)
  89 +               return ret;
  90 +       shared_device_registered = 1;
  91 +
  92 +       return 0;
  93 +}
  94 +
  95  int __init bcm63xx_enet_register(int unit,
  96                                  const struct bcm63xx_enet_platform_data *pd)
  97  {
  98 @@ -117,24 +175,9 @@ int __init bcm63xx_enet_register(int uni
  99         if (unit == 1 && BCMCPU_IS_6338())
 100                 return -ENODEV;
 101
 102 -       if (!shared_device_registered) {
 103 -               shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA);
 104 -               shared_res[0].end = shared_res[0].start;
 105 -               shared_res[0].end += (RSET_ENETDMA_SIZE)  - 1;
 106 -
 107 -               shared_res[1].start = bcm63xx_regset_address(RSET_ENETDMAC);
 108 -               shared_res[1].end = shared_res[1].start;
 109 -               shared_res[1].end += RSET_ENETDMAC_SIZE(16)  - 1;
 110 -
 111 -               shared_res[2].start = bcm63xx_regset_address(RSET_ENETDMAS);
 112 -               shared_res[2].end = shared_res[2].start;
 113 -               shared_res[2].end += RSET_ENETDMAS_SIZE(16)  - 1;
 114 -
 115 -               ret = platform_device_register(&bcm63xx_enet_shared_device);
 116 -               if (ret)
 117 -                       return ret;
 118 -               shared_device_registered = 1;
 119 -       }
 120 +       ret = register_shared();
 121 +       if (ret)
 122 +               return ret;
 123
 124         if (unit == 0) {
 125                 enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0);
 126 @@ -175,3 +218,37 @@ int __init bcm63xx_enet_register(int uni
 127                 return ret;
 128         return 0;
 129  }
 130 +
 131 +int __init
 132 +bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd)
 133 +{
 134 +       int ret;
 135 +
 136 +       if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
 137 +               return -ENODEV;
 138 +
 139 +       ret = register_shared();
 140 +       if (ret)
 141 +               return ret;
 142 +
 143 +       enetsw_res[0].start = bcm63xx_regset_address(RSET_ENETSW);
 144 +       enetsw_res[0].end = enetsw_res[0].start;
 145 +       enetsw_res[0].end += RSET_ENETSW_SIZE - 1;
 146 +       enetsw_res[1].start = bcm63xx_get_irq_number(IRQ_ENETSW_RXDMA0);
 147 +       enetsw_res[2].start = bcm63xx_get_irq_number(IRQ_ENETSW_TXDMA0);
 148 +       if (!enetsw_res[2].start)
 149 +               enetsw_res[2].start = -1;
 150 +
 151 +       memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
 152 +
 153 +       if (BCMCPU_IS_6328())
 154 +               enetsw_pd.num_ports = ENETSW_PORTS_6328;
 155 +       else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
 156 +               enetsw_pd.num_ports = ENETSW_PORTS_6368;
 157 +
 158 +       ret = platform_device_register(&bcm63xx_enetsw_device);
 159 +       if (ret)
 160 +               return ret;
 161 +
 162 +       return 0;
 163 +}
 164 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
 165 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
 166 @@ -39,7 +39,35 @@ struct bcm63xx_enet_platform_data {
 167                                             int phy_id, int reg, int val));
 168  };
 169
 170 +/*
 171 + * on board ethernet switch platform data
 172 + */
 173 +#define ENETSW_MAX_PORT        8
 174 +#define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
 175 +#define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
 176 +
 177 +#define ENETSW_RGMII_PORT0     4
 178 +
 179 +struct bcm63xx_enetsw_port {
 180 +       int             used;
 181 +       int             phy_id;
 182 +
 183 +       int             bypass_link;
 184 +       int             force_speed;
 185 +       int             force_duplex_full;
 186 +
 187 +       const char      *name;
 188 +};
 189 +
 190 +struct bcm63xx_enetsw_platform_data {
 191 +       char mac_addr[ETH_ALEN];
 192 +       int num_ports;
 193 +       struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
 194 +};
 195 +
 196  int __init bcm63xx_enet_register(int unit,
 197                                  const struct bcm63xx_enet_platform_data *pd);
 198
 199 +int bcm63xx_enetsw_register(const struct bcm63xx_enetsw_platform_data *pd);
 200 +
 201  #endif /* ! BCM63XX_DEV_ENET_H_ */
 202 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 203 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 204 @@ -832,10 +832,60 @@
 205   * _REG relative to RSET_ENETSW
 206   *************************************************************************/
 207
 208 +/* Port traffic control */
 209 +#define ENETSW_PTCTRL_REG(x)           (0x0 + (x))
 210 +#define ENETSW_PTCTRL_RXDIS_MASK       (1 << 0)
 211 +#define ENETSW_PTCTRL_TXDIS_MASK       (1 << 1)
 212 +
 213 +/* Switch mode register */
 214 +#define ENETSW_SWMODE_REG              (0xb)
 215 +#define ENETSW_SWMODE_FWD_EN_MASK      (1 << 1)
 216 +
 217 +/* IMP override Register */
 218 +#define ENETSW_IMPOV_REG               (0xe)
 219 +#define ENETSW_IMPOV_FORCE_MASK                (1 << 7)
 220 +#define ENETSW_IMPOV_TXFLOW_MASK       (1 << 5)
 221 +#define ENETSW_IMPOV_RXFLOW_MASK       (1 << 4)
 222 +#define ENETSW_IMPOV_1000_MASK         (1 << 3)
 223 +#define ENETSW_IMPOV_100_MASK          (1 << 2)
 224 +#define ENETSW_IMPOV_FDX_MASK          (1 << 1)
 225 +#define ENETSW_IMPOV_LINKUP_MASK       (1 << 0)
 226 +
 227 +/* Port override Register */
 228 +#define ENETSW_PORTOV_REG(x)           (0x58 + (x))
 229 +#define ENETSW_PORTOV_ENABLE_MASK      (1 << 6)
 230 +#define ENETSW_PORTOV_TXFLOW_MASK      (1 << 5)
 231 +#define ENETSW_PORTOV_RXFLOW_MASK      (1 << 4)
 232 +#define ENETSW_PORTOV_1000_MASK                (1 << 3)
 233 +#define ENETSW_PORTOV_100_MASK         (1 << 2)
 234 +#define ENETSW_PORTOV_FDX_MASK         (1 << 1)
 235 +#define ENETSW_PORTOV_LINKUP_MASK      (1 << 0)
 236 +
 237 +/* MDIO control register */
 238 +#define ENETSW_MDIOC_REG               (0xb0)
 239 +#define ENETSW_MDIOC_EXT_MASK          (1 << 16)
 240 +#define ENETSW_MDIOC_REG_SHIFT         20
 241 +#define ENETSW_MDIOC_PHYID_SHIFT       25
 242 +#define ENETSW_MDIOC_RD_MASK           (1 << 30)
 243 +#define ENETSW_MDIOC_WR_MASK           (1 << 31)
 244 +
 245 +/* MDIO data register */
 246 +#define ENETSW_MDIOD_REG               (0xb4)
 247 +
 248 +/* Global Management Configuration Register */
 249 +#define ENETSW_GMCR_REG                        (0x200)
 250 +#define ENETSW_GMCR_RST_MIB_MASK       (1 << 0)
 251 +
 252  /* MIB register */
 253  #define ENETSW_MIB_REG(x)              (0x2800 + (x) * 4)
 254  #define ENETSW_MIB_REG_COUNT           47
 255
 256 +/* Jumbo control register port mask register */
 257 +#define ENETSW_JMBCTL_PORT_REG         (0x4004)
 258 +
 259 +/* Jumbo control mib good frame register */
 260 +#define ENETSW_JMBCTL_MAXSIZE_REG      (0x4008)
 261 +
 262
 263  /*************************************************************************
 264   * _REG relative to RSET_OHCI_PRIV
 265 --- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
 266 +++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
 267 @@ -25,6 +25,7 @@ struct board_info {
 268         /* enabled feature/device */
 269         unsigned int    has_enet0:1;
 270         unsigned int    has_enet1:1;
 271 +       unsigned int    has_enetsw:1;
 272         unsigned int    has_pci:1;
 273         unsigned int    has_pccard:1;
 274         unsigned int    has_ohci0:1;
 275 @@ -37,6 +38,7 @@ struct board_info {
 276         /* ethernet config */
 277         struct bcm63xx_enet_platform_data enet0;
 278         struct bcm63xx_enet_platform_data enet1;
 279 +       struct bcm63xx_enetsw_platform_data enetsw;
 280
 281         /* USB config */
 282         struct bcm63xx_usbd_platform_data usbd;
 283 --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
 284 +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
 285 @@ -59,6 +59,49 @@ static inline void enet_writel(struct bc
 286  }
 287
 288  /*
 289 + * io helpers to access switch registers
 290 + */
 291 +static inline u32 enetsw_readl(struct bcm_enet_priv *priv, u32 off)
 292 +{
 293 +       /* printk("enetsw_readl at %p\n", priv->base + off); */
 294 +       return bcm_readl(priv->base + off);
 295 +}
 296 +
 297 +static inline void enetsw_writel(struct bcm_enet_priv *priv,
 298 +                                u32 val, u32 off)
 299 +{
 300 +       /* printk("enetsw_writel %08x at %p\n", val, priv->base + off); */
 301 +       bcm_writel(val, priv->base + off);
 302 +}
 303 +
 304 +static inline u16 enetsw_readw(struct bcm_enet_priv *priv, u32 off)
 305 +{
 306 +       /* printk("enetsw_readw  at %p\n", priv->base + off); */
 307 +       return bcm_readw(priv->base + off);
 308 +}
 309 +
 310 +static inline void enetsw_writew(struct bcm_enet_priv *priv,
 311 +                                u16 val, u32 off)
 312 +{
 313 +       /* printk("enetsw_writew %04x at %p\n", val, priv->base + off); */
 314 +       bcm_writew(val, priv->base + off);
 315 +}
 316 +
 317 +static inline u8 enetsw_readb(struct bcm_enet_priv *priv, u32 off)
 318 +{
 319 +       /* printk("enetsw_readb  at %p\n", priv->base + off); */
 320 +       return bcm_readb(priv->base + off);
 321 +}
 322 +
 323 +static inline void enetsw_writeb(struct bcm_enet_priv *priv,
 324 +                                u8 val, u32 off)
 325 +{
 326 +       /* printk("enetsw_writeb %02x at %p\n", val, priv->base + off); */
 327 +       bcm_writeb(val, priv->base + off);
 328 +}
 329 +
 330 +
 331 +/*
 332   * io helpers to access shared registers
 333   */
 334  static inline u32 enet_dma_readl(struct bcm_enet_priv *priv, u32 off)
 335 @@ -218,7 +261,6 @@ static int bcm_enet_refill_rx(struct net
 336                         if (!skb)
 337                                 break;
 338                         priv->rx_skb[desc_idx] = skb;
 339 -
 340                         p = dma_map_single(&priv->pdev->dev, skb->data,
 341                                            priv->rx_skb_size,
 342                                            DMA_FROM_DEVICE);
 343 @@ -321,7 +363,8 @@ static int bcm_enet_receive_queue(struct
 344                 }
 345
 346                 /* recycle packet if it's marked as bad */
 347 -               if (unlikely(len_stat & DMADESC_ERR_MASK)) {
 348 +               if (!priv->enet_is_sw &&
 349 +                   unlikely(len_stat & DMADESC_ERR_MASK)) {
 350                         dev->stats.rx_errors++;
 351
 352                         if (len_stat & DMADESC_OVSIZE_MASK)
 353 @@ -552,6 +595,26 @@ static int bcm_enet_start_xmit(struct sk
 354                 goto out_unlock;
 355         }
 356
 357 +       /* pad small packets sent on a switch device */
 358 +       if (priv->enet_is_sw && skb->len < 64) {
 359 +               int needed = 64 - skb->len;
 360 +               char *data;
 361 +
 362 +               if (unlikely(skb_tailroom(skb) < needed)) {
 363 +                       struct sk_buff *nskb;
 364 +
 365 +                       nskb = skb_copy_expand(skb, 0, needed, GFP_ATOMIC);
 366 +                       if (!nskb) {
 367 +                               ret = NETDEV_TX_BUSY;
 368 +                               goto out_unlock;
 369 +                       }
 370 +                       dev_kfree_skb(skb);
 371 +                       skb = nskb;
 372 +               }
 373 +               data = skb_put(skb, needed);
 374 +               memset(data, 0, needed);
 375 +       }
 376 +
 377         /* point to the next available desc */
 378         desc = &priv->tx_desc_cpu[priv->tx_curr_desc];
 379         priv->tx_skb[priv->tx_curr_desc] = skb;
 380 @@ -929,9 +992,9 @@ static int bcm_enet_open(struct net_devi
 381         enet_writel(priv, priv->hw_mtu, ENET_TXMAXLEN_REG);
 382
 383         /* set dma maximum burst len */
 384 -       enet_dmac_writel(priv, BCMENET_DMA_MAXBURST,
 385 +       enet_dmac_writel(priv, priv->dma_maxburst,
 386                          ENETDMAC_MAXBURST_REG(priv->rx_chan));
 387 -       enet_dmac_writel(priv, BCMENET_DMA_MAXBURST,
 388 +       enet_dmac_writel(priv, priv->dma_maxburst,
 389                          ENETDMAC_MAXBURST_REG(priv->tx_chan));
 390
 391         /* set correct transmit fifo watermark */
 392 @@ -1528,7 +1591,7 @@ static int compute_hw_mtu(struct bcm_ene
 393          * it's appended
 394          */
 395         priv->rx_skb_size = ALIGN(actual_mtu + ETH_FCS_LEN,
 396 -                                 BCMENET_DMA_MAXBURST * 4);
 397 +                                 priv->dma_maxburst * 4);
 398         return 0;
 399  }
 400
 401 @@ -1635,6 +1698,9 @@ static int bcm_enet_probe(struct platfor
 402                 return -ENOMEM;
 403         priv = netdev_priv(dev);
 404
 405 +       priv->enet_is_sw = false;
 406 +       priv->dma_maxburst = BCMENET_DMA_MAXBURST;
 407 +
 408         ret = compute_hw_mtu(priv, dev->mtu);
 409         if (ret)
 410                 goto out;
 411 @@ -1899,65 +1965,928 @@ struct platform_driver bcm63xx_enet_driv
 412  };
 413
 414  /*
 415 - * reserve & remap memory space shared between all macs
 416 + * switch mii access callbacks
 417   */
 418 -static int bcm_enet_shared_probe(struct platform_device *pdev)
 419 +static int bcmenet_sw_mdio_read(struct bcm_enet_priv *priv,
 420 +                               int ext, int phy_id, int location)
 421  {
 422 -       struct resource *res;
 423 -       void __iomem *p[3];
 424 -       unsigned int i;
 425 +       u32 reg;
 426 +       int ret;
 427
 428 -       memset(bcm_enet_shared_base, 0, sizeof(bcm_enet_shared_base));
 429 +       spin_lock_bh(&priv->enetsw_mdio_lock);
 430 +       enetsw_writel(priv, 0, ENETSW_MDIOC_REG);
 431
 432 -       for (i = 0; i < 3; i++) {
 433 -               res = platform_get_resource(pdev, IORESOURCE_MEM, i);
 434 -               if (!res)
 435 -                       return -EINVAL;
 436 +       reg = ENETSW_MDIOC_RD_MASK |
 437 +               (phy_id << ENETSW_MDIOC_PHYID_SHIFT) |
 438 +               (location << ENETSW_MDIOC_REG_SHIFT);
 439 +
 440 +       if (ext)
 441 +               reg |= ENETSW_MDIOC_EXT_MASK;
 442 +
 443 +       enetsw_writel(priv, reg, ENETSW_MDIOC_REG);
 444 +       udelay(50);
 445 +       ret = enetsw_readw(priv, ENETSW_MDIOD_REG);
 446 +       spin_unlock_bh(&priv->enetsw_mdio_lock);
 447 +       return ret;
 448 +}
 449
 450 -               p[i] = devm_request_and_ioremap(&pdev->dev, res);
 451 -               if (!p[i])
 452 -                       return -ENOMEM;
 453 +static void bcmenet_sw_mdio_write(struct bcm_enet_priv *priv,
 454 +                                int ext, int phy_id, int location,
 455 +                                uint16_t data)
 456 +{
 457 +       u32 reg;
 458
 459 -               bcm_enet_shared_base[i] = p;
 460 -       }
 461 +       spin_lock_bh(&priv->enetsw_mdio_lock);
 462 +       enetsw_writel(priv, 0, ENETSW_MDIOC_REG);
 463
 464 -       memcpy(bcm_enet_shared_base, p, sizeof(bcm_enet_shared_base));
 465 +       reg = ENETSW_MDIOC_WR_MASK |
 466 +               (phy_id << ENETSW_MDIOC_PHYID_SHIFT) |
 467 +               (location << ENETSW_MDIOC_REG_SHIFT);
 468
 469 -       return 0;
 470 -}
 471 +       if (ext)
 472 +               reg |= ENETSW_MDIOC_EXT_MASK;
 473
 474 -static int bcm_enet_shared_remove(struct platform_device *pdev)
 475 -{
 476 -       return 0;
 477 +       reg |= data;
 478 +
 479 +       enetsw_writel(priv, reg, ENETSW_MDIOC_REG);
 480 +       udelay(50);
 481 +       spin_unlock_bh(&priv->enetsw_mdio_lock);
 482  }
 483
 484  /*
 485 - * this "shared" driver is needed because both macs share a single
 486 - * address space
 487 + * enet sw PHY polling
 488   */
 489 -struct platform_driver bcm63xx_enet_shared_driver = {
 490 -       .probe  = bcm_enet_shared_probe,
 491 -       .remove = bcm_enet_shared_remove,
 492 -       .driver = {
 493 -               .name   = "bcm63xx_enet_shared",
 494 -               .owner  = THIS_MODULE,
 495 -       },
 496 -};
 497 +static void swphy_poll_timer(unsigned long data)
 498 +{
 499 +       struct bcm_enet_priv *priv = (struct bcm_enet_priv *)data;
 500 +       unsigned int i;
 501 +
 502 +       for (i = 0; i < priv->num_ports; i++) {
 503 +               struct bcm63xx_enetsw_port *port;
 504 +               int val, j, up, advertise, lpa, lpa2, speed, duplex, media;
 505 +               int external_phy = bcm_enet_port_is_rgmii(i);
 506 +               u8 override;
 507 +
 508 +               port = &priv->used_ports[i];
 509 +               if (!port->used)
 510 +                       continue;
 511 +
 512 +               if (port->bypass_link)
 513 +                       continue;
 514 +
 515 +               /* dummy read to clear */
 516 +               for (j = 0; j < 2; j++)
 517 +                       val = bcmenet_sw_mdio_read(priv, external_phy,
 518 +                                                  port->phy_id, MII_BMSR);
 519 +
 520 +               if (val == 0xffff)
 521 +                       continue;
 522 +
 523 +               up = (val & BMSR_LSTATUS) ? 1 : 0;
 524 +               if (!(up ^ priv->sw_port_link[i]))
 525 +                       continue;
 526 +
 527 +               priv->sw_port_link[i] = up;
 528 +
 529 +               /* link changed */
 530 +               if (!up) {
 531 +                       dev_info(&priv->pdev->dev, "link DOWN on %s\n",
 532 +                                port->name);
 533 +                       enetsw_writeb(priv, ENETSW_PORTOV_ENABLE_MASK,
 534 +                                     ENETSW_PORTOV_REG(i));
 535 +                       enetsw_writeb(priv, ENETSW_PTCTRL_RXDIS_MASK |
 536 +                                     ENETSW_PTCTRL_TXDIS_MASK,
 537 +                                     ENETSW_PTCTRL_REG(i));
 538 +                       continue;
 539 +               }
 540 +
 541 +               advertise = bcmenet_sw_mdio_read(priv, external_phy,
 542 +                                                port->phy_id, MII_ADVERTISE);
 543 +
 544 +               lpa = bcmenet_sw_mdio_read(priv, external_phy, port->phy_id,
 545 +                                          MII_LPA);
 546 +
 547 +               lpa2 = bcmenet_sw_mdio_read(priv, external_phy, port->phy_id,
 548 +                                           MII_STAT1000);
 549 +
 550 +               /* figure out media and duplex from advertise and LPA values */
 551 +               media = mii_nway_result(lpa & advertise);
 552 +               duplex = (media & ADVERTISE_FULL) ? 1 : 0;
 553 +               if (lpa2 & LPA_1000FULL)
 554 +                       duplex = 1;
 555 +
 556 +               if (lpa2 & (LPA_1000FULL | LPA_1000HALF))
 557 +                       speed = 1000;
 558 +               else {
 559 +                       if (media & (ADVERTISE_100FULL | ADVERTISE_100HALF))
 560 +                               speed = 100;
 561 +                       else
 562 +                               speed = 10;
 563 +               }
 564 +
 565 +               dev_info(&priv->pdev->dev,
 566 +                        "link UP on %s, %dMbps, %s-duplex\n",
 567 +                        port->name, speed, duplex ? "full" : "half");
 568 +
 569 +               override = ENETSW_PORTOV_ENABLE_MASK |
 570 +                       ENETSW_PORTOV_LINKUP_MASK;
 571 +
 572 +               if (speed == 1000)
 573 +                       override |= ENETSW_IMPOV_1000_MASK;
 574 +               else if (speed == 100)
 575 +                       override |= ENETSW_IMPOV_100_MASK;
 576 +               if (duplex)
 577 +                       override |= ENETSW_IMPOV_FDX_MASK;
 578 +
 579 +               enetsw_writeb(priv, override, ENETSW_PORTOV_REG(i));
 580 +               enetsw_writeb(priv, 0, ENETSW_PTCTRL_REG(i));
 581 +       }
 582 +
 583 +       priv->swphy_poll.expires = jiffies + HZ;
 584 +       add_timer(&priv->swphy_poll);
 585 +}
 586
 587  /*
 588 - * entry point
 589 + * open callback, allocate dma rings & buffers and start rx operation
 590   */
 591 -static int __init bcm_enet_init(void)
 592 +static int bcm_enetsw_open(struct net_device *dev)
 593  {
 594 -       int ret;
 595 +       struct bcm_enet_priv *priv;
 596 +       struct device *kdev;
 597 +       int i, ret;
 598 +       unsigned int size;
 599 +       void *p;
 600 +       u32 val;
 601
 602 -       ret = platform_driver_register(&bcm63xx_enet_shared_driver);
 603 -       if (ret)
 604 -               return ret;
 605 +       priv = netdev_priv(dev);
 606 +       kdev = &priv->pdev->dev;
 607
 608 -       ret = platform_driver_register(&bcm63xx_enet_driver);
 609 +       /* mask all interrupts and request them */
 610 +       enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
 611 +       enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
 612 +
 613 +       ret = request_irq(priv->irq_rx, bcm_enet_isr_dma,
 614 +                         IRQF_DISABLED, dev->name, dev);
 615         if (ret)
 616 -               platform_driver_unregister(&bcm63xx_enet_shared_driver);
 617 +               goto out_freeirq;
 618 +
 619 +       if (priv->irq_tx != -1) {
 620 +               ret = request_irq(priv->irq_tx, bcm_enet_isr_dma,
 621 +                                 IRQF_DISABLED, dev->name, dev);
 622 +               if (ret)
 623 +                       goto out_freeirq_rx;
 624 +       }
 625 +
 626 +       /* allocate rx dma ring */
 627 +       size = priv->rx_ring_size * sizeof(struct bcm_enet_desc);
 628 +       p = dma_alloc_coherent(kdev, size, &priv->rx_desc_dma, GFP_KERNEL);
 629 +       if (!p) {
 630 +               dev_err(kdev, "cannot allocate rx ring %u\n", size);
 631 +               ret = -ENOMEM;
 632 +               goto out_freeirq_tx;
 633 +       }
 634 +
 635 +       memset(p, 0, size);
 636 +       priv->rx_desc_alloc_size = size;
 637 +       priv->rx_desc_cpu = p;
 638 +
 639 +       /* allocate tx dma ring */
 640 +       size = priv->tx_ring_size * sizeof(struct bcm_enet_desc);
 641 +       p = dma_alloc_coherent(kdev, size, &priv->tx_desc_dma, GFP_KERNEL);
 642 +       if (!p) {
 643 +               dev_err(kdev, "cannot allocate tx ring\n");
 644 +               ret = -ENOMEM;
 645 +               goto out_free_rx_ring;
 646 +       }
 647 +
 648 +       memset(p, 0, size);
 649 +       priv->tx_desc_alloc_size = size;
 650 +       priv->tx_desc_cpu = p;
 651 +
 652 +       priv->tx_skb = kzalloc(sizeof(struct sk_buff *) * priv->tx_ring_size,
 653 +                              GFP_KERNEL);
 654 +       if (!priv->tx_skb) {
 655 +               dev_err(kdev, "cannot allocate rx skb queue\n");
 656 +               ret = -ENOMEM;
 657 +               goto out_free_tx_ring;
 658 +       }
 659 +
 660 +       priv->tx_desc_count = priv->tx_ring_size;
 661 +       priv->tx_dirty_desc = 0;
 662 +       priv->tx_curr_desc = 0;
 663 +       spin_lock_init(&priv->tx_lock);
 664 +
 665 +       /* init & fill rx ring with skbs */
 666 +       priv->rx_skb = kzalloc(sizeof(struct sk_buff *) * priv->rx_ring_size,
 667 +                              GFP_KERNEL);
 668 +       if (!priv->rx_skb) {
 669 +               dev_err(kdev, "cannot allocate rx skb queue\n");
 670 +               ret = -ENOMEM;
 671 +               goto out_free_tx_skb;
 672 +       }
 673 +
 674 +       priv->rx_desc_count = 0;
 675 +       priv->rx_dirty_desc = 0;
 676 +       priv->rx_curr_desc = 0;
 677 +
 678 +       /* disable all ports */
 679 +       for (i = 0; i < priv->num_ports; i++) {
 680 +               enetsw_writeb(priv, ENETSW_PORTOV_ENABLE_MASK,
 681 +                             ENETSW_PORTOV_REG(i));
 682 +               enetsw_writeb(priv, ENETSW_PTCTRL_RXDIS_MASK |
 683 +                             ENETSW_PTCTRL_TXDIS_MASK,
 684 +                             ENETSW_PTCTRL_REG(i));
 685 +
 686 +               priv->sw_port_link[i] = 0;
 687 +       }
 688 +
 689 +       /* reset mib */
 690 +       val = enetsw_readb(priv, ENETSW_GMCR_REG);
 691 +       val |= ENETSW_GMCR_RST_MIB_MASK;
 692 +       enetsw_writeb(priv, val, ENETSW_GMCR_REG);
 693 +       mdelay(1);
 694 +       val &= ~ENETSW_GMCR_RST_MIB_MASK;
 695 +       enetsw_writeb(priv, val, ENETSW_GMCR_REG);
 696 +       mdelay(1);
 697 +
 698 +       /* force CPU port state */
 699 +       val = enetsw_readb(priv, ENETSW_IMPOV_REG);
 700 +       val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
 701 +       enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
 702 +
 703 +       /* enable switch forward engine */
 704 +       val = enetsw_readb(priv, ENETSW_SWMODE_REG);
 705 +       val |= ENETSW_SWMODE_FWD_EN_MASK;
 706 +       enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
 707 +
 708 +       /* enable jumbo on all ports */
 709 +       enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
 710 +       enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
 711 +
 712 +       /* initialize flow control buffer allocation */
 713 +       enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
 714 +                       ENETDMA_BUFALLOC_REG(priv->rx_chan));
 715 +
 716 +       if (bcm_enet_refill_rx(dev)) {
 717 +               dev_err(kdev, "cannot allocate rx skb queue\n");
 718 +               ret = -ENOMEM;
 719 +               goto out;
 720 +       }
 721 +
 722 +       /* write rx & tx ring addresses */
 723 +       enet_dmas_writel(priv, priv->rx_desc_dma,
 724 +                        ENETDMAS_RSTART_REG(priv->rx_chan));
 725 +       enet_dmas_writel(priv, priv->tx_desc_dma,
 726 +                        ENETDMAS_RSTART_REG(priv->tx_chan));
 727 +
 728 +       /* clear remaining state ram for rx & tx channel */
 729 +       enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->rx_chan));
 730 +       enet_dmas_writel(priv, 0, ENETDMAS_SRAM2_REG(priv->tx_chan));
 731 +       enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->rx_chan));
 732 +       enet_dmas_writel(priv, 0, ENETDMAS_SRAM3_REG(priv->tx_chan));
 733 +       enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->rx_chan));
 734 +       enet_dmas_writel(priv, 0, ENETDMAS_SRAM4_REG(priv->tx_chan));
 735 +
 736 +       /* set dma maximum burst len */
 737 +       enet_dmac_writel(priv, priv->dma_maxburst,
 738 +                        ENETDMAC_MAXBURST_REG(priv->rx_chan));
 739 +       enet_dmac_writel(priv, priv->dma_maxburst,
 740 +                        ENETDMAC_MAXBURST_REG(priv->tx_chan));
 741 +
 742 +       /* set flow control low/high threshold to 1/3 / 2/3 */
 743 +       val = priv->rx_ring_size / 3;
 744 +       enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan));
 745 +       val = (priv->rx_ring_size * 2) / 3;
 746 +       enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan));
 747 +
 748 +       /* all set, enable mac and interrupts, start dma engine and
 749 +        * kick rx dma channel */
 750 +       wmb();
 751 +       enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG);
 752 +       enet_dmac_writel(priv, ENETDMAC_CHANCFG_EN_MASK,
 753 +                        ENETDMAC_CHANCFG_REG(priv->rx_chan));
 754 +
 755 +       /* watch "packet transferred" interrupt in rx and tx */
 756 +       enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
 757 +                        ENETDMAC_IR_REG(priv->rx_chan));
 758 +       enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
 759 +                        ENETDMAC_IR_REG(priv->tx_chan));
 760 +
 761 +       /* make sure we enable napi before rx interrupt  */
 762 +       napi_enable(&priv->napi);
 763 +
 764 +       enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
 765 +                        ENETDMAC_IRMASK_REG(priv->rx_chan));
 766 +       enet_dmac_writel(priv, ENETDMAC_IR_PKTDONE_MASK,
 767 +                        ENETDMAC_IRMASK_REG(priv->tx_chan));
 768 +
 769 +       netif_carrier_on(dev);
 770 +       netif_start_queue(dev);
 771 +
 772 +       /*
 773 +        * apply override config for bypass_link ports here.
 774 +        */
 775 +       for (i = 0; i < priv->num_ports; i++) {
 776 +               struct bcm63xx_enetsw_port *port;
 777 +               u8 override;
 778 +               port = &priv->used_ports[i];
 779 +               if (!port->used)
 780 +                       continue;
 781 +
 782 +               if (!port->bypass_link)
 783 +                       continue;
 784 +
 785 +               override = ENETSW_PORTOV_ENABLE_MASK |
 786 +                       ENETSW_PORTOV_LINKUP_MASK;
 787 +
 788 +               switch (port->force_speed) {
 789 +               case 1000:
 790 +                       override |= ENETSW_IMPOV_1000_MASK;
 791 +                       break;
 792 +               case 100:
 793 +                       override |= ENETSW_IMPOV_100_MASK;
 794 +                       break;
 795 +               case 10:
 796 +                       break;
 797 +               default:
 798 +                       printk(KERN_WARNING "invalid forced speed on port %s: assume 10\n",
 799 +                              port->name);
 800 +                       break;
 801 +               }
 802 +
 803 +               if (port->force_duplex_full)
 804 +                       override |= ENETSW_IMPOV_FDX_MASK;
 805 +
 806 +
 807 +               enetsw_writeb(priv, override, ENETSW_PORTOV_REG(i));
 808 +               enetsw_writeb(priv, 0, ENETSW_PTCTRL_REG(i));
 809 +       }
 810 +
 811 +       /* start phy polling timer */
 812 +       init_timer(&priv->swphy_poll);
 813 +       priv->swphy_poll.function = swphy_poll_timer;
 814 +       priv->swphy_poll.data = (unsigned long)priv;
 815 +       priv->swphy_poll.expires = jiffies;
 816 +       add_timer(&priv->swphy_poll);
 817 +       return 0;
 818 +
 819 +out:
 820 +       for (i = 0; i < priv->rx_ring_size; i++) {
 821 +               struct bcm_enet_desc *desc;
 822 +
 823 +               if (!priv->rx_skb[i])
 824 +                       continue;
 825 +
 826 +               desc = &priv->rx_desc_cpu[i];
 827 +               dma_unmap_single(kdev, desc->address, priv->rx_skb_size,
 828 +                                DMA_FROM_DEVICE);
 829 +               kfree_skb(priv->rx_skb[i]);
 830 +       }
 831 +       kfree(priv->rx_skb);
 832 +
 833 +out_free_tx_skb:
 834 +       kfree(priv->tx_skb);
 835 +
 836 +out_free_tx_ring:
 837 +       dma_free_coherent(kdev, priv->tx_desc_alloc_size,
 838 +                         priv->tx_desc_cpu, priv->tx_desc_dma);
 839 +
 840 +out_free_rx_ring:
 841 +       dma_free_coherent(kdev, priv->rx_desc_alloc_size,
 842 +                         priv->rx_desc_cpu, priv->rx_desc_dma);
 843 +
 844 +out_freeirq_tx:
 845 +       if (priv->irq_tx != -1)
 846 +               free_irq(priv->irq_tx, dev);
 847 +
 848 +out_freeirq_rx:
 849 +       free_irq(priv->irq_rx, dev);
 850 +
 851 +out_freeirq:
 852 +       return ret;
 853 +}
 854 +
 855 +/*
 856 + * stop callback
 857 + */
 858 +static int bcm_enetsw_stop(struct net_device *dev)
 859 +{
 860 +       struct bcm_enet_priv *priv;
 861 +       struct device *kdev;
 862 +       int i;
 863 +
 864 +       priv = netdev_priv(dev);
 865 +       kdev = &priv->pdev->dev;
 866 +
 867 +       del_timer_sync(&priv->swphy_poll);
 868 +       netif_stop_queue(dev);
 869 +       napi_disable(&priv->napi);
 870 +       del_timer_sync(&priv->rx_timeout);
 871 +
 872 +       /* mask all interrupts */
 873 +       enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->rx_chan));
 874 +       enet_dmac_writel(priv, 0, ENETDMAC_IRMASK_REG(priv->tx_chan));
 875 +
 876 +       /* disable dma & mac */
 877 +       bcm_enet_disable_dma(priv, priv->tx_chan);
 878 +       bcm_enet_disable_dma(priv, priv->rx_chan);
 879 +
 880 +       /* force reclaim of all tx buffers */
 881 +       bcm_enet_tx_reclaim(dev, 1);
 882 +
 883 +       /* free the rx skb ring */
 884 +       for (i = 0; i < priv->rx_ring_size; i++) {
 885 +               struct bcm_enet_desc *desc;
 886 +
 887 +               if (!priv->rx_skb[i])
 888 +                       continue;
 889 +
 890 +               desc = &priv->rx_desc_cpu[i];
 891 +               dma_unmap_single(kdev, desc->address, priv->rx_skb_size,
 892 +                                DMA_FROM_DEVICE);
 893 +               kfree_skb(priv->rx_skb[i]);
 894 +       }
 895 +
 896 +       /* free remaining allocated memory */
 897 +       kfree(priv->rx_skb);
 898 +       kfree(priv->tx_skb);
 899 +       dma_free_coherent(kdev, priv->rx_desc_alloc_size,
 900 +                         priv->rx_desc_cpu, priv->rx_desc_dma);
 901 +       dma_free_coherent(kdev, priv->tx_desc_alloc_size,
 902 +                         priv->tx_desc_cpu, priv->tx_desc_dma);
 903 +       if (priv->irq_tx != -1)
 904 +               free_irq(priv->irq_tx, dev);
 905 +       free_irq(priv->irq_rx, dev);
 906 +
 907 +       return 0;
 908 +}
 909 +
 910 +/*
 911 + * try to sort out phy external status by walking the used_port field
 912 + * in the bcm_enet_priv structure. in case the phy address is not
 913 + * assigned to any physical port on the switch, assume it is external
 914 + * (and yell at the user).
 915 + */
 916 +static int bcm_enetsw_phy_is_external(struct bcm_enet_priv *priv, int phy_id)
 917 +{
 918 +       int i;
 919 +
 920 +       for (i = 0; i < priv->num_ports; ++i) {
 921 +               if (!priv->used_ports[i].used)
 922 +                       continue;
 923 +               if (priv->used_ports[i].phy_id == phy_id)
 924 +                       return bcm_enet_port_is_rgmii(i);
 925 +       }
 926 +
 927 +       printk_once(KERN_WARNING  "bcm63xx_enet: could not find a used port with phy_id %i, assuming phy is external\n",
 928 +                   phy_id);
 929 +       return 1;
 930 +}
 931 +
 932 +/*
 933 + * can't use bcmenet_sw_mdio_read directly as we need to sort out
 934 + * external/internal status of the given phy_id first.
 935 + */
 936 +static int bcm_enetsw_mii_mdio_read(struct net_device *dev, int phy_id,
 937 +                                   int location)
 938 +{
 939 +       struct bcm_enet_priv *priv;
 940 +
 941 +       priv = netdev_priv(dev);
 942 +       return bcmenet_sw_mdio_read(priv,
 943 +                                   bcm_enetsw_phy_is_external(priv, phy_id),
 944 +                                   phy_id, location);
 945 +}
 946 +
 947 +/*
 948 + * can't use bcmenet_sw_mdio_write directly as we need to sort out
 949 + * external/internal status of the given phy_id first.
 950 + */
 951 +static void bcm_enetsw_mii_mdio_write(struct net_device *dev, int phy_id,
 952 +                                     int location,
 953 +                                     int val)
 954 +{
 955 +       struct bcm_enet_priv *priv;
 956 +
 957 +       priv = netdev_priv(dev);
 958 +       bcmenet_sw_mdio_write(priv, bcm_enetsw_phy_is_external(priv, phy_id),
 959 +                             phy_id, location, val);
 960 +}
 961 +
 962 +static int bcm_enetsw_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
 963 +{
 964 +       struct mii_if_info mii;
 965 +
 966 +       mii.dev = dev;
 967 +       mii.mdio_read = bcm_enetsw_mii_mdio_read;
 968 +       mii.mdio_write = bcm_enetsw_mii_mdio_write;
 969 +       mii.phy_id = 0;
 970 +       mii.phy_id_mask = 0x3f;
 971 +       mii.reg_num_mask = 0x1f;
 972 +       return generic_mii_ioctl(&mii, if_mii(rq), cmd, NULL);
 973 +
 974 +}
 975 +
 976 +static const struct net_device_ops bcm_enetsw_ops = {
 977 +       .ndo_open               = bcm_enetsw_open,
 978 +       .ndo_stop               = bcm_enetsw_stop,
 979 +       .ndo_start_xmit         = bcm_enet_start_xmit,
 980 +       .ndo_change_mtu         = bcm_enet_change_mtu,
 981 +       .ndo_do_ioctl           = bcm_enetsw_ioctl,
 982 +};
 983 +
 984 +
 985 +static const struct bcm_enet_stats bcm_enetsw_gstrings_stats[] = {
 986 +       { "rx_packets", DEV_STAT(rx_packets), -1 },
 987 +       { "tx_packets", DEV_STAT(tx_packets), -1 },
 988 +       { "rx_bytes", DEV_STAT(rx_bytes), -1 },
 989 +       { "tx_bytes", DEV_STAT(tx_bytes), -1 },
 990 +       { "rx_errors", DEV_STAT(rx_errors), -1 },
 991 +       { "tx_errors", DEV_STAT(tx_errors), -1 },
 992 +       { "rx_dropped", DEV_STAT(rx_dropped), -1 },
 993 +       { "tx_dropped", DEV_STAT(tx_dropped), -1 },
 994 +
 995 +       { "tx_good_octets", GEN_STAT(mib.tx_gd_octets), ETHSW_MIB_RX_GD_OCT },
 996 +       { "tx_unicast", GEN_STAT(mib.tx_unicast), ETHSW_MIB_RX_BRDCAST },
 997 +       { "tx_broadcast", GEN_STAT(mib.tx_brdcast), ETHSW_MIB_RX_BRDCAST },
 998 +       { "tx_multicast", GEN_STAT(mib.tx_mult), ETHSW_MIB_RX_MULT },
 999 +       { "tx_64_octets", GEN_STAT(mib.tx_64), ETHSW_MIB_RX_64 },
1000 +       { "tx_65_127_oct", GEN_STAT(mib.tx_65_127), ETHSW_MIB_RX_65_127 },
1001 +       { "tx_128_255_oct", GEN_STAT(mib.tx_128_255), ETHSW_MIB_RX_128_255 },
1002 +       { "tx_256_511_oct", GEN_STAT(mib.tx_256_511), ETHSW_MIB_RX_256_511 },
1003 +       { "tx_512_1023_oct", GEN_STAT(mib.tx_512_1023), ETHSW_MIB_RX_512_1023},
1004 +       { "tx_1024_1522_oct", GEN_STAT(mib.tx_1024_max),
1005 +         ETHSW_MIB_RX_1024_1522 },
1006 +       { "tx_1523_2047_oct", GEN_STAT(mib.tx_1523_2047),
1007 +         ETHSW_MIB_RX_1523_2047 },
1008 +       { "tx_2048_4095_oct", GEN_STAT(mib.tx_2048_4095),
1009 +         ETHSW_MIB_RX_2048_4095 },
1010 +       { "tx_4096_8191_oct", GEN_STAT(mib.tx_4096_8191),
1011 +         ETHSW_MIB_RX_4096_8191 },
1012 +       { "tx_8192_9728_oct", GEN_STAT(mib.tx_8192_9728),
1013 +         ETHSW_MIB_RX_8192_9728 },
1014 +       { "tx_oversize", GEN_STAT(mib.tx_ovr), ETHSW_MIB_RX_OVR },
1015 +       { "tx_oversize_drop", GEN_STAT(mib.tx_ovr), ETHSW_MIB_RX_OVR_DISC },
1016 +       { "tx_dropped", GEN_STAT(mib.tx_drop), ETHSW_MIB_RX_DROP },
1017 +       { "tx_undersize", GEN_STAT(mib.tx_underrun), ETHSW_MIB_RX_UND },
1018 +       { "tx_pause", GEN_STAT(mib.tx_pause), ETHSW_MIB_RX_PAUSE },
1019 +
1020 +       { "rx_good_octets", GEN_STAT(mib.rx_gd_octets), ETHSW_MIB_TX_ALL_OCT },
1021 +       { "rx_broadcast", GEN_STAT(mib.rx_brdcast), ETHSW_MIB_TX_BRDCAST },
1022 +       { "rx_multicast", GEN_STAT(mib.rx_mult), ETHSW_MIB_TX_MULT },
1023 +       { "rx_unicast", GEN_STAT(mib.rx_unicast), ETHSW_MIB_TX_MULT },
1024 +       { "rx_pause", GEN_STAT(mib.rx_pause), ETHSW_MIB_TX_PAUSE },
1025 +       { "rx_dropped", GEN_STAT(mib.rx_drop), ETHSW_MIB_TX_DROP_PKTS },
1026 +
1027 +};
1028 +
1029 +#define BCM_ENETSW_STATS_LEN   \
1030 +       (sizeof(bcm_enetsw_gstrings_stats) / sizeof(struct bcm_enet_stats))
1031 +
1032 +static void bcm_enetsw_get_strings(struct net_device *netdev,
1033 +                                  u32 stringset, u8 *data)
1034 +{
1035 +       int i;
1036 +
1037 +       switch (stringset) {
1038 +       case ETH_SS_STATS:
1039 +               for (i = 0; i < BCM_ENETSW_STATS_LEN; i++) {
1040 +                       memcpy(data + i * ETH_GSTRING_LEN,
1041 +                              bcm_enetsw_gstrings_stats[i].stat_string,
1042 +                              ETH_GSTRING_LEN);
1043 +               }
1044 +               break;
1045 +       }
1046 +}
1047 +
1048 +static int bcm_enetsw_get_sset_count(struct net_device *netdev,
1049 +                                    int string_set)
1050 +{
1051 +       switch (string_set) {
1052 +       case ETH_SS_STATS:
1053 +               return BCM_ENETSW_STATS_LEN;
1054 +       default:
1055 +               return -EINVAL;
1056 +       }
1057 +}
1058 +
1059 +static void bcm_enetsw_get_drvinfo(struct net_device *netdev,
1060 +                                  struct ethtool_drvinfo *drvinfo)
1061 +{
1062 +       strncpy(drvinfo->driver, bcm_enet_driver_name, 32);
1063 +       strncpy(drvinfo->version, bcm_enet_driver_version, 32);
1064 +       strncpy(drvinfo->fw_version, "N/A", 32);
1065 +       strncpy(drvinfo->bus_info, "bcm63xx", 32);
1066 +       drvinfo->n_stats = BCM_ENETSW_STATS_LEN;
1067 +}
1068 +
1069 +static void bcm_enetsw_get_ethtool_stats(struct net_device *netdev,
1070 +                                        struct ethtool_stats *stats,
1071 +                                        u64 *data)
1072 +{
1073 +       struct bcm_enet_priv *priv;
1074 +       int i;
1075 +
1076 +       priv = netdev_priv(netdev);
1077 +
1078 +       for (i = 0; i < BCM_ENETSW_STATS_LEN; i++) {
1079 +               const struct bcm_enet_stats *s;
1080 +               u32 lo, hi;
1081 +               char *p;
1082 +               int reg;
1083 +
1084 +               s = &bcm_enetsw_gstrings_stats[i];
1085 +
1086 +               reg = s->mib_reg;
1087 +               if (reg == -1)
1088 +                       continue;
1089 +
1090 +               lo = enetsw_readl(priv, ENETSW_MIB_REG(reg));
1091 +               p = (char *)priv + s->stat_offset;
1092 +
1093 +               if (s->sizeof_stat == sizeof(u64)) {
1094 +                       hi = enetsw_readl(priv, ENETSW_MIB_REG(reg + 1));
1095 +                       *(u64 *)p = ((u64)hi << 32 | lo);
1096 +               } else {
1097 +                       *(u32 *)p = lo;
1098 +               }
1099 +       }
1100 +
1101 +       for (i = 0; i < BCM_ENETSW_STATS_LEN; i++) {
1102 +               const struct bcm_enet_stats *s;
1103 +               char *p;
1104 +
1105 +               s = &bcm_enetsw_gstrings_stats[i];
1106 +
1107 +               if (s->mib_reg == -1)
1108 +                       p = (char *)&netdev->stats + s->stat_offset;
1109 +               else
1110 +                       p = (char *)priv + s->stat_offset;
1111 +
1112 +               data[i] = (s->sizeof_stat == sizeof(u64)) ?
1113 +                       *(u64 *)p : *(u32 *)p;
1114 +       }
1115 +}
1116 +
1117 +static void bcm_enetsw_get_ringparam(struct net_device *dev,
1118 +                                    struct ethtool_ringparam *ering)
1119 +{
1120 +       struct bcm_enet_priv *priv;
1121 +
1122 +       priv = netdev_priv(dev);
1123 +
1124 +       /* rx/tx ring is actually only limited by memory */
1125 +       ering->rx_max_pending = 8192;
1126 +       ering->tx_max_pending = 8192;
1127 +       ering->rx_mini_max_pending = 0;
1128 +       ering->rx_jumbo_max_pending = 0;
1129 +       ering->rx_pending = priv->rx_ring_size;
1130 +       ering->tx_pending = priv->tx_ring_size;
1131 +}
1132 +
1133 +static int bcm_enetsw_set_ringparam(struct net_device *dev,
1134 +                                   struct ethtool_ringparam *ering)
1135 +{
1136 +       struct bcm_enet_priv *priv;
1137 +       int was_running;
1138 +
1139 +       priv = netdev_priv(dev);
1140 +
1141 +       was_running = 0;
1142 +       if (netif_running(dev)) {
1143 +               bcm_enetsw_stop(dev);
1144 +               was_running = 1;
1145 +       }
1146 +
1147 +       priv->rx_ring_size = ering->rx_pending;
1148 +       priv->tx_ring_size = ering->tx_pending;
1149 +
1150 +       if (was_running) {
1151 +               int err;
1152 +
1153 +               err = bcm_enetsw_open(dev);
1154 +               if (err)
1155 +                       dev_close(dev);
1156 +       }
1157 +       return 0;
1158 +}
1159 +
1160 +static struct ethtool_ops bcm_enetsw_ethtool_ops = {
1161 +       .get_strings            = bcm_enetsw_get_strings,
1162 +       .get_sset_count         = bcm_enetsw_get_sset_count,
1163 +       .get_ethtool_stats      = bcm_enetsw_get_ethtool_stats,
1164 +       .get_drvinfo            = bcm_enetsw_get_drvinfo,
1165 +       .get_ringparam          = bcm_enetsw_get_ringparam,
1166 +       .set_ringparam          = bcm_enetsw_set_ringparam,
1167 +};
1168 +
1169 +/*
1170 + * allocate netdevice, request register memory and register device.
1171 + */
1172 +static int bcm_enetsw_probe(struct platform_device *pdev)
1173 +{
1174 +       struct bcm_enet_priv *priv;
1175 +       struct net_device *dev;
1176 +       struct bcm63xx_enetsw_platform_data *pd;
1177 +       struct resource *res_mem;
1178 +       int ret, irq_rx, irq_tx;
1179 +
1180 +       /* stop if shared driver failed, assume driver->probe will be
1181 +        * called in the same order we register devices (correct ?) */
1182 +       if (!bcm_enet_shared_base[0])
1183 +               return -ENODEV;
1184 +
1185 +       res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1186 +       irq_rx = platform_get_irq(pdev, 0);
1187 +       irq_tx = platform_get_irq(pdev, 1);
1188 +       if (!res_mem || irq_rx < 0)
1189 +               return -ENODEV;
1190 +
1191 +       ret = 0;
1192 +       dev = alloc_etherdev(sizeof(*priv));
1193 +       if (!dev)
1194 +               return -ENOMEM;
1195 +       priv = netdev_priv(dev);
1196 +       memset(priv, 0, sizeof(*priv));
1197 +
1198 +       /* initialize default and fetch platform data */
1199 +       priv->enet_is_sw = true;
1200 +       priv->irq_rx = irq_rx;
1201 +       priv->irq_tx = irq_tx;
1202 +       priv->rx_ring_size = BCMENET_DEF_RX_DESC;
1203 +       priv->tx_ring_size = BCMENET_DEF_TX_DESC;
1204 +       priv->dma_maxburst = BCMENETSW_DMA_MAXBURST;
1205 +
1206 +       pd = pdev->dev.platform_data;
1207 +       if (pd) {
1208 +               memcpy(dev->dev_addr, pd->mac_addr, ETH_ALEN);
1209 +               memcpy(priv->used_ports, pd->used_ports,
1210 +                      sizeof (pd->used_ports));
1211 +               priv->num_ports = pd->num_ports;
1212 +       }
1213 +
1214 +       ret = compute_hw_mtu(priv, dev->mtu);
1215 +       if (ret)
1216 +               goto out;
1217 +
1218 +       if (!request_mem_region(res_mem->start, resource_size(res_mem),
1219 +                               "bcm63xx_enetsw")) {
1220 +               ret = -EBUSY;
1221 +               goto out;
1222 +       }
1223 +
1224 +       priv->base = ioremap(res_mem->start, resource_size(res_mem));
1225 +       if (priv->base == NULL) {
1226 +               ret = -ENOMEM;
1227 +               goto out_release_mem;
1228 +       }
1229 +
1230 +       priv->mac_clk = clk_get(&pdev->dev, "enetsw");
1231 +       if (IS_ERR(priv->mac_clk)) {
1232 +               ret = PTR_ERR(priv->mac_clk);
1233 +               goto out_unmap;
1234 +       }
1235 +       clk_enable(priv->mac_clk);
1236 +
1237 +       priv->rx_chan = 0;
1238 +       priv->tx_chan = 1;
1239 +       spin_lock_init(&priv->rx_lock);
1240 +
1241 +       /* init rx timeout (used for oom) */
1242 +       init_timer(&priv->rx_timeout);
1243 +       priv->rx_timeout.function = bcm_enet_refill_rx_timer;
1244 +       priv->rx_timeout.data = (unsigned long)dev;
1245 +
1246 +       /* register netdevice */
1247 +       dev->netdev_ops = &bcm_enetsw_ops;
1248 +       netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
1249 +       SET_ETHTOOL_OPS(dev, &bcm_enetsw_ethtool_ops);
1250 +       SET_NETDEV_DEV(dev, &pdev->dev);
1251 +
1252 +       spin_lock_init(&priv->enetsw_mdio_lock);
1253 +
1254 +       ret = register_netdev(dev);
1255 +       if (ret)
1256 +               goto out_put_clk;
1257 +
1258 +       netif_carrier_off(dev);
1259 +       platform_set_drvdata(pdev, dev);
1260 +       priv->pdev = pdev;
1261 +       priv->net_dev = dev;
1262 +
1263 +       return 0;
1264 +
1265 +out_put_clk:
1266 +       clk_put(priv->mac_clk);
1267 +
1268 +out_unmap:
1269 +       iounmap(priv->base);
1270 +
1271 +out_release_mem:
1272 +       release_mem_region(res_mem->start, resource_size(res_mem));
1273 +out:
1274 +       free_netdev(dev);
1275 +       return ret;
1276 +}
1277 +
1278 +
1279 +/*
1280 + * exit func, stops hardware and unregisters netdevice
1281 + */
1282 +static int bcm_enetsw_remove(struct platform_device *pdev)
1283 +{
1284 +       struct bcm_enet_priv *priv;
1285 +       struct net_device *dev;
1286 +       struct resource *res;
1287 +
1288 +       /* stop netdevice */
1289 +       dev = platform_get_drvdata(pdev);
1290 +       priv = netdev_priv(dev);
1291 +       unregister_netdev(dev);
1292 +
1293 +       /* release device resources */
1294 +       iounmap(priv->base);
1295 +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1296 +       release_mem_region(res->start, resource_size(res));
1297 +
1298 +       platform_set_drvdata(pdev, NULL);
1299 +       free_netdev(dev);
1300 +       return 0;
1301 +}
1302 +
1303 +struct platform_driver bcm63xx_enetsw_driver = {
1304 +       .probe  = bcm_enetsw_probe,
1305 +       .remove = bcm_enetsw_remove,
1306 +       .driver = {
1307 +               .name   = "bcm63xx_enetsw",
1308 +               .owner  = THIS_MODULE,
1309 +       },
1310 +};
1311 +
1312 +/*
1313 + * reserve & remap memory space shared between all macs
1314 + */
1315 +static int bcm_enet_shared_probe(struct platform_device *pdev)
1316 +{
1317 +       struct resource *res;
1318 +       void __iomem *p[3];
1319 +       unsigned int i;
1320 +
1321 +       memset(bcm_enet_shared_base, 0, sizeof(bcm_enet_shared_base));
1322 +
1323 +       for (i = 0; i < 3; i++) {
1324 +               res = platform_get_resource(pdev, IORESOURCE_MEM, i);
1325 +               if (!res)
1326 +                       return -EINVAL;
1327 +
1328 +               p[i] = devm_request_and_ioremap(&pdev->dev, res);
1329 +               if (!p[i])
1330 +                       return -ENOMEM;
1331 +       }
1332 +
1333 +       memcpy(bcm_enet_shared_base, p, sizeof(bcm_enet_shared_base));
1334 +
1335 +       return 0;
1336 +}
1337 +
1338 +static int bcm_enet_shared_remove(struct platform_device *pdev)
1339 +{
1340 +       return 0;
1341 +}
1342 +
1343 +/*
1344 + * this "shared" driver is needed because both macs share a single
1345 + * address space
1346 + */
1347 +struct platform_driver bcm63xx_enet_shared_driver = {
1348 +       .probe  = bcm_enet_shared_probe,
1349 +       .remove = bcm_enet_shared_remove,
1350 +       .driver = {
1351 +               .name   = "bcm63xx_enet_shared",
1352 +               .owner  = THIS_MODULE,
1353 +       },
1354 +};
1355 +
1356 +/*
1357 + * entry point
1358 + */
1359 +static int __init bcm_enet_init(void)
1360 +{
1361 +       int ret;
1362 +
1363 +       ret = platform_driver_register(&bcm63xx_enet_shared_driver);
1364 +       if (ret)
1365 +               return ret;
1366 +
1367 +       ret = platform_driver_register(&bcm63xx_enet_driver);
1368 +       if (ret)
1369 +               platform_driver_unregister(&bcm63xx_enet_shared_driver);
1370 +
1371 +       ret = platform_driver_register(&bcm63xx_enetsw_driver);
1372 +       if (ret) {
1373 +               platform_driver_unregister(&bcm63xx_enet_driver);
1374 +               platform_driver_unregister(&bcm63xx_enet_shared_driver);
1375 +       }
1376
1377         return ret;
1378  }
1379 @@ -1965,6 +2894,7 @@ static int __init bcm_enet_init(void)
1380  static void __exit bcm_enet_exit(void)
1381  {
1382         platform_driver_unregister(&bcm63xx_enet_driver);
1383 +       platform_driver_unregister(&bcm63xx_enetsw_driver);
1384         platform_driver_unregister(&bcm63xx_enet_shared_driver);
1385  }
1386
1387 --- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
1388 +++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
1389 @@ -18,6 +18,7 @@
1390
1391  /* maximum burst len for dma (4 bytes unit) */
1392  #define BCMENET_DMA_MAXBURST   16
1393 +#define BCMENETSW_DMA_MAXBURST 8
1394
1395  /* tx transmit threshold (4 bytes unit), fifo is 256 bytes, the value
1396   * must be low enough so that a DMA transfer of above burst length can
1397 @@ -84,11 +85,60 @@
1398  #define ETH_MIB_RX_CNTRL                       54
1399
1400
1401 +/*
1402 + * SW MIB Counters register definitions
1403 +*/
1404 +#define ETHSW_MIB_TX_ALL_OCT                   0
1405 +#define ETHSW_MIB_TX_DROP_PKTS                 2
1406 +#define ETHSW_MIB_TX_QOS_PKTS                  3
1407 +#define ETHSW_MIB_TX_BRDCAST                   4
1408 +#define ETHSW_MIB_TX_MULT                      5
1409 +#define ETHSW_MIB_TX_UNI                       6
1410 +#define ETHSW_MIB_TX_COL                       7
1411 +#define ETHSW_MIB_TX_1_COL                     8
1412 +#define ETHSW_MIB_TX_M_COL                     9
1413 +#define ETHSW_MIB_TX_DEF                       10
1414 +#define ETHSW_MIB_TX_LATE                      11
1415 +#define ETHSW_MIB_TX_EX_COL                    12
1416 +#define ETHSW_MIB_TX_PAUSE                     14
1417 +#define ETHSW_MIB_TX_QOS_OCT                   15
1418 +
1419 +#define ETHSW_MIB_RX_ALL_OCT                   17
1420 +#define ETHSW_MIB_RX_UND                       19
1421 +#define ETHSW_MIB_RX_PAUSE                     20
1422 +#define ETHSW_MIB_RX_64                                21
1423 +#define ETHSW_MIB_RX_65_127                    22
1424 +#define ETHSW_MIB_RX_128_255                   23
1425 +#define ETHSW_MIB_RX_256_511                   24
1426 +#define ETHSW_MIB_RX_512_1023                  25
1427 +#define ETHSW_MIB_RX_1024_1522                 26
1428 +#define ETHSW_MIB_RX_OVR                       27
1429 +#define ETHSW_MIB_RX_JAB                       28
1430 +#define ETHSW_MIB_RX_ALIGN                     29
1431 +#define ETHSW_MIB_RX_CRC                       30
1432 +#define ETHSW_MIB_RX_GD_OCT                    31
1433 +#define ETHSW_MIB_RX_DROP                      33
1434 +#define ETHSW_MIB_RX_UNI                       34
1435 +#define ETHSW_MIB_RX_MULT                      35
1436 +#define ETHSW_MIB_RX_BRDCAST                   36
1437 +#define ETHSW_MIB_RX_SA_CHANGE                 37
1438 +#define ETHSW_MIB_RX_FRAG                      38
1439 +#define ETHSW_MIB_RX_OVR_DISC                  39
1440 +#define ETHSW_MIB_RX_SYM                       40
1441 +#define ETHSW_MIB_RX_QOS_PKTS                  41
1442 +#define ETHSW_MIB_RX_QOS_OCT                   42
1443 +#define ETHSW_MIB_RX_1523_2047                 44
1444 +#define ETHSW_MIB_RX_2048_4095                 45
1445 +#define ETHSW_MIB_RX_4096_8191                 46
1446 +#define ETHSW_MIB_RX_8192_9728                 47
1447 +
1448 +
1449  struct bcm_enet_mib_counters {
1450         u64 tx_gd_octets;
1451         u32 tx_gd_pkts;
1452         u32 tx_all_octets;
1453         u32 tx_all_pkts;
1454 +       u32 tx_unicast;
1455         u32 tx_brdcast;
1456         u32 tx_mult;
1457         u32 tx_64;
1458 @@ -97,7 +147,12 @@ struct bcm_enet_mib_counters {
1459         u32 tx_256_511;
1460         u32 tx_512_1023;
1461         u32 tx_1024_max;
1462 +       u32 tx_1523_2047;
1463 +       u32 tx_2048_4095;
1464 +       u32 tx_4096_8191;
1465 +       u32 tx_8192_9728;
1466         u32 tx_jab;
1467 +       u32 tx_drop;
1468         u32 tx_ovr;
1469         u32 tx_frag;
1470         u32 tx_underrun;
1471 @@ -114,6 +169,7 @@ struct bcm_enet_mib_counters {
1472         u32 rx_all_octets;
1473         u32 rx_all_pkts;
1474         u32 rx_brdcast;
1475 +       u32 rx_unicast;
1476         u32 rx_mult;
1477         u32 rx_64;
1478         u32 rx_65_127;
1479 @@ -197,6 +253,9 @@ struct bcm_enet_priv {
1480         /* number of dma desc in tx ring */
1481         int tx_ring_size;
1482
1483 +       /* maximum dma burst size */
1484 +       int dma_maxburst;
1485 +
1486         /* cpu view of rx dma ring */
1487         struct bcm_enet_desc *tx_desc_cpu;
1488
1489 @@ -269,6 +328,22 @@ struct bcm_enet_priv {
1490
1491         /* maximum hardware transmit/receive size */
1492         unsigned int hw_mtu;
1493 +
1494 +       bool enet_is_sw;
1495 +
1496 +       /* port mapping for switch devices */
1497 +       int num_ports;
1498 +       struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
1499 +       int sw_port_link[ENETSW_MAX_PORT];
1500 +
1501 +       /* used to poll switch port state */
1502 +       struct timer_list swphy_poll;
1503 +       spinlock_t enetsw_mdio_lock;
1504  };
1505
1506 +static inline int bcm_enet_port_is_rgmii(int portid)
1507 +{
1508 +       return portid >= ENETSW_RGMII_PORT0;
1509 +}
1510 +
1511  #endif /* ! BCM63XX_ENET_H_ */