393e59399e282f9d351e9254e4d44527b52654d6
[openwrt.git] / target / linux / brcm63xx / patches-3.3 / 180-udc_preliminary_support.patch
1 --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
2 +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
3 @@ -29,6 +29,7 @@
4  #include <bcm63xx_dev_pcmcia.h>
5  #include <bcm63xx_dev_usb_ohci.h>
6  #include <bcm63xx_dev_usb_ehci.h>
7 +#include <bcm63xx_dev_usb_udc.h>
8  #include <board_bcm963xx.h>
9  
10  #define PFX    "board_bcm963xx: "
11 @@ -400,6 +401,8 @@ static struct board_info __initdata boar
12         .has_ohci0                      = 1,
13         .has_pccard                     = 1,
14         .has_ehci0                      = 1,
15 +
16 +       .has_udc0                       = 1,
17  };
18  
19  static struct board_info __initdata board_rta1025w_16 = {
20 @@ -932,6 +935,9 @@ int __init board_register_devices(void)
21         }
22  #endif
23  
24 +       if (board.has_udc0)
25 +               bcm63xx_udc_register();
26 +
27         /* read base address of boot chip select (0) */
28         val = bcm_mpi_readl(MPI_CSBASE_REG(0));
29         val &= MPI_CSBASE_BASE_MASK;
30 --- /dev/null
31 +++ b/arch/mips/bcm63xx/dev-usb-udc.c
32 @@ -0,0 +1,58 @@
33 +/*
34 + * Copyright (C) 2009  Henk Vergonet <Henk.Vergonet@gmail.com>
35 + *
36 + * This program is free software; you can redistribute it and/or
37 + * modify it under the terms of the GNU General Public License as
38 + * published by the Free Software Foundation; either version 2 of
39 + * the License, or (at your option) any later version.
40 + *
41 + * This program is distributed in the hope that it will be useful,
42 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
43 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
44 + * GNU General Public License for more details.
45 + *
46 + * You should have received a copy of the GNU General Public License
47 + * along with this program; if not, write to the Free Software
48 + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
49 + */
50 +#include <linux/init.h>
51 +#include <linux/kernel.h>
52 +#include <linux/platform_device.h>
53 +#include <bcm63xx_cpu.h>
54 +
55 +static struct resource udc_resources[] = {
56 +       {
57 +               .start          = -1, /* filled at runtime */
58 +               .end            = -1, /* filled at runtime */
59 +               .flags          = IORESOURCE_MEM,
60 +       },
61 +       {
62 +               .start          = -1, /* filled at runtime */
63 +               .flags          = IORESOURCE_IRQ,
64 +       },
65 +};
66 +
67 +static u64 udc_dmamask = ~(u32)0;
68 +
69 +static struct platform_device bcm63xx_udc_device = {
70 +       .name           = "bcm63xx-udc",
71 +       .id             = 0,
72 +       .num_resources  = ARRAY_SIZE(udc_resources),
73 +       .resource       = udc_resources,
74 +       .dev            = {
75 +               .dma_mask               = &udc_dmamask,
76 +               .coherent_dma_mask      = 0xffffffff,
77 +       },
78 +};
79 +
80 +int __init bcm63xx_udc_register(void)
81 +{
82 +       if (!BCMCPU_IS_6338() && !BCMCPU_IS_6345() && !BCMCPU_IS_6348())
83 +               return 0;
84 +
85 +       udc_resources[0].start = bcm63xx_regset_address(RSET_UDC0);
86 +       udc_resources[0].end = udc_resources[0].start;
87 +       udc_resources[0].end += RSET_UDC_SIZE - 1;
88 +       udc_resources[1].start = bcm63xx_get_irq_number(IRQ_UDC0);
89 +       return platform_device_register(&bcm63xx_udc_device);
90 +}
91 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
92 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
93 @@ -163,7 +163,7 @@ enum bcm63xx_regs_set {
94  #define BCM_6338_GPIO_BASE             (0xfffe0400)
95  #define BCM_6338_SPI_BASE              (0xfffe0c00)
96  #define BCM_6338_SPI2_BASE             (0xdeadbeef)
97 -#define BCM_6338_UDC0_BASE             (0xdeadbeef)
98 +#define BCM_6338_UDC0_BASE             (0xfffe3000)
99  #define BCM_6338_USBDMA_BASE           (0xfffe2400)
100  #define BCM_6338_OHCI0_BASE            (0xdeadbeef)
101  #define BCM_6338_OHCI_PRIV_BASE                (0xfffe3000)
102 @@ -207,7 +207,7 @@ enum bcm63xx_regs_set {
103  #define BCM_6345_GPIO_BASE             (0xfffe0400)
104  #define BCM_6345_SPI_BASE              (0xdeadbeef)
105  #define BCM_6345_SPI2_BASE             (0xdeadbeef)
106 -#define BCM_6345_UDC0_BASE             (0xdeadbeef)
107 +#define BCM_6345_UDC0_BASE             (0xfffe2100)
108  #define BCM_6345_USBDMA_BASE           (0xfffe2800)
109  #define BCM_6345_ENET0_BASE            (0xfffe1800)
110  #define BCM_6345_ENETDMA_BASE          (0xfffe2800)
111 @@ -291,7 +291,7 @@ enum bcm63xx_regs_set {
112  #define BCM_6358_GPIO_BASE             (0xfffe0080)
113  #define BCM_6358_SPI_BASE              (0xdeadbeef)
114  #define BCM_6358_SPI2_BASE             (0xfffe0800)
115 -#define BCM_6358_UDC0_BASE             (0xfffe0800)
116 +#define BCM_6358_UDC0_BASE             (0xfffe0400)
117  #define BCM_6358_OHCI0_BASE            (0xfffe1400)
118  #define BCM_6358_OHCI_PRIV_BASE                (0xdeadbeef)
119  #define BCM_6358_USBH_PRIV_BASE                (0xfffe1500)
120 @@ -481,6 +481,7 @@ enum bcm63xx_irq {
121         IRQ_UART0,
122         IRQ_UART1,
123         IRQ_DSL,
124 +       IRQ_UDC0,
125         IRQ_ENET0,
126         IRQ_ENET1,
127         IRQ_ENET_PHY,
128 @@ -547,6 +548,7 @@ enum bcm63xx_irq {
129  #define BCM_6345_ENET_PHY_IRQ          (IRQ_INTERNAL_BASE + 12)
130  #define BCM_6345_OHCI0_IRQ             0
131  #define BCM_6345_EHCI0_IRQ             0
132 +#define BCM_6345_UDC0_IRQ              (IRQ_INTERNAL_BASE + 5)
133  #define BCM_6345_ENET0_RXDMA_IRQ       (IRQ_INTERNAL_BASE + 13 + 1)
134  #define BCM_6345_ENET0_TXDMA_IRQ       (IRQ_INTERNAL_BASE + 13 + 2)
135  #define BCM_6345_ENET1_RXDMA_IRQ       0
136 @@ -577,6 +579,13 @@ enum bcm63xx_irq {
137  #define BCM_6348_ENET_PHY_IRQ          (IRQ_INTERNAL_BASE + 9)
138  #define BCM_6348_OHCI0_IRQ             (IRQ_INTERNAL_BASE + 12)
139  #define BCM_6348_EHCI0_IRQ             0
140 +#define BCM_6348_UDC0_IRQ              (IRQ_INTERNAL_BASE + 6)
141 +#define BCM_6348_USB_CNTL_RX_DMA_IRQ   (IRQ_INTERNAL_BASE + 14)
142 +#define BCM_6348_USB_CNTL_TX_DMA_IRQ   (IRQ_INTERNAL_BASE + 15)
143 +#define BCM_6348_USB_BULK_RX_DMA_IRQ   (IRQ_INTERNAL_BASE + 16)
144 +#define BCM_6348_USB_BULK_TX_DMA_IRQ   (IRQ_INTERNAL_BASE + 17)
145 +#define BCM_6348_USB_ISO_RX_DMA_IRQ    (IRQ_INTERNAL_BASE + 18)
146 +#define BCM_6348_USB_ISO_TX_DMA_IRQ    (IRQ_INTERNAL_BASE + 19)
147  #define BCM_6348_ENET0_RXDMA_IRQ       (IRQ_INTERNAL_BASE + 20)
148  #define BCM_6348_ENET0_TXDMA_IRQ       (IRQ_INTERNAL_BASE + 21)
149  #define BCM_6348_ENET1_RXDMA_IRQ       (IRQ_INTERNAL_BASE + 22)
150 --- /dev/null
151 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_udc.h
152 @@ -0,0 +1,6 @@
153 +#ifndef BCM63XX_DEV_USB_UDC_H_
154 +#define BCM63XX_DEV_USB_UDC_H_
155 +
156 +int bcm63xx_udc_register(void);
157 +
158 +#endif /* BCM63XX_DEV_USB_UDC_H_ */
159 --- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
160 +++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
161 @@ -48,6 +48,7 @@ struct board_info {
162         unsigned int    has_dsp:1;
163         unsigned int    has_uart0:1;
164         unsigned int    has_uart1:1;
165 +       unsigned int    has_udc0:1;
166  
167         /* ethernet config */
168         struct bcm63xx_enet_platform_data enet0;
169 --- a/arch/mips/bcm63xx/Makefile
170 +++ b/arch/mips/bcm63xx/Makefile
171 @@ -1,6 +1,6 @@
172  obj-y          += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \
173                    dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o \
174 -                  dev-usb-ehci.o dev-usb-ohci.o dev-wdt.o
175 +                  dev-usb-ehci.o dev-usb-ohci.o dev-usb-udc.o dev-wdt.o
176  obj-$(CONFIG_EARLY_PRINTK)     += early_printk.o
177  
178  obj-y          += boards/
179 --- a/arch/mips/bcm63xx/clk.c
180 +++ b/arch/mips/bcm63xx/clk.c
181 @@ -171,6 +171,30 @@ static struct clk clk_usbh = {
182  };
183  
184  /*
185 + * USB slave clock
186 + */
187 +static void usbs_set(struct clk *clk, int enable)
188 +{
189 +       u32 mask;
190 +
191 +       switch(bcm63xx_get_cpu_id()) {
192 +       case BCM6338_CPU_ID:
193 +               mask = CKCTL_6338_USBS_EN;
194 +               break;
195 +       case BCM6348_CPU_ID:
196 +               mask = CKCTL_6348_USBS_EN;
197 +               break;
198 +       default:
199 +               return;
200 +       }
201 +       bcm_hwclock_set(mask, enable);
202 +}
203 +
204 +static struct clk clk_usbs = {
205 +       .set    = usbs_set,
206 +};
207 +
208 +/*
209   * SPI clock
210   */
211  static void spi_set(struct clk *clk, int enable)
212 @@ -270,6 +294,8 @@ struct clk *clk_get(struct device *dev,
213                 return &clk_ephy;
214         if (!strcmp(id, "usbh"))
215                 return &clk_usbh;
216 +       if (!strcmp(id, "usbs"))
217 +               return &clk_usbs;
218         if (!strcmp(id, "spi"))
219                 return &clk_spi;
220         if (!strcmp(id, "xtm"))
221 --- a/arch/mips/bcm63xx/Kconfig
222 +++ b/arch/mips/bcm63xx/Kconfig
223 @@ -5,6 +5,7 @@ config BCM63XX_CPU_6338
224         bool "support 6338 CPU"
225         select HW_HAS_PCI
226         select USB_ARCH_HAS_OHCI if USB_SUPPORT
227 +       select USB_ARCH_HAS_UDC
228  
229  config BCM63XX_CPU_6345
230         bool "support 6345 CPU"
231 @@ -13,6 +14,7 @@ config BCM63XX_CPU_6348
232         bool "support 6348 CPU"
233         select HW_HAS_PCI
234         select USB_ARCH_HAS_OHCI if USB_SUPPORT
235 +       select USB_ARCH_HAS_UDC
236  
237  config BCM63XX_CPU_6358
238         bool "support 6358 CPU"