395dc13d8d3d4bee691601ec98b24c0dbf45c6c5
[openwrt.git] / target / linux / brcm63xx / patches-3.14 / 023-MIPS-BCM63XX-add-cpu-argument-to-dispatch-internal.patch
1 From 43ebef8162adfa7789cb915e60e46103965d7efd Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Fri, 26 Apr 2013 11:21:16 +0200
4 Subject: [PATCH 06/10] MIPS: BCM63XX: add cpu argument to dispatch internal
5
6 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
7 ---
8  arch/mips/bcm63xx/irq.c | 18 ++++++++++--------
9  1 file changed, 10 insertions(+), 8 deletions(-)
10
11 --- a/arch/mips/bcm63xx/irq.c
12 +++ b/arch/mips/bcm63xx/irq.c
13 @@ -19,9 +19,10 @@
14  #include <bcm63xx_io.h>
15  #include <bcm63xx_irq.h>
16  
17 +
18  static u32 irq_stat_addr[2];
19  static u32 irq_mask_addr[2];
20 -static void (*dispatch_internal)(void);
21 +static void (*dispatch_internal)(int cpu);
22  static int is_ext_irq_cascaded;
23  static unsigned int ext_irq_count;
24  static unsigned int ext_irq_start, ext_irq_end;
25 @@ -54,19 +55,20 @@ static inline void handle_internal(int i
26   */
27  
28  #define BUILD_IPIC_INTERNAL(width)                                     \
29 -void __dispatch_internal_##width(void)                                 \
30 +void __dispatch_internal_##width(int cpu)                              \
31  {                                                                      \
32         u32 pending[width / 32];                                        \
33         unsigned int src, tgt;                                          \
34         bool irqs_pending = false;                                      \
35 -       static unsigned int i;                                          \
36 +       static unsigned int i[2];                                       \
37 +       unsigned int *next = &i[cpu];                                   \
38                                                                         \
39         /* read registers in reverse order */                           \
40         for (src = 0, tgt = (width / 32); src < (width / 32); src++) {  \
41                 u32 val;                                                \
42                                                                         \
43 -               val = bcm_readl(irq_stat_addr[0] + src * sizeof(u32));  \
44 -               val &= bcm_readl(irq_mask_addr[0] + src * sizeof(u32)); \
45 +               val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
46 +               val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
47                 pending[--tgt] = val;                                   \
48                                                                         \
49                 if (val)                                                \
50 @@ -77,9 +79,9 @@ void __dispatch_internal_##width(void)
51                 return;                                                 \
52                                                                         \
53         while (1) {                                                     \
54 -               unsigned int to_call = i;                               \
55 +               unsigned int to_call = *next;                           \
56                                                                         \
57 -               i = (i + 1) & (width - 1);                              \
58 +               *next = (*next + 1) & (width - 1);                      \
59                 if (pending[to_call / 32] & (1 << (to_call & 0x1f))) {  \
60                         handle_internal(to_call);                       \
61                         break;                                          \
62 @@ -129,7 +131,7 @@ asmlinkage void plat_irq_dispatch(void)
63                 if (cause & CAUSEF_IP1)
64                         do_IRQ(1);
65                 if (cause & CAUSEF_IP2)
66 -                       dispatch_internal();
67 +                       dispatch_internal(0);
68                 if (!is_ext_irq_cascaded) {
69                         if (cause & CAUSEF_IP3)
70                                 do_IRQ(IRQ_EXT_0);