target/linux/brcm63xx/patches-3.13/348-MIPS-BCM63XX-fix-BCM63268-USB-clock.patch

   1 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
   2 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
   3 @@ -585,6 +585,9 @@
   4  #define TIMER_CTL_MONOTONIC_MASK       (1 << 30)
   5  #define TIMER_CTL_ENABLE_MASK          (1 << 31)
   6
   7 +/* Clock reset control (63268 only) */
   8 +#define TIMER_CLK_RST_CTL_REG          0x2c
   9 +#define CLK_RST_CTL_USB_REF_CLK_EN     (1 << 18)
  10
  11  /*************************************************************************
  12   * _REG relative to RSET_WDT
  13 @@ -1666,6 +1669,11 @@
  14  #define STRAPBUS_63268_FCVO_SHIFT      21
  15  #define STRAPBUS_63268_FCVO_MASK       (0xf << STRAPBUS_63268_FCVO_SHIFT)
  16
  17 +#define MISC_IDDQ_CTRL_6328_REG                0x48
  18 +#define MISC_IDDQ_CTRL_63268_REG       0x4c
  19 +
  20 +#define IDDQ_CTRL_63268_USBH           (1 << 4)
  21 +
  22  #define MISC_STRAPBUS_6328_REG         0x240
  23  #define STRAPBUS_6328_FCVO_SHIFT       7
  24  #define STRAPBUS_6328_FCVO_MASK                (0x1f << STRAPBUS_6328_FCVO_SHIFT)
  25 --- a/arch/mips/bcm63xx/clk.c
  26 +++ b/arch/mips/bcm63xx/clk.c
  27 @@ -62,6 +62,26 @@ static void bcm_ub_hwclock_set(u32 mask,
  28         bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
  29  }
  30
  31 +static void bcm_misc_iddq_set(u32 mask, int enable)
  32 +{
  33 +       u32 offset;
  34 +       u32 reg;
  35 +
  36 +       if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
  37 +               offset = MISC_IDDQ_CTRL_6328_REG;
  38 +       else if (BCMCPU_IS_63268())
  39 +               offset = MISC_IDDQ_CTRL_63268_REG;
  40 +       else
  41 +               return;
  42 +
  43 +       reg = bcm_misc_readl(offset);
  44 +       if (enable)
  45 +               reg &= ~mask;
  46 +       else
  47 +               reg |= mask;
  48 +       bcm_misc_writel(reg, offset);
  49 +}
  50 +
  51  /*
  52   * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
  53   */
  54 @@ -199,7 +219,17 @@ static void usbh_set(struct clk *clk, in
  55         } else if (BCMCPU_IS_6368()) {
  56                 bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
  57         } else if (BCMCPU_IS_63268()) {
  58 +               u32 reg;
  59 +
  60                 bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
  61 +               bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable);
  62 +               bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable);
  63 +               reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG);
  64 +               if (enable)
  65 +                       reg |= CLK_RST_CTL_USB_REF_CLK_EN;
  66 +               else
  67 +                       reg &= ~CLK_RST_CTL_USB_REF_CLK_EN;
  68 +               bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG);
  69         } else {
  70                 return;
  71         }