target/linux/brcm63xx/patches-3.10/316-MIPS-BCM63XX-populate-irq_-stat-mask-_addr-for-secon.patch

   1 From 1a1769d6268c93b042f635b31b43024fea7feb30 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jogo@openwrt.org>
   3 Date: Thu, 25 Apr 2013 00:31:29 +0200
   4 Subject: [PATCH 08/14] MIPS: BCM63XX: populate irq_{stat,mask}_addr for
   5  second pin
   6
   7 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
   8 ---
   9  arch/mips/bcm63xx/irq.c |   43 ++++++++++++++++++++++++++++++++++++++++++-
  10  1 file changed, 42 insertions(+), 1 deletion(-)
  11
  12 --- a/arch/mips/bcm63xx/irq.c
  13 +++ b/arch/mips/bcm63xx/irq.c
  14 @@ -30,6 +30,8 @@ static void __internal_irq_unmask_64(uns
  15  #ifdef CONFIG_BCM63XX_CPU_3368
  16  #define irq_stat_reg0          PERF_IRQSTAT_3368_REG
  17  #define irq_mask_reg0          PERF_IRQMASK_3368_REG
  18 +#define irq_stat_reg1          0
  19 +#define irq_mask_reg1          0
  20  #define irq_bits               32
  21  #define is_ext_irq_cascaded    0
  22  #define ext_irq_start          0
  23 @@ -41,6 +43,8 @@ static void __internal_irq_unmask_64(uns
  24  #ifdef CONFIG_BCM63XX_CPU_6328
  25  #define irq_stat_reg0          PERF_IRQSTAT_6328_REG(0)
  26  #define irq_mask_reg0          PERF_IRQMASK_6328_REG(0)
  27 +#define irq_stat_reg1          PERF_IRQSTAT_6328_REG(1)
  28 +#define irq_mask_reg1          PERF_IRQMASK_6328_REG(1)
  29  #define irq_bits               64
  30  #define is_ext_irq_cascaded    1
  31  #define ext_irq_start          (BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE)
  32 @@ -52,6 +56,8 @@ static void __internal_irq_unmask_64(uns
  33  #ifdef CONFIG_BCM63XX_CPU_6338
  34  #define irq_stat_reg0          PERF_IRQSTAT_6338_REG
  35  #define irq_mask_reg0          PERF_IRQMASK_6338_REG
  36 +#define irq_stat_reg1          0
  37 +#define irq_mask_reg1          0
  38  #define irq_bits               32
  39  #define is_ext_irq_cascaded    0
  40  #define ext_irq_start          0
  41 @@ -63,6 +69,8 @@ static void __internal_irq_unmask_64(uns
  42  #ifdef CONFIG_BCM63XX_CPU_6345
  43  #define irq_stat_reg0          PERF_IRQSTAT_6345_REG
  44  #define irq_mask_reg0          PERF_IRQMASK_6345_REG
  45 +#define irq_stat_reg1          0
  46 +#define irq_mask_reg1          0
  47  #define irq_bits               32
  48  #define is_ext_irq_cascaded    0
  49  #define ext_irq_start          0
  50 @@ -74,6 +82,8 @@ static void __internal_irq_unmask_64(uns
  51  #ifdef CONFIG_BCM63XX_CPU_6348
  52  #define irq_stat_reg0          PERF_IRQSTAT_6348_REG
  53  #define irq_mask_reg0          PERF_IRQMASK_6348_REG
  54 +#define irq_stat_reg1          0
  55 +#define irq_mask_reg1          0
  56  #define irq_bits               32
  57  #define is_ext_irq_cascaded    0
  58  #define ext_irq_start          0
  59 @@ -85,6 +95,8 @@ static void __internal_irq_unmask_64(uns
  60  #ifdef CONFIG_BCM63XX_CPU_6358
  61  #define irq_stat_reg0          PERF_IRQSTAT_6358_REG(0)
  62  #define irq_mask_reg0          PERF_IRQMASK_6358_REG(0)
  63 +#define irq_stat_reg1          PERF_IRQSTAT_6358_REG(1)
  64 +#define irq_mask_reg1          PERF_IRQMASK_6358_REG(1)
  65  #define irq_bits               32
  66  #define is_ext_irq_cascaded    1
  67  #define ext_irq_start          (BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE)
  68 @@ -96,6 +108,8 @@ static void __internal_irq_unmask_64(uns
  69  #ifdef CONFIG_BCM63XX_CPU_6362
  70  #define irq_stat_reg0          PERF_IRQSTAT_6362_REG(0)
  71  #define irq_mask_reg0          PERF_IRQMASK_6362_REG(0)
  72 +#define irq_stat_reg1          PERF_IRQSTAT_6362_REG(1)
  73 +#define irq_mask_reg1          PERF_IRQMASK_6362_REG(1)
  74  #define irq_bits               64
  75  #define is_ext_irq_cascaded    1
  76  #define ext_irq_start          (BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE)
  77 @@ -107,6 +121,8 @@ static void __internal_irq_unmask_64(uns
  78  #ifdef CONFIG_BCM63XX_CPU_6368
  79  #define irq_stat_reg0          PERF_IRQSTAT_6368_REG(0)
  80  #define irq_mask_reg0          PERF_IRQMASK_6368_REG(0)
  81 +#define irq_stat_reg1          PERF_IRQSTAT_6368_REG(1)
  82 +#define irq_mask_reg1          PERF_IRQMASK_6368_REG(1)
  83  #define irq_bits               64
  84  #define is_ext_irq_cascaded    1
  85  #define ext_irq_start          (BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE)
  86 @@ -128,13 +144,20 @@ static void __internal_irq_unmask_64(uns
  87
  88  #define irq_stat_addr0 (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg0)
  89  #define irq_mask_addr0 (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg0)
  90 +#if (irq_stat_reg1 > 0) && (irq_mask_reg1 > 0)
  91 +#define irq_stat_addr1 (bcm63xx_regset_address(RSET_PERF) + irq_stat_reg1)
  92 +#define irq_mask_addr1 (bcm63xx_regset_address(RSET_PERF) + irq_mask_reg1)
  93 +#else
  94 +#define irq_stat_addr1 0
  95 +#define irq_mask_addr1 0
  96 +#endif
  97
  98  static inline void bcm63xx_init_irq(void)
  99  {
 100  }
 101  #else /* ! BCMCPU_RUNTIME_DETECT */
 102
 103 -static u32 irq_stat_addr0, irq_mask_addr0;
 104 +static u32 irq_stat_addr0, irq_mask_addr0, irq_stat_addr1, irq_mask_addr1;
 105  static void (*dispatch_internal)(void);
 106  static int is_ext_irq_cascaded;
 107  static unsigned int ext_irq_count;
 108 @@ -149,11 +172,15 @@ static void bcm63xx_init_irq(void)
 109
 110         irq_stat_addr0 = bcm63xx_regset_address(RSET_PERF);
 111         irq_mask_addr0 = bcm63xx_regset_address(RSET_PERF);
 112 +       irq_stat_addr1 = bcm63xx_regset_address(RSET_PERF);
 113 +       irq_mask_addr1 = bcm63xx_regset_address(RSET_PERF);
 114
 115         switch (bcm63xx_get_cpu_id()) {
 116         case BCM3368_CPU_ID:
 117                 irq_stat_addr0 += PERF_IRQSTAT_3368_REG;
 118                 irq_mask_addr0 += PERF_IRQMASK_3368_REG;
 119 +               irq_stat_addr1 = 0;
 120 +               irq_stat_addr1 = 0;
 121                 irq_bits = 32;
 122                 ext_irq_count = 4;
 123                 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
 124 @@ -161,6 +188,8 @@ static void bcm63xx_init_irq(void)
 125         case BCM6328_CPU_ID:
 126                 irq_stat_addr0 += PERF_IRQSTAT_6328_REG(0);
 127                 irq_mask_addr0 += PERF_IRQMASK_6328_REG(0);
 128 +               irq_stat_addr1 += PERF_IRQSTAT_6328_REG(1);
 129 +               irq_stat_addr1 += PERF_IRQMASK_6328_REG(1);
 130                 irq_bits = 64;
 131                 ext_irq_count = 4;
 132                 is_ext_irq_cascaded = 1;
 133 @@ -171,6 +200,8 @@ static void bcm63xx_init_irq(void)
 134         case BCM6338_CPU_ID:
 135                 irq_stat_addr0 += PERF_IRQSTAT_6338_REG;
 136                 irq_mask_addr0 += PERF_IRQMASK_6338_REG;
 137 +               irq_stat_addr1 = 0;
 138 +               irq_mask_addr1 = 0;
 139                 irq_bits = 32;
 140                 ext_irq_count = 4;
 141                 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
 142 @@ -178,6 +209,8 @@ static void bcm63xx_init_irq(void)
 143         case BCM6345_CPU_ID:
 144                 irq_stat_addr0 += PERF_IRQSTAT_6345_REG;
 145                 irq_mask_addr0 += PERF_IRQMASK_6345_REG;
 146 +               irq_stat_addr1 = 0;
 147 +               irq_mask_addr1 = 0;
 148                 irq_bits = 32;
 149                 ext_irq_count = 4;
 150                 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
 151 @@ -185,6 +218,8 @@ static void bcm63xx_init_irq(void)
 152         case BCM6348_CPU_ID:
 153                 irq_stat_addr0 += PERF_IRQSTAT_6348_REG;
 154                 irq_mask_addr0 += PERF_IRQMASK_6348_REG;
 155 +               irq_stat_addr1 = 0;
 156 +               irq_mask_addr1 = 0;
 157                 irq_bits = 32;
 158                 ext_irq_count = 4;
 159                 ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
 160 @@ -192,6 +227,8 @@ static void bcm63xx_init_irq(void)
 161         case BCM6358_CPU_ID:
 162                 irq_stat_addr0 += PERF_IRQSTAT_6358_REG(0);
 163                 irq_mask_addr0 += PERF_IRQMASK_6358_REG(0);
 164 +               irq_stat_addr1 += PERF_IRQSTAT_6358_REG(1);
 165 +               irq_mask_addr1 += PERF_IRQMASK_6358_REG(1);
 166                 irq_bits = 32;
 167                 ext_irq_count = 4;
 168                 is_ext_irq_cascaded = 1;
 169 @@ -202,6 +239,8 @@ static void bcm63xx_init_irq(void)
 170         case BCM6362_CPU_ID:
 171                 irq_stat_addr0 += PERF_IRQSTAT_6362_REG(0);
 172                 irq_mask_addr0 += PERF_IRQMASK_6362_REG(0);
 173 +               irq_stat_addr1 += PERF_IRQSTAT_6362_REG(1);
 174 +               irq_mask_addr1 += PERF_IRQMASK_6362_REG(1);
 175                 irq_bits = 64;
 176                 ext_irq_count = 4;
 177                 is_ext_irq_cascaded = 1;
 178 @@ -212,6 +251,8 @@ static void bcm63xx_init_irq(void)
 179         case BCM6368_CPU_ID:
 180                 irq_stat_addr0 += PERF_IRQSTAT_6368_REG(0);
 181                 irq_mask_addr0 += PERF_IRQMASK_6368_REG(0);
 182 +               irq_stat_addr1 += PERF_IRQSTAT_6368_REG(1);
 183 +               irq_mask_addr1 += PERF_IRQMASK_6368_REG(1);
 184                 irq_bits = 64;
 185                 ext_irq_count = 6;
 186                 is_ext_irq_cascaded = 1;