target/linux/brcm63xx/patches-3.10/043-MIPS-BCM63XX-Add-SMP-support-to-prom.c.patch

   1 From 7c44eabf20cba12049bf9eebfa192afcc2053b2d Mon Sep 17 00:00:00 2001
   2 From: Kevin Cernekee <cernekee@gmail.com>
   3 Date: Sat, 9 Jul 2011 12:15:06 -0700
   4 Subject: [PATCH V2 1/2] MIPS: BCM63XX: Add SMP support to prom.c
   5
   6 This involves two changes to the BSP code:
   7
   8 1) register_smp_ops() for BMIPS SMP
   9
  10 2) The CPU1 boot vector on some of the BCM63xx platforms conflicts with
  11 the special interrupt vector (IV).  Move it to 0x8000_0380 at boot time,
  12 to resolve the conflict.
  13
  14 Signed-off-by: Kevin Cernekee <cernekee@gmail.com>
  15 [jogo@openwrt.org: moved SMP ops registration into ifdef guard,
  16  changed ifdef guards to if (IS_ENABLED())]
  17 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
  18 ---
  19 V1 -> V2:
  20  * changed ifdef guards to if (IS_ENABLED())
  21
  22  arch/mips/bcm63xx/prom.c |   41 +++++++++++++++++++++++++++++++++++++++++
  23  1 file changed, 41 insertions(+)
  24
  25 --- a/arch/mips/bcm63xx/prom.c
  26 +++ b/arch/mips/bcm63xx/prom.c
  27 @@ -8,7 +8,11 @@
  28
  29  #include <linux/init.h>
  30  #include <linux/bootmem.h>
  31 +#include <linux/smp.h>
  32  #include <asm/bootinfo.h>
  33 +#include <asm/bmips.h>
  34 +#include <asm/smp-ops.h>
  35 +#include <asm/mipsregs.h>
  36  #include <bcm63xx_board.h>
  37  #include <bcm63xx_cpu.h>
  38  #include <bcm63xx_io.h>
  39 @@ -54,6 +58,43 @@ void __init prom_init(void)
  40
  41         /* do low level board init */
  42         board_prom_init();
  43 +
  44 +       if (IS_ENABLED(CONFIG_CPU_BMIPS4350) && IS_ENABLED(CONFIG_SMP)) {
  45 +               /* set up SMP */
  46 +               register_smp_ops(&bmips_smp_ops);
  47 +
  48 +               /*
  49 +                * BCM6328 might not have its second CPU enabled, while BCM6358
  50 +                * needs special handling for its shared TLB, so disable SMP
  51 +                * for now.
  52 +                */
  53 +               if (BCMCPU_IS_6328()) {
  54 +                       bmips_smp_enabled = 0;
  55 +               } else if (BCMCPU_IS_6358()) {
  56 +                       bmips_smp_enabled = 0;
  57 +               }
  58 +
  59 +               if (!bmips_smp_enabled)
  60 +                       return;
  61 +
  62 +               /*
  63 +                * The bootloader has set up the CPU1 reset vector at
  64 +                * 0xa000_0200.
  65 +                * This conflicts with the special interrupt vector (IV).
  66 +                * The bootloader has also set up CPU1 to respond to the wrong
  67 +                * IPI interrupt.
  68 +                * Here we will start up CPU1 in the background and ask it to
  69 +                * reconfigure itself then go back to sleep.
  70 +                */
  71 +               memcpy((void *)0xa0000200, &bmips_smp_movevec, 0x20);
  72 +               __sync();
  73 +               set_c0_cause(C_SW0);
  74 +               cpumask_set_cpu(1, &bmips_booted_mask);
  75 +
  76 +               /*
  77 +                * FIXME: we really should have some sort of hazard barrier here
  78 +                */
  79 +       }
  80  }
  81
  82  void __init prom_free_prom_memory(void)