target/linux/brcm63xx-2.6/patches/001-bcm963xx.patch

   1 diff -urN linux-2.6.19/arch/mips/Kconfig linux-2.6.19.new/arch/mips/Kconfig
   2 --- linux-2.6.19/arch/mips/Kconfig      2006-11-29 22:57:37.000000000 +0100
   3 +++ linux-2.6.19.new/arch/mips/Kconfig  2006-12-16 18:46:31.000000000 +0100
   4 @@ -12,6 +12,15 @@
   5         prompt "System type"
   6         default SGI_IP22
   7
   8 +config BCM963XX
   9 +       bool "Support for the Broadcom boards"
  10 +       select SYS_SUPPORTS_32BIT_KERNEL
  11 +       select SYS_SUPPORTS_BIG_ENDIAN
  12 +       select SYS_HAS_CPU_MIPS32_R1
  13 +       select IRQ_CPU
  14 +       help
  15 +        This is a fmaily of boards based on the Broadcom MIPS32
  16 +
  17  config MIPS_MTX1
  18         bool "4G Systems MTX-1 board"
  19         select DMA_NONCOHERENT
  20 @@ -766,6 +775,7 @@
  21
  22  endchoice
  23
  24 +source "arch/mips/bcm963xx/Kconfig"
  25  source "arch/mips/ddb5xxx/Kconfig"
  26  source "arch/mips/gt64120/ev64120/Kconfig"
  27  source "arch/mips/jazz/Kconfig"
  28 diff -urN linux-2.6.19/arch/mips/Makefile linux-2.6.19.new/arch/mips/Makefile
  29 --- linux-2.6.19/arch/mips/Makefile     2006-12-16 17:36:29.000000000 +0100
  30 +++ linux-2.6.19.new/arch/mips/Makefile 2006-12-16 18:46:31.000000000 +0100
  31 @@ -158,6 +158,15 @@
  32  #
  33
  34  #
  35 +# Broadcom board
  36 +#
  37 +core-$(CONFIG_BCM963XX)        += arch/mips/bcm963xx/
  38 +cflags-$(CONFIG_BCM963XX)      += -Iinclude/asm-mips/mach-bcm963xx
  39 +cflags-$(CONFIG_BCM963XX)      += -Iarch/mips/bcm963xx/include
  40 +load-$(CONFIG_BCM963XX)        += 0xffffffff80010000
  41 +
  42 +
  43 +#
  44  # Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
  45  #
  46  core-$(CONFIG_MACH_JAZZ)       += arch/mips/jazz/
  47 diff -urN linux-2.6.19/arch/mips/bcm963xx/Kconfig linux-2.6.19.new/arch/mips/bcm963xx/Kconfig
  48 --- linux-2.6.19/arch/mips/bcm963xx/Kconfig     1970-01-01 01:00:00.000000000 +0100
  49 +++ linux-2.6.19.new/arch/mips/bcm963xx/Kconfig 2006-12-16 18:46:31.000000000 +0100
  50 @@ -0,0 +1,138 @@
  51 +# Kernel and Driver configuration for Broadcom Commengine ADSL board
  52 +choice
  53 +       prompt "Broadcom Commengine ADSL board"
  54 +       depends on BCM963XX
  55 +       default BCM96345
  56 +       help
  57 +         Select different Broadcom ADSL board
  58 +
  59 +config BCM96338
  60 +       bool "96338 ADSL board"
  61 +       select DMA_NONCOHERENT
  62 +       select HW_HAS_PCI
  63 +
  64 +config BCM96345
  65 +       bool "96345 ADSL board"
  66 +       select DMA_NONCOHERENT
  67 +       select HW_HAS_PCI
  68 +
  69 +config BCM96348
  70 +       bool "96348 ADSL board"
  71 +       select DMA_NONCOHERENT
  72 +       select HW_HAS_PCI
  73 +
  74 +endchoice
  75 +
  76 +config BCM_BOARD
  77 +       bool "Support for Broadcom Board"
  78 +       depends on BCM96338 || BCM96345 || BCM96348
  79 +
  80 +config BCM_SERIAL
  81 +       bool "Support for Serial Port"
  82 +       depends on BCM96338 || BCM96345 || BCM96348
  83 +
  84 +config BCM_ENET
  85 +       tristate "Support for Ethernet"
  86 +       depends on BCM96338 || BCM96345 || BCM96348
  87 +
  88 +config BCM_USB
  89 +       tristate "Support for USB"
  90 +       depends on BCM96338 || BCM96345 || BCM96348
  91 +
  92 +config BCM_WLAN
  93 +       tristate "Support for Wireless"
  94 +       depends on BCM96338 || BCM96345 || BCM96348
  95 +
  96 +config BCM_PCI
  97 +       bool "Support for PCI"
  98 +       depends on BCM96338 || BCM96345 || BCM96348
  99 +       select PCI
 100 +
 101 +config BCM_ATMAPI
 102 +       tristate "Support for ATM"
 103 +       depends on BCM96338 || BCM96345 || BCM96348
 104 +
 105 +config BCM_ATMTEST
 106 +       tristate "Support for ATM Diagnostic"
 107 +       depends on BCM96338 || BCM96345 || BCM96348
 108 +
 109 +config BCM_ADSL
 110 +       tristate "Support for ADSL"
 111 +       depends on BCM96338 || BCM96345 || BCM96348
 112 +
 113 +config BCM_ENDPOINT
 114 +       tristate "Support for VOICE"
 115 +       depends on BCM96338 || BCM96345 || BCM96348
 116 +
 117 +config BCM_PROCFS
 118 +       tristate "Support for PROCFS"
 119 +       depends on BCM96338 || BCM96345 || BCM96348
 120 +
 121 +config BCM_VDSL
 122 +       tristate "Support for VDSL"
 123 +       depends on BCM96338 || BCM96345 || BCM96348
 124 +
 125 +config BCM_SECURITY
 126 +       tristate "Support for SECURITY"
 127 +       depends on BCM96338 || BCM96345 || BCM96348
 128 +
 129 +config BCM_HPNA
 130 +       tristate "Support for HPNA"
 131 +       depends on BCM96338 || BCM96345 || BCM96348
 132 +
 133 +config BCM_BOARD_IMPL
 134 +       int "Implementation index for ADSL Board"
 135 +       depends on BCM96338 || BCM96345 || BCM96348
 136 +
 137 +config BCM_SERIAL_IMPL
 138 +       int "Implementation index for Serial"
 139 +       depends on BCM96338 || BCM96345 || BCM96348
 140 +
 141 +config BCM_ENET_IMPL
 142 +       int "Implementation index for Ethernet"
 143 +       depends on BCM96338 || BCM96345 || BCM96348
 144 +
 145 +config BCM_USB_IMPL
 146 +       int "Implementation index for USB"
 147 +       depends on BCM96338 || BCM96345 || BCM96348
 148 +
 149 +config BCM_WLAN_IMPL
 150 +       int "Implementation index for WIRELESS"
 151 +       depends on BCM96338 || BCM96345 || BCM96348
 152 +
 153 +config BCM_ATMAPI_IMPL
 154 +       int "Implementation index for ATM"
 155 +       depends on BCM96338 || BCM96345 || BCM96348
 156 +
 157 +config BCM_ATMTEST_IMPL
 158 +       int "Implementation index for ATM Diagnostic"
 159 +       depends on BCM96338 || BCM96345 || BCM96348
 160 +
 161 +config BCM_BLAA_IMPL
 162 +       int "Implementation index for BLAA"
 163 +       depends on BCM96338 || BCM96345 || BCM96348
 164 +
 165 +config BCM_ADSL_IMPL
 166 +       int "Implementation index for ADSL"
 167 +       depends on BCM96338 || BCM96345 || BCM96348
 168 +
 169 +config BCM_ENDPOINT_IMPL
 170 +       int "Implementation index for VOICE"
 171 +       depends on BCM96338 || BCM96345 || BCM96348
 172 +
 173 +config BCM_PROCFS_IMPL
 174 +       int "Implementation index for PROCFS"
 175 +       depends on BCM96338 || BCM96345 || BCM96348
 176 +
 177 +config BCM_VDSL_IMPL
 178 +       int "Implementation index for VDSL"
 179 +       depends on BCM96338 || BCM96345 || BCM96348
 180 +
 181 +config BCM_SECURITY_IMPL
 182 +       int "Implementation index for SECURITY"
 183 +       depends on BCM96338 || BCM96345 || BCM96348
 184 +
 185 +config BCM_HPNA_IMPL
 186 +       int "Implementation index for HPNA"
 187 +       depends on BCM96338 || BCM96345 || BCM96348
 188 +
 189 diff -urN linux-2.6.19/arch/mips/bcm963xx/Makefile linux-2.6.19.new/arch/mips/bcm963xx/Makefile
 190 --- linux-2.6.19/arch/mips/bcm963xx/Makefile    1970-01-01 01:00:00.000000000 +0100
 191 +++ linux-2.6.19.new/arch/mips/bcm963xx/Makefile        2006-12-16 18:46:31.000000000 +0100
 192 @@ -0,0 +1,23 @@
 193 +#
 194 +# Makefile for generic Broadcom MIPS boards
 195 +#
 196 +# Copyright (C) 2004 Broadcom Corporation
 197 +#
 198 +obj-y           := irq.o prom.o setup.o time.o ser_init.o bcm63xx_led.o  board.o  boardparms.o int-handler.o
 199 +
 200 +SRCBASE         := $(TOPDIR)
 201 +EXTRA_CFLAGS    += -I$(SRCBASE)/include
 202 +#EXTRA_CFLAGS    += -I$(INC_ADSLDRV_PATH) -DDBG
 203 +EXTRA_CFLAGS    += -I$(INC_ADSLDRV_PATH)
 204 +
 205 +
 206 +ifeq "$(ADSL)" "ANNEX_B"
 207 +EXTRA_CFLAGS += -DADSL_ANNEXB
 208 +endif
 209 +ifeq "$(ADSL)" "SADSL"
 210 +EXTRA_CFLAGS += -DADSL_SADSL
 211 +endif
 212 +ifeq "$(ADSL)" "ANNEX_C"
 213 +EXTRA_CFLAGS += -DADSL_ANNEXC
 214 +endif
 215 +
 216 diff -urN linux-2.6.19/arch/mips/bcm963xx/bcm63xx_led.c linux-2.6.19.new/arch/mips/bcm963xx/bcm63xx_led.c
 217 --- linux-2.6.19/arch/mips/bcm963xx/bcm63xx_led.c       1970-01-01 01:00:00.000000000 +0100
 218 +++ linux-2.6.19.new/arch/mips/bcm963xx/bcm63xx_led.c   2006-12-16 18:46:31.000000000 +0100
 219 @@ -0,0 +1,582 @@
 220 +/*
 221 +<:copyright-gpl
 222 + Copyright 2002 Broadcom Corp. All Rights Reserved.
 223 +
 224 + This program is free software; you can distribute it and/or modify it
 225 + under the terms of the GNU General Public License (Version 2) as
 226 + published by the Free Software Foundation.
 227 +
 228 + This program is distributed in the hope it will be useful, but WITHOUT
 229 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 230 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 231 + for more details.
 232 +
 233 + You should have received a copy of the GNU General Public License along
 234 + with this program; if not, write to the Free Software Foundation, Inc.,
 235 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 236 +:>
 237 +*/
 238 +/***************************************************************************
 239 + * File Name  : bcm63xx_led.c
 240 + *
 241 + * Description:
 242 + *
 243 + *    This file contains bcm963xx board led control API functions.
 244 + *
 245 + *    To use it, do the following
 246 + *
 247 + *    1). define in the board.c the following led mappping (this is for 6345GW board):
 248 + *        const LED_MAP_PAIR cLedMapping45GW[] =
 249 + *        {   // led name     Initial state       physical pin (ledMask)
 250 + *            {kLedUsb,       kLedStateOff,       GPIO_LED_PIN_7},
 251 + *            {kLedAdsl,      kLedStateOff,       GPIO_LED_PIN_8},
 252 + *            {kLedPPP,       kLedStateOff,       GPIO_LED_PIN_9},    // PPP and WanData share PIN_9
 253 + *            {kLedWanData,   kLedStateOff,       GPIO_LED_PIN_9},
 254 + *            {kLedWireless,  kLedStateOff,       GPIO_LED_PIN_10},
 255 + *            {kLedEnd,       kLedStateOff,       0              } // NOTE: kLedEnd has to be at the end.
 256 + *
 257 + *    2). };To initialize led API and initial state of the leds, call the following function with the mapping
 258 + *        pointer from the above struct
 259 + *
 260 + *        boardLedInit((PLED_MAP_PAIR) &cLedMapping45R);
 261 + *
 262 + *    3). Sample call for kernel mode:
 263 + *
 264 + *        kerSysLedCtrl(kLedAdsl, kLedStateBlinkOnce);        // kLedxxx defines in board.h
 265 + *
 266 + *    4). Sample call for user mode
 267 + *
 268 + *        sysLedCtrl(kLedAdsl, kLedStateBlinkOnce);           // kLedxxx defines in board_api.h
 269 + *
 270 + *
 271 + * Created on :  10/28/2002  seanl
 272 + *
 273 + ***************************************************************************/
 274 +
 275 +/* Includes. */
 276 +#include <linux/init.h>
 277 +#include <linux/fs.h>
 278 +#include <linux/capability.h>
 279 +#include <linux/slab.h>
 280 +#include <linux/errno.h>
 281 +#include <linux/module.h>
 282 +#include <linux/netdevice.h>
 283 +#include <asm/uaccess.h>
 284 +
 285 +#include <bcm_map_part.h>
 286 +#include <board.h>
 287 +
 288 +#define k100ms              (HZ / 10)     // ~100 ms
 289 +#define kFastBlinkCount     0             // ~100ms
 290 +#define kSlowBlinkCount     5             // ~600ms
 291 +
 292 +#define MAX_VIRT_LEDS       12
 293 +
 294 +// uncomment // for debug led
 295 +//#define DEBUG_LED
 296 +
 297 +// global variables:
 298 +struct timer_list gLedTimer;
 299 +int gTimerOn = FALSE;
 300 +int gLedCount = 0;
 301 +
 302 +typedef struct ledinfo
 303 +{
 304 +    unsigned short ledMask;         // mask for led: ie. giop 10 = 0x0400
 305 +    unsigned short ledActiveLow;    // GPIO bit reset to turn on LED
 306 +    unsigned short ledMaskFail;     // mask for led: ie. giop 10 = 0x0400
 307 +    unsigned short ledActiveLowFail;// GPIO bit reset to turn on LED
 308 +    BOARD_LED_STATE ledState;       // current led state
 309 +    BOARD_LED_STATE savedLedState;  // used in blink once for restore to the orignal ledState
 310 +    int blinkCountDown;             // if == 0, do blink (toggle).  Is assgined value and dec by 1 at each timer.
 311 +} LED_INFO, *PLED_INFO;
 312 +
 313 +static PLED_INFO gLed = NULL;
 314 +static PLED_INFO gpVirtLeds[MAX_VIRT_LEDS];
 315 +static HANDLE_LED_FUNC gLedHwFunc[MAX_VIRT_LEDS];
 316 +static HANDLE_LED_FUNC gLedHwFailFunc[MAX_VIRT_LEDS];
 317 +
 318 +#if 0 /* BROKEN */
 319 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
 320 +static int gLedOffInBridgeMode = 1;
 321 +#elif defined(CONFIG_BCM96345)
 322 +static int gLedOffInBridgeMode = 0;
 323 +#endif
 324 +#endif
 325 +
 326 +void ledTimerExpire(void);
 327 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed );
 328 +
 329 +//**************************************************************************************
 330 +// LED operations
 331 +//**************************************************************************************
 332 +
 333 +// turn led on and set the ledState
 334 +void ledOn(PLED_INFO pLed)
 335 +{
 336 +    if( pLed->ledMask )
 337 +    {
 338 +        GPIO->GPIODir |= pLed->ledMask;         // turn on the direction bit in case was turned off by some one
 339 +        if( pLed->ledActiveLow )
 340 +            GPIO->GPIOio  &= ~pLed->ledMask;    // turn on the led
 341 +        else
 342 +            GPIO->GPIOio  |= pLed->ledMask;     // turn on the led
 343 +        pLed->ledState = pLed->savedLedState = kLedStateOn;
 344 +    }
 345 +}
 346 +
 347 +
 348 +// turn led off and set the ledState
 349 +void ledOff(PLED_INFO pLed)
 350 +{
 351 +    if( pLed->ledMask )
 352 +    {
 353 +        GPIO->GPIODir |= pLed->ledMask;         // turn on the direction bit in case was turned off by some one
 354 +        if( pLed->ledActiveLow )
 355 +            GPIO->GPIOio  |= pLed->ledMask;     // turn off the led
 356 +        else
 357 +            GPIO->GPIOio  &= ~pLed->ledMask;    // turn off the led
 358 +        pLed->ledState = pLed->savedLedState = kLedStateOff;
 359 +    }
 360 +}
 361 +
 362 +// turn led on and set the ledState
 363 +void ledOnFail(PLED_INFO pLed)
 364 +{
 365 +    if( pLed->ledMaskFail )
 366 +    {
 367 +        GPIO->GPIODir |= pLed->ledMaskFail;     // turn on the direction bit in case was turned off by some one
 368 +        if( pLed->ledActiveLowFail )
 369 +            GPIO->GPIOio  &= ~pLed->ledMaskFail;// turn on the led
 370 +        else
 371 +            GPIO->GPIOio  |= pLed->ledMaskFail; // turn on the led
 372 +        pLed->ledState = pLed->savedLedState = kLedStateFail;
 373 +    }
 374 +}
 375 +
 376 +
 377 +// turn led off and set the ledState
 378 +void ledOffFail(PLED_INFO pLed)
 379 +{
 380 +    if( pLed->ledMaskFail )
 381 +    {
 382 +        GPIO->GPIODir |= pLed->ledMaskFail;     // turn on the direction bit in case was turned off by some one
 383 +        if( pLed->ledActiveLowFail )
 384 +            GPIO->GPIOio  |= pLed->ledMaskFail; // turn off the led
 385 +        else
 386 +            GPIO->GPIOio  &= ~pLed->ledMaskFail;// turn off the led
 387 +        pLed->ledState = pLed->savedLedState = kLedStateOff;
 388 +    }
 389 +}
 390 +
 391 +
 392 +// toggle the led and return the current ledState
 393 +BOARD_LED_STATE ledToggle(PLED_INFO pLed)
 394 +{
 395 +    GPIO->GPIODir |= pLed->ledMask;         // turn on the direction bit in case was turned off by some one
 396 +    if (GPIO->GPIOio & pLed->ledMask)
 397 +    {
 398 +        GPIO->GPIOio &= ~(pLed->ledMask);
 399 +        return( (pLed->ledActiveLow) ? kLedStateOn : kLedStateOff );
 400 +    }
 401 +    else
 402 +    {
 403 +        GPIO->GPIOio |= pLed->ledMask;
 404 +        return( (pLed->ledActiveLow) ? kLedStateOff : kLedStateOn );
 405 +    }
 406 +}
 407 +
 408 +
 409 +// led timer.  Will return if timer is already on
 410 +void ledTimerStart(void)
 411 +{
 412 +    if (gTimerOn)
 413 +        return;
 414 +
 415 +#if defined(DEBUG_LED)
 416 +    printk("led: add_timer\n");
 417 +#endif
 418 +
 419 +    init_timer(&gLedTimer);
 420 +    gLedTimer.function = (void*)ledTimerExpire;
 421 +    gLedTimer.expires = jiffies + k100ms;        // timer expires in ~100ms
 422 +    add_timer (&gLedTimer);
 423 +    gTimerOn = TRUE;
 424 +}
 425 +
 426 +
 427 +// led timer expire kicks in about ~100ms and perform the led operation according to the ledState and
 428 +// restart the timer according to ledState
 429 +void ledTimerExpire(void)
 430 +{
 431 +    int i;
 432 +    PLED_INFO pCurLed;
 433 +
 434 +    gTimerOn = FALSE;
 435 +
 436 +    for (i = 0, pCurLed = gLed; i < gLedCount; i++, pCurLed++)
 437 +    {
 438 +#if defined(DEBUG_LED)
 439 +        printk("led[%d]: Mask=0x%04x, State = %d, blcd=%d\n", i, pCurLed->ledMask, pCurLed->ledState, pCurLed->blinkCountDown);
 440 +#endif
 441 +        switch (pCurLed->ledState)
 442 +        {
 443 +            case kLedStateOn:
 444 +            case kLedStateOff:
 445 +            case kLedStateFail:
 446 +                pCurLed->blinkCountDown = 0;            // reset the blink count down
 447 +                break;
 448 +
 449 +            case kLedStateBlinkOnce:
 450 +                ledToggle(pCurLed);
 451 +                pCurLed->blinkCountDown = 0;                      // reset to 0
 452 +                pCurLed->ledState = pCurLed->savedLedState;
 453 +                if (pCurLed->ledState == kLedStateSlowBlinkContinues ||
 454 +                    pCurLed->ledState == kLedStateFastBlinkContinues)
 455 +                    ledTimerStart();                  // start timer if in blinkContinues stats
 456 +                break;
 457 +
 458 +            case kLedStateSlowBlinkContinues:
 459 +                if (pCurLed->blinkCountDown-- == 0)
 460 +                {
 461 +                    pCurLed->blinkCountDown = kSlowBlinkCount;
 462 +                    ledToggle(pCurLed);
 463 +                }
 464 +                ledTimerStart();
 465 +                break;
 466 +
 467 +            case kLedStateFastBlinkContinues:
 468 +                if (pCurLed->blinkCountDown-- == 0)
 469 +                {
 470 +                    pCurLed->blinkCountDown = kFastBlinkCount;
 471 +                    ledToggle(pCurLed);
 472 +                }
 473 +                ledTimerStart();
 474 +                break;
 475 +
 476 +            default:
 477 +                printk("Invalid state = %d\n", pCurLed->ledState);
 478 +        }
 479 +    }
 480 +}
 481 +
 482 +// initialize the gLedCount and allocate and fill gLed struct
 483 +void __init boardLedInit(PLED_MAP_PAIR cLedMapping)
 484 +{
 485 +    PLED_MAP_PAIR p1, p2;
 486 +    PLED_INFO pCurLed;
 487 +    int needTimer = FALSE;
 488 +    int alreadyUsed = 0;
 489 +
 490 +#if defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
 491 +    /* Set blink rate for BCM6348/BCM6338 hardware LEDs. */
 492 +    GPIO->LEDCtrl &= ~LED_INTERVAL_SET_MASK;
 493 +    GPIO->LEDCtrl |= LED_INTERVAL_SET_80MS;
 494 +#endif
 495 +
 496 +    memset( gpVirtLeds, 0x00, sizeof(gpVirtLeds) );
 497 +    memset( gLedHwFunc, 0x00, sizeof(gLedHwFunc) );
 498 +    memset( gLedHwFailFunc, 0x00, sizeof(gLedHwFailFunc) );
 499 +
 500 +    gLedCount = 0;
 501 +
 502 +    // Check for multiple LED names and multiple LED GPIO pins that share the
 503 +    // same physical board LED.
 504 +    for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
 505 +    {
 506 +        alreadyUsed = 0;
 507 +        for( p2 = cLedMapping; p2 != p1; p2++ )
 508 +        {
 509 +            if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
 510 +                (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
 511 +            {
 512 +                alreadyUsed = 1;
 513 +                break;
 514 +            }
 515 +        }
 516 +
 517 +        if( alreadyUsed == 0  )
 518 +            gLedCount++;
 519 +    }
 520 +
 521 +    gLed = (PLED_INFO) kmalloc((gLedCount * sizeof(LED_INFO)), GFP_KERNEL);
 522 +    if( gLed == NULL )
 523 +    {
 524 +        printk( "LED memory allocation error.\n" );
 525 +        return;
 526 +    }
 527 +
 528 +    memset( gLed, 0x00, gLedCount * sizeof(LED_INFO) );
 529 +
 530 +    // initial the gLed with unique ledMask and initial state. If more than 1 ledNames share the physical led
 531 +    // (ledMask) the first defined led's ledInitState will be used.
 532 +    pCurLed = gLed;
 533 +    for( p1 = cLedMapping; p1->ledName != kLedEnd; p1++ )
 534 +    {
 535 +        if( (int) p1->ledName > MAX_VIRT_LEDS )
 536 +            continue;
 537 +
 538 +        alreadyUsed = 0;
 539 +        for( p2 = cLedMapping; p2 != p1; p2++ )
 540 +        {
 541 +            if( (p1->ledMask && p1->ledMask == p2->ledMask) ||
 542 +                (p1->ledMaskFail && p1->ledMaskFail == p2->ledMaskFail) )
 543 +            {
 544 +                alreadyUsed = 1;
 545 +                break;
 546 +            }
 547 +        }
 548 +
 549 +        if( alreadyUsed == 0 )
 550 +        {
 551 +            // Initialize the board LED for the first time.
 552 +            needTimer = initLedInfo( p1, pCurLed );
 553 +            gpVirtLeds[(int) p1->ledName] = pCurLed;
 554 +            pCurLed++;
 555 +        }
 556 +        else
 557 +        {
 558 +            PLED_INFO pLed;
 559 +            for( pLed = gLed; pLed != pCurLed; pLed++ )
 560 +            {
 561 +                // Find the LED_INFO structure that has already been initialized.
 562 +                if((pLed->ledMask && pLed->ledMask == p1->ledMask) ||
 563 +                   (pLed->ledMaskFail && pLed->ledMaskFail==p1->ledMaskFail))
 564 +                {
 565 +                    // The board LED has already been initialized but possibly
 566 +                    // not completely initialized.
 567 +                    if( p1->ledMask )
 568 +                    {
 569 +                        pLed->ledMask = p1->ledMask;
 570 +                        pLed->ledActiveLow = p1->ledActiveLow;
 571 +                    }
 572 +                    if( p1->ledMaskFail )
 573 +                    {
 574 +                        pLed->ledMaskFail = p1->ledMaskFail;
 575 +                        pLed->ledActiveLowFail = p1->ledActiveLowFail;
 576 +                    }
 577 +                    gpVirtLeds[(int) p1->ledName] = pLed;
 578 +                    break;
 579 +                }
 580 +            }
 581 +        }
 582 +    }
 583 +
 584 +    if (needTimer)
 585 +        ledTimerStart();
 586 +
 587 +#if defined(DEBUG_LED)
 588 +    int i;
 589 +    for (i=0; i < gLedCount; i++)
 590 +        printk("initLed: led[%d]: mask=0x%04x, state=%d\n", i,(gLed+i)->ledMask, (gLed+i)->ledState);
 591 +#endif
 592 +
 593 +}
 594 +
 595 +// Initialize a structure that contains information about a physical board LED
 596 +// control.  The board LED may contain more than one GPIO pin to control a
 597 +// normal condition (green) or a failure condition (red).
 598 +int initLedInfo( PLED_MAP_PAIR pCurMap, PLED_INFO pCurLed )
 599 +{
 600 +    int needTimer = FALSE;
 601 +    pCurLed->ledState = pCurLed->savedLedState = pCurMap->ledInitState;
 602 +    pCurLed->ledMask = pCurMap->ledMask;
 603 +    pCurLed->ledActiveLow = pCurMap->ledActiveLow;
 604 +    pCurLed->ledMaskFail = pCurMap->ledMaskFail;
 605 +    pCurLed->ledActiveLowFail = pCurMap->ledActiveLowFail;
 606 +
 607 +    switch (pCurLed->ledState)
 608 +    {
 609 +        case kLedStateOn:
 610 +            pCurLed->blinkCountDown = 0;            // reset the blink count down
 611 +            ledOn(pCurLed);
 612 +            break;
 613 +        case kLedStateOff:
 614 +            pCurLed->blinkCountDown = 0;            // reset the blink count down
 615 +            ledOff(pCurLed);
 616 +            break;
 617 +        case kLedStateFail:
 618 +            pCurLed->blinkCountDown = 0;            // reset the blink count down
 619 +            ledOnFail(pCurLed);
 620 +            break;
 621 +        case kLedStateBlinkOnce:
 622 +            pCurLed->blinkCountDown = 1;
 623 +            needTimer = TRUE;
 624 +            break;
 625 +        case kLedStateSlowBlinkContinues:
 626 +            pCurLed->blinkCountDown = kSlowBlinkCount;
 627 +            needTimer = TRUE;
 628 +            break;
 629 +        case kLedStateFastBlinkContinues:
 630 +            pCurLed->blinkCountDown = kFastBlinkCount;
 631 +            needTimer = TRUE;
 632 +            break;
 633 +        default:
 634 +            printk("Invalid state = %d\n", pCurLed->ledState);
 635 +    }
 636 +
 637 +    return( needTimer );
 638 +}
 639 +
 640 +#if 0 /* BROKEN */
 641 +// Determines if there is at least one interface in bridge mode.  Bridge mode
 642 +// is determined by the cfm convention of naming bridge interfaces nas17
 643 +// through nas24.
 644 +static int isBridgedProtocol(void)
 645 +{
 646 +    extern int dev_get(const char *name);
 647 +    const int firstBridgeId = 17;
 648 +    const int lastBridgeId = 24;
 649 +    int i;
 650 +    int ret = FALSE;
 651 +    char name[16];
 652 +
 653 +    for( i = firstBridgeId; i <= lastBridgeId; i++ )
 654 +    {
 655 +        sprintf( name, "nas%d", i );
 656 +
 657 +        if( dev_get(name) )
 658 +        {
 659 +            ret = TRUE;
 660 +            break;
 661 +        }
 662 +    }
 663 +
 664 +    return(ret);
 665 +}
 666 +#endif
 667 +
 668 +// led ctrl.  Maps the ledName to the corresponding ledInfoPtr and perform the led operation
 669 +void boardLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
 670 +{
 671 +    PLED_INFO ledInfoPtr;
 672 +
 673 +    // do the mapping from virtual to physical led
 674 +    if( (int) ledName < MAX_VIRT_LEDS )
 675 +        ledInfoPtr = gpVirtLeds[(int) ledName];
 676 +    else
 677 +        ledInfoPtr = NULL;
 678 +
 679 +    if (ledInfoPtr == NULL)
 680 +        return;
 681 +
 682 +    if( ledState != kLedStateFail && gLedHwFunc[(int) ledName] )
 683 +    {
 684 +        (*gLedHwFunc[(int) ledName]) (ledName, ledState);
 685 +        ledOffFail(ledInfoPtr);
 686 +        return;
 687 +    }
 688 +    else
 689 +        if( ledState == kLedStateFail && gLedHwFailFunc[(int) ledName] )
 690 +        {
 691 +            (*gLedHwFailFunc[(int) ledName]) (ledName, ledState);
 692 +            ledOff(ledInfoPtr);
 693 +            return;
 694 +        }
 695 +
 696 +#if 0 /* BROKEN */
 697 +    // Do not blink the WAN Data LED if at least one interface is in bridge mode.
 698 +    if(gLedOffInBridgeMode == 1 && (ledName == kLedWanData || ledName == kLedPPP))
 699 +    {
 700 +        static int BridgedProtocol = -1;
 701 +
 702 +        if( BridgedProtocol == -1 )
 703 +            BridgedProtocol = isBridgedProtocol();
 704 +
 705 +        if( BridgedProtocol == TRUE )
 706 +            return;
 707 +    }
 708 +#endif
 709 +
 710 +    // If the state is kLedStateFail and there is not a failure LED defined
 711 +    // in the board parameters, change the state to kLedStateFastBlinkContinues.
 712 +    if( ledState == kLedStateFail && ledInfoPtr->ledMaskFail == 0 )
 713 +        ledState = kLedStateFastBlinkContinues;
 714 +
 715 +    switch (ledState)
 716 +    {
 717 +        case kLedStateOn:
 718 +            // First, turn off the complimentary (failure) LED GPIO.
 719 +            if( ledInfoPtr->ledMaskFail )
 720 +                ledOffFail(ledInfoPtr);
 721 +            else
 722 +                if( gLedHwFailFunc[(int) ledName] )
 723 +                    (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
 724 +
 725 +            // Next, turn on the specified LED GPIO.
 726 +            ledOn(ledInfoPtr);
 727 +            break;
 728 +
 729 +        case kLedStateOff:
 730 +            // First, turn off the complimentary (failure) LED GPIO.
 731 +            if( ledInfoPtr->ledMaskFail )
 732 +                ledOffFail(ledInfoPtr);
 733 +            else
 734 +                if( gLedHwFailFunc[(int) ledName] )
 735 +                    (*gLedHwFailFunc[(int) ledName]) (ledName, kLedStateOff);
 736 +
 737 +            // Next, turn off the specified LED GPIO.
 738 +            ledOff(ledInfoPtr);
 739 +            break;
 740 +
 741 +        case kLedStateFail:
 742 +            // First, turn off the complimentary (normal) LED GPIO.
 743 +            if( ledInfoPtr->ledMask )
 744 +                ledOff(ledInfoPtr);
 745 +            else
 746 +                if( gLedHwFunc[(int) ledName] )
 747 +                    (*gLedHwFunc[(int) ledName]) (ledName, kLedStateOff);
 748 +
 749 +            // Next, turn on (red) the specified LED GPIO.
 750 +            ledOnFail(ledInfoPtr);
 751 +            break;
 752 +
 753 +        case kLedStateBlinkOnce:
 754 +            // skip blinkOnce if it is already in Slow/Fast blink continues state
 755 +            if (ledInfoPtr->savedLedState == kLedStateSlowBlinkContinues ||
 756 +                ledInfoPtr->savedLedState == kLedStateFastBlinkContinues)
 757 +                ;
 758 +            else
 759 +            {
 760 +                if (ledInfoPtr->blinkCountDown == 0)  // skip the call if it is 1
 761 +                {
 762 +                    ledToggle(ledInfoPtr);
 763 +                    ledInfoPtr->blinkCountDown = 1;  // it will be reset to 0 when timer expires
 764 +                    ledInfoPtr->ledState = kLedStateBlinkOnce;
 765 +                    ledTimerStart();
 766 +                }
 767 +            }
 768 +            break;
 769 +
 770 +        case kLedStateSlowBlinkContinues:
 771 +            ledInfoPtr->blinkCountDown = kSlowBlinkCount;
 772 +            ledInfoPtr->ledState = kLedStateSlowBlinkContinues;
 773 +            ledInfoPtr->savedLedState = kLedStateSlowBlinkContinues;
 774 +            ledTimerStart();
 775 +            break;
 776 +
 777 +        case kLedStateFastBlinkContinues:
 778 +            ledInfoPtr->blinkCountDown = kFastBlinkCount;
 779 +            ledInfoPtr->ledState = kLedStateFastBlinkContinues;
 780 +            ledInfoPtr->savedLedState = kLedStateFastBlinkContinues;
 781 +            ledTimerStart();
 782 +            break;
 783 +
 784 +        default:
 785 +            printk("Invalid led state\n");
 786 +    }
 787 +}
 788 +
 789 +// This function is called for an LED that is controlled by hardware.
 790 +void kerSysLedRegisterHwHandler( BOARD_LED_NAME ledName,
 791 +    HANDLE_LED_FUNC ledHwFunc, int ledFailType )
 792 +{
 793 +    if( (int) ledName < MAX_VIRT_LEDS )
 794 +    {
 795 +        if( ledFailType == 1 )
 796 +            gLedHwFailFunc[(int) ledName] = ledHwFunc;
 797 +        else
 798 +            gLedHwFunc[(int) ledName] = ledHwFunc;
 799 +    }
 800 +}
 801 +
 802 diff -urN linux-2.6.19/arch/mips/bcm963xx/board.c linux-2.6.19.new/arch/mips/bcm963xx/board.c
 803 --- linux-2.6.19/arch/mips/bcm963xx/board.c     1970-01-01 01:00:00.000000000 +0100
 804 +++ linux-2.6.19.new/arch/mips/bcm963xx/board.c 2006-12-16 18:46:31.000000000 +0100
 805 @@ -0,0 +1,559 @@
 806 +/*
 807 +<:copyright-gpl
 808 + Copyright 2002 Broadcom Corp. All Rights Reserved.
 809 +
 810 + This program is free software; you can distribute it and/or modify it
 811 + under the terms of the GNU General Public License (Version 2) as
 812 + published by the Free Software Foundation.
 813 +
 814 + This program is distributed in the hope it will be useful, but WITHOUT
 815 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 816 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 817 + for more details.
 818 +
 819 + You should have received a copy of the GNU General Public License along
 820 + with this program; if not, write to the Free Software Foundation, Inc.,
 821 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 822 +:>
 823 +*/
 824 +
 825 +/* Includes. */
 826 +#include <linux/version.h>
 827 +#include <linux/init.h>
 828 +#include <linux/fs.h>
 829 +#include <linux/interrupt.h>
 830 +#include <linux/capability.h>
 831 +#include <linux/slab.h>
 832 +#include <linux/errno.h>
 833 +#include <linux/module.h>
 834 +#include <linux/pagemap.h>
 835 +#include <asm/uaccess.h>
 836 +#include <linux/wait.h>
 837 +#include <linux/poll.h>
 838 +#include <linux/sched.h>
 839 +#include <linux/list.h>
 840 +#include <linux/if.h>
 841 +#include <linux/spinlock.h>
 842 +
 843 +#include <bcm_map_part.h>
 844 +#include <board.h>
 845 +#include <bcmTag.h>
 846 +#include "boardparms.h"
 847 +#include "bcm_intr.h"
 848 +#include "board.h"
 849 +#include "bcm_map_part.h"
 850 +
 851 +static DEFINE_SPINLOCK(board_lock);
 852 +
 853 +/* Typedefs. */
 854 +#if defined (NON_CONSECUTIVE_MAC)
 855 +// used to be the last octet. Now changed to the first 5 bits of the the forth octet
 856 +// to reduced the duplicated MAC addresses.
 857 +#define CHANGED_OCTET   3
 858 +#define SHIFT_BITS      3
 859 +#else
 860 +#define CHANGED_OCTET   1
 861 +#define SHIFT_BITS      0
 862 +#endif
 863 +
 864 +typedef struct
 865 +{
 866 +    unsigned long ulId;
 867 +    char chInUse;
 868 +    char chReserved[3];
 869 +} MAC_ADDR_INFO, *PMAC_ADDR_INFO;
 870 +
 871 +typedef struct
 872 +{
 873 +    unsigned long ulSdramSize;
 874 +    unsigned long ulPsiSize;
 875 +    unsigned long ulNumMacAddrs;
 876 +    unsigned long ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
 877 +    MAC_ADDR_INFO MacAddrs[1];
 878 +} NVRAM_INFO, *PNVRAM_INFO;
 879 +
 880 +typedef struct
 881 +{
 882 +    unsigned long eventmask;
 883 +} BOARD_IOC, *PBOARD_IOC;
 884 +
 885 +
 886 +/*Dyinggasp callback*/
 887 +typedef void (*cb_dgasp_t)(void *arg);
 888 +typedef struct _CB_DGASP__LIST
 889 +{
 890 +    struct list_head list;
 891 +    char name[IFNAMSIZ];
 892 +    cb_dgasp_t cb_dgasp_fn;
 893 +    void *context;
 894 +}CB_DGASP_LIST , *PCB_DGASP_LIST;
 895 +
 896 +
 897 +static LED_MAP_PAIR LedMapping[] =
 898 +{   // led name     Initial state       physical pin (ledMask)
 899 +    {kLedEnd,       kLedStateOff,       0, 0, 0, 0},
 900 +    {kLedEnd,       kLedStateOff,       0, 0, 0, 0},
 901 +    {kLedEnd,       kLedStateOff,       0, 0, 0, 0},
 902 +    {kLedEnd,       kLedStateOff,       0, 0, 0, 0},
 903 +    {kLedEnd,       kLedStateOff,       0, 0, 0, 0},
 904 +    {kLedEnd,       kLedStateOff,       0, 0, 0, 0},
 905 +    {kLedEnd,       kLedStateOff,       0, 0, 0, 0},
 906 +    {kLedEnd,       kLedStateOff,       0, 0, 0, 0},
 907 +    {kLedEnd,       kLedStateOff,       0, 0, 0, 0} // NOTE: kLedEnd has to be at the end.
 908 +};
 909 +
 910 +/* Externs. */
 911 +extern struct file fastcall *fget_light(unsigned int fd, int *fput_needed);
 912 +extern unsigned int nr_free_pages (void);
 913 +extern const char *get_system_type(void);
 914 +extern void kerSysFlashInit(void);
 915 +extern unsigned long get_nvram_start_addr(void);
 916 +extern unsigned long get_scratch_pad_start_addr(void);
 917 +extern unsigned long getMemorySize(void);
 918 +extern void __init boardLedInit(PLED_MAP_PAIR);
 919 +extern void boardLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
 920 +extern void kerSysLedRegisterHandler( BOARD_LED_NAME ledName,
 921 +    HANDLE_LED_FUNC ledHwFunc, int ledFailType );
 922 +
 923 +/* Prototypes. */
 924 +void __init InitNvramInfo( void );
 925 +
 926 +/* DyingGasp function prototype */
 927 +static void __init kerSysDyingGaspMapIntr(void);
 928 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id);
 929 +static void __init kerSysInitDyingGaspHandler( void );
 930 +static void __exit kerSysDeinitDyingGaspHandler( void );
 931 +/* -DyingGasp function prototype - */
 932 +
 933 +static PNVRAM_INFO g_pNvramInfo = NULL;
 934 +static int g_ledInitialized = 0;
 935 +static CB_DGASP_LIST *g_cb_dgasp_list_head = NULL;
 936 +
 937 +static int g_wakeup_monitor = 0;
 938 +static struct file *g_monitor_file = NULL;
 939 +static struct task_struct *g_monitor_task = NULL;
 940 +static unsigned int (*g_orig_fop_poll)
 941 +    (struct file *, struct poll_table_struct *) = NULL;
 942 +
 943 +void kerSysMipsSoftReset(void)
 944 +{
 945 +    if (PERF->RevID == 0x634800A1) {
 946 +        typedef void (*FNPTR) (void);
 947 +        FNPTR bootaddr = (FNPTR) FLASH_BASE;
 948 +        int i;
 949 +
 950 +        /* Disable interrupts. */
 951 +        //cli();
 952 +       spin_lock_irq(&board_lock);
 953 +
 954 +        /* Reset all blocks. */
 955 +        PERF->BlockSoftReset &= ~BSR_ALL_BLOCKS;
 956 +        for( i = 0; i < 1000000; i++ )
 957 +            ;
 958 +        PERF->BlockSoftReset |= BSR_ALL_BLOCKS;
 959 +        /* Jump to the power on address. */
 960 +        (*bootaddr) ();
 961 +    }
 962 +    else
 963 +        PERF->pll_control |= SOFT_RESET;    // soft reset mips
 964 +}
 965 +
 966 +
 967 +int kerSysGetMacAddress( unsigned char *pucaMacAddr, unsigned long ulId )
 968 +{
 969 +    int nRet = 0;
 970 +    PMAC_ADDR_INFO pMai = NULL;
 971 +    PMAC_ADDR_INFO pMaiFreeNoId = NULL;
 972 +    PMAC_ADDR_INFO pMaiFreeId = NULL;
 973 +    unsigned long i = 0, ulIdxNoId = 0, ulIdxId = 0, shiftedIdx = 0;
 974 +
 975 +    /* CMO -- Fix le problème avec les adresses mac que l'on n'arrive pas
 976 +     *  * à relire plusieurs fois */
 977 +    /* inv_xde */
 978 +#if 0
 979 +    if (boot_loader_type == BOOT_CFE)
 980 +      memcpy( pucaMacAddr, g_pNvramInfo->ucaBaseMacAddr,
 981 +              NVRAM_MAC_ADDRESS_LEN );
 982 +    else {
 983 +#endif
 984 +      pucaMacAddr[0] = 0x00;
 985 +      pucaMacAddr[1] = 0x07;
 986 +      pucaMacAddr[2] = 0x3A;
 987 +      pucaMacAddr[3] = 0xFF;
 988 +      pucaMacAddr[4] = 0xFF;
 989 +      pucaMacAddr[5] = 0xFF;
 990 +#if 0
 991 +    }
 992 +#endif
 993 +
 994 +    return nRet;
 995 +} /* kerSysGetMacAddr */
 996 +
 997 +int kerSysReleaseMacAddress( unsigned char *pucaMacAddr )
 998 +{
 999 +    int nRet = -EINVAL;
1000 +    unsigned long ulIdx = 0;
1001 +    int idx = (pucaMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET] -
1002 +        g_pNvramInfo->ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN - CHANGED_OCTET]);
1003 +
1004 +    // if overflow 255 (negitive), add 256 to have the correct index
1005 +    if (idx < 0)
1006 +        idx += 256;
1007 +    ulIdx = (unsigned long) (idx >> SHIFT_BITS);
1008 +
1009 +    if( ulIdx < g_pNvramInfo->ulNumMacAddrs )
1010 +    {
1011 +        PMAC_ADDR_INFO pMai = &g_pNvramInfo->MacAddrs[ulIdx];
1012 +        if( pMai->chInUse == 1 )
1013 +        {
1014 +            pMai->chInUse = 0;
1015 +            nRet = 0;
1016 +        }
1017 +    }
1018 +
1019 +    return( nRet );
1020 +} /* kerSysReleaseMacAddr */
1021 +
1022 +int kerSysGetSdramSize( void )
1023 +{
1024 +  if (boot_loader_type == BOOT_CFE) {
1025 +    return( (int) g_pNvramInfo->ulSdramSize );
1026 +  }
1027 +  else {
1028 +    printk("kerSysGetSdramSize : 0x%08X\n", (int)getMemorySize() + 0x00040000);
1029 +    return((int)getMemorySize() + 0x00040000);
1030 +  }
1031 +} /* kerSysGetSdramSize */
1032 +
1033 +
1034 +void kerSysLedCtrl(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState)
1035 +{
1036 +    if (g_ledInitialized)
1037 +      boardLedCtrl(ledName, ledState);
1038 +}
1039 +
1040 +unsigned int kerSysMonitorPollHook( struct file *f, struct poll_table_struct *t)
1041 +{
1042 +    int mask = (*g_orig_fop_poll) (f, t);
1043 +
1044 +    if( g_wakeup_monitor == 1 && g_monitor_file == f )
1045 +    {
1046 +        /* If g_wakeup_monitor is non-0, the user mode application needs to
1047 +         * return from a blocking select function.  Return POLLPRI which will
1048 +         * cause the select to return with the exception descriptor set.
1049 +         */
1050 +        mask |= POLLPRI;
1051 +        g_wakeup_monitor = 0;
1052 +    }
1053 +
1054 +    return( mask );
1055 +}
1056 +
1057 +/* Put the user mode application that monitors link state on a run queue. */
1058 +void kerSysWakeupMonitorTask( void )
1059 +{
1060 +    g_wakeup_monitor = 1;
1061 +    if( g_monitor_task )
1062 +        wake_up_process( g_monitor_task );
1063 +}
1064 +
1065 +//<<JUNHON, 2004/09/15, get reset button status , tim hou , 05/04/12
1066 +int kerSysGetResetHold(void)
1067 +{
1068 +       unsigned short gpio;
1069 +
1070 +       if( BpGetPressAndHoldResetGpio( &gpio ) == BP_SUCCESS )
1071 +       {
1072 +    unsigned long gpio_mask = GPIO_NUM_TO_MASK(gpio);
1073 +    volatile unsigned long *gpio_reg = &GPIO->GPIOio;
1074 +
1075 +    if( (gpio & ~BP_ACTIVE_MASK) >= 32 )
1076 +    {
1077 +        gpio_mask = GPIO_NUM_TO_MASK_HIGH(gpio);
1078 +        gpio_reg = &GPIO->GPIOio_high;
1079 +    }
1080 +       //printk("gpio=%04x,gpio_mask=%04x,gpio_reg=%04x\n",gpio,gpio_mask,*gpio_reg);
1081 +       if(*gpio_reg & gpio_mask)  //press down
1082 +               return RESET_BUTTON_UP;
1083 +       }
1084 +       return RESET_BUTTON_PRESSDOWN;
1085 +}
1086 +//<<JUNHON, 2004/09/15
1087 +
1088 +/***************************************************************************
1089 + * Dying gasp ISR and functions.
1090 + ***************************************************************************/
1091 +#define KERSYS_DBG     printk
1092 +
1093 +#if defined(CONFIG_BCM96345)
1094 +#define        CYCLE_PER_US    70
1095 +#elif defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)
1096 +/* The BCM6348 cycles per microsecond is really variable since the BCM6348
1097 + * MIPS speed can vary depending on the PLL settings.  However, an appoximate
1098 + * value of 120 will still work OK for the test being done.
1099 + */
1100 +#define        CYCLE_PER_US    120
1101 +#endif
1102 +#define        DG_GLITCH_TO    (100*CYCLE_PER_US)
1103 +
1104 +static void __init kerSysDyingGaspMapIntr()
1105 +{
1106 +    unsigned long ulIntr;
1107 +
1108 +#if defined(CONFIG_BCM96348) || defined(_BCM96348_) || defined(CONFIG_BCM96338) || defined(_BCM96338_)
1109 +    if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
1110 +               BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, INTERRUPT_ID_DG);
1111 +               BcmHalInterruptEnable( INTERRUPT_ID_DG );
1112 +    }
1113 +#elif defined(CONFIG_BCM96345) || defined(_BCM96345_)
1114 +    if( BpGetAdslDyingGaspExtIntr( &ulIntr ) == BP_SUCCESS ) {
1115 +        ulIntr += INTERRUPT_ID_EXTERNAL_0;
1116 +        BcmHalMapInterrupt((FN_HANDLER)kerSysDyingGaspIsr, 0, ulIntr);
1117 +        BcmHalInterruptEnable( ulIntr );
1118 +    }
1119 +#endif
1120 +
1121 +}
1122 +
1123 +void kerSysSetWdTimer(ulong timeUs)
1124 +{
1125 +       TIMER->WatchDogDefCount = timeUs * (FPERIPH/1000000);
1126 +       TIMER->WatchDogCtl = 0xFF00;
1127 +       TIMER->WatchDogCtl = 0x00FF;
1128 +}
1129 +
1130 +ulong kerSysGetCycleCount(void)
1131 +{
1132 +    ulong cnt;
1133 +#ifdef _WIN32_WCE
1134 +    cnt = 0;
1135 +#else
1136 +    __asm volatile("mfc0 %0, $9":"=d"(cnt));
1137 +#endif
1138 +    return(cnt);
1139 +}
1140 +
1141 +static Bool kerSysDyingGaspCheckPowerLoss(void)
1142 +{
1143 +    ulong clk0;
1144 +    ulong ulIntr;
1145 +
1146 +    ulIntr = 0;
1147 +    clk0 = kerSysGetCycleCount();
1148 +
1149 +    UART->Data = 'D';
1150 +    UART->Data = '%';
1151 +    UART->Data = 'G';
1152 +
1153 +#if defined(CONFIG_BCM96345)
1154 +    BpGetAdslDyingGaspExtIntr( &ulIntr );
1155 +
1156 +    do {
1157 +        ulong clk1;
1158 +
1159 +        clk1 = kerSysGetCycleCount();          /* time cleared */
1160 +       /* wait a little to get new reading */
1161 +        while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
1162 +            ;
1163 +    } while ((0 == (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT)))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
1164 +
1165 +    if (PERF->ExtIrqCfg & (1 << (ulIntr + EI_STATUS_SHFT))) {  /* power glitch */
1166 +        BcmHalInterruptEnable( ulIntr + INTERRUPT_ID_EXTERNAL_0);
1167 +        KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
1168 +        return 0;
1169 +    }
1170 +#elif (defined(CONFIG_BCM96348) || defined(CONFIG_BCM96338)) && !defined(VXWORKS)
1171 +    do {
1172 +        ulong clk1;
1173 +
1174 +        clk1 = kerSysGetCycleCount();          /* time cleared */
1175 +       /* wait a little to get new reading */
1176 +        while ((kerSysGetCycleCount()-clk1) < CYCLE_PER_US*2)
1177 +            ;
1178 +     } while ((PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET))) && ((kerSysGetCycleCount() - clk0) < DG_GLITCH_TO));
1179 +
1180 +    if (!(PERF->IrqStatus & (1 << (INTERRUPT_ID_DG - INTERNAL_ISR_TABLE_OFFSET)))) {
1181 +        BcmHalInterruptEnable( INTERRUPT_ID_DG );
1182 +        KERSYS_DBG(" - Power glitch detected. Duration: %ld us\n", (kerSysGetCycleCount() - clk0)/CYCLE_PER_US);
1183 +        return 0;
1184 +    }
1185 +#endif
1186 +    return 1;
1187 +}
1188 +
1189 +static void kerSysDyingGaspShutdown( void )
1190 +{
1191 +    kerSysSetWdTimer(1000000);
1192 +#if defined(CONFIG_BCM96345)
1193 +    PERF->blkEnables &= ~(EMAC_CLK_EN | USB_CLK_EN | CPU_CLK_EN);
1194 +#elif defined(CONFIG_BCM96348)
1195 +    PERF->blkEnables &= ~(EMAC_CLK_EN | USBS_CLK_EN | USBH_CLK_EN | SAR_CLK_EN);
1196 +#endif
1197 +}
1198 +
1199 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
1200 +static irqreturn_t kerSysDyingGaspIsr(int irq, void * dev_id)
1201 +#else
1202 +static unsigned int kerSysDyingGaspIsr(void)
1203 +#endif
1204 +{
1205 +    struct list_head *pos;
1206 +    CB_DGASP_LIST *tmp, *dsl = NULL;
1207 +
1208 +    if (kerSysDyingGaspCheckPowerLoss()) {
1209 +
1210 +        /* first to turn off everything other than dsl */
1211 +        list_for_each(pos, &g_cb_dgasp_list_head->list) {
1212 +            tmp = list_entry(pos, CB_DGASP_LIST, list);
1213 +           if(strncmp(tmp->name, "dsl", 3)) {
1214 +               (tmp->cb_dgasp_fn)(tmp->context);
1215 +           }else {
1216 +               dsl = tmp;
1217 +           }
1218 +        }
1219 +
1220 +        /* now send dgasp */
1221 +        if(dsl)
1222 +            (dsl->cb_dgasp_fn)(dsl->context);
1223 +
1224 +        /* reset and shutdown system */
1225 +        kerSysDyingGaspShutdown();
1226 +    }
1227 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0))
1228 +return( IRQ_HANDLED );
1229 +#else
1230 +    return( 1 );
1231 +#endif
1232 +}
1233 +
1234 +static void __init kerSysInitDyingGaspHandler( void )
1235 +{
1236 +    CB_DGASP_LIST *new_node;
1237 +
1238 +    if( g_cb_dgasp_list_head != NULL) {
1239 +        printk("Error: kerSysInitDyingGaspHandler: list head is not null\n");
1240 +        return;
1241 +    }
1242 +    new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
1243 +    memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
1244 +    INIT_LIST_HEAD(&new_node->list);
1245 +    g_cb_dgasp_list_head = new_node;
1246 +
1247 +} /* kerSysInitDyingGaspHandler */
1248 +
1249 +static void __exit kerSysDeinitDyingGaspHandler( void )
1250 +{
1251 +    struct list_head *pos;
1252 +    CB_DGASP_LIST *tmp;
1253 +
1254 +    if(g_cb_dgasp_list_head == NULL)
1255 +        return;
1256 +
1257 +    list_for_each(pos, &g_cb_dgasp_list_head->list) {
1258 +       tmp = list_entry(pos, CB_DGASP_LIST, list);
1259 +        list_del(pos);
1260 +       kfree(tmp);
1261 +    }
1262 +
1263 +    kfree(g_cb_dgasp_list_head);
1264 +    g_cb_dgasp_list_head = NULL;
1265 +
1266 +} /* kerSysDeinitDyingGaspHandler */
1267 +
1268 +void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context)
1269 +{
1270 +    CB_DGASP_LIST *new_node;
1271 +
1272 +    if( g_cb_dgasp_list_head == NULL) {
1273 +        printk("Error: kerSysRegisterDyingGaspHandler: list head is null\n");
1274 +        return;
1275 +    }
1276 +
1277 +    if( devname == NULL || cbfn == NULL ) {
1278 +        printk("Error: kerSysRegisterDyingGaspHandler: register info not enough (%s,%x,%x)\n", devname, (unsigned int)cbfn, (unsigned int)context);
1279 +        return;
1280 +    }
1281 +
1282 +    new_node= (CB_DGASP_LIST *)kmalloc(sizeof(CB_DGASP_LIST), GFP_KERNEL);
1283 +    memset(new_node, 0x00, sizeof(CB_DGASP_LIST));
1284 +    INIT_LIST_HEAD(&new_node->list);
1285 +    strncpy(new_node->name, devname, IFNAMSIZ);
1286 +    new_node->cb_dgasp_fn = (cb_dgasp_t)cbfn;
1287 +    new_node->context = context;
1288 +    list_add(&new_node->list, &g_cb_dgasp_list_head->list);
1289 +
1290 +    printk("dgasp: kerSysRegisterDyingGaspHandler: %s registered \n", devname);
1291 +
1292 +} /* kerSysRegisterDyingGaspHandler */
1293 +
1294 +void kerSysDeregisterDyingGaspHandler(char *devname)
1295 +{
1296 +    struct list_head *pos;
1297 +    CB_DGASP_LIST *tmp;
1298 +
1299 +    if(g_cb_dgasp_list_head == NULL) {
1300 +        printk("Error: kerSysDeregisterDyingGaspHandler: list head is null\n");
1301 +        return;
1302 +    }
1303 +
1304 +    if(devname == NULL) {
1305 +        printk("Error: kerSysDeregisterDyingGaspHandler: devname is null\n");
1306 +        return;
1307 +    }
1308 +
1309 +    printk("kerSysDeregisterDyingGaspHandler: %s is deregistering\n", devname);
1310 +
1311 +    list_for_each(pos, &g_cb_dgasp_list_head->list) {
1312 +       tmp = list_entry(pos, CB_DGASP_LIST, list);
1313 +       if(!strcmp(tmp->name, devname)) {
1314 +            list_del(pos);
1315 +           kfree(tmp);
1316 +           printk("kerSysDeregisterDyingGaspHandler: %s is deregistered\n", devname);
1317 +           return;
1318 +       }
1319 +    }
1320 +    printk("kerSysDeregisterDyingGaspHandler: %s not (de)registered\n", devname);
1321 +
1322 +} /* kerSysDeregisterDyingGaspHandler */
1323 +
1324 +//EXPORT_SYMBOL(kerSysNvRamGet);
1325 +EXPORT_SYMBOL(kerSysGetMacAddress);
1326 +EXPORT_SYMBOL(kerSysReleaseMacAddress);
1327 +EXPORT_SYMBOL(kerSysGetSdramSize);
1328 +EXPORT_SYMBOL(kerSysLedCtrl);
1329 +EXPORT_SYMBOL(kerSysGetResetHold);
1330 +EXPORT_SYMBOL(kerSysLedRegisterHwHandler);
1331 +EXPORT_SYMBOL(BpGetBoardIds);
1332 +EXPORT_SYMBOL(BpGetSdramSize);
1333 +EXPORT_SYMBOL(BpGetPsiSize);
1334 +EXPORT_SYMBOL(BpGetEthernetMacInfo);
1335 +EXPORT_SYMBOL(BpGetRj11InnerOuterPairGpios);
1336 +EXPORT_SYMBOL(BpGetPressAndHoldResetGpio);
1337 +EXPORT_SYMBOL(BpGetVoipResetGpio);
1338 +EXPORT_SYMBOL(BpGetVoipIntrGpio);
1339 +EXPORT_SYMBOL(BpGetPcmciaResetGpio);
1340 +EXPORT_SYMBOL(BpGetRtsCtsUartGpios);
1341 +EXPORT_SYMBOL(BpGetAdslLedGpio);
1342 +EXPORT_SYMBOL(BpGetAdslFailLedGpio);
1343 +EXPORT_SYMBOL(BpGetWirelessLedGpio);
1344 +EXPORT_SYMBOL(BpGetUsbLedGpio);
1345 +EXPORT_SYMBOL(BpGetHpnaLedGpio);
1346 +EXPORT_SYMBOL(BpGetWanDataLedGpio);
1347 +EXPORT_SYMBOL(BpGetPppLedGpio);
1348 +EXPORT_SYMBOL(BpGetPppFailLedGpio);
1349 +EXPORT_SYMBOL(BpGetVoipLedGpio);
1350 +EXPORT_SYMBOL(BpGetWirelessExtIntr);
1351 +EXPORT_SYMBOL(BpGetAdslDyingGaspExtIntr);
1352 +EXPORT_SYMBOL(BpGetVoipExtIntr);
1353 +EXPORT_SYMBOL(BpGetHpnaExtIntr);
1354 +EXPORT_SYMBOL(BpGetHpnaChipSelect);
1355 +EXPORT_SYMBOL(BpGetVoipChipSelect);
1356 +EXPORT_SYMBOL(BpGetWirelessSesBtnGpio);
1357 +EXPORT_SYMBOL(BpGetWirelessSesExtIntr);
1358 +EXPORT_SYMBOL(BpGetWirelessSesLedGpio);
1359 +EXPORT_SYMBOL(kerSysRegisterDyingGaspHandler);
1360 +EXPORT_SYMBOL(kerSysDeregisterDyingGaspHandler);
1361 +EXPORT_SYMBOL(kerSysGetCycleCount);
1362 +EXPORT_SYMBOL(kerSysSetWdTimer);
1363 +EXPORT_SYMBOL(kerSysWakeupMonitorTask);
1364 +
1365 diff -urN linux-2.6.19/arch/mips/bcm963xx/boardparms.c linux-2.6.19.new/arch/mips/bcm963xx/boardparms.c
1366 --- linux-2.6.19/arch/mips/bcm963xx/boardparms.c        1970-01-01 01:00:00.000000000 +0100
1367 +++ linux-2.6.19.new/arch/mips/bcm963xx/boardparms.c    2006-12-16 18:46:31.000000000 +0100
1368 @@ -0,0 +1,2391 @@
1369 +/*
1370 +<:copyright-gpl
1371 +
1372 + Copyright 2003 Broadcom Corp. All Rights Reserved.
1373 +
1374 + This program is free software; you can distribute it and/or modify it
1375 + under the terms of the GNU General Public License (Version 2) as
1376 + published by the Free Software Foundation.
1377 +
1378 + This program is distributed in the hope it will be useful, but WITHOUT
1379 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
1380 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
1381 + for more details.
1382 +
1383 + You should have received a copy of the GNU General Public License along
1384 + with this program; if not, write to the Free Software Foundation, Inc.,
1385 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
1386 +
1387 +:>
1388 +*/
1389 +/**************************************************************************
1390 + * File Name  : boardparms.c
1391 + *
1392 + * Description: This file contains the implementation for the BCM63xx board
1393 + *              parameter access functions.
1394 + *
1395 + * Updates    : 07/14/2003  Created.
1396 + ***************************************************************************/
1397 +
1398 +/* Includes. */
1399 +#include "boardparms.h"
1400 +
1401 +/* Defines. */
1402 +
1403 +/* Default psi size in K bytes */
1404 +#define BP_PSI_DEFAULT_SIZE                     24
1405 +
1406 +/* Typedefs */
1407 +typedef struct boardparameters
1408 +{
1409 +    char szBoardId[BP_BOARD_ID_LEN];        /* board id string */
1410 +    ETHERNET_MAC_INFO EnetMacInfos[BP_MAX_ENET_MACS];
1411 +    VOIP_DSP_INFO VoIPDspInfo[BP_MAX_VOIP_DSP];
1412 +    unsigned short usSdramSize;             /* SDRAM size and type */
1413 +    unsigned short usPsiSize;               /* persistent storage in K bytes */
1414 +    unsigned short usGpioRj11InnerPair;     /* GPIO pin or not defined */
1415 +    unsigned short usGpioRj11OuterPair;     /* GPIO pin or not defined */
1416 +    unsigned short usGpioPressAndHoldReset; /* GPIO pin or not defined */
1417 +    unsigned short usGpioPcmciaReset;       /* GPIO pin or not defined */
1418 +    unsigned short usGpioUartRts;           /* GPIO pin or not defined */
1419 +    unsigned short usGpioUartCts;           /* GPIO pin or not defined */
1420 +    unsigned short usGpioLedAdsl;           /* GPIO pin or not defined */
1421 +    unsigned short usGpioLedAdslFail;       /* GPIO pin or not defined */
1422 +    unsigned short usGpioLedWireless;       /* GPIO pin or not defined */
1423 +    unsigned short usGpioLedUsb;            /* GPIO pin or not defined */
1424 +    unsigned short usGpioLedHpna;           /* GPIO pin or not defined */
1425 +    unsigned short usGpioLedWanData;        /* GPIO pin or not defined */
1426 +    unsigned short usGpioLedPpp;            /* GPIO pin or not defined */
1427 +    unsigned short usGpioLedPppFail;        /* GPIO pin or not defined */
1428 +    unsigned short usGpioLedBlPowerOn;      /* GPIO pin or not defined */
1429 +    unsigned short usGpioLedBlAlarm;        /* GPIO pin or not defined */
1430 +    unsigned short usGpioLedBlResetCfg;     /* GPIO pin or not defined */
1431 +    unsigned short usGpioLedBlStop;         /* GPIO pin or not defined */
1432 +    unsigned short usExtIntrWireless;       /* ext intr or not defined */
1433 +    unsigned short usExtIntrAdslDyingGasp;  /* ext intr or not defined */
1434 +    unsigned short usExtIntrHpna;           /* ext intr or not defined */
1435 +    unsigned short usCsHpna;                /* chip select not defined */
1436 +    unsigned short usAntInUseWireless;     /* antenna in use or not defined */
1437 +    unsigned short usGpioSesBtnWireless;    /* GPIO pin or not defined */
1438 +    unsigned short usExtIntrSesBtnWireless; /* ext intr or not defined */
1439 +    unsigned short usGpioLedSesWireless;    /* GPIO pin or not defined */
1440 +} BOARD_PARAMETERS, *PBOARD_PARAMETERS;
1441 +
1442 +/* Variables */
1443 +#if defined(_BCM96338_) || defined(CONFIG_BCM96338)
1444 +static BOARD_PARAMETERS g_bcm96338sv =
1445 +{
1446 +    "96338SV",                               /* szBoardId */
1447 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
1448 +      0x01,                                 /* ucPhyAddress */
1449 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1450 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1451 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1452 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1453 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1454 +      0x01,                                 /* numSwitchPorts */
1455 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1456 +      BP_NOT_DEFINED},                      /* usReverseMii */
1457 +     {BP_ENET_NO_PHY}},                     /* ucPhyType */
1458 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
1459 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1460 +    BP_MEMORY_16MB_1_CHIP,                  /* usSdramSize */
1461 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1462 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
1463 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
1464 +    BP_NOT_DEFINED,                         /* usGpioPressAndHoldReset */
1465 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
1466 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1467 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1468 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
1469 +    BP_NOT_DEFINED,                         /* usGpioLedAdslFail */
1470 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1471 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
1472 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1473 +    BP_NOT_DEFINED,                         /* usGpioLedWanData */
1474 +    BP_NOT_DEFINED,                         /* usGpioLedPpp */
1475 +    BP_NOT_DEFINED,                         /* usGpioLedPppFail */
1476 +    BP_NOT_DEFINED,                         /* usGpioLedBlPowerOn */
1477 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
1478 +    BP_NOT_DEFINED,                         /* usGpioLedBlResetCfg */
1479 +    BP_NOT_DEFINED,                         /* usGpioLedBlStop */
1480 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
1481 +    BP_HW_DEFINED,                          /* usExtIntrAdslDyingGasp */
1482 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1483 +    BP_NOT_DEFINED,                         /* usCsHpna */
1484 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
1485 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1486 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1487 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1488 +};
1489 +static BOARD_PARAMETERS g_bcm96338l2m8m =
1490 +{
1491 +    "96338L-2M-8M",                         /* szBoardId */
1492 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
1493 +      0x01,                                 /* ucPhyAddress */
1494 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1495 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1496 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1497 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1498 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1499 +      0x01,                                 /* numSwitchPorts */
1500 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1501 +      BP_NOT_DEFINED},                      /* usReverseMii */
1502 +     {BP_ENET_NO_PHY}},                     /* ucPhyType */
1503 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
1504 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1505 +    BP_MEMORY_8MB_1_CHIP,                   /* usSdramSize */
1506 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1507 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
1508 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
1509 +    BP_NOT_DEFINED,                         /* usGpioPressAndHoldReset */
1510 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
1511 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1512 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1513 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
1514 +    BP_GPIO_2_AL,                           /* usGpioLedAdslFail */
1515 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1516 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
1517 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1518 +    BP_GPIO_3_AL,                           /* usGpioLedWanData */
1519 +    BP_GPIO_3_AL,                           /* usGpioLedPpp */
1520 +    BP_GPIO_4_AL,                           /* usGpioLedPppFail */
1521 +    BP_GPIO_0_AL,                           /* usGpioLedBlPowerOn */
1522 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
1523 +    BP_GPIO_3_AL,                           /* usGpioLedBlResetCfg */
1524 +    BP_GPIO_1_AL,                           /* usGpioLedBlStop */
1525 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
1526 +    BP_HW_DEFINED,                          /* usExtIntrAdslDyingGasp */
1527 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1528 +    BP_NOT_DEFINED,                         /* usCsHpna */
1529 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
1530 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1531 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1532 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1533 +};
1534 +static PBOARD_PARAMETERS g_BoardParms[] =
1535 +    {&g_bcm96338sv, &g_bcm96338l2m8m, 0};
1536 +#endif
1537 +
1538 +#if defined(_BCM96345_) || defined(CONFIG_BCM96345)
1539 +static BOARD_PARAMETERS g_bcm96345r =
1540 +{
1541 +    "96345R",                               /* szBoardId */
1542 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
1543 +      0x01,                                 /* ucPhyAddress */
1544 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1545 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1546 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1547 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1548 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1549 +      0x01,                                 /* numSwitchPorts */
1550 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1551 +      BP_NOT_DEFINED},                      /* usReverseMii */
1552 +     {BP_ENET_NO_PHY}},                     /* ucPhyType */
1553 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
1554 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1555 +    BP_MEMORY_8MB_1_CHIP,                   /* usSdramSize */
1556 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1557 +    BP_GPIO_11_AH,                          /* usGpioRj11InnerPair */
1558 +    BP_GPIO_12_AH,                          /* usGpioRj11OuterPair */
1559 +    BP_GPIO_13_AH,                          /* usGpioPressAndHoldReset */
1560 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
1561 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1562 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1563 +    BP_GPIO_8_AH,                           /* usGpioLedAdsl */
1564 +    BP_NOT_DEFINED,                         /* usGpioLedAdslFail */
1565 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1566 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
1567 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1568 +    BP_GPIO_8_AH,                           /* usGpioLedWanData */
1569 +    BP_GPIO_9_AH,                           /* usGpioLedPpp */
1570 +    BP_NOT_DEFINED,                         /* usGpioLedPppFail */
1571 +    BP_NOT_DEFINED,                         /* usGpioLedBlPowerOn */
1572 +    BP_GPIO_10_AH,                          /* usGpioLedBlAlarm */
1573 +    BP_GPIO_9_AH,                           /* usGpioLedBlResetCfg */
1574 +    BP_GPIO_8_AH,                           /* usGpioLedBlStop */
1575 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
1576 +    BP_EXT_INTR_0,                          /* usExtIntrAdslDyingGasp */
1577 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1578 +    BP_NOT_DEFINED,                         /* usCsHpna */
1579 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
1580 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1581 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1582 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1583 +};
1584 +
1585 +static BOARD_PARAMETERS g_bcm96345gw2 =
1586 +{
1587 +    /* A hardware jumper determines whether GPIO 13 is used for Press and Hold
1588 +     * Reset or RTS.
1589 +     */
1590 +    "96345GW2",                             /* szBoardId */
1591 +    {{BP_ENET_EXTERNAL_SWITCH,              /* ucPhyType */
1592 +      0x00,                                 /* ucPhyAddress */
1593 +      BP_GPIO_0_AH,                         /* usGpioPhySpiSck */
1594 +      BP_GPIO_4_AH,                         /* usGpioPhySpiSs */
1595 +      BP_GPIO_12_AH,                        /* usGpioPhySpiMosi */
1596 +      BP_GPIO_11_AH,                        /* usGpioPhySpiMiso */
1597 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1598 +      0x04,                                 /* numSwitchPorts */
1599 +      BP_ENET_CONFIG_GPIO,                  /* usConfigType */
1600 +      BP_ENET_REVERSE_MII},                 /* usReverseMii */
1601 +     {BP_ENET_NO_PHY}},                     /* ucPhyType */
1602 +    {{BP_VOIP_DSP,                          /* ucDspType */
1603 +      0x00,                                 /* ucDspAddress */
1604 +      BP_EXT_INTR_1,                        /* usExtIntrVoip */
1605 +      BP_GPIO_6_AH,                         /* usGpioVoipReset */
1606 +      BP_GPIO_15_AH,                        /* usGpioVoipIntr */
1607 +      BP_NOT_DEFINED,                       /* usGpioLedVoip */
1608 +      BP_CS_2},                             /* usCsVoip */
1609 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1610 +    BP_MEMORY_16MB_1_CHIP,                  /* usSdramSize */
1611 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1612 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
1613 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
1614 +    BP_GPIO_13_AH,                          /* usGpioPressAndHoldReset */
1615 +    BP_GPIO_2_AH,                           /* usGpioPcmciaReset */
1616 +    BP_GPIO_13_AH,                          /* usGpioUartRts */
1617 +    BP_GPIO_9_AH,                           /* usGpioUartCts */
1618 +    BP_GPIO_8_AH,                           /* usGpioLedAdsl */
1619 +    BP_NOT_DEFINED,                         /* usGpioLedAdslFail */
1620 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1621 +    BP_GPIO_7_AH,                           /* usGpioLedUsb */
1622 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1623 +    BP_GPIO_8_AH,                           /* usGpioLedWanData */
1624 +    BP_NOT_DEFINED,                         /* usGpioLedPpp */
1625 +    BP_NOT_DEFINED,                         /* usGpioLedPppFail */
1626 +    BP_NOT_DEFINED,                         /* usGpioLedBlPowerOn */
1627 +    BP_GPIO_10_AH,                          /* usGpioLedBlAlarm */
1628 +    BP_GPIO_7_AH,                           /* usGpioLedBlResetCfg */
1629 +    BP_GPIO_8_AH,                           /* usGpioLedBlStop */
1630 +    BP_EXT_INTR_2,                          /* usExtIntrWireless */
1631 +    BP_EXT_INTR_0,                          /* usExtIntrAdslDyingGasp */
1632 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1633 +    BP_NOT_DEFINED,                         /* usCsHpna */
1634 +    BP_WLAN_ANT_MAIN,                       /* usAntInUseWireless */
1635 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1636 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1637 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1638 +};
1639 +
1640 +static BOARD_PARAMETERS g_bcm96345gw =
1641 +{
1642 +    "96345GW",                              /* szBoardId */
1643 +    {{BP_ENET_EXTERNAL_SWITCH,              /* ucPhyType */
1644 +      0x00,                                 /* ucPhyAddress */
1645 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1646 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1647 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1648 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1649 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1650 +      0x04,                                 /* numSwitchPorts */
1651 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1652 +      BP_ENET_NO_REVERSE_MII},              /* usReverseMii */
1653 +     {BP_ENET_NO_PHY}},                     /* ucPhyType */
1654 +    {{BP_VOIP_DSP,                          /* ucDspType */
1655 +      0x00,                                 /* ucDspAddress */
1656 +      BP_EXT_INTR_1,                        /* usExtIntrVoip */
1657 +      BP_GPIO_6_AH,                         /* usGpioVoipReset */
1658 +      BP_GPIO_15_AH,                        /* usGpioVoipIntr */
1659 +      BP_NOT_DEFINED,                       /* usGpioLedVoip */
1660 +      BP_CS_2},                             /* usCsVoip */
1661 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1662 +    BP_MEMORY_16MB_1_CHIP,                  /* usSdramSize */
1663 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1664 +    BP_GPIO_11_AH,                          /* usGpioRj11InnerPair */
1665 +    BP_GPIO_1_AH,                           /* usGpioRj11OuterPair */
1666 +    BP_GPIO_13_AH,                          /* usGpioPressAndHoldReset */
1667 +    BP_GPIO_2_AH,                           /* usGpioPcmciaReset */
1668 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1669 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1670 +    BP_GPIO_8_AH,                           /* usGpioLedAdsl */
1671 +    BP_NOT_DEFINED,                         /* usGpioLedAdslFail */
1672 +    BP_GPIO_10_AH,                          /* usGpioLedWireless */
1673 +    BP_GPIO_7_AH,                           /* usGpioLedUsb */
1674 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1675 +    BP_GPIO_8_AH,                           /* usGpioLedWanData */
1676 +    BP_NOT_DEFINED,                         /* usGpioLedPpp */
1677 +    BP_NOT_DEFINED,                         /* usGpioLedPppFail */
1678 +    BP_NOT_DEFINED,                         /* usGpioLedBlPowerOn */
1679 +    BP_GPIO_9_AH,                           /* usGpioLedBlAlarm */
1680 +    BP_GPIO_10_AH,                          /* usGpioLedBlResetCfg */
1681 +    BP_GPIO_8_AH,                           /* usGpioLedBlStop */
1682 +    BP_EXT_INTR_2,                          /* usExtIntrWireless */
1683 +    BP_EXT_INTR_0,                          /* usExtIntrAdslDyingGasp */
1684 +    BP_EXT_INTR_3,                          /* usExtIntrHpna */
1685 +    BP_CS_1,                                /* usCsHpna */
1686 +    BP_WLAN_ANT_MAIN,                       /* usAntInUseWireless */
1687 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1688 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1689 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1690 +};
1691 +
1692 +static BOARD_PARAMETERS g_bcm96335r =
1693 +{
1694 +    "96335R",                               /* szBoardId */
1695 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
1696 +      0x01,                                 /* ucPhyAddress */
1697 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1698 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1699 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1700 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1701 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1702 +      0x01,                                 /* numSwitchPorts */
1703 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1704 +      BP_NOT_DEFINED},                      /* usReverseMii */
1705 +     {BP_ENET_NO_PHY}},                     /* ucPhyType */
1706 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
1707 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1708 +    BP_MEMORY_8MB_1_CHIP,                   /* usSdramSize */
1709 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1710 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
1711 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
1712 +    BP_GPIO_14_AH,                          /* usGpioPressAndHoldReset */
1713 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
1714 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1715 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1716 +    BP_GPIO_9_AH,                           /* usGpioLedAdsl */
1717 +    BP_NOT_DEFINED,                         /* usGpioLedAdslFail */
1718 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1719 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
1720 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1721 +    BP_GPIO_9_AH,                           /* usGpioLedWanData */
1722 +    BP_GPIO_8_AH,                           /* usGpioLedPpp */
1723 +    BP_NOT_DEFINED,                         /* usGpioLedPppFail */
1724 +    BP_NOT_DEFINED,                         /* usGpioLedBlPowerOn */
1725 +    BP_GPIO_10_AH,                          /* usGpioLedBlAlarm */
1726 +    BP_GPIO_8_AH,                           /* usGpioLedBlResetCfg */
1727 +    BP_GPIO_9_AH,                           /* usGpioLedBlStop */
1728 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
1729 +    BP_NOT_DEFINED,                         /* usExtIntrAdslDyingGasp */
1730 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1731 +    BP_NOT_DEFINED,                         /* usCsHpna */
1732 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
1733 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1734 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1735 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1736 +};
1737 +
1738 +static BOARD_PARAMETERS g_bcm96345r0 =
1739 +{
1740 +    "96345R0",                              /* szBoardId */
1741 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
1742 +      0x01,                                 /* ucPhyAddress */
1743 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1744 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1745 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1746 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1747 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1748 +      0x01,                                 /* numSwitchPorts */
1749 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1750 +      BP_NOT_DEFINED},                      /* usReverseMii */
1751 +     {BP_ENET_NO_PHY}},                     /* ucPhyType */
1752 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
1753 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1754 +    BP_MEMORY_8MB_1_CHIP,                   /* usSdramSize */
1755 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1756 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
1757 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
1758 +    BP_NOT_DEFINED,                         /* usGpioPressAndHoldReset */
1759 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
1760 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1761 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1762 +    BP_GPIO_8_AH,                           /* usGpioLedAdsl */
1763 +    BP_NOT_DEFINED,                         /* usGpioLedAdslFail */
1764 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1765 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
1766 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1767 +    BP_GPIO_9_AH,                           /* usGpioLedWanData */
1768 +    BP_GPIO_9_AH,                           /* usGpioLedPpp */
1769 +    BP_NOT_DEFINED,                         /* usGpioLedPppFail */
1770 +    BP_NOT_DEFINED,                         /* usGpioLedBlPowerOn */
1771 +    BP_GPIO_9_AH,                           /* usGpioLedBlAlarm */
1772 +    BP_GPIO_8_AH,                           /* usGpioLedBlResetCfg */
1773 +    BP_GPIO_8_AH,                           /* usGpioLedBlStop */
1774 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
1775 +    BP_NOT_DEFINED,                         /* usExtIntrAdslDyingGasp */
1776 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1777 +    BP_NOT_DEFINED,                         /* usCsHpna */
1778 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
1779 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1780 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1781 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1782 +};
1783 +
1784 +static BOARD_PARAMETERS g_bcm96345rs =
1785 +{
1786 +    "96345RS",                              /* szBoardId */
1787 +    {{BP_ENET_EXTERNAL_SWITCH,              /* ucPhyType */
1788 +      0x00,                                 /* ucPhyAddress */
1789 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1790 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1791 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1792 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1793 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1794 +      0x01,                                 /* numSwitchPorts */
1795 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1796 +      BP_ENET_NO_REVERSE_MII},              /* usReverseMii */
1797 +     {BP_ENET_NO_PHY}},                     /* ucPhyType */
1798 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
1799 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1800 +    BP_MEMORY_8MB_1_CHIP,                   /* usSdramSize */
1801 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1802 +    BP_GPIO_11_AH,                          /* usGpioRj11InnerPair */
1803 +    BP_GPIO_12_AH,                          /* usGpioRj11OuterPair */
1804 +    BP_GPIO_13_AH,                          /* usGpioPressAndHoldReset */
1805 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
1806 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1807 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1808 +    BP_GPIO_8_AH,                           /* usGpioLedAdsl */
1809 +    BP_NOT_DEFINED,                         /* usGpioLedAdslFail */
1810 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1811 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
1812 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1813 +    BP_GPIO_8_AH,                           /* usGpioLedWanData */
1814 +    BP_GPIO_9_AH,                           /* usGpioLedPpp */
1815 +    BP_NOT_DEFINED,                         /* usGpioLedPppFail */
1816 +    BP_NOT_DEFINED,                         /* usGpioLedBlPowerOn */
1817 +    BP_GPIO_10_AH,                          /* usGpioLedBlAlarm */
1818 +    BP_GPIO_9_AH,                           /* usGpioLedBlResetCfg */
1819 +    BP_GPIO_8_AH,                           /* usGpioLedBlStop */
1820 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
1821 +    BP_EXT_INTR_0,                          /* usExtIntrAdslDyingGasp */
1822 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1823 +    BP_NOT_DEFINED,                         /* usCsHpna */
1824 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
1825 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1826 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1827 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1828 +};
1829 +
1830 +static PBOARD_PARAMETERS g_BoardParms[] =
1831 +    {&g_bcm96345r, &g_bcm96345gw2, &g_bcm96345gw, &g_bcm96335r, &g_bcm96345r0,
1832 +     &g_bcm96345rs, 0};
1833 +#endif
1834 +
1835 +#if defined(_BCM96348_) || defined(CONFIG_BCM96348)
1836 +
1837 +static BOARD_PARAMETERS g_bcm96348r =
1838 +{
1839 +    "96348R",                               /* szBoardId */
1840 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
1841 +      0x01,                                 /* ucPhyAddress */
1842 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1843 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1844 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1845 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1846 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1847 +      0x01,                                 /* numSwitchPorts */
1848 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1849 +      BP_NOT_DEFINED},                      /* usReverseMii */
1850 +     {BP_ENET_NO_PHY}},                     /* ucPhyType */
1851 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
1852 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1853 +    BP_MEMORY_8MB_1_CHIP,                   /* usSdramSize */
1854 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1855 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
1856 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
1857 +    BP_GPIO_7_AH,                           /* usGpioPressAndHoldReset */
1858 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
1859 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1860 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1861 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
1862 +    BP_GPIO_2_AL,                           /* usGpioLedAdslFail */
1863 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1864 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
1865 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1866 +    BP_GPIO_3_AL,                           /* usGpioLedWanData */
1867 +    BP_GPIO_3_AL,                           /* usGpioLedPpp */
1868 +    BP_GPIO_4_AL,                           /* usGpioLedPppFail */
1869 +    BP_GPIO_0_AL,                           /* usGpioLedBlPowerOn */
1870 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
1871 +    BP_GPIO_3_AL,                           /* usGpioLedBlResetCfg */
1872 +    BP_GPIO_1_AL,                           /* usGpioLedBlStop */
1873 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
1874 +    BP_HW_DEFINED,                          /* usExtIntrAdslDyingGasp */
1875 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1876 +    BP_NOT_DEFINED,                         /* usCsHpna */
1877 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
1878 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1879 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1880 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1881 +};
1882 +
1883 +static BOARD_PARAMETERS g_bcm96348lv =
1884 +{
1885 +    "96348LV",                               /* szBoardId */
1886 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
1887 +      0x01,                                 /* ucPhyAddress */
1888 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1889 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1890 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1891 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1892 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1893 +      0x01,                                 /* numSwitchPorts */
1894 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1895 +      BP_NOT_DEFINED},                      /* usReverseMii */
1896 +     {BP_ENET_EXTERNAL_PHY,                 /* ucPhyType */
1897 +      0x02,                                 /* ucPhyAddress */
1898 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1899 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1900 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1901 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1902 +      BP_GPIO_5_AL,                         /* usGpioPhyReset */
1903 +      0x01,                                 /* numSwitchPorts */
1904 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1905 +      BP_NOT_DEFINED}},                     /* usReverseMii */
1906 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
1907 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1908 +    BP_MEMORY_16MB_2_CHIP,                  /* usSdramSize */
1909 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1910 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
1911 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
1912 +    BP_GPIO_7_AH,                           /* usGpioPressAndHoldReset */
1913 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
1914 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1915 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1916 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
1917 +    BP_GPIO_2_AL,                           /* usGpioLedAdslFail */
1918 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1919 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
1920 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1921 +    BP_GPIO_3_AL,                           /* usGpioLedWanData */
1922 +    BP_GPIO_3_AL,                           /* usGpioLedPpp */
1923 +    BP_GPIO_4_AL,                           /* usGpioLedPppFail */
1924 +    BP_GPIO_0_AL,                           /* usGpioLedBlPowerOn */
1925 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
1926 +    BP_GPIO_3_AL,                           /* usGpioLedBlResetCfg */
1927 +    BP_GPIO_1_AL,                           /* usGpioLedBlStop */
1928 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
1929 +    BP_NOT_DEFINED,                         /* usExtIntrAdslDyingGasp */
1930 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1931 +    BP_NOT_DEFINED,                         /* usCsHpna */
1932 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
1933 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
1934 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
1935 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
1936 +};
1937 +
1938 +static BOARD_PARAMETERS g_bcm96348gw =
1939 +{
1940 +    "96348GW",                              /* szBoardId */
1941 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
1942 +      0x01,                                 /* ucPhyAddress */
1943 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1944 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1945 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1946 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1947 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1948 +      0x01,                                 /* numSwitchPorts */
1949 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
1950 +      BP_NOT_DEFINED},                      /* usReverseMii */
1951 +     {BP_ENET_EXTERNAL_SWITCH,              /* ucPhyType */
1952 +      0x00,                                 /* ucPhyAddress */
1953 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
1954 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
1955 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
1956 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
1957 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
1958 +      0x03,                                 /* numSwitchPorts */
1959 +      BP_ENET_CONFIG_SPI_SSB_0,             /* usConfigType */
1960 +      BP_ENET_REVERSE_MII}},                /* usReverseMii */
1961 +    {{BP_VOIP_DSP,                          /* ucDspType */
1962 +      0x00,                                 /* ucDspAddress */
1963 +      BP_EXT_INTR_2,                        /* usExtIntrVoip */
1964 +      BP_GPIO_6_AH,                         /* usGpioVoipReset */
1965 +      BP_GPIO_34_AH,                        /* usGpioVoipIntr */
1966 +      BP_NOT_DEFINED,                       /* usGpioLedVoip */
1967 +      BP_CS_2},                             /* usCsVoip */
1968 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
1969 +    BP_MEMORY_16MB_2_CHIP,                  /* usSdramSize */
1970 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
1971 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
1972 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
1973 +    BP_GPIO_33_AL,                          /* usGpioPressAndHoldReset */
1974 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
1975 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
1976 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
1977 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
1978 +    BP_GPIO_2_AL,                           /* usGpioLedAdslFail */
1979 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
1980 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
1981 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
1982 +    BP_GPIO_3_AL,                           /* usGpioLedWanData */
1983 +    BP_GPIO_3_AL,                           /* usGpioLedPpp */
1984 +    BP_GPIO_4_AL,                           /* usGpioLedPppFail */
1985 +    BP_GPIO_0_AL,                           /* usGpioLedBlPowerOn */
1986 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
1987 +    BP_GPIO_3_AL,                           /* usGpioLedBlResetCfg */
1988 +    BP_GPIO_1_AL,                           /* usGpioLedBlStop */
1989 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
1990 +    BP_HW_DEFINED,                          /* usExtIntrAdslDyingGasp */
1991 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
1992 +    BP_NOT_DEFINED,                         /* usCsHpna */
1993 +    BP_WLAN_ANT_MAIN,                       /* usAntInUseWireless */
1994 +    BP_NOT_DEFINED, /* BP_GPIO_35_AH, */    /* usGpioSesBtnWireless */
1995 +    BP_NOT_DEFINED, /* BP_EXT_INTR_3, */    /* usExtIntrSesBtnWireless */
1996 +    BP_NOT_DEFINED  /* BP_GPIO_0_AL   */    /* usGpioLedSesWireless */
1997 +};
1998 +
1999 +
2000 +static BOARD_PARAMETERS g_bcm96348gw_10 =
2001 +{
2002 +    "96348GW-10",                           /* szBoardId */
2003 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
2004 +      0x01,                                 /* ucPhyAddress */
2005 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
2006 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
2007 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
2008 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
2009 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
2010 +      0x01,                                 /* numSwitchPorts */
2011 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
2012 +      BP_NOT_DEFINED},                      /* usReverseMii */
2013 +     {BP_ENET_EXTERNAL_SWITCH,              /* ucPhyType */
2014 +      0x00,                                 /* ucPhyAddress */
2015 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
2016 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
2017 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
2018 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
2019 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
2020 +      0x03,                                 /* numSwitchPorts */
2021 +      BP_ENET_CONFIG_SPI_SSB_1,             /* usConfigType */
2022 +      BP_ENET_REVERSE_MII}},                /* usReverseMii */
2023 +    {{BP_VOIP_DSP,                          /* ucDspType */
2024 +      0x00,                                 /* ucDspAddress */
2025 +      BP_EXT_INTR_2,                        /* usExtIntrVoip */
2026 +      BP_GPIO_6_AH,                         /* usGpioVoipReset */
2027 +      BP_GPIO_34_AH,                        /* usGpioVoipIntr */
2028 +      BP_NOT_DEFINED,                       /* usGpioLedVoip */
2029 +      BP_CS_2},                             /* usCsVoip */
2030 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
2031 +    BP_MEMORY_16MB_2_CHIP,                  /* usSdramSize */
2032 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
2033 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
2034 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
2035 +    BP_GPIO_33_AL,                          /* usGpioPressAndHoldReset */
2036 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
2037 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
2038 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
2039 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
2040 +    BP_GPIO_2_AL,                           /* usGpioLedAdslFail */
2041 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
2042 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
2043 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
2044 +    BP_GPIO_3_AL,                           /* usGpioLedWanData */
2045 +    BP_GPIO_3_AL,                           /* usGpioLedPpp */
2046 +    BP_GPIO_4_AL,                           /* usGpioLedPppFail */
2047 +    BP_GPIO_0_AL,                           /* usGpioLedBlPowerOn */
2048 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
2049 +    BP_GPIO_3_AL,                           /* usGpioLedBlResetCfg */
2050 +    BP_GPIO_1_AL,                           /* usGpioLedBlStop */
2051 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
2052 +    BP_HW_DEFINED,                          /* usExtIntrAdslDyingGasp */
2053 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
2054 +    BP_NOT_DEFINED,                         /* usCsHpna */
2055 +    BP_WLAN_ANT_MAIN,                       /* usAntInUseWireless */
2056 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
2057 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
2058 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
2059 +};
2060 +
2061 +static BOARD_PARAMETERS g_bcm96348gw_11 =
2062 +{
2063 +    "96348GW-11",                           /* szBoardId */
2064 +    {{BP_ENET_NO_PHY},                      /* ucPhyType */
2065 +     {BP_ENET_EXTERNAL_SWITCH,              /* ucPhyType */
2066 +      0x00,                                 /* ucPhyAddress */
2067 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
2068 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
2069 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
2070 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
2071 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
2072 +      0x04,                                 /* numSwitchPorts */
2073 +      BP_ENET_CONFIG_SPI_SSB_1,             /* usConfigType */
2074 +      BP_ENET_REVERSE_MII}},                /* usReverseMii */
2075 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
2076 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
2077 +    BP_MEMORY_16MB_2_CHIP,                  /* usSdramSize */
2078 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
2079 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
2080 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
2081 +    BP_GPIO_33_AL,                          /* usGpioPressAndHoldReset */
2082 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
2083 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
2084 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
2085 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
2086 +    BP_GPIO_2_AL,                           /* usGpioLedAdslFail */
2087 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
2088 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
2089 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
2090 +    BP_GPIO_3_AL,                           /* usGpioLedWanData */
2091 +    BP_GPIO_3_AL,                           /* usGpioLedPpp */
2092 +    BP_GPIO_4_AL,                           /* usGpioLedPppFail */
2093 +    BP_GPIO_0_AL,                           /* usGpioLedBlPowerOn */
2094 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
2095 +    BP_GPIO_3_AL,                           /* usGpioLedBlResetCfg */
2096 +    BP_GPIO_1_AL,                           /* usGpioLedBlStop */
2097 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
2098 +    BP_HW_DEFINED,                          /* usExtIntrAdslDyingGasp */
2099 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
2100 +    BP_NOT_DEFINED,                         /* usCsHpna */
2101 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
2102 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
2103 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
2104 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
2105 +};
2106 +
2107 +static BOARD_PARAMETERS g_bcm96348sv =
2108 +{
2109 +    "96348SV",                              /* szBoardId */
2110 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
2111 +      0x01,                                 /* ucPhyAddress */
2112 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
2113 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
2114 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
2115 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
2116 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
2117 +      0x01,                                 /* numSwitchPorts */
2118 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
2119 +      BP_NOT_DEFINED},                      /* usReverseMii */
2120 +     {BP_ENET_EXTERNAL_PHY,                 /* ucPhyType */
2121 +      0x1f,                                 /* ucPhyAddress */
2122 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
2123 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
2124 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
2125 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
2126 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
2127 +      0x01,                                 /* numSwitchPorts */
2128 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
2129 +      BP_NOT_DEFINED}},                     /* usReverseMii */
2130 +    {{BP_VOIP_NO_DSP},                      /* ucDspType */
2131 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
2132 +    BP_MEMORY_32MB_2_CHIP,                  /* usSdramSize */
2133 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
2134 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
2135 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
2136 +    BP_NOT_DEFINED,                         /* usGpioPressAndHoldReset */
2137 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
2138 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
2139 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
2140 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
2141 +    BP_NOT_DEFINED,                         /* usGpioLedAdslFail */
2142 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
2143 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
2144 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
2145 +    BP_NOT_DEFINED,                         /* usGpioLedWanData */
2146 +    BP_NOT_DEFINED,                         /* usGpioLedPpp */
2147 +    BP_NOT_DEFINED,                         /* usGpioLedPppFail */
2148 +    BP_NOT_DEFINED,                         /* usGpioLedBlPowerOn */
2149 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
2150 +    BP_NOT_DEFINED,                         /* usGpioLedBlResetCfg */
2151 +    BP_NOT_DEFINED,                         /* usGpioLedBlStop */
2152 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
2153 +    BP_HW_DEFINED,                          /* usExtIntrAdslDyingGasp */
2154 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
2155 +    BP_NOT_DEFINED,                         /* usCsHpna */
2156 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
2157 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
2158 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
2159 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
2160 +};
2161 +
2162 +
2163 +static BOARD_PARAMETERS g_bcm96348gw_dualDsp =
2164 +{
2165 +    "96348GW-DualDSP",                      /* szBoardId */
2166 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
2167 +      0x01,                                 /* ucPhyAddress */
2168 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
2169 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
2170 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
2171 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
2172 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
2173 +      0x01,                                 /* numSwitchPorts */
2174 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
2175 +      BP_NOT_DEFINED},                      /* usReverseMii */
2176 +     {BP_ENET_EXTERNAL_SWITCH,              /* ucPhyType */
2177 +      0x00,                                 /* ucPhyAddress */
2178 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
2179 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
2180 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
2181 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
2182 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
2183 +      0x03,                                 /* numSwitchPorts */
2184 +      BP_ENET_CONFIG_SPI_SSB_1,             /* usConfigType */
2185 +      BP_ENET_REVERSE_MII}},                /* usReverseMii */
2186 +    {{BP_VOIP_DSP,                          /* ucDspType */
2187 +      0x00,                                 /* ucDspAddress */
2188 +      BP_EXT_INTR_2,                        /* usExtIntrVoip */
2189 +      BP_UNEQUIPPED,                        /* usGpioVoipReset */
2190 +      BP_GPIO_34_AH,                        /* usGpioVoipIntr */
2191 +      BP_NOT_DEFINED,                       /* usGpioLedVoip */
2192 +      BP_CS_2},                             /* usCsVoip */
2193 +     {BP_VOIP_DSP,                          /* ucDspType */
2194 +      0x01,                                 /* ucDspAddress */
2195 +      BP_EXT_INTR_3,                        /* usExtIntrVoip */
2196 +      BP_UNEQUIPPED ,                       /* usGpioVoipReset */
2197 +      BP_GPIO_35_AH,                        /* usGpioVoipIntr */
2198 +      BP_NOT_DEFINED,                       /* usGpioLedVoip */
2199 +      BP_CS_3}},                            /* usCsVoip */
2200 +    BP_MEMORY_16MB_2_CHIP,                  /* usSdramSize */
2201 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
2202 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
2203 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
2204 +    BP_GPIO_33_AL,                          /* usGpioPressAndHoldReset */
2205 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
2206 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
2207 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
2208 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
2209 +    BP_GPIO_2_AL,                           /* usGpioLedAdslFail */
2210 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
2211 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
2212 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
2213 +    BP_GPIO_3_AL,                           /* usGpioLedWanData */
2214 +    BP_GPIO_3_AL,                           /* usGpioLedPpp */
2215 +    BP_GPIO_4_AL,                           /* usGpioLedPppFail */
2216 +    BP_GPIO_0_AL,                           /* usGpioLedBlPowerOn */
2217 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
2218 +    BP_GPIO_3_AL,                           /* usGpioLedBlResetCfg */
2219 +    BP_GPIO_1_AL,                           /* usGpioLedBlStop */
2220 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
2221 +    BP_HW_DEFINED,                          /* usExtIntrAdslDyingGasp */
2222 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
2223 +    BP_NOT_DEFINED,                         /* usCsHpna */
2224 +    BP_WLAN_ANT_MAIN,                       /* usAntInUseWireless */
2225 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
2226 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
2227 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
2228 +};
2229 +
2230 +
2231 +static BOARD_PARAMETERS g_bcmCustom_01 =
2232 +{
2233 +     "BCMCUST_01",                          /* szBoardId */
2234 +    {{BP_ENET_INTERNAL_PHY,                 /* ucPhyType */
2235 +      0x01,                                 /* ucPhyAddress */
2236 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
2237 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
2238 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
2239 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
2240 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
2241 +      0x01,                                 /* numSwitchPorts */
2242 +      BP_ENET_CONFIG_MDIO,                  /* usConfigType */
2243 +      BP_NOT_DEFINED},                      /* usReverseMii */
2244 +     {BP_ENET_NO_PHY,                       /* ucPhyType */
2245 +      0x00,                                 /* ucPhyAddress */
2246 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSck */
2247 +      BP_NOT_DEFINED,                       /* usGpioPhySpiSs */
2248 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMosi */
2249 +      BP_NOT_DEFINED,                       /* usGpioPhySpiMiso */
2250 +      BP_NOT_DEFINED,                       /* usGpioPhyReset */
2251 +      0x01,                                 /* numSwitchPorts */
2252 +      BP_ENET_CONFIG_SPI_SSB_1,             /* usConfigType */
2253 +      BP_ENET_REVERSE_MII}},                /* usReverseMii */
2254 +    {{BP_VOIP_DSP,                          /* ucDspType */
2255 +      0x00,                                 /* ucDspAddress */
2256 +      BP_EXT_INTR_2,                        /* usExtIntrVoip */
2257 +      BP_GPIO_36_AH,                        /* usGpioVoipReset */
2258 +      BP_GPIO_34_AL,                        /* usGpioVoipIntr */
2259 +      BP_NOT_DEFINED,                       /* usGpioLedVoip */
2260 +      BP_CS_2},                             /* usCsVoip */
2261 +     {BP_VOIP_NO_DSP}},                     /* ucDspType */
2262 +    BP_MEMORY_16MB_2_CHIP,                  /* usSdramSize */
2263 +    BP_PSI_DEFAULT_SIZE,                    /* usPsiSize */
2264 +    BP_NOT_DEFINED,                         /* usGpioRj11InnerPair */
2265 +    BP_NOT_DEFINED,                         /* usGpioRj11OuterPair */
2266 +    BP_GPIO_33_AL,                          /* usGpioPressAndHoldReset */
2267 +    BP_NOT_DEFINED,                         /* usGpioPcmciaReset */
2268 +    BP_NOT_DEFINED,                         /* usGpioUartRts */
2269 +    BP_NOT_DEFINED,                         /* usGpioUartCts */
2270 +    BP_NOT_DEFINED,                         /* usGpioLedAdsl */
2271 +    BP_GPIO_2_AL,                           /* usGpioLedAdslFail */
2272 +    BP_NOT_DEFINED,                         /* usGpioLedWireless */
2273 +    BP_NOT_DEFINED,                         /* usGpioLedUsb */
2274 +    BP_NOT_DEFINED,                         /* usGpioLedHpna */
2275 +    BP_GPIO_3_AL,                           /* usGpioLedWanData */
2276 +    BP_GPIO_3_AL,                           /* usGpioLedPpp */
2277 +    BP_GPIO_4_AL,                           /* usGpioLedPppFail */
2278 +    BP_GPIO_0_AL,                           /* usGpioLedBlPowerOn */
2279 +    BP_NOT_DEFINED,                         /* usGpioLedBlAlarm */
2280 +    BP_GPIO_3_AL,                           /* usGpioLedBlResetCfg */
2281 +    BP_GPIO_1_AL,                           /* usGpioLedBlStop */
2282 +    BP_NOT_DEFINED,                         /* usExtIntrWireless */
2283 +    BP_NOT_DEFINED,                         /* usExtIntrAdslDyingGasp */
2284 +    BP_NOT_DEFINED,                         /* usExtIntrHpna */
2285 +    BP_NOT_DEFINED,                         /* usCsHpna */
2286 +    BP_NOT_DEFINED,                         /* usAntInUseWireless */
2287 +    BP_NOT_DEFINED,                         /* usGpioSesBtnWireless */
2288 +    BP_NOT_DEFINED,                         /* usExtIntrSesBtnWireless */
2289 +    BP_NOT_DEFINED                          /* usGpioLedSesWireless */
2290 +};
2291 +
2292 +static PBOARD_PARAMETERS g_BoardParms[] =
2293 +    {&g_bcm96348r, &g_bcm96348lv, &g_bcm96348gw, &g_bcm96348gw_10,
2294 +     &g_bcm96348gw_11, &g_bcm96348sv, &g_bcm96348gw_dualDsp,
2295 +     &g_bcmCustom_01, 0};
2296 +#endif
2297 +
2298 +static PBOARD_PARAMETERS g_pCurrentBp = 0;
2299 +
2300 +/**************************************************************************
2301 + * Name       : bpstrcmp
2302 + *
2303 + * Description: String compare for this file so it does not depend on an OS.
2304 + *              (Linux kernel and CFE share this source file.)
2305 + *
2306 + * Parameters : [IN] dest - destination string
2307 + *              [IN] src - source string
2308 + *
2309 + * Returns    : -1 - dest < src, 1 - dest > src, 0 dest == src
2310 + ***************************************************************************/
2311 +static int bpstrcmp(const char *dest,const char *src);
2312 +static int bpstrcmp(const char *dest,const char *src)
2313 +{
2314 +    while (*src && *dest)
2315 +    {
2316 +        if (*dest < *src) return -1;
2317 +        if (*dest > *src) return 1;
2318 +        dest++;
2319 +        src++;
2320 +    }
2321 +
2322 +    if (*dest && !*src) return 1;
2323 +    if (!*dest && *src) return -1;
2324 +    return 0;
2325 +} /* bpstrcmp */
2326 +
2327 +/**************************************************************************
2328 + * Name       : BpGetVoipDspConfig
2329 + *
2330 + * Description: Gets the DSP configuration from the board parameter
2331 + *              structure for a given DSP index.
2332 + *
2333 + * Parameters : [IN] dspNum - DSP index (number)
2334 + *
2335 + * Returns    : Pointer to DSP configuration block if found/valid, NULL
2336 + *              otherwise.
2337 + ***************************************************************************/
2338 +VOIP_DSP_INFO *BpGetVoipDspConfig( unsigned char dspNum );
2339 +VOIP_DSP_INFO *BpGetVoipDspConfig( unsigned char dspNum )
2340 +{
2341 +    VOIP_DSP_INFO *pDspConfig = 0;
2342 +    int i;
2343 +
2344 +    if( g_pCurrentBp )
2345 +    {
2346 +        for( i = 0 ; i < BP_MAX_VOIP_DSP ; i++ )
2347 +        {
2348 +            if( g_pCurrentBp->VoIPDspInfo[i].ucDspType != BP_VOIP_NO_DSP &&
2349 +                g_pCurrentBp->VoIPDspInfo[i].ucDspAddress == dspNum )
2350 +            {
2351 +                pDspConfig = &g_pCurrentBp->VoIPDspInfo[i];
2352 +                break;
2353 +            }
2354 +        }
2355 +    }
2356 +
2357 +    return pDspConfig;
2358 +}
2359 +
2360 +
2361 +/**************************************************************************
2362 + * Name       : BpSetBoardId
2363 + *
2364 + * Description: This function find the BOARD_PARAMETERS structure for the
2365 + *              specified board id string and assigns it to a global, static
2366 + *              variable.
2367 + *
2368 + * Parameters : [IN] pszBoardId - Board id string that is saved into NVRAM.
2369 + *
2370 + * Returns    : BP_SUCCESS - Success, value is returned.
2371 + *              BP_BOARD_ID_NOT_FOUND - Error, board id input string does not
2372 + *                  have a board parameters configuration record.
2373 + ***************************************************************************/
2374 +int BpSetBoardId( char *pszBoardId )
2375 +{
2376 +    int nRet = BP_BOARD_ID_NOT_FOUND;
2377 +    PBOARD_PARAMETERS *ppBp;
2378 +
2379 +    for( ppBp = g_BoardParms; *ppBp; ppBp++ )
2380 +    {
2381 +        if( !bpstrcmp((*ppBp)->szBoardId, pszBoardId) )
2382 +        {
2383 +            g_pCurrentBp = *ppBp;
2384 +            nRet = BP_SUCCESS;
2385 +            break;
2386 +        }
2387 +    }
2388 +
2389 +    return( nRet );
2390 +} /* BpSetBoardId */
2391 +
2392 +/**************************************************************************
2393 + * Name       : BpGetBoardIds
2394 + *
2395 + * Description: This function returns all of the supported board id strings.
2396 + *
2397 + * Parameters : [OUT] pszBoardIds - Address of a buffer that the board id
2398 + *                  strings are returned in.  Each id starts at BP_BOARD_ID_LEN
2399 + *                  boundary.
2400 + *              [IN] nBoardIdsSize - Number of BP_BOARD_ID_LEN elements that
2401 + *                  were allocated in pszBoardIds.
2402 + *
2403 + * Returns    : Number of board id strings returned.
2404 + ***************************************************************************/
2405 +int BpGetBoardIds( char *pszBoardIds, int nBoardIdsSize )
2406 +{
2407 +    PBOARD_PARAMETERS *ppBp;
2408 +    int i;
2409 +    char *src;
2410 +    char *dest;
2411 +
2412 +    for( i = 0, ppBp = g_BoardParms; *ppBp && nBoardIdsSize;
2413 +        i++, ppBp++, nBoardIdsSize--, pszBoardIds += BP_BOARD_ID_LEN )
2414 +    {
2415 +        dest = pszBoardIds;
2416 +        src = (*ppBp)->szBoardId;
2417 +        while( *src )
2418 +            *dest++ = *src++;
2419 +        *dest = '\0';
2420 +    }
2421 +
2422 +    return( i );
2423 +} /* BpGetBoardIds */
2424 +
2425 +/**************************************************************************
2426 + * Name       : BpGetEthernetMacInfo
2427 + *
2428 + * Description: This function returns all of the supported board id strings.
2429 + *
2430 + * Parameters : [OUT] pEnetInfos - Address of an array of ETHERNET_MAC_INFO
2431 + *                  buffers.
2432 + *              [IN] nNumEnetInfos - Number of ETHERNET_MAC_INFO elements that
2433 + *                  are pointed to by pEnetInfos.
2434 + *
2435 + * Returns    : BP_SUCCESS - Success, value is returned.
2436 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2437 + ***************************************************************************/
2438 +int BpGetEthernetMacInfo( PETHERNET_MAC_INFO pEnetInfos, int nNumEnetInfos )
2439 +{
2440 +    int i, nRet;
2441 +
2442 +    if( g_pCurrentBp )
2443 +    {
2444 +        for( i = 0; i < nNumEnetInfos; i++, pEnetInfos++ )
2445 +        {
2446 +            if( i < BP_MAX_ENET_MACS )
2447 +            {
2448 +                unsigned char *src = (unsigned char *)
2449 +                    &g_pCurrentBp->EnetMacInfos[i];
2450 +                unsigned char *dest = (unsigned char *) pEnetInfos;
2451 +                int len = sizeof(ETHERNET_MAC_INFO);
2452 +                while( len-- )
2453 +                    *dest++ = *src++;
2454 +            }
2455 +            else
2456 +                pEnetInfos->ucPhyType = BP_ENET_NO_PHY;
2457 +        }
2458 +
2459 +        nRet = BP_SUCCESS;
2460 +    }
2461 +    else
2462 +    {
2463 +        for( i = 0; i < nNumEnetInfos; i++, pEnetInfos++ )
2464 +            pEnetInfos->ucPhyType = BP_ENET_NO_PHY;
2465 +
2466 +        nRet = BP_BOARD_ID_NOT_SET;
2467 +    }
2468 +
2469 +    return( nRet );
2470 +} /* BpGetEthernetMacInfo */
2471 +
2472 +/**************************************************************************
2473 + * Name       : BpGetSdramSize
2474 + *
2475 + * Description: This function returns a constant that describees the board's
2476 + *              SDRAM type and size.
2477 + *
2478 + * Parameters : [OUT] pulSdramSize - Address of short word that the SDRAM size
2479 + *                  is returned in.
2480 + *
2481 + * Returns    : BP_SUCCESS - Success, value is returned.
2482 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2483 + ***************************************************************************/
2484 +int BpGetSdramSize( unsigned long *pulSdramSize )
2485 +{
2486 +    int nRet;
2487 +
2488 +    if( g_pCurrentBp )
2489 +    {
2490 +        *pulSdramSize = g_pCurrentBp->usSdramSize;
2491 +        nRet = BP_SUCCESS;
2492 +    }
2493 +    else
2494 +    {
2495 +        *pulSdramSize = BP_NOT_DEFINED;
2496 +        nRet = BP_BOARD_ID_NOT_SET;
2497 +    }
2498 +
2499 +    return( nRet );
2500 +} /* BpGetSdramSize */
2501 +
2502 +/**************************************************************************
2503 + * Name       : BpGetPsiSize
2504 + *
2505 + * Description: This function returns the persistent storage size in K bytes.
2506 + *
2507 + * Parameters : [OUT] pulPsiSize - Address of short word that the persistent
2508 + *                  storage size is returned in.
2509 + *
2510 + * Returns    : BP_SUCCESS - Success, value is returned.
2511 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2512 + ***************************************************************************/
2513 +int BpGetPsiSize( unsigned long *pulPsiSize )
2514 +{
2515 +    int nRet;
2516 +
2517 +    if( g_pCurrentBp )
2518 +    {
2519 +        *pulPsiSize = g_pCurrentBp->usPsiSize;
2520 +        nRet = BP_SUCCESS;
2521 +    }
2522 +    else
2523 +    {
2524 +        *pulPsiSize = BP_NOT_DEFINED;
2525 +        nRet = BP_BOARD_ID_NOT_SET;
2526 +    }
2527 +
2528 +    return( nRet );
2529 +} /* BpGetPsiSize */
2530 +
2531 +/**************************************************************************
2532 + * Name       : BpGetRj11InnerOuterPairGpios
2533 + *
2534 + * Description: This function returns the GPIO pin assignments for changing
2535 + *              between the RJ11 inner pair and RJ11 outer pair.
2536 + *
2537 + * Parameters : [OUT] pusInner - Address of short word that the RJ11 inner pair
2538 + *                  GPIO pin is returned in.
2539 + *              [OUT] pusOuter - Address of short word that the RJ11 outer pair
2540 + *                  GPIO pin is returned in.
2541 + *
2542 + * Returns    : BP_SUCCESS - Success, values are returned.
2543 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2544 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2545 + *                  for the board.
2546 + ***************************************************************************/
2547 +int BpGetRj11InnerOuterPairGpios( unsigned short *pusInner,
2548 +    unsigned short *pusOuter )
2549 +{
2550 +    int nRet;
2551 +
2552 +    if( g_pCurrentBp )
2553 +    {
2554 +        *pusInner = g_pCurrentBp->usGpioRj11InnerPair;
2555 +        *pusOuter = g_pCurrentBp->usGpioRj11OuterPair;
2556 +
2557 +        if( g_pCurrentBp->usGpioRj11InnerPair != BP_NOT_DEFINED &&
2558 +            g_pCurrentBp->usGpioRj11OuterPair != BP_NOT_DEFINED )
2559 +        {
2560 +            nRet = BP_SUCCESS;
2561 +        }
2562 +        else
2563 +        {
2564 +            nRet = BP_VALUE_NOT_DEFINED;
2565 +        }
2566 +    }
2567 +    else
2568 +    {
2569 +        *pusInner = *pusOuter = BP_NOT_DEFINED;
2570 +        nRet = BP_BOARD_ID_NOT_SET;
2571 +    }
2572 +
2573 +    return( nRet );
2574 +} /* BpGetRj11InnerOuterPairGpios */
2575 +
2576 +/**************************************************************************
2577 + * Name       : BpGetPressAndHoldResetGpio
2578 + *
2579 + * Description: This function returns the GPIO pin assignment for the press
2580 + *              and hold reset button.
2581 + *
2582 + * Parameters : [OUT] pusValue - Address of short word that the press and hold
2583 + *                  reset button GPIO pin is returned in.
2584 + *
2585 + * Returns    : BP_SUCCESS - Success, value is returned.
2586 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2587 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2588 + *                  for the board.
2589 + ***************************************************************************/
2590 +int BpGetPressAndHoldResetGpio( unsigned short *pusValue )
2591 +{
2592 +    int nRet;
2593 +
2594 +    if( g_pCurrentBp )
2595 +    {
2596 +        *pusValue = g_pCurrentBp->usGpioPressAndHoldReset;
2597 +
2598 +        if( g_pCurrentBp->usGpioPressAndHoldReset != BP_NOT_DEFINED )
2599 +        {
2600 +            nRet = BP_SUCCESS;
2601 +        }
2602 +        else
2603 +        {
2604 +            nRet = BP_VALUE_NOT_DEFINED;
2605 +        }
2606 +    }
2607 +    else
2608 +    {
2609 +        *pusValue = BP_NOT_DEFINED;
2610 +        nRet = BP_BOARD_ID_NOT_SET;
2611 +    }
2612 +
2613 +    return( nRet );
2614 +} /* BpGetPressAndHoldResetGpio */
2615 +
2616 +/**************************************************************************
2617 + * Name       : BpGetVoipResetGpio
2618 + *
2619 + * Description: This function returns the GPIO pin assignment for the VOIP
2620 + *              Reset operation.
2621 + *
2622 + * Parameters : [OUT] pusValue - Address of short word that the VOIP reset
2623 + *                  GPIO pin is returned in.
2624 + *              [IN] dspNum - Address of the DSP to query.
2625 + *
2626 + * Returns    : BP_SUCCESS - Success, value is returned.
2627 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2628 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2629 + *                  for the board.
2630 + ***************************************************************************/
2631 +int BpGetVoipResetGpio( unsigned char dspNum, unsigned short *pusValue )
2632 +{
2633 +    int nRet;
2634 +
2635 +    if( g_pCurrentBp )
2636 +    {
2637 +        VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
2638 +
2639 +        if( pDspInfo )
2640 +        {
2641 +           *pusValue = pDspInfo->usGpioVoipReset;
2642 +
2643 +           if( *pusValue != BP_NOT_DEFINED ||
2644 +               *pusValue == BP_UNEQUIPPED )
2645 +           {
2646 +              nRet = BP_SUCCESS;
2647 +           }
2648 +           else
2649 +           {
2650 +              nRet = BP_VALUE_NOT_DEFINED;
2651 +           }
2652 +        }
2653 +        else
2654 +        {
2655 +           *pusValue = BP_NOT_DEFINED;
2656 +           nRet = BP_BOARD_ID_NOT_FOUND;
2657 +        }
2658 +    }
2659 +    else
2660 +    {
2661 +        *pusValue = BP_NOT_DEFINED;
2662 +        nRet = BP_BOARD_ID_NOT_SET;
2663 +    }
2664 +
2665 +    return( nRet );
2666 +} /* BpGetVoipResetGpio */
2667 +
2668 +/**************************************************************************
2669 + * Name       : BpGetVoipIntrGpio
2670 + *
2671 + * Description: This function returns the GPIO pin assignment for VoIP interrupt.
2672 + *
2673 + * Parameters : [OUT] pusValue - Address of short word that the VOIP interrupt
2674 + *                  GPIO pin is returned in.
2675 + *              [IN] dspNum - Address of the DSP to query.
2676 + *
2677 + * Returns    : BP_SUCCESS - Success, value is returned.
2678 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2679 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2680 + *                  for the board.
2681 + ***************************************************************************/
2682 +int BpGetVoipIntrGpio( unsigned char dspNum, unsigned short *pusValue )
2683 +{
2684 +    int nRet;
2685 +
2686 +    if( g_pCurrentBp )
2687 +    {
2688 +        VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
2689 +
2690 +        if( pDspInfo )
2691 +        {
2692 +           *pusValue = pDspInfo->usGpioVoipIntr;
2693 +
2694 +           if( *pusValue != BP_NOT_DEFINED )
2695 +           {
2696 +              nRet = BP_SUCCESS;
2697 +           }
2698 +           else
2699 +           {
2700 +              nRet = BP_VALUE_NOT_DEFINED;
2701 +           }
2702 +        }
2703 +        else
2704 +        {
2705 +           *pusValue = BP_NOT_DEFINED;
2706 +           nRet = BP_BOARD_ID_NOT_FOUND;
2707 +        }
2708 +    }
2709 +    else
2710 +    {
2711 +        *pusValue = BP_NOT_DEFINED;
2712 +        nRet = BP_BOARD_ID_NOT_SET;
2713 +    }
2714 +
2715 +    return( nRet );
2716 +} /* BpGetVoipIntrGpio */
2717 +
2718 +/**************************************************************************
2719 + * Name       : BpGetPcmciaResetGpio
2720 + *
2721 + * Description: This function returns the GPIO pin assignment for the PCMCIA
2722 + *              Reset operation.
2723 + *
2724 + * Parameters : [OUT] pusValue - Address of short word that the PCMCIA reset
2725 + *                  GPIO pin is returned in.
2726 + *
2727 + * Returns    : BP_SUCCESS - Success, value is returned.
2728 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2729 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2730 + *                  for the board.
2731 + ***************************************************************************/
2732 +int BpGetPcmciaResetGpio( unsigned short *pusValue )
2733 +{
2734 +    int nRet;
2735 +
2736 +    if( g_pCurrentBp )
2737 +    {
2738 +        *pusValue = g_pCurrentBp->usGpioPcmciaReset;
2739 +
2740 +        if( g_pCurrentBp->usGpioPcmciaReset != BP_NOT_DEFINED )
2741 +        {
2742 +            nRet = BP_SUCCESS;
2743 +        }
2744 +        else
2745 +        {
2746 +            nRet = BP_VALUE_NOT_DEFINED;
2747 +        }
2748 +    }
2749 +    else
2750 +    {
2751 +        *pusValue = BP_NOT_DEFINED;
2752 +        nRet = BP_BOARD_ID_NOT_SET;
2753 +    }
2754 +
2755 +    return( nRet );
2756 +} /* BpGetPcmciaResetGpio */
2757 +
2758 +/**************************************************************************
2759 + * Name       : BpGetUartRtsCtsGpios
2760 + *
2761 + * Description: This function returns the GPIO pin assignments for RTS and CTS
2762 + *              UART signals.
2763 + *
2764 + * Parameters : [OUT] pusRts - Address of short word that the UART RTS GPIO
2765 + *                  pin is returned in.
2766 + *              [OUT] pusCts - Address of short word that the UART CTS GPIO
2767 + *                  pin is returned in.
2768 + *
2769 + * Returns    : BP_SUCCESS - Success, values are returned.
2770 + *              BP_BOARD_ID_NOT_SET - Error, board id input string does not
2771 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2772 + *                  for the board.
2773 + ***************************************************************************/
2774 +int BpGetRtsCtsUartGpios( unsigned short *pusRts, unsigned short *pusCts )
2775 +{
2776 +    int nRet;
2777 +
2778 +    if( g_pCurrentBp )
2779 +    {
2780 +        *pusRts = g_pCurrentBp->usGpioUartRts;
2781 +        *pusCts = g_pCurrentBp->usGpioUartCts;
2782 +
2783 +        if( g_pCurrentBp->usGpioUartRts != BP_NOT_DEFINED &&
2784 +            g_pCurrentBp->usGpioUartCts != BP_NOT_DEFINED )
2785 +        {
2786 +            nRet = BP_SUCCESS;
2787 +        }
2788 +        else
2789 +        {
2790 +            nRet = BP_VALUE_NOT_DEFINED;
2791 +        }
2792 +    }
2793 +    else
2794 +    {
2795 +        *pusRts = *pusCts = BP_NOT_DEFINED;
2796 +        nRet = BP_BOARD_ID_NOT_SET;
2797 +    }
2798 +
2799 +    return( nRet );
2800 +} /* BpGetUartRtsCtsGpios */
2801 +
2802 +/**************************************************************************
2803 + * Name       : BpGetAdslLedGpio
2804 + *
2805 + * Description: This function returns the GPIO pin assignment for the ADSL
2806 + *              LED.
2807 + *
2808 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
2809 + *                  GPIO pin is returned in.
2810 + *
2811 + * Returns    : BP_SUCCESS - Success, value is returned.
2812 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2813 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2814 + *                  for the board.
2815 + ***************************************************************************/
2816 +int BpGetAdslLedGpio( unsigned short *pusValue )
2817 +{
2818 +    int nRet;
2819 +
2820 +    if( g_pCurrentBp )
2821 +    {
2822 +        *pusValue = g_pCurrentBp->usGpioLedAdsl;
2823 +
2824 +        if( g_pCurrentBp->usGpioLedAdsl != BP_NOT_DEFINED )
2825 +        {
2826 +            nRet = BP_SUCCESS;
2827 +        }
2828 +        else
2829 +        {
2830 +            nRet = BP_VALUE_NOT_DEFINED;
2831 +        }
2832 +    }
2833 +    else
2834 +    {
2835 +        *pusValue = BP_NOT_DEFINED;
2836 +        nRet = BP_BOARD_ID_NOT_SET;
2837 +    }
2838 +
2839 +    return( nRet );
2840 +} /* BpGetAdslLedGpio */
2841 +
2842 +/**************************************************************************
2843 + * Name       : BpGetAdslFailLedGpio
2844 + *
2845 + * Description: This function returns the GPIO pin assignment for the ADSL
2846 + *              LED that is used when there is a DSL connection failure.
2847 + *
2848 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
2849 + *                  GPIO pin is returned in.
2850 + *
2851 + * Returns    : BP_SUCCESS - Success, value is returned.
2852 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2853 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2854 + *                  for the board.
2855 + ***************************************************************************/
2856 +int BpGetAdslFailLedGpio( unsigned short *pusValue )
2857 +{
2858 +    int nRet;
2859 +
2860 +    if( g_pCurrentBp )
2861 +    {
2862 +        *pusValue = g_pCurrentBp->usGpioLedAdslFail;
2863 +
2864 +        if( g_pCurrentBp->usGpioLedAdslFail != BP_NOT_DEFINED )
2865 +        {
2866 +            nRet = BP_SUCCESS;
2867 +        }
2868 +        else
2869 +        {
2870 +            nRet = BP_VALUE_NOT_DEFINED;
2871 +        }
2872 +    }
2873 +    else
2874 +    {
2875 +        *pusValue = BP_NOT_DEFINED;
2876 +        nRet = BP_BOARD_ID_NOT_SET;
2877 +    }
2878 +
2879 +    return( nRet );
2880 +} /* BpGetAdslFailLedGpio */
2881 +
2882 +/**************************************************************************
2883 + * Name       : BpGetWirelessLedGpio
2884 + *
2885 + * Description: This function returns the GPIO pin assignment for the Wireless
2886 + *              LED.
2887 + *
2888 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
2889 + *                  GPIO pin is returned in.
2890 + *
2891 + * Returns    : BP_SUCCESS - Success, value is returned.
2892 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2893 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2894 + *                  for the board.
2895 + ***************************************************************************/
2896 +int BpGetWirelessLedGpio( unsigned short *pusValue )
2897 +{
2898 +    int nRet;
2899 +
2900 +    if( g_pCurrentBp )
2901 +    {
2902 +        *pusValue = g_pCurrentBp->usGpioLedWireless;
2903 +
2904 +        if( g_pCurrentBp->usGpioLedWireless != BP_NOT_DEFINED )
2905 +        {
2906 +            nRet = BP_SUCCESS;
2907 +        }
2908 +        else
2909 +        {
2910 +            nRet = BP_VALUE_NOT_DEFINED;
2911 +        }
2912 +    }
2913 +    else
2914 +    {
2915 +        *pusValue = BP_NOT_DEFINED;
2916 +        nRet = BP_BOARD_ID_NOT_SET;
2917 +    }
2918 +
2919 +    return( nRet );
2920 +} /* BpGetWirelessLedGpio */
2921 +
2922 +/**************************************************************************
2923 + * Name       : BpGetWirelessAntInUse
2924 + *
2925 + * Description: This function returns the antennas in use for wireless
2926 + *
2927 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Antenna
2928 + *                  is in use.
2929 + *
2930 + * Returns    : BP_SUCCESS - Success, value is returned.
2931 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2932 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2933 + *                  for the board.
2934 + ***************************************************************************/
2935 +int BpGetWirelessAntInUse( unsigned short *pusValue )
2936 +{
2937 +    int nRet;
2938 +
2939 +    if( g_pCurrentBp )
2940 +    {
2941 +        *pusValue = g_pCurrentBp->usAntInUseWireless;
2942 +
2943 +        if( g_pCurrentBp->usAntInUseWireless != BP_NOT_DEFINED )
2944 +        {
2945 +            nRet = BP_SUCCESS;
2946 +        }
2947 +        else
2948 +        {
2949 +            nRet = BP_VALUE_NOT_DEFINED;
2950 +        }
2951 +    }
2952 +    else
2953 +    {
2954 +        *pusValue = BP_NOT_DEFINED;
2955 +        nRet = BP_BOARD_ID_NOT_SET;
2956 +    }
2957 +
2958 +    return( nRet );
2959 +} /* BpGetWirelessAntInUse */
2960 +
2961 +/**************************************************************************
2962 + * Name       : BpGetWirelessSesBtnGpio
2963 + *
2964 + * Description: This function returns the GPIO pin assignment for the Wireless
2965 + *              Ses Button.
2966 + *
2967 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
2968 + *                  GPIO pin is returned in.
2969 + *
2970 + * Returns    : BP_SUCCESS - Success, value is returned.
2971 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
2972 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
2973 + *                  for the board.
2974 + ***************************************************************************/
2975 +int BpGetWirelessSesBtnGpio( unsigned short *pusValue )
2976 +{
2977 +    int nRet;
2978 +
2979 +    if( g_pCurrentBp )
2980 +    {
2981 +        *pusValue = g_pCurrentBp->usGpioSesBtnWireless;
2982 +
2983 +        if( g_pCurrentBp->usGpioSesBtnWireless != BP_NOT_DEFINED )
2984 +        {
2985 +            nRet = BP_SUCCESS;
2986 +        }
2987 +        else
2988 +        {
2989 +            nRet = BP_VALUE_NOT_DEFINED;
2990 +        }
2991 +    }
2992 +    else
2993 +    {
2994 +        *pusValue = BP_NOT_DEFINED;
2995 +        nRet = BP_BOARD_ID_NOT_SET;
2996 +    }
2997 +
2998 +    return( nRet );
2999 +} /* BpGetWirelessSesBtnGpio */
3000 +
3001 +/**************************************************************************
3002 + * Name       : BpGetWirelessSesExtIntr
3003 + *
3004 + * Description: This function returns the external interrupt number for the
3005 + *              Wireless Ses Button.
3006 + *
3007 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
3008 + *                  external interrup is returned in.
3009 + *
3010 + * Returns    : BP_SUCCESS - Success, value is returned.
3011 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3012 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3013 + *                  for the board.
3014 + ***************************************************************************/
3015 +int BpGetWirelessSesExtIntr( unsigned short *pusValue )
3016 +{
3017 +    int nRet;
3018 +
3019 +    if( g_pCurrentBp )
3020 +    {
3021 +        *pusValue = g_pCurrentBp->usExtIntrSesBtnWireless;
3022 +
3023 +        if( g_pCurrentBp->usExtIntrSesBtnWireless != BP_NOT_DEFINED )
3024 +        {
3025 +            nRet = BP_SUCCESS;
3026 +        }
3027 +        else
3028 +        {
3029 +            nRet = BP_VALUE_NOT_DEFINED;
3030 +        }
3031 +    }
3032 +    else
3033 +    {
3034 +        *pusValue = BP_NOT_DEFINED;
3035 +        nRet = BP_BOARD_ID_NOT_SET;
3036 +    }
3037 +
3038 +    return( nRet );
3039 +
3040 +} /* BpGetWirelessSesExtIntr */
3041 +
3042 +/**************************************************************************
3043 + * Name       : BpGetWirelessSesLedGpio
3044 + *
3045 + * Description: This function returns the GPIO pin assignment for the Wireless
3046 + *              Ses Led.
3047 + *
3048 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
3049 + *                  Led GPIO pin is returned in.
3050 + *
3051 + * Returns    : BP_SUCCESS - Success, value is returned.
3052 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3053 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3054 + *                  for the board.
3055 + ***************************************************************************/
3056 +int BpGetWirelessSesLedGpio( unsigned short *pusValue )
3057 +{
3058 +    int nRet;
3059 +
3060 +    if( g_pCurrentBp )
3061 +    {
3062 +        *pusValue = g_pCurrentBp->usGpioLedSesWireless;
3063 +
3064 +        if( g_pCurrentBp->usGpioLedSesWireless != BP_NOT_DEFINED )
3065 +        {
3066 +            nRet = BP_SUCCESS;
3067 +        }
3068 +        else
3069 +        {
3070 +            nRet = BP_VALUE_NOT_DEFINED;
3071 +        }
3072 +    }
3073 +    else
3074 +    {
3075 +        *pusValue = BP_NOT_DEFINED;
3076 +        nRet = BP_BOARD_ID_NOT_SET;
3077 +    }
3078 +
3079 +    return( nRet );
3080 +
3081 +} /* BpGetWirelessSesLedGpio */
3082 +
3083 +/**************************************************************************
3084 + * Name       : BpGetUsbLedGpio
3085 + *
3086 + * Description: This function returns the GPIO pin assignment for the USB
3087 + *              LED.
3088 + *
3089 + * Parameters : [OUT] pusValue - Address of short word that the USB LED
3090 + *                  GPIO pin is returned in.
3091 + *
3092 + * Returns    : BP_SUCCESS - Success, value is returned.
3093 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3094 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3095 + *                  for the board.
3096 + ***************************************************************************/
3097 +int BpGetUsbLedGpio( unsigned short *pusValue )
3098 +{
3099 +    int nRet;
3100 +
3101 +    if( g_pCurrentBp )
3102 +    {
3103 +        *pusValue = g_pCurrentBp->usGpioLedUsb;
3104 +
3105 +        if( g_pCurrentBp->usGpioLedUsb != BP_NOT_DEFINED )
3106 +        {
3107 +            nRet = BP_SUCCESS;
3108 +        }
3109 +        else
3110 +        {
3111 +            nRet = BP_VALUE_NOT_DEFINED;
3112 +        }
3113 +    }
3114 +    else
3115 +    {
3116 +        *pusValue = BP_NOT_DEFINED;
3117 +        nRet = BP_BOARD_ID_NOT_SET;
3118 +    }
3119 +
3120 +    return( nRet );
3121 +} /* BpGetUsbLedGpio */
3122 +
3123 +/**************************************************************************
3124 + * Name       : BpGetHpnaLedGpio
3125 + *
3126 + * Description: This function returns the GPIO pin assignment for the HPNA
3127 + *              LED.
3128 + *
3129 + * Parameters : [OUT] pusValue - Address of short word that the HPNA LED
3130 + *                  GPIO pin is returned in.
3131 + *
3132 + * Returns    : BP_SUCCESS - Success, value is returned.
3133 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3134 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3135 + *                  for the board.
3136 + ***************************************************************************/
3137 +int BpGetHpnaLedGpio( unsigned short *pusValue )
3138 +{
3139 +    int nRet;
3140 +
3141 +    if( g_pCurrentBp )
3142 +    {
3143 +        *pusValue = g_pCurrentBp->usGpioLedHpna;
3144 +
3145 +        if( g_pCurrentBp->usGpioLedHpna != BP_NOT_DEFINED )
3146 +        {
3147 +            nRet = BP_SUCCESS;
3148 +        }
3149 +        else
3150 +        {
3151 +            nRet = BP_VALUE_NOT_DEFINED;
3152 +        }
3153 +    }
3154 +    else
3155 +    {
3156 +        *pusValue = BP_NOT_DEFINED;
3157 +        nRet = BP_BOARD_ID_NOT_SET;
3158 +    }
3159 +
3160 +    return( nRet );
3161 +} /* BpGetHpnaLedGpio */
3162 +
3163 +/**************************************************************************
3164 + * Name       : BpGetWanDataLedGpio
3165 + *
3166 + * Description: This function returns the GPIO pin assignment for the WAN Data
3167 + *              LED.
3168 + *
3169 + * Parameters : [OUT] pusValue - Address of short word that the WAN Data LED
3170 + *                  GPIO pin is returned in.
3171 + *
3172 + * Returns    : BP_SUCCESS - Success, value is returned.
3173 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3174 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3175 + *                  for the board.
3176 + ***************************************************************************/
3177 +int BpGetWanDataLedGpio( unsigned short *pusValue )
3178 +{
3179 +    int nRet;
3180 +
3181 +    if( g_pCurrentBp )
3182 +    {
3183 +        *pusValue = g_pCurrentBp->usGpioLedWanData;
3184 +
3185 +        if( g_pCurrentBp->usGpioLedWanData != BP_NOT_DEFINED )
3186 +        {
3187 +            nRet = BP_SUCCESS;
3188 +        }
3189 +        else
3190 +        {
3191 +            nRet = BP_VALUE_NOT_DEFINED;
3192 +        }
3193 +    }
3194 +    else
3195 +    {
3196 +        *pusValue = BP_NOT_DEFINED;
3197 +        nRet = BP_BOARD_ID_NOT_SET;
3198 +    }
3199 +
3200 +    return( nRet );
3201 +} /* BpGetWanDataLedGpio */
3202 +
3203 +/**************************************************************************
3204 + * Name       : BpGetPppLedGpio
3205 + *
3206 + * Description: This function returns the GPIO pin assignment for the PPP
3207 + *              LED.
3208 + *
3209 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
3210 + *                  GPIO pin is returned in.
3211 + *
3212 + * Returns    : BP_SUCCESS - Success, value is returned.
3213 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3214 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3215 + *                  for the board.
3216 + ***************************************************************************/
3217 +int BpGetPppLedGpio( unsigned short *pusValue )
3218 +{
3219 +    int nRet;
3220 +
3221 +    if( g_pCurrentBp )
3222 +    {
3223 +        *pusValue = g_pCurrentBp->usGpioLedPpp;
3224 +
3225 +        if( g_pCurrentBp->usGpioLedPpp != BP_NOT_DEFINED )
3226 +        {
3227 +            nRet = BP_SUCCESS;
3228 +        }
3229 +        else
3230 +        {
3231 +            nRet = BP_VALUE_NOT_DEFINED;
3232 +        }
3233 +    }
3234 +    else
3235 +    {
3236 +        *pusValue = BP_NOT_DEFINED;
3237 +        nRet = BP_BOARD_ID_NOT_SET;
3238 +    }
3239 +
3240 +    return( nRet );
3241 +} /* BpGetPppLedGpio */
3242 +
3243 +/**************************************************************************
3244 + * Name       : BpGetPppFailLedGpio
3245 + *
3246 + * Description: This function returns the GPIO pin assignment for the PPP
3247 + *              LED that is used when there is a PPP connection failure.
3248 + *
3249 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
3250 + *                  GPIO pin is returned in.
3251 + *
3252 + * Returns    : BP_SUCCESS - Success, value is returned.
3253 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3254 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3255 + *                  for the board.
3256 + ***************************************************************************/
3257 +int BpGetPppFailLedGpio( unsigned short *pusValue )
3258 +{
3259 +    int nRet;
3260 +
3261 +    if( g_pCurrentBp )
3262 +    {
3263 +        *pusValue = g_pCurrentBp->usGpioLedPppFail;
3264 +
3265 +        if( g_pCurrentBp->usGpioLedPppFail != BP_NOT_DEFINED )
3266 +        {
3267 +            nRet = BP_SUCCESS;
3268 +        }
3269 +        else
3270 +        {
3271 +            nRet = BP_VALUE_NOT_DEFINED;
3272 +        }
3273 +    }
3274 +    else
3275 +    {
3276 +        *pusValue = BP_NOT_DEFINED;
3277 +        nRet = BP_BOARD_ID_NOT_SET;
3278 +    }
3279 +
3280 +    return( nRet );
3281 +} /* BpGetPppFailLedGpio */
3282 +
3283 +/**************************************************************************
3284 + * Name       : BpGetBootloaderPowerOnLedGpio
3285 + *
3286 + * Description: This function returns the GPIO pin assignment for the power
3287 + *              on LED that is set by the bootloader.
3288 + *
3289 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
3290 + *                  GPIO pin is returned in.
3291 + *
3292 + * Returns    : BP_SUCCESS - Success, value is returned.
3293 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3294 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3295 + *                  for the board.
3296 + ***************************************************************************/
3297 +int BpGetBootloaderPowerOnLedGpio( unsigned short *pusValue )
3298 +{
3299 +    int nRet;
3300 +
3301 +    if( g_pCurrentBp )
3302 +    {
3303 +        *pusValue = g_pCurrentBp->usGpioLedBlPowerOn;
3304 +
3305 +        if( g_pCurrentBp->usGpioLedBlPowerOn != BP_NOT_DEFINED )
3306 +        {
3307 +            nRet = BP_SUCCESS;
3308 +        }
3309 +        else
3310 +        {
3311 +            nRet = BP_VALUE_NOT_DEFINED;
3312 +        }
3313 +    }
3314 +    else
3315 +    {
3316 +        *pusValue = BP_NOT_DEFINED;
3317 +        nRet = BP_BOARD_ID_NOT_SET;
3318 +    }
3319 +
3320 +    return( nRet );
3321 +} /* BpGetBootloaderPowerOn */
3322 +
3323 +/**************************************************************************
3324 + * Name       : BpGetBootloaderAlarmLedGpio
3325 + *
3326 + * Description: This function returns the GPIO pin assignment for the alarm
3327 + *              LED that is set by the bootloader.
3328 + *
3329 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
3330 + *                  GPIO pin is returned in.
3331 + *
3332 + * Returns    : BP_SUCCESS - Success, value is returned.
3333 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3334 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3335 + *                  for the board.
3336 + ***************************************************************************/
3337 +int BpGetBootloaderAlarmLedGpio( unsigned short *pusValue )
3338 +{
3339 +    int nRet;
3340 +
3341 +    if( g_pCurrentBp )
3342 +    {
3343 +        *pusValue = g_pCurrentBp->usGpioLedBlAlarm;
3344 +
3345 +        if( g_pCurrentBp->usGpioLedBlAlarm != BP_NOT_DEFINED )
3346 +        {
3347 +            nRet = BP_SUCCESS;
3348 +        }
3349 +        else
3350 +        {
3351 +            nRet = BP_VALUE_NOT_DEFINED;
3352 +        }
3353 +    }
3354 +    else
3355 +    {
3356 +        *pusValue = BP_NOT_DEFINED;
3357 +        nRet = BP_BOARD_ID_NOT_SET;
3358 +    }
3359 +
3360 +    return( nRet );
3361 +} /* BpGetBootloaderAlarmLedGpio */
3362 +
3363 +/**************************************************************************
3364 + * Name       : BpGetBootloaderResetCfgLedGpio
3365 + *
3366 + * Description: This function returns the GPIO pin assignment for the reset
3367 + *              configuration LED that is set by the bootloader.
3368 + *
3369 + * Parameters : [OUT] pusValue - Address of short word that the reset
3370 + *                  configuration LED GPIO pin is returned in.
3371 + *
3372 + * Returns    : BP_SUCCESS - Success, value is returned.
3373 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3374 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3375 + *                  for the board.
3376 + ***************************************************************************/
3377 +int BpGetBootloaderResetCfgLedGpio( unsigned short *pusValue )
3378 +{
3379 +    int nRet;
3380 +
3381 +    if( g_pCurrentBp )
3382 +    {
3383 +        *pusValue = g_pCurrentBp->usGpioLedBlResetCfg;
3384 +
3385 +        if( g_pCurrentBp->usGpioLedBlResetCfg != BP_NOT_DEFINED )
3386 +        {
3387 +            nRet = BP_SUCCESS;
3388 +        }
3389 +        else
3390 +        {
3391 +            nRet = BP_VALUE_NOT_DEFINED;
3392 +        }
3393 +    }
3394 +    else
3395 +    {
3396 +        *pusValue = BP_NOT_DEFINED;
3397 +        nRet = BP_BOARD_ID_NOT_SET;
3398 +    }
3399 +
3400 +    return( nRet );
3401 +} /* BpGetBootloaderResetCfgLedGpio */
3402 +
3403 +/**************************************************************************
3404 + * Name       : BpGetBootloaderStopLedGpio
3405 + *
3406 + * Description: This function returns the GPIO pin assignment for the break
3407 + *              into bootloader LED that is set by the bootloader.
3408 + *
3409 + * Parameters : [OUT] pusValue - Address of short word that the break into
3410 + *                  bootloader LED GPIO pin is returned in.
3411 + *
3412 + * Returns    : BP_SUCCESS - Success, value is returned.
3413 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3414 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3415 + *                  for the board.
3416 + ***************************************************************************/
3417 +int BpGetBootloaderStopLedGpio( unsigned short *pusValue )
3418 +{
3419 +    int nRet;
3420 +
3421 +    if( g_pCurrentBp )
3422 +    {
3423 +        *pusValue = g_pCurrentBp->usGpioLedBlStop;
3424 +
3425 +        if( g_pCurrentBp->usGpioLedBlStop != BP_NOT_DEFINED )
3426 +        {
3427 +            nRet = BP_SUCCESS;
3428 +        }
3429 +        else
3430 +        {
3431 +            nRet = BP_VALUE_NOT_DEFINED;
3432 +        }
3433 +    }
3434 +    else
3435 +    {
3436 +        *pusValue = BP_NOT_DEFINED;
3437 +        nRet = BP_BOARD_ID_NOT_SET;
3438 +    }
3439 +
3440 +    return( nRet );
3441 +} /* BpGetBootloaderStopLedGpio */
3442 +
3443 +/**************************************************************************
3444 + * Name       : BpGetVoipLedGpio
3445 + *
3446 + * Description: This function returns the GPIO pin assignment for the VOIP
3447 + *              LED.
3448 + *
3449 + * Parameters : [OUT] pusValue - Address of short word that the VOIP LED
3450 + *                  GPIO pin is returned in.
3451 + *
3452 + * Returns    : BP_SUCCESS - Success, value is returned.
3453 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3454 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3455 + *                  for the board.
3456 + *
3457 + * Note       : The VoIP structure would allow for having one LED per DSP
3458 + *              however, the board initialization function assumes only one
3459 + *              LED per functionality (ie one LED for VoIP).  Therefore in
3460 + *              order to keep this tidy and simple we do not make usage of the
3461 + *              one-LED-per-DSP function.  Instead, we assume that the LED for
3462 + *              VoIP is unique and associated with DSP 0 (always present on
3463 + *              any VoIP platform).  If changing this to a LED-per-DSP function
3464 + *              then one need to update the board initialization driver in
3465 + *              bcmdrivers\opensource\char\board\bcm963xx\impl1
3466 + ***************************************************************************/
3467 +int BpGetVoipLedGpio( unsigned short *pusValue )
3468 +{
3469 +    int nRet;
3470 +
3471 +    if( g_pCurrentBp )
3472 +    {
3473 +        VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( 0 );
3474 +
3475 +        if( pDspInfo )
3476 +        {
3477 +           *pusValue = pDspInfo->usGpioLedVoip;
3478 +
3479 +           if( *pusValue != BP_NOT_DEFINED )
3480 +           {
3481 +              nRet = BP_SUCCESS;
3482 +           }
3483 +           else
3484 +           {
3485 +              nRet = BP_VALUE_NOT_DEFINED;
3486 +           }
3487 +        }
3488 +        else
3489 +        {
3490 +           *pusValue = BP_NOT_DEFINED;
3491 +           nRet = BP_BOARD_ID_NOT_FOUND;
3492 +        }
3493 +    }
3494 +    else
3495 +    {
3496 +        *pusValue = BP_NOT_DEFINED;
3497 +        nRet = BP_BOARD_ID_NOT_SET;
3498 +    }
3499 +
3500 +    return( nRet );
3501 +} /* BpGetVoipLedGpio */
3502 +
3503 +/**************************************************************************
3504 + * Name       : BpGetWirelessExtIntr
3505 + *
3506 + * Description: This function returns the Wireless external interrupt number.
3507 + *
3508 + * Parameters : [OUT] pulValue - Address of short word that the wireless
3509 + *                  external interrupt number is returned in.
3510 + *
3511 + * Returns    : BP_SUCCESS - Success, value is returned.
3512 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3513 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3514 + *                  for the board.
3515 + ***************************************************************************/
3516 +int BpGetWirelessExtIntr( unsigned long *pulValue )
3517 +{
3518 +    int nRet;
3519 +
3520 +    if( g_pCurrentBp )
3521 +    {
3522 +        *pulValue = g_pCurrentBp->usExtIntrWireless;
3523 +
3524 +        if( g_pCurrentBp->usExtIntrWireless != BP_NOT_DEFINED )
3525 +        {
3526 +            nRet = BP_SUCCESS;
3527 +        }
3528 +        else
3529 +        {
3530 +            nRet = BP_VALUE_NOT_DEFINED;
3531 +        }
3532 +    }
3533 +    else
3534 +    {
3535 +        *pulValue = BP_NOT_DEFINED;
3536 +        nRet = BP_BOARD_ID_NOT_SET;
3537 +    }
3538 +
3539 +    return( nRet );
3540 +} /* BpGetWirelessExtIntr */
3541 +
3542 +/**************************************************************************
3543 + * Name       : BpGetAdslDyingGaspExtIntr
3544 + *
3545 + * Description: This function returns the ADSL Dying Gasp external interrupt
3546 + *              number.
3547 + *
3548 + * Parameters : [OUT] pulValue - Address of short word that the ADSL Dying Gasp
3549 + *                  external interrupt number is returned in.
3550 + *
3551 + * Returns    : BP_SUCCESS - Success, value is returned.
3552 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3553 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3554 + *                  for the board.
3555 + ***************************************************************************/
3556 +int BpGetAdslDyingGaspExtIntr( unsigned long *pulValue )
3557 +{
3558 +    int nRet;
3559 +
3560 +    if( g_pCurrentBp )
3561 +    {
3562 +        *pulValue = g_pCurrentBp->usExtIntrAdslDyingGasp;
3563 +
3564 +        if( g_pCurrentBp->usExtIntrAdslDyingGasp != BP_NOT_DEFINED )
3565 +        {
3566 +            nRet = BP_SUCCESS;
3567 +        }
3568 +        else
3569 +        {
3570 +            nRet = BP_VALUE_NOT_DEFINED;
3571 +        }
3572 +    }
3573 +    else
3574 +    {
3575 +        *pulValue = BP_NOT_DEFINED;
3576 +        nRet = BP_BOARD_ID_NOT_SET;
3577 +    }
3578 +
3579 +    return( nRet );
3580 +} /* BpGetAdslDyingGaspExtIntr */
3581 +
3582 +/**************************************************************************
3583 + * Name       : BpGetVoipExtIntr
3584 + *
3585 + * Description: This function returns the VOIP external interrupt number.
3586 + *
3587 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
3588 + *                  external interrupt number is returned in.
3589 + *              [IN] dspNum - Address of the DSP to query.
3590 + *
3591 + * Returns    : BP_SUCCESS - Success, value is returned.
3592 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3593 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3594 + *                  for the board.
3595 + ***************************************************************************/
3596 +int BpGetVoipExtIntr( unsigned char dspNum, unsigned long *pulValue )
3597 +{
3598 +    int nRet;
3599 +
3600 +    if( g_pCurrentBp )
3601 +    {
3602 +        VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
3603 +
3604 +        if( pDspInfo )
3605 +        {
3606 +           *pulValue = pDspInfo->usExtIntrVoip;
3607 +
3608 +           if( *pulValue != BP_NOT_DEFINED )
3609 +           {
3610 +              nRet = BP_SUCCESS;
3611 +           }
3612 +           else
3613 +           {
3614 +              nRet = BP_VALUE_NOT_DEFINED;
3615 +           }
3616 +        }
3617 +        else
3618 +        {
3619 +           *pulValue = BP_NOT_DEFINED;
3620 +           nRet = BP_BOARD_ID_NOT_FOUND;
3621 +        }
3622 +    }
3623 +    else
3624 +    {
3625 +        *pulValue = BP_NOT_DEFINED;
3626 +        nRet = BP_BOARD_ID_NOT_SET;
3627 +    }
3628 +
3629 +    return( nRet );
3630 +} /* BpGetVoipExtIntr */
3631 +
3632 +/**************************************************************************
3633 + * Name       : BpGetHpnaExtIntr
3634 + *
3635 + * Description: This function returns the HPNA external interrupt number.
3636 + *
3637 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
3638 + *                  external interrupt number is returned in.
3639 + *
3640 + * Returns    : BP_SUCCESS - Success, value is returned.
3641 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3642 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3643 + *                  for the board.
3644 + ***************************************************************************/
3645 +int BpGetHpnaExtIntr( unsigned long *pulValue )
3646 +{
3647 +    int nRet;
3648 +
3649 +    if( g_pCurrentBp )
3650 +    {
3651 +        *pulValue = g_pCurrentBp->usExtIntrHpna;
3652 +
3653 +        if( g_pCurrentBp->usExtIntrHpna != BP_NOT_DEFINED )
3654 +        {
3655 +            nRet = BP_SUCCESS;
3656 +        }
3657 +        else
3658 +        {
3659 +            nRet = BP_VALUE_NOT_DEFINED;
3660 +        }
3661 +    }
3662 +    else
3663 +    {
3664 +        *pulValue = BP_NOT_DEFINED;
3665 +        nRet = BP_BOARD_ID_NOT_SET;
3666 +    }
3667 +
3668 +    return( nRet );
3669 +} /* BpGetHpnaExtIntr */
3670 +
3671 +/**************************************************************************
3672 + * Name       : BpGetHpnaChipSelect
3673 + *
3674 + * Description: This function returns the HPNA chip select number.
3675 + *
3676 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
3677 + *                  chip select number is returned in.
3678 + *
3679 + * Returns    : BP_SUCCESS - Success, value is returned.
3680 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3681 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3682 + *                  for the board.
3683 + ***************************************************************************/
3684 +int BpGetHpnaChipSelect( unsigned long *pulValue )
3685 +{
3686 +    int nRet;
3687 +
3688 +    if( g_pCurrentBp )
3689 +    {
3690 +        *pulValue = g_pCurrentBp->usCsHpna;
3691 +
3692 +        if( g_pCurrentBp->usCsHpna != BP_NOT_DEFINED )
3693 +        {
3694 +            nRet = BP_SUCCESS;
3695 +        }
3696 +        else
3697 +        {
3698 +            nRet = BP_VALUE_NOT_DEFINED;
3699 +        }
3700 +    }
3701 +    else
3702 +    {
3703 +        *pulValue = BP_NOT_DEFINED;
3704 +        nRet = BP_BOARD_ID_NOT_SET;
3705 +    }
3706 +
3707 +    return( nRet );
3708 +} /* BpGetHpnaChipSelect */
3709 +
3710 +/**************************************************************************
3711 + * Name       : BpGetVoipChipSelect
3712 + *
3713 + * Description: This function returns the VOIP chip select number.
3714 + *
3715 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
3716 + *                  chip select number is returned in.
3717 + *              [IN] dspNum - Address of the DSP to query.
3718 + *
3719 + * Returns    : BP_SUCCESS - Success, value is returned.
3720 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
3721 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
3722 + *                  for the board.
3723 + ***************************************************************************/
3724 +int BpGetVoipChipSelect( unsigned char dspNum, unsigned long *pulValue )
3725 +{
3726 +    int nRet;
3727 +
3728 +    if( g_pCurrentBp )
3729 +    {
3730 +        VOIP_DSP_INFO *pDspInfo = BpGetVoipDspConfig( dspNum );
3731 +
3732 +        if( pDspInfo )
3733 +        {
3734 +           *pulValue = pDspInfo->usCsVoip;
3735 +
3736 +           if( *pulValue != BP_NOT_DEFINED )
3737 +           {
3738 +              nRet = BP_SUCCESS;
3739 +           }
3740 +           else
3741 +           {
3742 +              nRet = BP_VALUE_NOT_DEFINED;
3743 +           }
3744 +        }
3745 +        else
3746 +        {
3747 +           *pulValue = BP_NOT_DEFINED;
3748 +           nRet = BP_BOARD_ID_NOT_FOUND;
3749 +        }
3750 +    }
3751 +    else
3752 +    {
3753 +        *pulValue = BP_NOT_DEFINED;
3754 +        nRet = BP_BOARD_ID_NOT_SET;
3755 +    }
3756 +
3757 +    return( nRet );
3758 +} /* BpGetVoipChipSelect */
3759 +
3760 diff -urN linux-2.6.19/arch/mips/bcm963xx/boardparms.h linux-2.6.19.new/arch/mips/bcm963xx/boardparms.h
3761 --- linux-2.6.19/arch/mips/bcm963xx/boardparms.h        1970-01-01 01:00:00.000000000 +0100
3762 +++ linux-2.6.19.new/arch/mips/bcm963xx/boardparms.h    2006-12-16 18:46:31.000000000 +0100
3763 @@ -0,0 +1,758 @@
3764 +/*
3765 +<:copyright-gpl
3766 +
3767 + Copyright 2003 Broadcom Corp. All Rights Reserved.
3768 +
3769 + This program is free software; you can distribute it and/or modify it
3770 + under the terms of the GNU General Public License (Version 2) as
3771 + published by the Free Software Foundation.
3772 +
3773 + This program is distributed in the hope it will be useful, but WITHOUT
3774 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
3775 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
3776 + for more details.
3777 +
3778 + You should have received a copy of the GNU General Public License along
3779 + with this program; if not, write to the Free Software Foundation, Inc.,
3780 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
3781 +
3782 +:>
3783 +*/
3784 +/**************************************************************************
3785 + * File Name  : boardparms.h
3786 + *
3787 + * Description: This file contains definitions and function prototypes for
3788 + *              the BCM63xx board parameter access functions.
3789 + *
3790 + * Updates    : 07/14/2003  Created.
3791 + ***************************************************************************/
3792 +
3793 +#if !defined(_BOARDPARMS_H)
3794 +#define _BOARDPARMS_H
3795 +
3796 +/* Return codes. */
3797 +#define BP_SUCCESS                              0
3798 +#define BP_BOARD_ID_NOT_FOUND                   1
3799 +#define BP_VALUE_NOT_DEFINED                    2
3800 +#define BP_BOARD_ID_NOT_SET                     3
3801 +
3802 +/* Values for BpGetSdramSize. */
3803 +#define BP_MEMORY_8MB_1_CHIP                    0
3804 +#define BP_MEMORY_16MB_1_CHIP                   1
3805 +#define BP_MEMORY_32MB_1_CHIP                   2
3806 +#define BP_MEMORY_64MB_2_CHIP                   3
3807 +#define BP_MEMORY_32MB_2_CHIP                   4
3808 +#define BP_MEMORY_16MB_2_CHIP                   5
3809 +
3810 +/* Values for EthernetMacInfo PhyType. */
3811 +#define BP_ENET_NO_PHY                          0
3812 +#define BP_ENET_INTERNAL_PHY                    1
3813 +#define BP_ENET_EXTERNAL_PHY                    2
3814 +#define BP_ENET_EXTERNAL_SWITCH                 3
3815 +
3816 +/* Values for EthernetMacInfo Configuration type. */
3817 +#define BP_ENET_CONFIG_MDIO                     0       /* Internal PHY, External PHY, Switch+(no GPIO, no SPI, no MDIO Pseudo phy */
3818 +#define BP_ENET_CONFIG_GPIO                     1       /* Bcm96345GW board + Bcm5325M/E */
3819 +#define BP_ENET_CONFIG_MDIO_PSEUDO_PHY          2       /* Bcm96348GW board + Bcm5325E */
3820 +#define BP_ENET_CONFIG_SPI_SSB_0                3       /* Bcm96348GW board + Bcm5325M/E */
3821 +#define BP_ENET_CONFIG_SPI_SSB_1                4       /* Bcm96348GW board + Bcm5325M/E */
3822 +#define BP_ENET_CONFIG_SPI_SSB_2                5       /* Bcm96348GW board + Bcm5325M/E */
3823 +#define BP_ENET_CONFIG_SPI_SSB_3                6       /* Bcm96348GW board + Bcm5325M/E */
3824 +
3825 +/* Values for EthernetMacInfo Reverse MII. */
3826 +#define BP_ENET_NO_REVERSE_MII                  0
3827 +#define BP_ENET_REVERSE_MII                     1
3828 +
3829 +/* Values for VoIPDSPInfo DSPType. */
3830 +#define BP_VOIP_NO_DSP                          0
3831 +#define BP_VOIP_DSP                             1
3832 +
3833 +
3834 +/* Values for GPIO pin assignments (AH = Active High, AL = Active Low). */
3835 +#define BP_ACTIVE_MASK                          0x8000
3836 +#define BP_ACTIVE_HIGH                          0x0000
3837 +#define BP_ACTIVE_LOW                           0x8000
3838 +#define BP_GPIO_0_AH                            (0  | BP_ACTIVE_HIGH)
3839 +#define BP_GPIO_0_AL                            (0  | BP_ACTIVE_LOW)
3840 +#define BP_GPIO_1_AH                            (1  | BP_ACTIVE_HIGH)
3841 +#define BP_GPIO_1_AL                            (1  | BP_ACTIVE_LOW)
3842 +#define BP_GPIO_2_AH                            (2  | BP_ACTIVE_HIGH)
3843 +#define BP_GPIO_2_AL                            (2  | BP_ACTIVE_LOW)
3844 +#define BP_GPIO_3_AH                            (3  | BP_ACTIVE_HIGH)
3845 +#define BP_GPIO_3_AL                            (3  | BP_ACTIVE_LOW)
3846 +#define BP_GPIO_4_AH                            (4  | BP_ACTIVE_HIGH)
3847 +#define BP_GPIO_4_AL                            (4  | BP_ACTIVE_LOW)
3848 +#define BP_GPIO_5_AH                            (5  | BP_ACTIVE_HIGH)
3849 +#define BP_GPIO_5_AL                            (5  | BP_ACTIVE_LOW)
3850 +#define BP_GPIO_6_AH                            (6  | BP_ACTIVE_HIGH)
3851 +#define BP_GPIO_6_AL                            (6  | BP_ACTIVE_LOW)
3852 +#define BP_GPIO_7_AH                            (7  | BP_ACTIVE_HIGH)
3853 +#define BP_GPIO_7_AL                            (7  | BP_ACTIVE_LOW)
3854 +#define BP_GPIO_8_AH                            (8  | BP_ACTIVE_HIGH)
3855 +#define BP_GPIO_8_AL                            (8  | BP_ACTIVE_LOW)
3856 +#define BP_GPIO_9_AH                            (9  | BP_ACTIVE_HIGH)
3857 +#define BP_GPIO_9_AL                            (9  | BP_ACTIVE_LOW)
3858 +#define BP_GPIO_10_AH                           (10 | BP_ACTIVE_HIGH)
3859 +#define BP_GPIO_10_AL                           (10 | BP_ACTIVE_LOW)
3860 +#define BP_GPIO_11_AH                           (11 | BP_ACTIVE_HIGH)
3861 +#define BP_GPIO_11_AL                           (11 | BP_ACTIVE_LOW)
3862 +#define BP_GPIO_12_AH                           (12 | BP_ACTIVE_HIGH)
3863 +#define BP_GPIO_12_AL                           (12 | BP_ACTIVE_LOW)
3864 +#define BP_GPIO_13_AH                           (13 | BP_ACTIVE_HIGH)
3865 +#define BP_GPIO_13_AL                           (13 | BP_ACTIVE_LOW)
3866 +#define BP_GPIO_14_AH                           (14 | BP_ACTIVE_HIGH)
3867 +#define BP_GPIO_14_AL                           (14 | BP_ACTIVE_LOW)
3868 +#define BP_GPIO_15_AH                           (15 | BP_ACTIVE_HIGH)
3869 +#define BP_GPIO_15_AL                           (15 | BP_ACTIVE_LOW)
3870 +#define BP_GPIO_16_AH                           (16 | BP_ACTIVE_HIGH)
3871 +#define BP_GPIO_16_AL                           (16 | BP_ACTIVE_LOW)
3872 +#define BP_GPIO_17_AH                           (17 | BP_ACTIVE_HIGH)
3873 +#define BP_GPIO_17_AL                           (17 | BP_ACTIVE_LOW)
3874 +#define BP_GPIO_18_AH                           (18 | BP_ACTIVE_HIGH)
3875 +#define BP_GPIO_18_AL                           (18 | BP_ACTIVE_LOW)
3876 +#define BP_GPIO_19_AH                           (19 | BP_ACTIVE_HIGH)
3877 +#define BP_GPIO_19_AL                           (19 | BP_ACTIVE_LOW)
3878 +#define BP_GPIO_20_AH                           (20 | BP_ACTIVE_HIGH)
3879 +#define BP_GPIO_20_AL                           (20 | BP_ACTIVE_LOW)
3880 +#define BP_GPIO_21_AH                           (21 | BP_ACTIVE_HIGH)
3881 +#define BP_GPIO_21_AL                           (21 | BP_ACTIVE_LOW)
3882 +#define BP_GPIO_22_AH                           (22 | BP_ACTIVE_HIGH)
3883 +#define BP_GPIO_22_AL                           (22 | BP_ACTIVE_LOW)
3884 +#define BP_GPIO_23_AH                           (23 | BP_ACTIVE_HIGH)
3885 +#define BP_GPIO_23_AL                           (23 | BP_ACTIVE_LOW)
3886 +#define BP_GPIO_24_AH                           (24 | BP_ACTIVE_HIGH)
3887 +#define BP_GPIO_24_AL                           (24 | BP_ACTIVE_LOW)
3888 +#define BP_GPIO_25_AH                           (25 | BP_ACTIVE_HIGH)
3889 +#define BP_GPIO_25_AL                           (25 | BP_ACTIVE_LOW)
3890 +#define BP_GPIO_26_AH                           (26 | BP_ACTIVE_HIGH)
3891 +#define BP_GPIO_26_AL                           (26 | BP_ACTIVE_LOW)
3892 +#define BP_GPIO_27_AH                           (27 | BP_ACTIVE_HIGH)
3893 +#define BP_GPIO_27_AL                           (27 | BP_ACTIVE_LOW)
3894 +#define BP_GPIO_28_AH                           (28 | BP_ACTIVE_HIGH)
3895 +#define BP_GPIO_28_AL                           (28 | BP_ACTIVE_LOW)
3896 +#define BP_GPIO_29_AH                           (29 | BP_ACTIVE_HIGH)
3897 +#define BP_GPIO_29_AL                           (29 | BP_ACTIVE_LOW)
3898 +#define BP_GPIO_30_AH                           (30 | BP_ACTIVE_HIGH)
3899 +#define BP_GPIO_30_AL                           (30 | BP_ACTIVE_LOW)
3900 +#define BP_GPIO_31_AH                           (31 | BP_ACTIVE_HIGH)
3901 +#define BP_GPIO_31_AL                           (31 | BP_ACTIVE_LOW)
3902 +#define BP_GPIO_32_AH                           (32 | BP_ACTIVE_HIGH)
3903 +#define BP_GPIO_32_AL                           (32 | BP_ACTIVE_LOW)
3904 +#define BP_GPIO_33_AH                           (33 | BP_ACTIVE_HIGH)
3905 +#define BP_GPIO_33_AL                           (33 | BP_ACTIVE_LOW)
3906 +#define BP_GPIO_34_AH                           (34 | BP_ACTIVE_HIGH)
3907 +#define BP_GPIO_34_AL                           (34 | BP_ACTIVE_LOW)
3908 +#define BP_GPIO_35_AH                           (35 | BP_ACTIVE_HIGH)
3909 +#define BP_GPIO_35_AL                           (35 | BP_ACTIVE_LOW)
3910 +#define BP_GPIO_36_AH                           (36 | BP_ACTIVE_HIGH)
3911 +#define BP_GPIO_36_AL                           (36 | BP_ACTIVE_LOW)
3912 +
3913 +/* Values for external interrupt assignments. */
3914 +#define BP_EXT_INTR_0                           0
3915 +#define BP_EXT_INTR_1                           1
3916 +#define BP_EXT_INTR_2                           2
3917 +#define BP_EXT_INTR_3                           3
3918 +
3919 +/* Values for chip select assignments. */
3920 +#define BP_CS_0                                 0
3921 +#define BP_CS_1                                 1
3922 +#define BP_CS_2                                 2
3923 +#define BP_CS_3                                 3
3924 +
3925 +/* Value for GPIO and external interrupt fields that are not used. */
3926 +#define BP_NOT_DEFINED                          0xffff
3927 +#define BP_HW_DEFINED                           0xfff0
3928 +#define BP_UNEQUIPPED                           0xfff1
3929 +
3930 +/* Maximum size of the board id string. */
3931 +#define BP_BOARD_ID_LEN                         16
3932 +
3933 +/* Maximum number of Ethernet MACs. */
3934 +#define BP_MAX_ENET_MACS                        2
3935 +
3936 +/* Maximum number of VoIP DSPs. */
3937 +#define BP_MAX_VOIP_DSP                         2
3938 +
3939 +/* Wireless Antenna Settings. */
3940 +#define BP_WLAN_ANT_MAIN                        0
3941 +#define BP_WLAN_ANT_AUX                         1
3942 +#define BP_WLAN_ANT_BOTH                        3
3943 +
3944 +#if !defined(__ASSEMBLER__)
3945 +
3946 +/* Information about an Ethernet MAC.  If ucPhyType is BP_ENET_NO_PHY,
3947 + * then the other fields are not valid.
3948 + */
3949 +typedef struct EthernetMacInfo
3950 +{
3951 +    unsigned char ucPhyType;                    /* BP_ENET_xxx             */
3952 +    unsigned char ucPhyAddress;                 /* 0 to 31                 */
3953 +    unsigned short usGpioPhySpiSck;             /* GPIO pin or not defined */
3954 +    unsigned short usGpioPhySpiSs;              /* GPIO pin or not defined */
3955 +    unsigned short usGpioPhySpiMosi;            /* GPIO pin or not defined */
3956 +    unsigned short usGpioPhySpiMiso;            /* GPIO pin or not defined */
3957 +    unsigned short usGpioPhyReset;              /* GPIO pin or not defined (96348LV) */
3958 +    unsigned short numSwitchPorts;              /* Number of PHY ports */
3959 +    unsigned short usConfigType;                /* Configuration type */
3960 +    unsigned short usReverseMii;                /* Reverse MII */
3961 +} ETHERNET_MAC_INFO, *PETHERNET_MAC_INFO;
3962 +
3963 +
3964 +/* Information about VoIP DSPs.  If ucDspType is BP_VOIP_NO_DSP,
3965 + * then the other fields are not valid.
3966 + */
3967 +typedef struct VoIPDspInfo
3968 +{
3969 +    unsigned char  ucDspType;
3970 +    unsigned char  ucDspAddress;
3971 +    unsigned short usExtIntrVoip;
3972 +    unsigned short usGpioVoipReset;
3973 +    unsigned short usGpioVoipIntr;
3974 +    unsigned short usGpioLedVoip;
3975 +    unsigned short usCsVoip;
3976 +
3977 +} VOIP_DSP_INFO;
3978 +
3979 +
3980 +/**************************************************************************
3981 + * Name       : BpSetBoardId
3982 + *
3983 + * Description: This function find the BOARD_PARAMETERS structure for the
3984 + *              specified board id string and assigns it to a global, static
3985 + *              variable.
3986 + *
3987 + * Parameters : [IN] pszBoardId - Board id string that is saved into NVRAM.
3988 + *
3989 + * Returns    : BP_SUCCESS - Success, value is returned.
3990 + *              BP_BOARD_ID_NOT_FOUND - Error, board id input string does not
3991 + *                  have a board parameters configuration record.
3992 + ***************************************************************************/
3993 +int BpSetBoardId( char *pszBoardId );
3994 +
3995 +/**************************************************************************
3996 + * Name       : BpGetBoardIds
3997 + *
3998 + * Description: This function returns all of the supported board id strings.
3999 + *
4000 + * Parameters : [OUT] pszBoardIds - Address of a buffer that the board id
4001 + *                  strings are returned in.  Each id starts at BP_BOARD_ID_LEN
4002 + *                  boundary.
4003 + *              [IN] nBoardIdsSize - Number of BP_BOARD_ID_LEN elements that
4004 + *                  were allocated in pszBoardIds.
4005 + *
4006 + * Returns    : Number of board id strings returned.
4007 + ***************************************************************************/
4008 +int BpGetBoardIds( char *pszBoardIds, int nBoardIdsSize );
4009 +
4010 +/**************************************************************************
4011 + * Name       : BpGetEthernetMacInfo
4012 + *
4013 + * Description: This function returns all of the supported board id strings.
4014 + *
4015 + * Parameters : [OUT] pEnetInfos - Address of an array of ETHERNET_MAC_INFO
4016 + *                  buffers.
4017 + *              [IN] nNumEnetInfos - Number of ETHERNET_MAC_INFO elements that
4018 + *                  are pointed to by pEnetInfos.
4019 + *
4020 + * Returns    : BP_SUCCESS - Success, value is returned.
4021 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4022 + ***************************************************************************/
4023 +int BpGetEthernetMacInfo( PETHERNET_MAC_INFO pEnetInfos, int nNumEnetInfos );
4024 +
4025 +/**************************************************************************
4026 + * Name       : BpGetSdramSize
4027 + *
4028 + * Description: This function returns a constant that describees the board's
4029 + *              SDRAM type and size.
4030 + *
4031 + * Parameters : [OUT] pulSdramSize - Address of short word that the SDRAM size
4032 + *                  is returned in.
4033 + *
4034 + * Returns    : BP_SUCCESS - Success, value is returned.
4035 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4036 + ***************************************************************************/
4037 +int BpGetSdramSize( unsigned long *pulSdramSize );
4038 +
4039 +/**************************************************************************
4040 + * Name       : BpGetPsiSize
4041 + *
4042 + * Description: This function returns the persistent storage size in K bytes.
4043 + *
4044 + * Parameters : [OUT] pulPsiSize - Address of short word that the persistent
4045 + *                  storage size is returned in.
4046 + *
4047 + * Returns    : BP_SUCCESS - Success, value is returned.
4048 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4049 + ***************************************************************************/
4050 +int BpGetPsiSize( unsigned long *pulPsiSize );
4051 +
4052 +/**************************************************************************
4053 + * Name       : BpGetRj11InnerOuterPairGpios
4054 + *
4055 + * Description: This function returns the GPIO pin assignments for changing
4056 + *              between the RJ11 inner pair and RJ11 outer pair.
4057 + *
4058 + * Parameters : [OUT] pusInner - Address of short word that the RJ11 inner pair
4059 + *                  GPIO pin is returned in.
4060 + *              [OUT] pusOuter - Address of short word that the RJ11 outer pair
4061 + *                  GPIO pin is returned in.
4062 + *
4063 + * Returns    : BP_SUCCESS - Success, values are returned.
4064 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4065 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4066 + *                  for the board.
4067 + ***************************************************************************/
4068 +int BpGetRj11InnerOuterPairGpios( unsigned short *pusInner,
4069 +    unsigned short *pusOuter );
4070 +
4071 +/**************************************************************************
4072 + * Name       : BpGetPressAndHoldResetGpio
4073 + *
4074 + * Description: This function returns the GPIO pin assignment for the press
4075 + *              and hold reset button.
4076 + *
4077 + * Parameters : [OUT] pusValue - Address of short word that the press and hold
4078 + *                  reset button GPIO pin is returned in.
4079 + *
4080 + * Returns    : BP_SUCCESS - Success, value is returned.
4081 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4082 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4083 + *                  for the board.
4084 + ***************************************************************************/
4085 +int BpGetPressAndHoldResetGpio( unsigned short *pusValue );
4086 +
4087 +/**************************************************************************
4088 + * Name       : BpGetVoipResetGpio
4089 + *
4090 + * Description: This function returns the GPIO pin assignment for the VOIP
4091 + *              Reset operation.
4092 + *
4093 + * Parameters : [OUT] pusValue - Address of short word that the VOIP reset
4094 + *                  GPIO pin is returned in.
4095 + *              [IN] dspNum - Address of the DSP to query.
4096 + *
4097 + * Returns    : BP_SUCCESS - Success, value is returned.
4098 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4099 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4100 + *                  for the board.
4101 + ***************************************************************************/
4102 +int BpGetVoipResetGpio( unsigned char dspNum, unsigned short *pusValue );
4103 +
4104 +/**************************************************************************
4105 + * Name       : BpGetVoipIntrGpio
4106 + *
4107 + * Description: This function returns the GPIO pin assignment for VoIP interrupt.
4108 + *
4109 + * Parameters : [OUT] pusValue - Address of short word that the VOIP interrupt
4110 + *                  GPIO pin is returned in.
4111 + *              [IN] dspNum - Address of the DSP to query.
4112 + *
4113 + * Returns    : BP_SUCCESS - Success, value is returned.
4114 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4115 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4116 + *                  for the board.
4117 + ***************************************************************************/
4118 +int BpGetVoipIntrGpio( unsigned char dspNum, unsigned short *pusValue );
4119 +
4120 +/**************************************************************************
4121 + * Name       : BpGetPcmciaResetGpio
4122 + *
4123 + * Description: This function returns the GPIO pin assignment for the PCMCIA
4124 + *              Reset operation.
4125 + *
4126 + * Parameters : [OUT] pusValue - Address of short word that the PCMCIA reset
4127 + *                  GPIO pin is returned in.
4128 + *
4129 + * Returns    : BP_SUCCESS - Success, value is returned.
4130 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4131 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4132 + *                  for the board.
4133 + ***************************************************************************/
4134 +int BpGetPcmciaResetGpio( unsigned short *pusValue );
4135 +
4136 +/**************************************************************************
4137 + * Name       : BpGetUartRtsCtsGpios
4138 + *
4139 + * Description: This function returns the GPIO pin assignments for RTS and CTS
4140 + *              UART signals.
4141 + *
4142 + * Parameters : [OUT] pusRts - Address of short word that the UART RTS GPIO
4143 + *                  pin is returned in.
4144 + *              [OUT] pusCts - Address of short word that the UART CTS GPIO
4145 + *                  pin is returned in.
4146 + *
4147 + * Returns    : BP_SUCCESS - Success, values are returned.
4148 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4149 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4150 + *                  for the board.
4151 + ***************************************************************************/
4152 +int BpGetRtsCtsUartGpios( unsigned short *pusRts, unsigned short *pusCts );
4153 +
4154 +/**************************************************************************
4155 + * Name       : BpGetAdslLedGpio
4156 + *
4157 + * Description: This function returns the GPIO pin assignment for the ADSL
4158 + *              LED.
4159 + *
4160 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
4161 + *                  GPIO pin is returned in.
4162 + *
4163 + * Returns    : BP_SUCCESS - Success, value is returned.
4164 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4165 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4166 + *                  for the board.
4167 + ***************************************************************************/
4168 +int BpGetAdslLedGpio( unsigned short *pusValue );
4169 +
4170 +/**************************************************************************
4171 + * Name       : BpGetAdslFailLedGpio
4172 + *
4173 + * Description: This function returns the GPIO pin assignment for the ADSL
4174 + *              LED that is used when there is a DSL connection failure.
4175 + *
4176 + * Parameters : [OUT] pusValue - Address of short word that the ADSL LED
4177 + *                  GPIO pin is returned in.
4178 + *
4179 + * Returns    : BP_SUCCESS - Success, value is returned.
4180 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4181 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4182 + *                  for the board.
4183 + ***************************************************************************/
4184 +int BpGetAdslFailLedGpio( unsigned short *pusValue );
4185 +
4186 +/**************************************************************************
4187 + * Name       : BpGetWirelessLedGpio
4188 + *
4189 + * Description: This function returns the GPIO pin assignment for the Wireless
4190 + *              LED.
4191 + *
4192 + * Parameters : [OUT] pusValue - Address of short word that the Wireless LED
4193 + *                  GPIO pin is returned in.
4194 + *
4195 + * Returns    : BP_SUCCESS - Success, value is returned.
4196 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4197 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4198 + *                  for the board.
4199 + ***************************************************************************/
4200 +int BpGetWirelessLedGpio( unsigned short *pusValue );
4201 +
4202 +/**************************************************************************
4203 + * Name       : BpGetWirelessAntInUse
4204 + *
4205 + * Description: This function returns the antennas in use for wireless
4206 + *
4207 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Antenna
4208 + *                  is in use.
4209 + *
4210 + * Returns    : BP_SUCCESS - Success, value is returned.
4211 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4212 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4213 + *                  for the board.
4214 + ***************************************************************************/
4215 +int BpGetWirelessAntInUse( unsigned short *pusValue );
4216 +
4217 +/**************************************************************************
4218 + * Name       : BpGetWirelessSesBtnGpio
4219 + *
4220 + * Description: This function returns the GPIO pin assignment for the Wireless
4221 + *              Ses Button.
4222 + *
4223 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
4224 + *                  Button GPIO pin is returned in.
4225 + *
4226 + * Returns    : BP_SUCCESS - Success, value is returned.
4227 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4228 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4229 + *                  for the board.
4230 + ***************************************************************************/
4231 +int BpGetWirelessSesBtnGpio( unsigned short *pusValue );
4232 +
4233 +/**************************************************************************
4234 + * Name       : BpGetWirelessSesExtIntr
4235 + *
4236 + * Description: This function returns the external interrupt number for the
4237 + *              Wireless Ses Button.
4238 + *
4239 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
4240 + *                  external interrup is returned in.
4241 + *
4242 + * Returns    : BP_SUCCESS - Success, value is returned.
4243 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4244 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4245 + *                  for the board.
4246 + ***************************************************************************/
4247 +int BpGetWirelessSesExtIntr( unsigned short *pusValue );
4248 +
4249 +/**************************************************************************
4250 + * Name       : BpGetWirelessSesLedGpio
4251 + *
4252 + * Description: This function returns the GPIO pin assignment for the Wireless
4253 + *              Ses Led.
4254 + *
4255 + * Parameters : [OUT] pusValue - Address of short word that the Wireless Ses
4256 + *                  Led GPIO pin is returned in.
4257 + *
4258 + * Returns    : BP_SUCCESS - Success, value is returned.
4259 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4260 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4261 + *                  for the board.
4262 + ***************************************************************************/
4263 +int BpGetWirelessSesLedGpio( unsigned short *pusValue );
4264 +
4265 +/**************************************************************************
4266 + * Name       : BpGetUsbLedGpio
4267 + *
4268 + * Description: This function returns the GPIO pin assignment for the USB
4269 + *              LED.
4270 + *
4271 + * Parameters : [OUT] pusValue - Address of short word that the USB LED
4272 + *                  GPIO pin is returned in.
4273 + *
4274 + * Returns    : BP_SUCCESS - Success, value is returned.
4275 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4276 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4277 + *                  for the board.
4278 + ***************************************************************************/
4279 +int BpGetUsbLedGpio( unsigned short *pusValue );
4280 +
4281 +/**************************************************************************
4282 + * Name       : BpGetHpnaLedGpio
4283 + *
4284 + * Description: This function returns the GPIO pin assignment for the HPNA
4285 + *              LED.
4286 + *
4287 + * Parameters : [OUT] pusValue - Address of short word that the HPNA LED
4288 + *                  GPIO pin is returned in.
4289 + *
4290 + * Returns    : BP_SUCCESS - Success, value is returned.
4291 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4292 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4293 + *                  for the board.
4294 + ***************************************************************************/
4295 +int BpGetHpnaLedGpio( unsigned short *pusValue );
4296 +
4297 +/**************************************************************************
4298 + * Name       : BpGetWanDataLedGpio
4299 + *
4300 + * Description: This function returns the GPIO pin assignment for the WAN Data
4301 + *              LED.
4302 + *
4303 + * Parameters : [OUT] pusValue - Address of short word that the WAN Data LED
4304 + *                  GPIO pin is returned in.
4305 + *
4306 + * Returns    : BP_SUCCESS - Success, value is returned.
4307 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4308 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4309 + *                  for the board.
4310 + ***************************************************************************/
4311 +int BpGetWanDataLedGpio( unsigned short *pusValue );
4312 +
4313 +/**************************************************************************
4314 + * Name       : BpGetPppLedGpio
4315 + *
4316 + * Description: This function returns the GPIO pin assignment for the PPP
4317 + *              LED.
4318 + *
4319 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
4320 + *                  GPIO pin is returned in.
4321 + *
4322 + * Returns    : BP_SUCCESS - Success, value is returned.
4323 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4324 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4325 + *                  for the board.
4326 + ***************************************************************************/
4327 +int BpGetPppLedGpio( unsigned short *pusValue );
4328 +
4329 +/**************************************************************************
4330 + * Name       : BpGetPppFailLedGpio
4331 + *
4332 + * Description: This function returns the GPIO pin assignment for the PPP
4333 + *              LED that is used when there is a PPP connection failure.
4334 + *
4335 + * Parameters : [OUT] pusValue - Address of short word that the PPP LED
4336 + *                  GPIO pin is returned in.
4337 + *
4338 + * Returns    : BP_SUCCESS - Success, value is returned.
4339 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4340 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4341 + *                  for the board.
4342 + ***************************************************************************/
4343 +int BpGetPppFailLedGpio( unsigned short *pusValue );
4344 +
4345 +/**************************************************************************
4346 + * Name       : BpGetVoipLedGpio
4347 + *
4348 + * Description: This function returns the GPIO pin assignment for the VOIP
4349 + *              LED.
4350 + *
4351 + * Parameters : [OUT] pusValue - Address of short word that the VOIP LED
4352 + *                  GPIO pin is returned in.
4353 + *
4354 + * Returns    : BP_SUCCESS - Success, value is returned.
4355 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4356 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4357 + *                  for the board.
4358 + ***************************************************************************/
4359 +int BpGetVoipLedGpio( unsigned short *pusValue );
4360 +
4361 +/**************************************************************************
4362 + * Name       : BpGetBootloaderPowerOnLedGpio
4363 + *
4364 + * Description: This function returns the GPIO pin assignment for the power
4365 + *              on LED that is set by the bootloader.
4366 + *
4367 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
4368 + *                  GPIO pin is returned in.
4369 + *
4370 + * Returns    : BP_SUCCESS - Success, value is returned.
4371 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4372 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4373 + *                  for the board.
4374 + ***************************************************************************/
4375 +int BpGetBootloaderPowerOnLedGpio( unsigned short *pusValue );
4376 +
4377 +/**************************************************************************
4378 + * Name       : BpGetBootloaderAlarmLedGpio
4379 + *
4380 + * Description: This function returns the GPIO pin assignment for the alarm
4381 + *              LED that is set by the bootloader.
4382 + *
4383 + * Parameters : [OUT] pusValue - Address of short word that the alarm LED
4384 + *                  GPIO pin is returned in.
4385 + *
4386 + * Returns    : BP_SUCCESS - Success, value is returned.
4387 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4388 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4389 + *                  for the board.
4390 + ***************************************************************************/
4391 +int BpGetBootloaderAlarmLedGpio( unsigned short *pusValue );
4392 +
4393 +/**************************************************************************
4394 + * Name       : BpGetBootloaderResetCfgLedGpio
4395 + *
4396 + * Description: This function returns the GPIO pin assignment for the reset
4397 + *              configuration LED that is set by the bootloader.
4398 + *
4399 + * Parameters : [OUT] pusValue - Address of short word that the reset
4400 + *                  configuration LED GPIO pin is returned in.
4401 + *
4402 + * Returns    : BP_SUCCESS - Success, value is returned.
4403 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4404 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4405 + *                  for the board.
4406 + ***************************************************************************/
4407 +int BpGetBootloaderResetCfgLedGpio( unsigned short *pusValue );
4408 +
4409 +/**************************************************************************
4410 + * Name       : BpGetBootloaderStopLedGpio
4411 + *
4412 + * Description: This function returns the GPIO pin assignment for the break
4413 + *              into bootloader LED that is set by the bootloader.
4414 + *
4415 + * Parameters : [OUT] pusValue - Address of short word that the break into
4416 + *                  bootloader LED GPIO pin is returned in.
4417 + *
4418 + * Returns    : BP_SUCCESS - Success, value is returned.
4419 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4420 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4421 + *                  for the board.
4422 + ***************************************************************************/
4423 +int BpGetBootloaderStopLedGpio( unsigned short *pusValue );
4424 +
4425 +/**************************************************************************
4426 + * Name       : BpGetWirelessExtIntr
4427 + *
4428 + * Description: This function returns the Wireless external interrupt number.
4429 + *
4430 + * Parameters : [OUT] pulValue - Address of short word that the wireless
4431 + *                  external interrupt number is returned in.
4432 + *
4433 + * Returns    : BP_SUCCESS - Success, value is returned.
4434 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4435 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4436 + *                  for the board.
4437 + ***************************************************************************/
4438 +int BpGetWirelessExtIntr( unsigned long *pulValue );
4439 +
4440 +/**************************************************************************
4441 + * Name       : BpGetAdslDyingGaspExtIntr
4442 + *
4443 + * Description: This function returns the ADSL Dying Gasp external interrupt
4444 + *              number.
4445 + *
4446 + * Parameters : [OUT] pulValue - Address of short word that the ADSL Dying Gasp
4447 + *                  external interrupt number is returned in.
4448 + *
4449 + * Returns    : BP_SUCCESS - Success, value is returned.
4450 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4451 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4452 + *                  for the board.
4453 + ***************************************************************************/
4454 +int BpGetAdslDyingGaspExtIntr( unsigned long *pulValue );
4455 +
4456 +/**************************************************************************
4457 + * Name       : BpGetVoipExtIntr
4458 + *
4459 + * Description: This function returns the VOIP external interrupt number.
4460 + *
4461 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
4462 + *                  external interrupt number is returned in.
4463 + *              [IN] dspNum - Address of the DSP to query.
4464 + *
4465 + * Returns    : BP_SUCCESS - Success, value is returned.
4466 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4467 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4468 + *                  for the board.
4469 + ***************************************************************************/
4470 +int BpGetVoipExtIntr( unsigned char dspNum, unsigned long *pulValue );
4471 +
4472 +/**************************************************************************
4473 + * Name       : BpGetHpnaExtIntr
4474 + *
4475 + * Description: This function returns the HPNA external interrupt number.
4476 + *
4477 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
4478 + *                  external interrupt number is returned in.
4479 + *
4480 + * Returns    : BP_SUCCESS - Success, value is returned.
4481 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4482 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4483 + *                  for the board.
4484 + ***************************************************************************/
4485 +int BpGetHpnaExtIntr( unsigned long *pulValue );
4486 +
4487 +/**************************************************************************
4488 + * Name       : BpGetHpnaChipSelect
4489 + *
4490 + * Description: This function returns the HPNA chip select number.
4491 + *
4492 + * Parameters : [OUT] pulValue - Address of short word that the HPNA
4493 + *                  chip select number is returned in.
4494 + *
4495 + * Returns    : BP_SUCCESS - Success, value is returned.
4496 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4497 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4498 + *                  for the board.
4499 + ***************************************************************************/
4500 +int BpGetHpnaChipSelect( unsigned long *pulValue );
4501 +
4502 +/**************************************************************************
4503 + * Name       : BpGetVoipChipSelect
4504 + *
4505 + * Description: This function returns the VOIP chip select number.
4506 + *
4507 + * Parameters : [OUT] pulValue - Address of short word that the VOIP
4508 + *                  chip select number is returned in.
4509 + *              [IN] dspNum - Address of the DSP to query.
4510 + *
4511 + * Returns    : BP_SUCCESS - Success, value is returned.
4512 + *              BP_BOARD_ID_NOT_SET - Error, BpSetBoardId has not been called.
4513 + *              BP_VALUE_NOT_DEFINED - At least one return value is not defined
4514 + *                  for the board.
4515 + ***************************************************************************/
4516 +int BpGetVoipChipSelect( unsigned char dspNum, unsigned long *pulValue );
4517 +
4518 +#endif /* __ASSEMBLER__ */
4519 +
4520 +#endif /* _BOARDPARMS_H */
4521 +
4522 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/6338_intr.h linux-2.6.19.new/arch/mips/bcm963xx/include/6338_intr.h
4523 --- linux-2.6.19/arch/mips/bcm963xx/include/6338_intr.h 1970-01-01 01:00:00.000000000 +0100
4524 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/6338_intr.h     2006-12-16 18:46:31.000000000 +0100
4525 @@ -0,0 +1,64 @@
4526 +/*
4527 +<:copyright-gpl
4528 + Copyright 2003 Broadcom Corp. All Rights Reserved.
4529 +
4530 + This program is free software; you can distribute it and/or modify it
4531 + under the terms of the GNU General Public License (Version 2) as
4532 + published by the Free Software Foundation.
4533 +
4534 + This program is distributed in the hope it will be useful, but WITHOUT
4535 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4536 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
4537 + for more details.
4538 +
4539 + You should have received a copy of the GNU General Public License along
4540 + with this program; if not, write to the Free Software Foundation, Inc.,
4541 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4542 +:>
4543 +*/
4544 +
4545 +#ifndef __6338_INTR_H
4546 +#define __6338_INTR_H
4547 +
4548 +/*=====================================================================*/
4549 +/* BCM6338 External Interrupt Level Assignments                       */
4550 +/*=====================================================================*/
4551 +#define INTERRUPT_ID_EXTERNAL_0         3
4552 +#define INTERRUPT_ID_EXTERNAL_1         4
4553 +#define INTERRUPT_ID_EXTERNAL_2         5
4554 +#define INTERRUPT_ID_EXTERNAL_3         6
4555 +
4556 +/*=====================================================================*/
4557 +/* BCM6338 Timer Interrupt Level Assignments                          */
4558 +/*=====================================================================*/
4559 +#define MIPS_TIMER_INT                  7
4560 +
4561 +/*=====================================================================*/
4562 +/* Peripheral ISR Table Offset                                              */
4563 +/*=====================================================================*/
4564 +#define INTERNAL_ISR_TABLE_OFFSET       8
4565 +
4566 +/*=====================================================================*/
4567 +/* Logical Peripheral Interrupt IDs                                    */
4568 +/*=====================================================================*/
4569 +
4570 +#define INTERRUPT_ID_TIMER               (INTERNAL_ISR_TABLE_OFFSET + 0)
4571 +#define INTERRUPT_ID_SPI                 (INTERNAL_ISR_TABLE_OFFSET + 1)
4572 +#define INTERRUPT_ID_UART                (INTERNAL_ISR_TABLE_OFFSET + 2)
4573 +#define INTERRUPT_ID_DG                  (INTERNAL_ISR_TABLE_OFFSET + 4)
4574 +#define INTERRUPT_ID_ADSL                (INTERNAL_ISR_TABLE_OFFSET + 5)
4575 +#define INTERRUPT_ID_ATM                 (INTERNAL_ISR_TABLE_OFFSET + 6)
4576 +#define INTERRUPT_ID_USBS                (INTERNAL_ISR_TABLE_OFFSET + 7)
4577 +#define INTERRUPT_ID_EMAC1               (INTERNAL_ISR_TABLE_OFFSET + 8)
4578 +#define INTERRUPT_ID_EPHY                (INTERNAL_ISR_TABLE_OFFSET + 9)
4579 +#define INTERRUPT_ID_SDRAM               (INTERNAL_ISR_TABLE_OFFSET + 10)
4580 +#define INTERRUPT_ID_USB_CNTL_RX_DMA     (INTERNAL_ISR_TABLE_OFFSET + 11)
4581 +#define INTERRUPT_ID_USB_CNTL_TX_DMA     (INTERNAL_ISR_TABLE_OFFSET + 12)
4582 +#define INTERRUPT_ID_USB_BULK_RX_DMA     (INTERNAL_ISR_TABLE_OFFSET + 13)
4583 +#define INTERRUPT_ID_USB_BULK_TX_DMA     (INTERNAL_ISR_TABLE_OFFSET + 14)
4584 +#define INTERRUPT_ID_EMAC1_RX_DMA        (INTERNAL_ISR_TABLE_OFFSET + 15)
4585 +#define INTERRUPT_ID_EMAC1_TX_DMA        (INTERNAL_ISR_TABLE_OFFSET + 16)
4586 +#define INTERRUPT_ID_SDIO                (INTERNAL_ISR_TABLE_OFFSET + 17)
4587 +
4588 +#endif  /* __BCM6338_H */
4589 +
4590 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/6338_map_part.h linux-2.6.19.new/arch/mips/bcm963xx/include/6338_map_part.h
4591 --- linux-2.6.19/arch/mips/bcm963xx/include/6338_map_part.h     1970-01-01 01:00:00.000000000 +0100
4592 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/6338_map_part.h 2006-12-16 18:46:31.000000000 +0100
4593 @@ -0,0 +1,334 @@
4594 +/*
4595 +<:copyright-gpl
4596 + Copyright 2004 Broadcom Corp. All Rights Reserved.
4597 +
4598 + This program is free software; you can distribute it and/or modify it
4599 + under the terms of the GNU General Public License (Version 2) as
4600 + published by the Free Software Foundation.
4601 +
4602 + This program is distributed in the hope it will be useful, but WITHOUT
4603 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4604 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
4605 + for more details.
4606 +
4607 + You should have received a copy of the GNU General Public License along
4608 + with this program; if not, write to the Free Software Foundation, Inc.,
4609 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4610 +:>
4611 +*/
4612 +
4613 +#ifndef __BCM6338_MAP_H
4614 +#define __BCM6338_MAP_H
4615 +
4616 +#include "bcmtypes.h"
4617 +
4618 +#define PERF_BASE           0xfffe0000
4619 +#define TIMR_BASE           0xfffe0200
4620 +#define UART_BASE           0xfffe0300
4621 +#define GPIO_BASE           0xfffe0400
4622 +#define SPI_BASE            0xfffe0c00
4623 +
4624 +typedef struct PerfControl {
4625 +  uint32        RevID;
4626 +  uint16        testControl;
4627 +  uint16        blkEnables;
4628 +#define EMAC_CLK_EN     0x0010
4629 +#define USBS_CLK_EN     0x0010
4630 +#define SAR_CLK_EN      0x0020
4631 +
4632 +#define SPI_CLK_EN      0x0200
4633 +
4634 +  uint32        pll_control;
4635 +#define SOFT_RESET 0x00000001
4636 +
4637 +  uint32        IrqMask;
4638 +  uint32        IrqStatus;
4639 +
4640 +  uint32        ExtIrqCfg;
4641 +#define EI_SENSE_SHFT   0
4642 +#define EI_STATUS_SHFT  5
4643 +#define EI_CLEAR_SHFT   10
4644 +#define EI_MASK_SHFT    15
4645 +#define EI_INSENS_SHFT  20
4646 +#define EI_LEVEL_SHFT   25
4647 +
4648 +  uint32        unused[4];      /* (18) */
4649 +  uint32        BlockSoftReset; /* (28) */
4650 +#define BSR_SPI             0x00000001
4651 +#define BSR_EMAC            0x00000004
4652 +#define BSR_USBH            0x00000008
4653 +#define BSR_USBS            0x00000010
4654 +#define BSR_ADSL            0x00000020
4655 +#define BSR_DMAMEM          0x00000040
4656 +#define BSR_SAR             0x00000080
4657 +#define BSR_ACLC            0x00000100
4658 +#define BSR_ADSL_MIPS_PLL   0x00000400
4659 +#define BSR_ALL_BLOCKS      \
4660 +    (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
4661 +     BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
4662 +} PerfControl;
4663 +
4664 +#define PERF ((volatile PerfControl * const) PERF_BASE)
4665 +
4666 +
4667 +typedef struct Timer {
4668 +  uint16        unused0;
4669 +  byte          TimerMask;
4670 +#define TIMER0EN        0x01
4671 +#define TIMER1EN        0x02
4672 +#define TIMER2EN        0x04
4673 +  byte          TimerInts;
4674 +#define TIMER0          0x01
4675 +#define TIMER1          0x02
4676 +#define TIMER2          0x04
4677 +#define WATCHDOG        0x08
4678 +  uint32        TimerCtl0;
4679 +  uint32        TimerCtl1;
4680 +  uint32        TimerCtl2;
4681 +#define TIMERENABLE     0x80000000
4682 +#define RSTCNTCLR       0x40000000
4683 +  uint32        TimerCnt0;
4684 +  uint32        TimerCnt1;
4685 +  uint32        TimerCnt2;
4686 +  uint32        WatchDogDefCount;
4687 +
4688 +  /* Write 0xff00 0x00ff to Start timer
4689 +   * Write 0xee00 0x00ee to Stop and re-load default count
4690 +   * Read from this register returns current watch dog count
4691 +   */
4692 +  uint32        WatchDogCtl;
4693 +
4694 +  /* Number of 40-MHz ticks for WD Reset pulse to last */
4695 +  uint32        WDResetCount;
4696 +} Timer;
4697 +
4698 +#define TIMER ((volatile Timer * const) TIMR_BASE)
4699 +typedef struct UartChannel {
4700 +  byte          unused0;
4701 +  byte          control;
4702 +#define BRGEN           0x80    /* Control register bit defs */
4703 +#define TXEN            0x40
4704 +#define RXEN            0x20
4705 +#define LOOPBK          0x10
4706 +#define TXPARITYEN      0x08
4707 +#define TXPARITYEVEN    0x04
4708 +#define RXPARITYEN      0x02
4709 +#define RXPARITYEVEN    0x01
4710 +
4711 +  byte          config;
4712 +#define XMITBREAK       0x40
4713 +#define BITS5SYM        0x00
4714 +#define BITS6SYM        0x10
4715 +#define BITS7SYM        0x20
4716 +#define BITS8SYM        0x30
4717 +#define ONESTOP         0x07
4718 +#define TWOSTOP         0x0f
4719 +  /* 4-LSBS represent STOP bits/char
4720 +   * in 1/8 bit-time intervals.  Zero
4721 +   * represents 1/8 stop bit interval.
4722 +   * Fifteen represents 2 stop bits.
4723 +   */
4724 +  byte          fifoctl;
4725 +#define RSTTXFIFOS      0x80
4726 +#define RSTRXFIFOS      0x40
4727 +  /* 5-bit TimeoutCnt is in low bits of this register.
4728 +   *  This count represents the number of characters
4729 +   *  idle times before setting receive Irq when below threshold
4730 +   */
4731 +  uint32        baudword;
4732 +  /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
4733 +   */
4734 +
4735 +  byte          txf_levl;       /* Read-only fifo depth */
4736 +  byte          rxf_levl;       /* Read-only fifo depth */
4737 +  byte          fifocfg;        /* Upper 4-bits are TxThresh, Lower are
4738 +                                 *      RxThreshold.  Irq can be asserted
4739 +                                 *      when rx fifo> thresh, txfifo<thresh
4740 +                                 */
4741 +  byte          prog_out;       /* Set value of DTR (Bit0), RTS (Bit1)
4742 +                                 *  if these bits are also enabled to GPIO_o
4743 +                                 */
4744 +#define        DTREN   0x01
4745 +#define        RTSEN   0x02
4746 +
4747 +  byte          unused1;
4748 +  byte          DeltaIPEdgeNoSense;     /* Low 4-bits, set corr bit to 1 to
4749 +                                         * detect irq on rising AND falling
4750 +                                         * edges for corresponding GPIO_i
4751 +                                         * if enabled (edge insensitive)
4752 +                                         */
4753 +  byte          DeltaIPConfig_Mask;     /* Upper 4 bits: 1 for posedge sense
4754 +                                         *      0 for negedge sense if
4755 +                                         *      not configured for edge
4756 +                                         *      insensitive (see above)
4757 +                                         * Lower 4 bits: Mask to enable change
4758 +                                         *  detection IRQ for corresponding
4759 +                                         *  GPIO_i
4760 +                                         */
4761 +  byte          DeltaIP_SyncIP;         /* Upper 4 bits show which bits
4762 +                                         *  have changed (may set IRQ).
4763 +                                         *  read automatically clears bit
4764 +                                         * Lower 4 bits are actual status
4765 +                                         */
4766 +
4767 +  uint16        intMask;                               /* Same Bit defs for Mask and status */
4768 +  uint16        intStatus;
4769 +#define DELTAIP         0x0001
4770 +#define TXUNDERR        0x0002
4771 +#define TXOVFERR        0x0004
4772 +#define TXFIFOTHOLD     0x0008
4773 +#define TXREADLATCH     0x0010
4774 +#define TXFIFOEMT       0x0020
4775 +#define RXUNDERR        0x0040
4776 +#define RXOVFERR        0x0080
4777 +#define RXTIMEOUT       0x0100
4778 +#define RXFIFOFULL      0x0200
4779 +#define RXFIFOTHOLD     0x0400
4780 +#define RXFIFONE        0x0800
4781 +#define RXFRAMERR       0x1000
4782 +#define RXPARERR        0x2000
4783 +#define RXBRK           0x4000
4784 +
4785 +  uint16        unused2;
4786 +  uint16        Data;                   /* Write to TX, Read from RX */
4787 +                                        /* bits 11:8 are BRK,PAR,FRM errors */
4788 +
4789 +  uint32               unused3;
4790 +  uint32               unused4;
4791 +} Uart;
4792 +
4793 +#define UART ((volatile Uart * const) UART_BASE)
4794 +
4795 +typedef struct GpioControl {
4796 +  uint32        unused0;
4797 +  uint32        GPIODir;      /* bits 7:0 */
4798 +  uint32        unused1;
4799 +  uint32        GPIOio;       /* bits 7:0 */
4800 +  uint32        LEDCtrl;
4801 +#define         LED3_STROBE             0x08000000
4802 +#define         LED2_STROBE             0x04000000
4803 +#define         LED1_STROBE             0x02000000
4804 +#define         LED0_STROBE             0x01000000
4805 +#define         LED_TEST                0x00010000
4806 +#define         LED3_DISABLE_LINK_ACT   0x00008000
4807 +#define         LED2_DISABLE_LINK_ACT   0x00004000
4808 +#define         LED1_DISABLE_LINK_ACT   0x00002000
4809 +#define         LED0_DISABLE_LINK_ACT   0x00001000
4810 +#define         LED_INTERVAL_SET_MASK   0x00000f00
4811 +#define         LED_INTERVAL_SET_320MS  0x00000500
4812 +#define         LED_INTERVAL_SET_160MS  0x00000400
4813 +#define         LED_INTERVAL_SET_80MS   0x00000300
4814 +#define         LED_INTERVAL_SET_40MS   0x00000200
4815 +#define         LED_INTERVAL_SET_20MS   0x00000100
4816 +#define         LED3_ON                 0x00000080
4817 +#define         LED2_ON                 0x00000040
4818 +#define         LED1_ON                 0x00000020
4819 +#define         LED0_ON                 0x00000010
4820 +#define         LED3_ENABLE             0x00000008
4821 +#define         LED2_ENABLE             0x00000004
4822 +#define         LED1_ENABLE             0x00000002
4823 +#define         LED0_ENABLE             0x00000001
4824 +  uint32        SpiSlaveCfg;
4825 +#define         SPI_SLAVE_RESET         0x00010000
4826 +#define         SPI_RESTRICT            0x00000400
4827 +#define         SPI_DELAY_DISABLE       0x00000200
4828 +#define         SPI_PROBE_MUX_SEL_MASK  0x000001e0
4829 +#define         SPI_SER_ADDR_CFG_MASK   0x0000000c
4830 +#define         SPI_MODE                0x00000001
4831 +  uint32        vRegConfig;
4832 +} GpioControl;
4833 +
4834 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
4835 +
4836 +/* Number to mask conversion macro used for GPIODir and GPIOio */
4837 +#define GPIO_NUM_MAX_BITS_MASK          0x0f
4838 +#define GPIO_NUM_TO_MASK(X)             (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
4839 +
4840 +/*
4841 +** Spi Controller
4842 +*/
4843 +
4844 +typedef struct SpiControl {
4845 +  uint16        spiCmd;                 /* (0x0): SPI command */
4846 +#define SPI_CMD_START_IMMEDIATE         3
4847 +
4848 +#define SPI_CMD_COMMAND_SHIFT           0
4849 +#define SPI_CMD_DEVICE_ID_SHIFT         4
4850 +#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT  8
4851 +
4852 +  byte          spiIntStatus;           /* (0x2): SPI interrupt status */
4853 +  byte          spiMaskIntStatus;       /* (0x3): SPI masked interrupt status */
4854 +
4855 +  byte          spiIntMask;             /* (0x4): SPI interrupt mask */
4856 +#define SPI_INTR_CMD_DONE               0x01
4857 +#define SPI_INTR_CLEAR_ALL              0x1f
4858 +
4859 +  byte          spiStatus;              /* (0x5): SPI status */
4860 +
4861 +  byte          spiClkCfg;              /* (0x6): SPI clock configuration */
4862 +
4863 +  byte          spiFillByte;            /* (0x7): SPI fill byte */
4864 +
4865 +  byte          unused0;
4866 +  byte          spiMsgTail;             /* (0x9): msgtail */
4867 +  byte          unused1;
4868 +  byte          spiRxTail;              /* (0xB): rxtail */
4869 +
4870 +  uint32        unused2[13];            /* (0x0c - 0x3c) reserved */
4871 +
4872 +  byte          spiMsgCtl;              /* (0x40) control byte */
4873 +#define HALF_DUPLEX_W                   1
4874 +#define HALF_DUPLEX_R                   2
4875 +#define SPI_MSG_TYPE_SHIFT              6
4876 +#define SPI_BYTE_CNT_SHIFT              0
4877 +  byte          spiMsgData[63];         /* (0x41 - 0x7f) msg data */
4878 +  byte          spiRxDataFifo[64];      /* (0x80 - 0xbf) rx data */
4879 +  byte          unused3[64];            /* (0xc0 - 0xff) reserved */
4880 +} SpiControl;
4881 +
4882 +#define SPI ((volatile SpiControl * const) SPI_BASE)
4883 +
4884 +/*
4885 +** External Bus Interface
4886 +*/
4887 +typedef struct EbiChipSelect {
4888 +  uint32        base;                   /* base address in upper 24 bits */
4889 +#define EBI_SIZE_8K         0
4890 +#define EBI_SIZE_16K        1
4891 +#define EBI_SIZE_32K        2
4892 +#define EBI_SIZE_64K        3
4893 +#define EBI_SIZE_128K       4
4894 +#define EBI_SIZE_256K       5
4895 +#define EBI_SIZE_512K       6
4896 +#define EBI_SIZE_1M         7
4897 +#define EBI_SIZE_2M         8
4898 +#define EBI_SIZE_4M         9
4899 +#define EBI_SIZE_8M         10
4900 +#define EBI_SIZE_16M        11
4901 +#define EBI_SIZE_32M        12
4902 +#define EBI_SIZE_64M        13
4903 +#define EBI_SIZE_128M       14
4904 +#define EBI_SIZE_256M       15
4905 +  uint32        config;
4906 +#define EBI_ENABLE          0x00000001      /* .. enable this range */
4907 +#define EBI_WAIT_STATES     0x0000000e      /* .. mask for wait states */
4908 +#define EBI_WTST_SHIFT      1               /* .. for shifting wait states */
4909 +#define EBI_WORD_WIDE       0x00000010      /* .. 16-bit peripheral, else 8 */
4910 +#define EBI_WREN            0x00000020      /* enable posted writes */
4911 +#define EBI_POLARITY        0x00000040      /* .. set to invert something,
4912 +                                        **    don't know what yet */
4913 +#define EBI_TS_TA_MODE      0x00000080      /* .. use TS/TA mode */
4914 +#define EBI_TS_SEL          0x00000100      /* .. drive tsize, not bs_b */
4915 +#define EBI_FIFO            0x00000200      /* .. use fifo */
4916 +#define EBI_RE              0x00000400      /* .. Reverse Endian */
4917 +} EbiChipSelect;
4918 +
4919 +typedef struct MpiRegisters {
4920 +  EbiChipSelect cs[1];                  /* size chip select configuration */
4921 +} MpiRegisters;
4922 +
4923 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
4924 +
4925 +
4926 +#endif
4927 +
4928 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/6345_intr.h linux-2.6.19.new/arch/mips/bcm963xx/include/6345_intr.h
4929 --- linux-2.6.19/arch/mips/bcm963xx/include/6345_intr.h 1970-01-01 01:00:00.000000000 +0100
4930 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/6345_intr.h     2006-12-16 18:46:31.000000000 +0100
4931 @@ -0,0 +1,72 @@
4932 +/*
4933 +<:copyright-gpl
4934 + Copyright 2002 Broadcom Corp. All Rights Reserved.
4935 +
4936 + This program is free software; you can distribute it and/or modify it
4937 + under the terms of the GNU General Public License (Version 2) as
4938 + published by the Free Software Foundation.
4939 +
4940 + This program is distributed in the hope it will be useful, but WITHOUT
4941 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
4942 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
4943 + for more details.
4944 +
4945 + You should have received a copy of the GNU General Public License along
4946 + with this program; if not, write to the Free Software Foundation, Inc.,
4947 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
4948 +:>
4949 +*/
4950 +
4951 +#ifndef __6345_INTR_H
4952 +#define __6345_INTR_H
4953 +
4954 +
4955 +/*=====================================================================*/
4956 +/* BCM6345 External Interrupt Level Assignments                       */
4957 +/*=====================================================================*/
4958 +#define INTERRUPT_ID_EXTERNAL_0         3
4959 +#define INTERRUPT_ID_EXTERNAL_1         4
4960 +#define INTERRUPT_ID_EXTERNAL_2         5
4961 +#define INTERRUPT_ID_EXTERNAL_3         6
4962 +
4963 +/*=====================================================================*/
4964 +/* BCM6345 Timer Interrupt Level Assignments                          */
4965 +/*=====================================================================*/
4966 +#define MIPS_TIMER_INT                  7
4967 +
4968 +/*=====================================================================*/
4969 +/* Peripheral ISR Table Offset                                              */
4970 +/*=====================================================================*/
4971 +#define INTERNAL_ISR_TABLE_OFFSET       8
4972 +#define DMA_ISR_TABLE_OFFSET            (INTERNAL_ISR_TABLE_OFFSET + 13)
4973 +
4974 +/*=====================================================================*/
4975 +/* Logical Peripheral Interrupt IDs                                    */
4976 +/*=====================================================================*/
4977 +
4978 +/* Internal peripheral interrupt IDs */
4979 +#define INTERRUPT_ID_TIMER              (INTERNAL_ISR_TABLE_OFFSET +  0)
4980 +#define INTERRUPT_ID_UART               (INTERNAL_ISR_TABLE_OFFSET +  2)
4981 +#define INTERRUPT_ID_ADSL               (INTERNAL_ISR_TABLE_OFFSET +  3)
4982 +#define INTERRUPT_ID_ATM                (INTERNAL_ISR_TABLE_OFFSET +  4)
4983 +#define INTERRUPT_ID_USB                (INTERNAL_ISR_TABLE_OFFSET +  5)
4984 +#define INTERRUPT_ID_EMAC               (INTERNAL_ISR_TABLE_OFFSET +  8)
4985 +#define INTERRUPT_ID_EPHY               (INTERNAL_ISR_TABLE_OFFSET +  12)
4986 +
4987 +/* DMA channel interrupt IDs */
4988 +#define INTERRUPT_ID_EMAC_RX_CHAN       (DMA_ISR_TABLE_OFFSET + EMAC_RX_CHAN)
4989 +#define INTERRUPT_ID_EMAC_TX_CHAN       (DMA_ISR_TABLE_OFFSET + EMAC_TX_CHAN)
4990 +#define INTERRUPT_ID_EBI_RX_CHAN        (DMA_ISR_TABLE_OFFSET + EBI_RX_CHAN)
4991 +#define INTERRUPT_ID_EBI_TX_CHAN        (DMA_ISR_TABLE_OFFSET + EBI_TX_CHAN)
4992 +#define INTERRUPT_ID_RESERVED_RX_CHAN   (DMA_ISR_TABLE_OFFSET + RESERVED_RX_CHAN)
4993 +#define INTERRUPT_ID_RESERVED_TX_CHAN   (DMA_ISR_TABLE_OFFSET + RESERVED_TX_CHAN)
4994 +#define INTERRUPT_ID_USB_BULK_RX_CHAN   (DMA_ISR_TABLE_OFFSET + USB_BULK_RX_CHAN)
4995 +#define INTERRUPT_ID_USB_BULK_TX_CHAN   (DMA_ISR_TABLE_OFFSET + USB_BULK_TX_CHAN)
4996 +#define INTERRUPT_ID_USB_CNTL_RX_CHAN   (DMA_ISR_TABLE_OFFSET + USB_CNTL_RX_CHAN)
4997 +#define INTERRUPT_ID_USB_CNTL_TX_CHAN   (DMA_ISR_TABLE_OFFSET + USB_CNTL_TX_CHAN)
4998 +#define INTERRUPT_ID_USB_ISO_RX_CHAN    (DMA_ISR_TABLE_OFFSET + USB_ISO_RX_CHAN)
4999 +#define INTERRUPT_ID_USB_ISO_TX_CHAN    (DMA_ISR_TABLE_OFFSET + USB_ISO_TX_CHAN)
5000 +
5001 +
5002 +#endif  /* __BCM6345_H */
5003 +
5004 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/6345_map_part.h linux-2.6.19.new/arch/mips/bcm963xx/include/6345_map_part.h
5005 --- linux-2.6.19/arch/mips/bcm963xx/include/6345_map_part.h     1970-01-01 01:00:00.000000000 +0100
5006 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/6345_map_part.h 2006-12-16 18:46:31.000000000 +0100
5007 @@ -0,0 +1,163 @@
5008 +/*
5009 +<:copyright-gpl
5010 + Copyright 2002 Broadcom Corp. All Rights Reserved.
5011 +
5012 + This program is free software; you can distribute it and/or modify it
5013 + under the terms of the GNU General Public License (Version 2) as
5014 + published by the Free Software Foundation.
5015 +
5016 + This program is distributed in the hope it will be useful, but WITHOUT
5017 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5018 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
5019 + for more details.
5020 +
5021 + You should have received a copy of the GNU General Public License along
5022 + with this program; if not, write to the Free Software Foundation, Inc.,
5023 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5024 +:>
5025 +*/
5026 +
5027 +#ifndef __BCM6345_MAP_H
5028 +#define __BCM6345_MAP_H
5029 +
5030 +
5031 +#include "bcmtypes.h"
5032 +#include "6345_intr.h"
5033 +
5034 +typedef struct IntControl {
5035 +  uint32        RevID;
5036 +  uint16        testControl;
5037 +  uint16        blkEnables;
5038 +#define USB_CLK_EN      0x0100
5039 +#define EMAC_CLK_EN     0x0080
5040 +#define UART_CLK_EN     0x0008
5041 +#define CPU_CLK_EN      0x0001
5042 +
5043 +  uint32        pll_control;
5044 +#define SOFT_RESET     0x00000001
5045 +
5046 +  uint32        IrqMask;
5047 +  uint32        IrqStatus;
5048 +
5049 +  uint32        ExtIrqCfg;
5050 +#define EI_SENSE_SHFT   0
5051 +#define EI_STATUS_SHFT  4
5052 +#define EI_CLEAR_SHFT   8
5053 +#define EI_MASK_SHFT    12
5054 +#define EI_INSENS_SHFT  16
5055 +#define EI_LEVEL_SHFT   20
5056 +} IntControl;
5057 +
5058 +#define INTC_BASE     0xfffe0000
5059 +#define PERF ((volatile IntControl * const) INTC_BASE)
5060 +
5061 +#define TIMR_BASE     0xfffe0200
5062 +typedef struct Timer {
5063 +  uint16        unused0;
5064 +  byte          TimerMask;
5065 +#define TIMER0EN        0x01
5066 +#define TIMER1EN        0x02
5067 +#define TIMER2EN        0x04
5068 +  byte          TimerInts;
5069 +#define TIMER0          0x01
5070 +#define TIMER1          0x02
5071 +#define TIMER2          0x04
5072 +#define WATCHDOG        0x08
5073 +  uint32        TimerCtl0;
5074 +  uint32        TimerCtl1;
5075 +  uint32        TimerCtl2;
5076 +#define TIMERENABLE     0x80000000
5077 +#define RSTCNTCLR       0x40000000
5078 +  uint32        TimerCnt0;
5079 +  uint32        TimerCnt1;
5080 +  uint32        TimerCnt2;
5081 +  uint32        WatchDogDefCount;
5082 +
5083 +  /* Write 0xff00 0x00ff to Start timer
5084 +   * Write 0xee00 0x00ee to Stop and re-load default count
5085 +   * Read from this register returns current watch dog count
5086 +   */
5087 +  uint32        WatchDogCtl;
5088 +
5089 +  /* Number of 40-MHz ticks for WD Reset pulse to last */
5090 +  uint32        WDResetCount;
5091 +} Timer;
5092 +
5093 +#define TIMER ((volatile Timer * const) TIMR_BASE)
5094 +
5095 +typedef struct UartChannel {
5096 +  byte          unused0;
5097 +  byte          control;
5098 +#define BRGEN           0x80    /* Control register bit defs */
5099 +#define TXEN            0x40
5100 +#define RXEN            0x20
5101 +#define TXPARITYEN      0x08
5102 +#define TXPARITYEVEN    0x04
5103 +#define RXPARITYEN      0x02
5104 +#define RXPARITYEVEN    0x01
5105 +  byte          config;
5106 +#define BITS5SYM        0x00
5107 +#define BITS6SYM        0x10
5108 +#define BITS7SYM        0x20
5109 +#define BITS8SYM        0x30
5110 +#define XMITBREAK       0x40
5111 +#define ONESTOP         0x07
5112 +#define TWOSTOP         0x0f
5113 +
5114 +  byte          fifoctl;
5115 +#define RSTTXFIFOS      0x80
5116 +#define RSTRXFIFOS      0x40
5117 +  uint32        baudword;
5118 +
5119 +  byte          txf_levl;
5120 +  byte          rxf_levl;
5121 +  byte          fifocfg;
5122 +  byte          prog_out;
5123 +
5124 +  byte          unused1;
5125 +  byte          DeltaIPEdgeNoSense;
5126 +  byte          DeltaIPConfig_Mask;
5127 +  byte          DeltaIP_SyncIP;
5128 +  uint16        intMask;
5129 +  uint16        intStatus;
5130 +#define TXUNDERR        0x0002
5131 +#define TXOVFERR        0x0004
5132 +#define TXFIFOEMT       0x0020
5133 +#define RXOVFERR        0x0080
5134 +#define RXFIFONE        0x0800
5135 +#define RXFRAMERR       0x1000
5136 +#define RXPARERR        0x2000
5137 +#define RXBRK           0x4000
5138 +
5139 +  uint16        unused2;
5140 +  uint16        Data;
5141 +  uint32               unused3;
5142 +  uint32               unused4;
5143 +} Uart;
5144 +
5145 +#define UART_BASE     0xfffe0300
5146 +#define UART ((volatile Uart * const) UART_BASE)
5147 +
5148 +typedef struct GpioControl {
5149 +  uint16        unused0;
5150 +  byte          unused1;
5151 +  byte          TBusSel;
5152 +
5153 +  uint16        unused2;
5154 +  uint16        GPIODir;
5155 +  byte          unused3;
5156 +  byte          Leds;
5157 +  uint16        GPIOio;
5158 +
5159 +  uint32        UartCtl;
5160 +} GpioControl;
5161 +
5162 +#define GPIO_BASE     0xfffe0400
5163 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
5164 +
5165 +#define GPIO_NUM_MAX_BITS_MASK          0x0f
5166 +#define GPIO_NUM_TO_MASK(X)             (1 << ((X) & GPIO_NUM_MAX_BITS_MASK))
5167 +
5168 +
5169 +#endif
5170 +
5171 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/6348_intr.h linux-2.6.19.new/arch/mips/bcm963xx/include/6348_intr.h
5172 --- linux-2.6.19/arch/mips/bcm963xx/include/6348_intr.h 1970-01-01 01:00:00.000000000 +0100
5173 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/6348_intr.h     2006-12-16 18:46:31.000000000 +0100
5174 @@ -0,0 +1,74 @@
5175 +/*
5176 +<:copyright-gpl
5177 + Copyright 2003 Broadcom Corp. All Rights Reserved.
5178 +
5179 + This program is free software; you can distribute it and/or modify it
5180 + under the terms of the GNU General Public License (Version 2) as
5181 + published by the Free Software Foundation.
5182 +
5183 + This program is distributed in the hope it will be useful, but WITHOUT
5184 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5185 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
5186 + for more details.
5187 +
5188 + You should have received a copy of the GNU General Public License along
5189 + with this program; if not, write to the Free Software Foundation, Inc.,
5190 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5191 +:>
5192 +*/
5193 +
5194 +#ifndef __6348_INTR_H
5195 +#define __6348_INTR_H
5196 +
5197 +
5198 +/*=====================================================================*/
5199 +/* BCM6348 External Interrupt Level Assignments                       */
5200 +/*=====================================================================*/
5201 +#define INTERRUPT_ID_EXTERNAL_0         3
5202 +#define INTERRUPT_ID_EXTERNAL_1         4
5203 +#define INTERRUPT_ID_EXTERNAL_2         5
5204 +#define INTERRUPT_ID_EXTERNAL_3         6
5205 +
5206 +/*=====================================================================*/
5207 +/* BCM6348 Timer Interrupt Level Assignments                          */
5208 +/*=====================================================================*/
5209 +#define MIPS_TIMER_INT                  7
5210 +
5211 +/*=====================================================================*/
5212 +/* Peripheral ISR Table Offset                                              */
5213 +/*=====================================================================*/
5214 +#define INTERNAL_ISR_TABLE_OFFSET       8
5215 +
5216 +/*=====================================================================*/
5217 +/* Logical Peripheral Interrupt IDs                                    */
5218 +/*=====================================================================*/
5219 +
5220 +#define INTERRUPT_ID_TIMER               (INTERNAL_ISR_TABLE_OFFSET + 0)
5221 +#define INTERRUPT_ID_SPI                 (INTERNAL_ISR_TABLE_OFFSET + 1)
5222 +#define INTERRUPT_ID_UART                (INTERNAL_ISR_TABLE_OFFSET + 2)
5223 +#define INTERRUPT_ID_ADSL                (INTERNAL_ISR_TABLE_OFFSET + 4)
5224 +#define INTERRUPT_ID_ATM                 (INTERNAL_ISR_TABLE_OFFSET + 5)
5225 +#define INTERRUPT_ID_USBS                (INTERNAL_ISR_TABLE_OFFSET + 6)
5226 +#define INTERRUPT_ID_EMAC2               (INTERNAL_ISR_TABLE_OFFSET + 7)
5227 +#define INTERRUPT_ID_EMAC1               (INTERNAL_ISR_TABLE_OFFSET + 8)
5228 +#define INTERRUPT_ID_EPHY                (INTERNAL_ISR_TABLE_OFFSET + 9)
5229 +#define INTERRUPT_ID_M2M                 (INTERNAL_ISR_TABLE_OFFSET + 10)
5230 +#define INTERRUPT_ID_ACLC                (INTERNAL_ISR_TABLE_OFFSET + 11)
5231 +#define INTERRUPT_ID_USBH                (INTERNAL_ISR_TABLE_OFFSET + 12)
5232 +#define INTERRUPT_ID_SDRAM               (INTERNAL_ISR_TABLE_OFFSET + 13)
5233 +#define INTERRUPT_ID_USB_CNTL_RX_DMA     (INTERNAL_ISR_TABLE_OFFSET + 14)
5234 +#define INTERRUPT_ID_USB_CNTL_TX_DMA     (INTERNAL_ISR_TABLE_OFFSET + 15)
5235 +#define INTERRUPT_ID_USB_BULK_RX_DMA     (INTERNAL_ISR_TABLE_OFFSET + 16)
5236 +#define INTERRUPT_ID_USB_BULK_TX_DMA     (INTERNAL_ISR_TABLE_OFFSET + 17)
5237 +#define INTERRUPT_ID_USB_ISO_RX_DMA      (INTERNAL_ISR_TABLE_OFFSET + 18)
5238 +#define INTERRUPT_ID_USB_ISO_TX_DMA      (INTERNAL_ISR_TABLE_OFFSET + 19)
5239 +#define INTERRUPT_ID_EMAC1_RX_DMA        (INTERNAL_ISR_TABLE_OFFSET + 20)
5240 +#define INTERRUPT_ID_EMAC1_TX_DMA        (INTERNAL_ISR_TABLE_OFFSET + 21)
5241 +#define INTERRUPT_ID_EMAC2_RX_DMA        (INTERNAL_ISR_TABLE_OFFSET + 22)
5242 +#define INTERRUPT_ID_EMAC2_TX_DMA        (INTERNAL_ISR_TABLE_OFFSET + 23)
5243 +#define INTERRUPT_ID_MPI                 (INTERNAL_ISR_TABLE_OFFSET + 24)
5244 +#define INTERRUPT_ID_DG                  (INTERNAL_ISR_TABLE_OFFSET + 25)
5245 +
5246 +
5247 +#endif  /* __BCM6348_H */
5248 +
5249 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/6348_map_part.h linux-2.6.19.new/arch/mips/bcm963xx/include/6348_map_part.h
5250 --- linux-2.6.19/arch/mips/bcm963xx/include/6348_map_part.h     1970-01-01 01:00:00.000000000 +0100
5251 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/6348_map_part.h 2006-12-16 18:46:31.000000000 +0100
5252 @@ -0,0 +1,500 @@
5253 +/*
5254 +<:copyright-gpl
5255 + Copyright 2002 Broadcom Corp. All Rights Reserved.
5256 +
5257 + This program is free software; you can distribute it and/or modify it
5258 + under the terms of the GNU General Public License (Version 2) as
5259 + published by the Free Software Foundation.
5260 +
5261 + This program is distributed in the hope it will be useful, but WITHOUT
5262 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5263 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
5264 + for more details.
5265 +
5266 + You should have received a copy of the GNU General Public License along
5267 + with this program; if not, write to the Free Software Foundation, Inc.,
5268 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5269 +:>
5270 +*/
5271 +
5272 +#ifndef __BCM6348_MAP_H
5273 +#define __BCM6348_MAP_H
5274 +
5275 +#include "bcmtypes.h"
5276 +
5277 +#define PERF_BASE           0xfffe0000
5278 +#define TIMR_BASE           0xfffe0200
5279 +#define UART_BASE           0xfffe0300
5280 +#define GPIO_BASE           0xfffe0400
5281 +#define MPI_BASE            0xfffe2000    /* MPI control registers */
5282 +#define USB_HOST_BASE       0xfffe1b00    /* USB host registers */
5283 +#define USB_HOST_NON_OHCI   0xfffe1c00    /* USB host non-OHCI registers */
5284 +
5285 +typedef struct PerfControl {
5286 +  uint32        RevID;
5287 +  uint16        testControl;
5288 +  uint16        blkEnables;
5289 +#define EMAC_CLK_EN     0x0010
5290 +#define SAR_CLK_EN      0x0020
5291 +#define USBS_CLK_EN     0x0040
5292 +#define USBH_CLK_EN     0x0100
5293 +
5294 +  uint32        pll_control;
5295 +#define SOFT_RESET 0x00000001
5296 +
5297 +  uint32        IrqMask;
5298 +  uint32        IrqStatus;
5299 +
5300 +  uint32        ExtIrqCfg;
5301 +#define EI_SENSE_SHFT   0
5302 +#define EI_STATUS_SHFT  5
5303 +#define EI_CLEAR_SHFT   10
5304 +#define EI_MASK_SHFT    15
5305 +#define EI_INSENS_SHFT  20
5306 +#define EI_LEVEL_SHFT   25
5307 +
5308 +  uint32        unused[4];      /* (18) */
5309 +  uint32        BlockSoftReset; /* (28) */
5310 +#define BSR_SPI             0x00000001
5311 +#define BSR_EMAC            0x00000004
5312 +#define BSR_USBH            0x00000008
5313 +#define BSR_USBS            0x00000010
5314 +#define BSR_ADSL            0x00000020
5315 +#define BSR_DMAMEM          0x00000040
5316 +#define BSR_SAR             0x00000080
5317 +#define BSR_ACLC            0x00000100
5318 +#define BSR_ADSL_MIPS_PLL   0x00000400
5319 +#define BSR_ALL_BLOCKS      \
5320 +    (BSR_SPI | BSR_EMAC | BSR_USBH | BSR_USBS | BSR_ADSL | BSR_DMAMEM | \
5321 +     BSR_SAR | BSR_ACLC | BSR_ADSL_MIPS_PLL)
5322 +  uint32        unused2[2];     /* (2c) */
5323 +  uint32        PllStrap;       /* (34) */
5324 +#define PLL_N1_SHFT         20
5325 +#define PLL_N1_MASK         (7<<PLL_N1_SHFT)
5326 +#define PLL_N2_SHFT         15
5327 +#define PLL_N2_MASK         (0x1f<<PLL_N2_SHFT)
5328 +#define PLL_M1_REF_SHFT     12
5329 +#define PLL_M1_REF_MASK     (7<<PLL_M1_REF_SHFT)
5330 +#define PLL_M2_REF_SHFT     9
5331 +#define PLL_M2_REF_MASK     (7<<PLL_M2_REF_SHFT)
5332 +#define PLL_M1_CPU_SHFT     6
5333 +#define PLL_M1_CPU_MASK     (7<<PLL_M1_CPU_SHFT)
5334 +#define PLL_M1_BUS_SHFT     3
5335 +#define PLL_M1_BUS_MASK     (7<<PLL_M1_BUS_SHFT)
5336 +#define PLL_M2_BUS_SHFT     0
5337 +#define PLL_M2_BUS_MASK     (7<<PLL_M2_BUS_SHFT)
5338 +} PerfControl;
5339 +
5340 +#define PERF ((volatile PerfControl * const) PERF_BASE)
5341 +
5342 +typedef struct Timer {
5343 +  uint16        unused0;
5344 +  byte          TimerMask;
5345 +#define TIMER0EN        0x01
5346 +#define TIMER1EN        0x02
5347 +#define TIMER2EN        0x04
5348 +  byte          TimerInts;
5349 +#define TIMER0          0x01
5350 +#define TIMER1          0x02
5351 +#define TIMER2          0x04
5352 +#define WATCHDOG        0x08
5353 +  uint32        TimerCtl0;
5354 +  uint32        TimerCtl1;
5355 +  uint32        TimerCtl2;
5356 +#define TIMERENABLE     0x80000000
5357 +#define RSTCNTCLR       0x40000000
5358 +  uint32        TimerCnt0;
5359 +  uint32        TimerCnt1;
5360 +  uint32        TimerCnt2;
5361 +  uint32        WatchDogDefCount;
5362 +
5363 +  /* Write 0xff00 0x00ff to Start timer
5364 +   * Write 0xee00 0x00ee to Stop and re-load default count
5365 +   * Read from this register returns current watch dog count
5366 +   */
5367 +  uint32        WatchDogCtl;
5368 +
5369 +  /* Number of 40-MHz ticks for WD Reset pulse to last */
5370 +  uint32        WDResetCount;
5371 +} Timer;
5372 +
5373 +#define TIMER ((volatile Timer * const) TIMR_BASE)
5374 +
5375 +typedef struct UartChannel {
5376 +  byte          unused0;
5377 +  byte          control;
5378 +#define BRGEN           0x80    /* Control register bit defs */
5379 +#define TXEN            0x40
5380 +#define RXEN            0x20
5381 +#define LOOPBK          0x10
5382 +#define TXPARITYEN      0x08
5383 +#define TXPARITYEVEN    0x04
5384 +#define RXPARITYEN      0x02
5385 +#define RXPARITYEVEN    0x01
5386 +
5387 +  byte          config;
5388 +#define XMITBREAK       0x40
5389 +#define BITS5SYM        0x00
5390 +#define BITS6SYM        0x10
5391 +#define BITS7SYM        0x20
5392 +#define BITS8SYM        0x30
5393 +#define ONESTOP         0x07
5394 +#define TWOSTOP         0x0f
5395 +  /* 4-LSBS represent STOP bits/char
5396 +   * in 1/8 bit-time intervals.  Zero
5397 +   * represents 1/8 stop bit interval.
5398 +   * Fifteen represents 2 stop bits.
5399 +   */
5400 +  byte          fifoctl;
5401 +#define RSTTXFIFOS      0x80
5402 +#define RSTRXFIFOS      0x40
5403 +  /* 5-bit TimeoutCnt is in low bits of this register.
5404 +   *  This count represents the number of characters
5405 +   *  idle times before setting receive Irq when below threshold
5406 +   */
5407 +  uint32        baudword;
5408 +  /* When divide SysClk/2/(1+baudword) we should get 32*bit-rate
5409 +   */
5410 +
5411 +  byte          txf_levl;       /* Read-only fifo depth */
5412 +  byte          rxf_levl;       /* Read-only fifo depth */
5413 +  byte          fifocfg;        /* Upper 4-bits are TxThresh, Lower are
5414 +                                 *      RxThreshold.  Irq can be asserted
5415 +                                 *      when rx fifo> thresh, txfifo<thresh
5416 +                                 */
5417 +  byte          prog_out;       /* Set value of DTR (Bit0), RTS (Bit1)
5418 +                                 *  if these bits are also enabled to GPIO_o
5419 +                                 */
5420 +#define        DTREN   0x01
5421 +#define        RTSEN   0x02
5422 +
5423 +  byte          unused1;
5424 +  byte          DeltaIPEdgeNoSense;     /* Low 4-bits, set corr bit to 1 to
5425 +                                         * detect irq on rising AND falling
5426 +                                         * edges for corresponding GPIO_i
5427 +                                         * if enabled (edge insensitive)
5428 +                                         */
5429 +  byte          DeltaIPConfig_Mask;     /* Upper 4 bits: 1 for posedge sense
5430 +                                         *      0 for negedge sense if
5431 +                                         *      not configured for edge
5432 +                                         *      insensitive (see above)
5433 +                                         * Lower 4 bits: Mask to enable change
5434 +                                         *  detection IRQ for corresponding
5435 +                                         *  GPIO_i
5436 +                                         */
5437 +  byte          DeltaIP_SyncIP;         /* Upper 4 bits show which bits
5438 +                                         *  have changed (may set IRQ).
5439 +                                         *  read automatically clears bit
5440 +                                         * Lower 4 bits are actual status
5441 +                                         */
5442 +
5443 +  uint16        intMask;                               /* Same Bit defs for Mask and status */
5444 +  uint16        intStatus;
5445 +#define DELTAIP         0x0001
5446 +#define TXUNDERR        0x0002
5447 +#define TXOVFERR        0x0004
5448 +#define TXFIFOTHOLD     0x0008
5449 +#define TXREADLATCH     0x0010
5450 +#define TXFIFOEMT       0x0020
5451 +#define RXUNDERR        0x0040
5452 +#define RXOVFERR        0x0080
5453 +#define RXTIMEOUT       0x0100
5454 +#define RXFIFOFULL      0x0200
5455 +#define RXFIFOTHOLD     0x0400
5456 +#define RXFIFONE        0x0800
5457 +#define RXFRAMERR       0x1000
5458 +#define RXPARERR        0x2000
5459 +#define RXBRK           0x4000
5460 +
5461 +  uint16        unused2;
5462 +  uint16        Data;                   /* Write to TX, Read from RX */
5463 +                                        /* bits 11:8 are BRK,PAR,FRM errors */
5464 +
5465 +  uint32               unused3;
5466 +  uint32               unused4;
5467 +} Uart;
5468 +
5469 +#define UART ((volatile Uart * const) UART_BASE)
5470 +
5471 +typedef struct GpioControl {
5472 +  uint32        GPIODir_high; /* bits 36:32 */
5473 +  uint32        GPIODir;      /* bits 31:00 */
5474 +  uint32        GPIOio_high;  /* bits 36:32 */
5475 +  uint32        GPIOio;       /* bits 31:00 */
5476 +  uint32        LEDCtrl;
5477 +#define         LED3_STROBE             0x08000000
5478 +#define         LED2_STROBE             0x04000000
5479 +#define         LED1_STROBE             0x02000000
5480 +#define         LED0_STROBE             0x01000000
5481 +#define         LED_TEST                0x00010000
5482 +#define         LED3_DISABLE_LINK_ACT   0x00008000
5483 +#define         LED2_DISABLE_LINK_ACT   0x00004000
5484 +#define         LED1_DISABLE_LINK_ACT   0x00002000
5485 +#define         LED0_DISABLE_LINK_ACT   0x00001000
5486 +#define         LED_INTERVAL_SET_MASK   0x00000f00
5487 +#define         LED_INTERVAL_SET_320MS  0x00000500
5488 +#define         LED_INTERVAL_SET_160MS  0x00000400
5489 +#define         LED_INTERVAL_SET_80MS   0x00000300
5490 +#define         LED_INTERVAL_SET_40MS   0x00000200
5491 +#define         LED_INTERVAL_SET_20MS   0x00000100
5492 +#define         LED3_ON                 0x00000080
5493 +#define         LED2_ON                 0x00000040
5494 +#define         LED1_ON                 0x00000020
5495 +#define         LED0_ON                 0x00000010
5496 +#define         LED3_ENABLE             0x00000008
5497 +#define         LED2_ENABLE             0x00000004
5498 +#define         LED1_ENABLE             0x00000002
5499 +#define         LED0_ENABLE             0x00000001
5500 +  uint32        SpiSlaveCfg;
5501 +#define         SPI_SLAVE_RESET         0x00010000
5502 +#define         SPI_RESTRICT            0x00000400
5503 +#define         SPI_DELAY_DISABLE       0x00000200
5504 +#define         SPI_PROBE_MUX_SEL_MASK  0x000001e0
5505 +#define         SPI_SER_ADDR_CFG_MASK   0x0000000c
5506 +#define         SPI_MODE                0x00000001
5507 +  uint32        GPIOMode;
5508 +#define         GROUP4_DIAG             0x00090000
5509 +#define         GROUP4_UTOPIA           0x00080000
5510 +#define         GROUP4_LEGACY_LED       0x00030000
5511 +#define         GROUP4_MII_SNOOP        0x00020000
5512 +#define         GROUP4_EXT_EPHY         0x00010000
5513 +#define         GROUP3_DIAG             0x00009000
5514 +#define         GROUP3_UTOPIA           0x00008000
5515 +#define         GROUP3_EXT_MII          0x00007000
5516 +#define         GROUP2_DIAG             0x00000900
5517 +#define         GROUP2_PCI              0x00000500
5518 +#define         GROUP1_DIAG             0x00000090
5519 +#define         GROUP1_UTOPIA           0x00000080
5520 +#define         GROUP1_SPI_UART         0x00000060
5521 +#define         GROUP1_SPI_MASTER       0x00000060
5522 +#define         GROUP1_MII_PCCARD       0x00000040
5523 +#define         GROUP1_MII_SNOOP        0x00000020
5524 +#define         GROUP1_EXT_EPHY         0x00000010
5525 +#define         GROUP0_DIAG             0x00000009
5526 +#define         GROUP0_EXT_MII          0x00000007
5527 +
5528 +} GpioControl;
5529 +
5530 +#define GPIO ((volatile GpioControl * const) GPIO_BASE)
5531 +
5532 +/* Number to mask conversion macro used for GPIODir and GPIOio */
5533 +#define GPIO_NUM_TOTAL_BITS_MASK        0x3f
5534 +#define GPIO_NUM_MAX_BITS_MASK          0x1f
5535 +#define GPIO_NUM_TO_MASK(X)             ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) < 32) ? (1 << ((X) & GPIO_NUM_MAX_BITS_MASK)) : (0) )
5536 +
5537 +/* Number to mask conversion macro used for GPIODir_high and GPIOio_high */
5538 +#define GPIO_NUM_MAX_BITS_MASK_HIGH     0x07
5539 +#define GPIO_NUM_TO_MASK_HIGH(X)        ( (((X) & GPIO_NUM_TOTAL_BITS_MASK) >= 32) ? (1 << ((X-32) & GPIO_NUM_MAX_BITS_MASK_HIGH)) : (0) )
5540 +
5541 +
5542 +/*
5543 +** External Bus Interface
5544 +*/
5545 +typedef struct EbiChipSelect {
5546 +  uint32        base;                   /* base address in upper 24 bits */
5547 +#define EBI_SIZE_8K         0
5548 +#define EBI_SIZE_16K        1
5549 +#define EBI_SIZE_32K        2
5550 +#define EBI_SIZE_64K        3
5551 +#define EBI_SIZE_128K       4
5552 +#define EBI_SIZE_256K       5
5553 +#define EBI_SIZE_512K       6
5554 +#define EBI_SIZE_1M         7
5555 +#define EBI_SIZE_2M         8
5556 +#define EBI_SIZE_4M         9
5557 +#define EBI_SIZE_8M         10
5558 +#define EBI_SIZE_16M        11
5559 +#define EBI_SIZE_32M        12
5560 +#define EBI_SIZE_64M        13
5561 +#define EBI_SIZE_128M       14
5562 +#define EBI_SIZE_256M       15
5563 +  uint32        config;
5564 +#define EBI_ENABLE          0x00000001      /* .. enable this range */
5565 +#define EBI_WAIT_STATES     0x0000000e      /* .. mask for wait states */
5566 +#define EBI_WTST_SHIFT      1               /* .. for shifting wait states */
5567 +#define EBI_WORD_WIDE       0x00000010      /* .. 16-bit peripheral, else 8 */
5568 +#define EBI_WREN            0x00000020      /* enable posted writes */
5569 +#define EBI_POLARITY        0x00000040      /* .. set to invert something,
5570 +                                        **    don't know what yet */
5571 +#define EBI_TS_TA_MODE      0x00000080      /* .. use TS/TA mode */
5572 +#define EBI_TS_SEL          0x00000100      /* .. drive tsize, not bs_b */
5573 +#define EBI_FIFO            0x00000200      /* .. use fifo */
5574 +#define EBI_RE              0x00000400      /* .. Reverse Endian */
5575 +} EbiChipSelect;
5576 +
5577 +typedef struct MpiRegisters {
5578 +  EbiChipSelect cs[7];                  /* size chip select configuration */
5579 +#define EBI_CS0_BASE            0
5580 +#define EBI_CS1_BASE            1
5581 +#define EBI_CS2_BASE            2
5582 +#define EBI_CS3_BASE            3
5583 +#define PCMCIA_COMMON_BASE      4
5584 +#define PCMCIA_ATTRIBUTE_BASE   5
5585 +#define PCMCIA_IO_BASE          6
5586 +  uint32        unused0[2];             /* reserved */
5587 +  uint32        ebi_control;            /* ebi control */
5588 +  uint32        unused1[4];             /* reserved */
5589 +#define EBI_ACCESS_TIMEOUT      0x000007FF
5590 +  uint32        pcmcia_cntl1;           /* pcmcia control 1 */
5591 +#define PCCARD_CARD_RESET       0x00040000
5592 +#define CARDBUS_ENABLE          0x00008000
5593 +#define PCMCIA_ENABLE           0x00004000
5594 +#define PCMCIA_GPIO_ENABLE      0x00002000
5595 +#define CARDBUS_IDSEL           0x00001F00
5596 +#define VS2_OEN                 0x00000080
5597 +#define VS1_OEN                 0x00000040
5598 +#define VS2_OUT                 0x00000020
5599 +#define VS1_OUT                 0x00000010
5600 +#define VS2_IN                  0x00000008
5601 +#define VS1_IN                  0x00000004
5602 +#define CD2_IN                  0x00000002
5603 +#define CD1_IN                  0x00000001
5604 +#define VS_MASK                 0x0000000C
5605 +#define CD_MASK                 0x00000003
5606 +  uint32        unused2;                /* reserved */
5607 +  uint32        pcmcia_cntl2;           /* pcmcia control 2 */
5608 +#define PCMCIA_BYTESWAP_DIS     0x00000002
5609 +#define PCMCIA_HALFWORD_EN      0x00000001
5610 +#define RW_ACTIVE_CNT_BIT       2
5611 +#define INACTIVE_CNT_BIT        8
5612 +#define CE_SETUP_CNT_BIT        16
5613 +#define CE_HOLD_CNT_BIT         24
5614 +  uint32        unused3[40];            /* reserved */
5615 +
5616 +  uint32        sp0range;               /* PCI to internal system bus address space */
5617 +  uint32        sp0remap;
5618 +  uint32        sp0cfg;
5619 +  uint32        sp1range;
5620 +  uint32        sp1remap;
5621 +  uint32        sp1cfg;
5622 +
5623 +  uint32        EndianCfg;
5624 +
5625 +  uint32        l2pcfgctl;              /* internal system bus to PCI IO/Cfg control */
5626 +#define DIR_CFG_SEL             0x80000000 /* change from PCI I/O access to PCI config access */
5627 +#define DIR_CFG_USEREG          0x40000000 /* use this register info for PCI configuration access */
5628 +#define DEVICE_NUMBER           0x00007C00 /* device number for the PCI configuration access */
5629 +#define FUNC_NUMBER             0x00000300 /* function number for the PCI configuration access */
5630 +#define REG_NUMBER              0x000000FC /* register number for the PCI configuration access */
5631 +#define CONFIG_TYPE             0x00000003 /* configuration type for the PCI configuration access */
5632 +
5633 +  uint32        l2pmrange1;             /* internal system bus to PCI memory space */
5634 +#define PCI_SIZE_64K            0xFFFF0000
5635 +#define PCI_SIZE_128K           0xFFFE0000
5636 +#define PCI_SIZE_256K           0xFFFC0000
5637 +#define PCI_SIZE_512K           0xFFF80000
5638 +#define PCI_SIZE_1M             0xFFF00000
5639 +#define PCI_SIZE_2M             0xFFE00000
5640 +#define PCI_SIZE_4M             0xFFC00000
5641 +#define PCI_SIZE_8M             0xFF800000
5642 +#define PCI_SIZE_16M            0xFF000000
5643 +#define PCI_SIZE_32M            0xFE000000
5644 +  uint32        l2pmbase1;              /* kseg0 or kseg1 address & 0x1FFFFFFF */
5645 +  uint32        l2pmremap1;
5646 +#define CARDBUS_MEM             0x00000004
5647 +#define MEM_WINDOW_EN           0x00000001
5648 +  uint32        l2pmrange2;
5649 +  uint32        l2pmbase2;
5650 +  uint32        l2pmremap2;
5651 +  uint32        l2piorange;             /* internal system bus to PCI I/O space */
5652 +  uint32        l2piobase;
5653 +  uint32        l2pioremap;
5654 +
5655 +  uint32        pcimodesel;
5656 +#define PCI2_INT_BUS_RD_PREFECH 0x000000F0
5657 +#define PCI_BAR2_NOSWAP         0x00000002 /* BAR at offset 0x20 */
5658 +#define PCI_BAR1_NOSWAP         0x00000001 /* BAR at affset 0x1c */
5659 +
5660 +  uint32        pciintstat;             /* PCI interrupt mask/status */
5661 +#define MAILBOX1_SENT           0x08
5662 +#define MAILBOX0_SENT           0x04
5663 +#define MAILBOX1_MSG_RCV        0x02
5664 +#define MAILBOX0_MSG_RCV        0x01
5665 +  uint32        locbuscntrl;            /* internal system bus control */
5666 +#define DIR_U2P_NOSWAP          0x00000002
5667 +#define EN_PCI_GPIO             0x00000001
5668 +  uint32        locintstat;             /* internal system bus interrupt mask/status */
5669 +#define CSERR                   0x0200
5670 +#define SERR                    0x0100
5671 +#define EXT_PCI_INT             0x0080
5672 +#define DIR_FAILED              0x0040
5673 +#define DIR_COMPLETE            0x0020
5674 +#define PCI_CFG                 0x0010
5675 +  uint32        unused5[7];
5676 +
5677 +  uint32        mailbox0;
5678 +  uint32        mailbox1;
5679 +
5680 +  uint32        pcicfgcntrl;            /* internal system bus PCI configuration control */
5681 +#define PCI_CFG_REG_WRITE_EN    0x00000080
5682 +#define PCI_CFG_ADDR            0x0000003C
5683 +  uint32        pcicfgdata;             /* internal system bus PCI configuration data */
5684 +
5685 +  uint32        locch2ctl;              /* PCI to interrnal system bus DMA (downstream) local control */
5686 +#define MPI_DMA_HALT            0x00000008  /* idle after finish current memory burst */
5687 +#define MPI_DMA_PKT_HALT        0x00000004  /* idle after an EOP flag is detected */
5688 +#define MPI_DMA_STALL           0x00000002  /* idle after an EOP flag is detected */
5689 +#define MPI_DMA_ENABLE          0x00000001  /* set to enable channel */
5690 +  uint32        locch2intStat;
5691 +#define MPI_DMA_NO_DESC         0x00000004  /* no valid descriptors */
5692 +#define MPI_DMA_DONE            0x00000002  /* packet xfer complete */
5693 +#define MPI_DMA_BUFF_DONE       0x00000001  /* buffer done */
5694 +  uint32        locch2intMask;
5695 +  uint32        unused6;
5696 +  uint32        locch2descaddr;
5697 +  uint32        locch2status1;
5698 +#define LOCAL_DESC_STATE        0xE0000000
5699 +#define PCI_DESC_STATE          0x1C000000
5700 +#define BYTE_DONE               0x03FFC000
5701 +#define RING_ADDR               0x00003FFF
5702 +  uint32        locch2status2;
5703 +#define BUFPTR_OFFSET           0x1FFF0000
5704 +#define PCI_MASTER_STATE        0x000000C0
5705 +#define LOC_MASTER_STATE        0x00000038
5706 +#define CONTROL_STATE           0x00000007
5707 +  uint32        unused7;
5708 +
5709 +  uint32        locch1Ctl;              /*internal system bus to PCI DMA (upstream) local control */
5710 +#define DMA_U2P_LE              0x00000200  /* local bus is little endian */
5711 +#define DMA_U2P_NOSWAP          0x00000100  /* lccal bus is little endian but no data swapped */
5712 +  uint32        locch1intstat;
5713 +  uint32        locch1intmask;
5714 +  uint32        unused8;
5715 +  uint32        locch1descaddr;
5716 +  uint32        locch1status1;
5717 +  uint32        locch1status2;
5718 +  uint32        unused9;
5719 +
5720 +  uint32        pcich1ctl;              /* internal system bus to PCI DMA PCI control */
5721 +  uint32        pcich1intstat;
5722 +  uint32        pcich1intmask;
5723 +  uint32        pcich1descaddr;
5724 +  uint32        pcich1status1;
5725 +  uint32        pcich1status2;
5726 +
5727 +  uint32        pcich2Ctl;              /* PCI to internal system bus DMA PCI control */
5728 +  uint32        pcich2intstat;
5729 +  uint32        pcich2intmask;
5730 +  uint32        pcich2descaddr;
5731 +  uint32        pcich2status1;
5732 +  uint32        pcich2status2;
5733 +
5734 +  uint32        perm_id;                /* permanent device and vendor id */
5735 +  uint32        perm_rev;               /* permanent revision id */
5736 +} MpiRegisters;
5737 +
5738 +#define MPI ((volatile MpiRegisters * const) MPI_BASE)
5739 +
5740 +/* PCI configuration address space start offset 0x40 */
5741 +#define BRCM_PCI_CONFIG_TIMER               0x40
5742 +#define BRCM_PCI_CONFIG_TIMER_RETRY_MASK       0x0000FF00
5743 +#define BRCM_PCI_CONFIG_TIMER_TRDY_MASK                0x000000FF
5744 +
5745 +/* USB host non-Open HCI register, USB_HOST_NON_OHCI, bit definitions. */
5746 +#define NON_OHCI_ENABLE_PORT1   0x00000001 /* Use USB port 1 for host, not dev */
5747 +#define NON_OHCI_BYTE_SWAP      0x00000008 /* Swap USB host registers */
5748 +
5749 +#define USBH_NON_OHCI ((volatile unsigned long * const) USB_HOST_NON_OHCI)
5750 +
5751 +#endif
5752 +
5753 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/bcmTag.h linux-2.6.19.new/arch/mips/bcm963xx/include/bcmTag.h
5754 --- linux-2.6.19/arch/mips/bcm963xx/include/bcmTag.h    1970-01-01 01:00:00.000000000 +0100
5755 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/bcmTag.h        2006-12-16 18:46:31.000000000 +0100
5756 @@ -0,0 +1,153 @@
5757 +/*
5758 +<:copyright-gpl
5759 + Copyright 2002 Broadcom Corp. All Rights Reserved.
5760 +
5761 + This program is free software; you can distribute it and/or modify it
5762 + under the terms of the GNU General Public License (Version 2) as
5763 + published by the Free Software Foundation.
5764 +
5765 + This program is distributed in the hope it will be useful, but WITHOUT
5766 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5767 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
5768 + for more details.
5769 +
5770 + You should have received a copy of the GNU General Public License along
5771 + with this program; if not, write to the Free Software Foundation, Inc.,
5772 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5773 +:>
5774 +*/
5775 +//**************************************************************************************
5776 +// File Name  : bcmTag.h
5777 +//
5778 +// Description: add tag with validation system to the firmware image file to be uploaded
5779 +//              via http
5780 +//
5781 +// Created    : 02/28/2002  seanl
5782 +//**************************************************************************************
5783 +
5784 +#ifndef _BCMTAG_H_
5785 +#define _BCMTAG_H_
5786 +
5787 +
5788 +#define BCM_SIG_1   "Broadcom Corporation"
5789 +#define BCM_SIG_2   "ver. 2.0"          // was "firmware version 2.0" now it is split 6 char out for chip id.
5790 +
5791 +#define BCM_TAG_VER         "6"
5792 +#define BCM_TAG_VER_LAST    "26"
5793 +
5794 +// file tag (head) structure all is in clear text except validationTokens (crc, md5, sha1, etc). Total: 128 unsigned chars
5795 +#define TAG_LEN         256
5796 +#define TAG_VER_LEN     4
5797 +#define SIG_LEN         20
5798 +#define SIG_LEN_2       14   // Original second SIG = 20 is now devided into 14 for SIG_LEN_2 and 6 for CHIP_ID
5799 +#define CHIP_ID_LEN            6
5800 +#define IMAGE_LEN       10
5801 +#define ADDRESS_LEN     12
5802 +#define FLAG_LEN        2
5803 +#define TOKEN_LEN       20
5804 +#define BOARD_ID_LEN    16
5805 +#define RESERVED_LEN    (TAG_LEN - TAG_VER_LEN - SIG_LEN - SIG_LEN_2 - CHIP_ID_LEN - BOARD_ID_LEN - \
5806 +                        (4*IMAGE_LEN) - (3*ADDRESS_LEN) - (3*FLAG_LEN) - (2*TOKEN_LEN))
5807 +
5808 +
5809 +// TAG for downloadable image (kernel plus file system)
5810 +typedef struct _FILE_TAG
5811 +{
5812 +    unsigned char tagVersion[TAG_VER_LEN];       // tag version.  Will be 2 here.
5813 +    unsigned char signiture_1[SIG_LEN];          // text line for company info
5814 +    unsigned char signiture_2[SIG_LEN_2];        // additional info (can be version number)
5815 +    unsigned char chipId[CHIP_ID_LEN];                  // chip id
5816 +    unsigned char boardId[BOARD_ID_LEN];         // board id
5817 +    unsigned char bigEndian[FLAG_LEN];           // if = 1 - big, = 0 - little endia of the host
5818 +    unsigned char totalImageLen[IMAGE_LEN];      // the sum of all the following length
5819 +    unsigned char cfeAddress[ADDRESS_LEN];       // if non zero, cfe starting address
5820 +    unsigned char cfeLen[IMAGE_LEN];             // if non zero, cfe size in clear ASCII text.
5821 +    unsigned char rootfsAddress[ADDRESS_LEN];    // if non zero, filesystem starting address
5822 +    unsigned char rootfsLen[IMAGE_LEN];          // if non zero, filesystem size in clear ASCII text.
5823 +    unsigned char kernelAddress[ADDRESS_LEN];    // if non zero, kernel starting address
5824 +    unsigned char kernelLen[IMAGE_LEN];          // if non zero, kernel size in clear ASCII text.
5825 +    unsigned char dualImage[FLAG_LEN];           // if 1, dual image
5826 +    unsigned char inactiveLen[FLAG_LEN];         // if 1, the image is INACTIVE; if 0, active
5827 +    unsigned char reserved[RESERVED_LEN];        // reserved for later use
5828 +    unsigned char imageValidationToken[TOKEN_LEN];// image validation token - can be crc, md5, sha;  for
5829 +                                                 // now will be 4 unsigned char crc
5830 +    unsigned char tagValidationToken[TOKEN_LEN]; // validation token for tag(from signiture_1 to end of // mageValidationToken)
5831 +} FILE_TAG, *PFILE_TAG;
5832 +
5833 +#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */
5834 +#define CRC_LEN 4
5835 +
5836 +// only included if for bcmTag.exe program
5837 +#ifdef BCMTAG_EXE_USE
5838 +
5839 +static unsigned long Crc32_table[256] = {
5840 +    0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA,
5841 +    0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3,
5842 +    0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988,
5843 +    0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91,
5844 +    0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE,
5845 +    0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7,
5846 +    0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC,
5847 +    0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5,
5848 +    0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172,
5849 +    0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B,
5850 +    0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940,
5851 +    0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59,
5852 +    0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116,
5853 +    0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F,
5854 +    0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924,
5855 +    0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D,
5856 +    0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A,
5857 +    0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433,
5858 +    0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818,
5859 +    0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01,
5860 +    0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E,
5861 +    0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457,
5862 +    0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C,
5863 +    0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65,
5864 +    0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2,
5865 +    0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB,
5866 +    0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0,
5867 +    0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9,
5868 +    0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086,
5869 +    0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F,
5870 +    0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4,
5871 +    0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD,
5872 +    0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A,
5873 +    0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683,
5874 +    0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8,
5875 +    0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1,
5876 +    0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE,
5877 +    0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7,
5878 +    0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC,
5879 +    0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5,
5880 +    0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252,
5881 +    0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B,
5882 +    0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60,
5883 +    0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79,
5884 +    0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236,
5885 +    0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F,
5886 +    0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04,
5887 +    0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D,
5888 +    0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A,
5889 +    0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713,
5890 +    0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38,
5891 +    0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21,
5892 +    0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E,
5893 +    0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777,
5894 +    0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C,
5895 +    0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45,
5896 +    0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2,
5897 +    0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB,
5898 +    0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0,
5899 +    0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9,
5900 +    0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6,
5901 +    0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF,
5902 +    0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94,
5903 +    0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D
5904 +};
5905 +#endif // BCMTAG_USE
5906 +
5907 +
5908 +#endif // _BCMTAG_H_
5909 +
5910 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/bcm_intr.h linux-2.6.19.new/arch/mips/bcm963xx/include/bcm_intr.h
5911 --- linux-2.6.19/arch/mips/bcm963xx/include/bcm_intr.h  1970-01-01 01:00:00.000000000 +0100
5912 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/bcm_intr.h      2006-12-16 18:46:31.000000000 +0100
5913 @@ -0,0 +1,59 @@
5914 +/*
5915 +<:copyright-gpl
5916 + Copyright 2003 Broadcom Corp. All Rights Reserved.
5917 +
5918 + This program is free software; you can distribute it and/or modify it
5919 + under the terms of the GNU General Public License (Version 2) as
5920 + published by the Free Software Foundation.
5921 +
5922 + This program is distributed in the hope it will be useful, but WITHOUT
5923 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5924 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
5925 + for more details.
5926 +
5927 + You should have received a copy of the GNU General Public License along
5928 + with this program; if not, write to the Free Software Foundation, Inc.,
5929 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5930 +:>
5931 +*/
5932 +
5933 +#ifndef __BCM_INTR_H
5934 +#define __BCM_INTR_H
5935 +
5936 +#ifdef __cplusplus
5937 +    extern "C" {
5938 +#endif
5939 +
5940 +#if defined(CONFIG_BCM96338)
5941 +#include <6338_intr.h>
5942 +#endif
5943 +#if defined(CONFIG_BCM96345)
5944 +#include <6345_intr.h>
5945 +#endif
5946 +#if defined(CONFIG_BCM96348)
5947 +#include <6348_intr.h>
5948 +#endif
5949 +
5950 +/* defines */
5951 +struct pt_regs;
5952 +typedef int (*FN_HANDLER) (int, void *);
5953 +
5954 +/* prototypes */
5955 +extern void enable_brcm_irq(unsigned int irq);
5956 +extern void disable_brcm_irq(unsigned int irq);
5957 +extern int request_external_irq(unsigned int irq,
5958 +    FN_HANDLER handler, unsigned long irqflags,
5959 +    const char * devname, void *dev_id);
5960 +extern unsigned int BcmHalMapInterrupt(FN_HANDLER isr, unsigned int param,
5961 +    unsigned int interruptId);
5962 +extern void dump_intr_regs(void);
5963 +
5964 +/* compatibility definitions */
5965 +#define BcmHalInterruptEnable(irq)      enable_brcm_irq( irq )
5966 +#define BcmHalInterruptDisable(irq)     disable_brcm_irq( irq )
5967 +
5968 +#ifdef __cplusplus
5969 +    }
5970 +#endif
5971 +
5972 +#endif
5973 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/bcm_map_part.h linux-2.6.19.new/arch/mips/bcm963xx/include/bcm_map_part.h
5974 --- linux-2.6.19/arch/mips/bcm963xx/include/bcm_map_part.h      1970-01-01 01:00:00.000000000 +0100
5975 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/bcm_map_part.h  2006-12-16 18:46:31.000000000 +0100
5976 @@ -0,0 +1,34 @@
5977 +/*
5978 +<:copyright-gpl
5979 + Copyright 2004 Broadcom Corp. All Rights Reserved.
5980 +
5981 + This program is free software; you can distribute it and/or modify it
5982 + under the terms of the GNU General Public License (Version 2) as
5983 + published by the Free Software Foundation.
5984 +
5985 + This program is distributed in the hope it will be useful, but WITHOUT
5986 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
5987 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
5988 + for more details.
5989 +
5990 + You should have received a copy of the GNU General Public License along
5991 + with this program; if not, write to the Free Software Foundation, Inc.,
5992 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
5993 +:>
5994 +*/
5995 +
5996 +#ifndef __BCM_MAP_PART_H
5997 +#define __BCM_MAP_PART_H
5998 +
5999 +#if defined(CONFIG_BCM96338)
6000 +#include <6338_map_part.h>
6001 +#endif
6002 +#if defined(CONFIG_BCM96345)
6003 +#include <6345_map_part.h>
6004 +#endif
6005 +#if defined(CONFIG_BCM96348)
6006 +#include <6348_map_part.h>
6007 +#endif
6008 +
6009 +#endif
6010 +
6011 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/bcmpci.h linux-2.6.19.new/arch/mips/bcm963xx/include/bcmpci.h
6012 --- linux-2.6.19/arch/mips/bcm963xx/include/bcmpci.h    1970-01-01 01:00:00.000000000 +0100
6013 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/bcmpci.h        2006-12-16 18:46:31.000000000 +0100
6014 @@ -0,0 +1,87 @@
6015 +/*
6016 +<:copyright-gpl
6017 + Copyright 2004 Broadcom Corp. All Rights Reserved.
6018 +
6019 + This program is free software; you can distribute it and/or modify it
6020 + under the terms of the GNU General Public License (Version 2) as
6021 + published by the Free Software Foundation.
6022 +
6023 + This program is distributed in the hope it will be useful, but WITHOUT
6024 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6025 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
6026 + for more details.
6027 +
6028 + You should have received a copy of the GNU General Public License along
6029 + with this program; if not, write to the Free Software Foundation, Inc.,
6030 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6031 +:>
6032 +*/
6033 +
6034 +//
6035 +// bcmpci.h - bcm96348 PCI, Cardbus, and PCMCIA definition
6036 +//
6037 +#ifndef BCMPCI_H
6038 +#define BCMPCI_H
6039 +
6040 +/* Memory window in internal system bus address space */
6041 +#define BCM_PCI_MEM_BASE        0x08000000
6042 +/* IO window in internal system bus address space */
6043 +#define BCM_PCI_IO_BASE         0x0C000000
6044 +
6045 +#define BCM_PCI_ADDR_MASK       0x1fffffff
6046 +
6047 +/* Memory window size (range) */
6048 +#define BCM_PCI_MEM_SIZE_16MB   0x01000000
6049 +/* IO window size (range) */
6050 +#define BCM_PCI_IO_SIZE_64KB    0x00010000
6051 +
6052 +/* PCI Configuration and I/O space acesss */
6053 +#define BCM_PCI_CFG(d, f, o)    ( (d << 11) | (f << 8) | (o/4 << 2) )
6054 +
6055 +/* fake USB PCI slot */
6056 +#define USB_HOST_SLOT           9
6057 +#define USB_BAR0_MEM_SIZE       0x0800
6058 +
6059 +#define BCM_HOST_MEM_SPACE1     0x10000000
6060 +#define BCM_HOST_MEM_SPACE2     0x00000000
6061 +
6062 +/*
6063 + * EBI bus clock is 33MHz and share with PCI bus
6064 + * each clock cycle is 30ns.
6065 + */
6066 +/* attribute memory access wait cnt for 4306 */
6067 +#define PCMCIA_ATTR_CE_HOLD     3  // data hold time 70ns
6068 +#define PCMCIA_ATTR_CE_SETUP    3  // data setup time 50ns
6069 +#define PCMCIA_ATTR_INACTIVE    6  // time between read/write cycles 180ns. For the total cycle time 600ns (cnt1+cnt2+cnt3+cnt4)
6070 +#define PCMCIA_ATTR_ACTIVE      10 // OE/WE pulse width 300ns
6071 +
6072 +/* common memory access wait cnt for 4306 */
6073 +#define PCMCIA_MEM_CE_HOLD      1  // data hold time 30ns
6074 +#define PCMCIA_MEM_CE_SETUP     1  // data setup time 30ns
6075 +#define PCMCIA_MEM_INACTIVE     2  // time between read/write cycles 40ns. For the total cycle time 250ns (cnt1+cnt2+cnt3+cnt4)
6076 +#define PCMCIA_MEM_ACTIVE       5  // OE/WE pulse width 150ns
6077 +
6078 +#define PCCARD_VCC_MASK     0x00070000  // Mask Reset also
6079 +#define PCCARD_VCC_33V      0x00010000
6080 +#define PCCARD_VCC_50V      0x00020000
6081 +
6082 +typedef enum {
6083 +    MPI_CARDTYPE_NONE,      // No Card in slot
6084 +    MPI_CARDTYPE_PCMCIA,    // 16-bit PCMCIA card in slot
6085 +    MPI_CARDTYPE_CARDBUS,   // 32-bit CardBus card in slot
6086 +}   CardType;
6087 +
6088 +#define CARDBUS_SLOT        0    // Slot 0 is default for CardBus
6089 +
6090 +#define pcmciaAttrOffset    0x00200000
6091 +#define pcmciaMemOffset     0x00000000
6092 +// Needs to be right above PCI I/O space. Give 0x8000 (32K) to PCMCIA.
6093 +#define pcmciaIoOffset      (BCM_PCI_IO_BASE + 0x80000)
6094 +// Base Address is that mapped into the MPI ChipSelect registers.
6095 +// UBUS bridge MemoryWindow 0 outputs a 0x00 for the base.
6096 +#define pcmciaBase          0xbf000000
6097 +#define pcmciaAttr          (pcmciaAttrOffset | pcmciaBase)
6098 +#define pcmciaMem           (pcmciaMemOffset  | pcmciaBase)
6099 +#define pcmciaIo            (pcmciaIoOffset   | pcmciaBase)
6100 +
6101 +#endif
6102 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/bcmtypes.h linux-2.6.19.new/arch/mips/bcm963xx/include/bcmtypes.h
6103 --- linux-2.6.19/arch/mips/bcm963xx/include/bcmtypes.h  1970-01-01 01:00:00.000000000 +0100
6104 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/bcmtypes.h      2006-12-16 18:46:31.000000000 +0100
6105 @@ -0,0 +1,160 @@
6106 +/*
6107 +<:copyright-gpl
6108 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6109 +
6110 + This program is free software; you can distribute it and/or modify it
6111 + under the terms of the GNU General Public License (Version 2) as
6112 + published by the Free Software Foundation.
6113 +
6114 + This program is distributed in the hope it will be useful, but WITHOUT
6115 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6116 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
6117 + for more details.
6118 +
6119 + You should have received a copy of the GNU General Public License along
6120 + with this program; if not, write to the Free Software Foundation, Inc.,
6121 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6122 +:>
6123 +*/
6124 +
6125 +//
6126 +// bcmtypes.h - misc useful typedefs
6127 +//
6128 +#ifndef BCMTYPES_H
6129 +#define BCMTYPES_H
6130 +
6131 +// These are also defined in typedefs.h in the application area, so I need to
6132 +// protect against re-definition.
6133 +
6134 +#ifndef _TYPEDEFS_H_
6135 +typedef unsigned char   uint8;
6136 +typedef unsigned short  uint16;
6137 +typedef unsigned long   uint32;
6138 +typedef signed char     int8;
6139 +typedef signed short    int16;
6140 +typedef signed long     int32;
6141 +#endif
6142 +
6143 +typedef unsigned char   byte;
6144 +// typedef unsigned long   sem_t;
6145 +
6146 +typedef unsigned long   HANDLE,*PULONG,DWORD,*PDWORD;
6147 +typedef signed long     LONG,*PLONG;
6148 +
6149 +typedef unsigned int    *PUINT;
6150 +typedef signed int      INT;
6151 +
6152 +typedef unsigned short  *PUSHORT;
6153 +typedef signed short    SHORT,*PSHORT;
6154 +typedef unsigned short  WORD,*PWORD;
6155 +
6156 +typedef unsigned char   *PUCHAR;
6157 +typedef signed char     *PCHAR;
6158 +
6159 +typedef void            *PVOID;
6160 +
6161 +typedef unsigned char   BOOLEAN, *PBOOL, *PBOOLEAN;
6162 +
6163 +typedef unsigned char   BYTE,*PBYTE;
6164 +
6165 +//#ifndef __GNUC__
6166 +//The following has been defined in Vxworks internally: vxTypesOld.h
6167 +//redefine under vxworks will cause error
6168 +typedef signed int      *PINT;
6169 +
6170 +typedef signed char     INT8;
6171 +typedef signed short    INT16;
6172 +typedef signed long     INT32;
6173 +
6174 +typedef unsigned char   UINT8;
6175 +typedef unsigned short  UINT16;
6176 +typedef unsigned long   UINT32;
6177 +
6178 +typedef unsigned char   UCHAR;
6179 +typedef unsigned short  USHORT;
6180 +typedef unsigned int    UINT;
6181 +typedef unsigned long   ULONG;
6182 +
6183 +typedef void            VOID;
6184 +typedef unsigned char   BOOL;
6185 +
6186 +//#endif  /* __GNUC__ */
6187 +
6188 +
6189 +// These are also defined in typedefs.h in the application area, so I need to
6190 +// protect against re-definition.
6191 +#ifndef TYPEDEFS_H
6192 +
6193 +// Maximum and minimum values for a signed 16 bit integer.
6194 +#define MAX_INT16 32767
6195 +#define MIN_INT16 -32768
6196 +
6197 +// Useful for true/false return values.  This uses the
6198 +// Taligent notation (k for constant).
6199 +typedef enum
6200 +{
6201 +    kFalse = 0,
6202 +    kTrue = 1
6203 +} Bool;
6204 +
6205 +#endif
6206 +
6207 +/* macros to protect against unaligned accesses */
6208 +
6209 +#if 0
6210 +/* first arg is an address, second is a value */
6211 +#define PUT16( a, d ) {                \
6212 +  *((byte *)a) = (byte)((d)>>8);       \
6213 +  *(((byte *)a)+1) = (byte)(d);        \
6214 +}
6215 +
6216 +#define PUT32( a, d ) {                \
6217 +  *((byte *)a) = (byte)((d)>>24);      \
6218 +  *(((byte *)a)+1) = (byte)((d)>>16);  \
6219 +  *(((byte *)a)+2) = (byte)((d)>>8);   \
6220 +  *(((byte *)a)+3) = (byte)(d);        \
6221 +}
6222 +
6223 +/* first arg is an address, returns a value */
6224 +#define GET16( a ) (                   \
6225 +  (*((byte *)a) << 8) |                        \
6226 +  (*(((byte *)a)+1))                   \
6227 +)
6228 +
6229 +#define GET32( a ) (                   \
6230 +  (*((byte *)a) << 24)     |           \
6231 +  (*(((byte *)a)+1) << 16) |           \
6232 +  (*(((byte *)a)+2) << 8)  |           \
6233 +  (*(((byte *)a)+3))                   \
6234 +)
6235 +#endif
6236 +
6237 +#ifndef YES
6238 +#define YES 1
6239 +#endif
6240 +
6241 +#ifndef NO
6242 +#define NO  0
6243 +#endif
6244 +
6245 +#ifndef IN
6246 +#define IN
6247 +#endif
6248 +
6249 +#ifndef OUT
6250 +#define OUT
6251 +#endif
6252 +
6253 +#ifndef TRUE
6254 +#define TRUE 1
6255 +#endif
6256 +
6257 +#ifndef FALSE
6258 +#define FALSE  0
6259 +#endif
6260 +
6261 +#define READ32(addr)        (*(volatile UINT32 *)((ULONG)&addr))
6262 +#define READ16(addr)        (*(volatile UINT16 *)((ULONG)&addr))
6263 +#define READ8(addr)         (*(volatile UINT8  *)((ULONG)&addr))
6264 +
6265 +#endif
6266 diff -urN linux-2.6.19/arch/mips/bcm963xx/include/board.h linux-2.6.19.new/arch/mips/bcm963xx/include/board.h
6267 --- linux-2.6.19/arch/mips/bcm963xx/include/board.h     1970-01-01 01:00:00.000000000 +0100
6268 +++ linux-2.6.19.new/arch/mips/bcm963xx/include/board.h 2006-12-16 18:46:31.000000000 +0100
6269 @@ -0,0 +1,373 @@
6270 +/*
6271 +<:copyright-gpl
6272 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6273 +
6274 + This program is free software; you can distribute it and/or modify it
6275 + under the terms of the GNU General Public License (Version 2) as
6276 + published by the Free Software Foundation.
6277 +
6278 + This program is distributed in the hope it will be useful, but WITHOUT
6279 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6280 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
6281 + for more details.
6282 +
6283 + You should have received a copy of the GNU General Public License along
6284 + with this program; if not, write to the Free Software Foundation, Inc.,
6285 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6286 +:>
6287 +*/
6288 +/***********************************************************************/
6289 +/*                                                                     */
6290 +/*   MODULE:  board.h                                                  */
6291 +/*   DATE:    97/02/18                                                 */
6292 +/*   PURPOSE: Board specific information.  This module should include  */
6293 +/*            all base device addresses and board specific macros.     */
6294 +/*                                                                     */
6295 +/***********************************************************************/
6296 +#ifndef _BOARD_H
6297 +#define _BOARD_H
6298 +
6299 +/*****************************************************************************/
6300 +/*                    Misc board definitions                                 */
6301 +/*****************************************************************************/
6302 +
6303 +#define        DYING_GASP_API
6304 +
6305 +/*****************************************************************************/
6306 +/*                    Physical Memory Map                                    */
6307 +/*****************************************************************************/
6308 +
6309 +#define PHYS_DRAM_BASE           0x00000000     /* Dynamic RAM Base */
6310 +#define PHYS_FLASH_BASE          0x1FC00000     /* Flash Memory         */
6311 +
6312 +/*****************************************************************************/
6313 +/* Note that the addresses above are physical addresses and that programs    */
6314 +/* have to use converted addresses defined below:                            */
6315 +/*****************************************************************************/
6316 +#define DRAM_BASE           (0x80000000 | PHYS_DRAM_BASE)   /* cached DRAM */
6317 +#define DRAM_BASE_NOCACHE   (0xA0000000 | PHYS_DRAM_BASE)   /* uncached DRAM */
6318 +#define FLASH_BASE          (0xA0000000 | PHYS_FLASH_BASE)  /* uncached Flash  */
6319 +
6320 +/*****************************************************************************/
6321 +/*  Select the PLL value to get the desired CPU clock frequency.             */
6322 +/*                                                                           */
6323 +/*                                                                           */
6324 +/*****************************************************************************/
6325 +#define FPERIPH            50000000
6326 +
6327 +#define ONEK                            1024
6328 +#define BLK64K                          (64*ONEK)
6329 +#define FLASH45_BLKS_BOOT_ROM           1
6330 +#define FLASH45_LENGTH_BOOT_ROM         (FLASH45_BLKS_BOOT_ROM * BLK64K)
6331 +#define FLASH_RESERVED_AT_END           (64*ONEK) /*reserved for PSI, scratch pad*/
6332 +
6333 +/*****************************************************************************/
6334 +/* Note that the addresses above are physical addresses and that programs    */
6335 +/* have to use converted addresses defined below:                            */
6336 +/*****************************************************************************/
6337 +#define DRAM_BASE           (0x80000000 | PHYS_DRAM_BASE)   /* cached DRAM */
6338 +#define DRAM_BASE_NOCACHE   (0xA0000000 | PHYS_DRAM_BASE)   /* uncached DRAM */
6339 +#define FLASH_BASE          (0xA0000000 | PHYS_FLASH_BASE)  /* uncached Flash  */
6340 +
6341 +/*****************************************************************************/
6342 +/*  Select the PLL value to get the desired CPU clock frequency.             */
6343 +/*                                                                           */
6344 +/*                                                                           */
6345 +/*****************************************************************************/
6346 +#define FPERIPH            50000000
6347 +
6348 +#define SDRAM_TYPE_ADDRESS_OFFSET   16
6349 +#define NVRAM_DATA_OFFSET           0x0580
6350 +#define NVRAM_DATA_ID               0x0f1e2d3c
6351 +#define BOARD_SDRAM_TYPE            *(unsigned long *) \
6352 +                                    (FLASH_BASE + SDRAM_TYPE_ADDRESS_OFFSET)
6353 +
6354 +#define ONEK                1024
6355 +#define BLK64K              (64*ONEK)
6356 +
6357 +// nvram and psi flash definitions for 45
6358 +#define FLASH45_LENGTH_NVRAM            ONEK            // 1k nvram
6359 +#define NVRAM_PSI_DEFAULT               24              // default psi in K byes
6360 +
6361 +/*****************************************************************************/
6362 +/*       NVRAM Offset and definition                                         */
6363 +/*****************************************************************************/
6364 +
6365 +#define NVRAM_VERSION_NUMBER            2
6366 +#define NVRAM_VERSION_NUMBER_ADDRESS    0
6367 +
6368 +#define NVRAM_BOOTLINE_LEN              256
6369 +#define NVRAM_BOARD_ID_STRING_LEN       16
6370 +#define NVRAM_MAC_ADDRESS_LEN           6
6371 +#define NVRAM_MAC_COUNT_MAX             32
6372 +
6373 +/*****************************************************************************/
6374 +/*       Misc Offsets                                                        */
6375 +/*****************************************************************************/
6376 +
6377 +#define CFE_VERSION_OFFSET           0x0570
6378 +#define CFE_VERSION_MARK_SIZE        5
6379 +#define CFE_VERSION_SIZE             5
6380 +
6381 +typedef struct
6382 +{
6383 +    unsigned long ulVersion;
6384 +    char szBootline[NVRAM_BOOTLINE_LEN];
6385 +    char szBoardId[NVRAM_BOARD_ID_STRING_LEN];
6386 +    unsigned long ulReserved1[2];
6387 +    unsigned long ulNumMacAddrs;
6388 +    unsigned char ucaBaseMacAddr[NVRAM_MAC_ADDRESS_LEN];
6389 +    char chReserved[2];
6390 +    unsigned long ulCheckSum;
6391 +} NVRAM_DATA, *PNVRAM_DATA;
6392 +
6393 +
6394 +/*****************************************************************************/
6395 +/*          board ioctl calls for flash, led and some other utilities        */
6396 +/*****************************************************************************/
6397 +
6398 +
6399 +/* Defines. for board driver */
6400 +#define BOARD_IOCTL_MAGIC       'B'
6401 +#define BOARD_DRV_MAJOR          206
6402 +
6403 +#define MAC_ADDRESS_ANY         (unsigned long) -1
6404 +
6405 +#define BOARD_IOCTL_FLASH_INIT \
6406 +    _IOWR(BOARD_IOCTL_MAGIC, 0, BOARD_IOCTL_PARMS)
6407 +
6408 +#define BOARD_IOCTL_FLASH_WRITE \
6409 +    _IOWR(BOARD_IOCTL_MAGIC, 1, BOARD_IOCTL_PARMS)
6410 +
6411 +#define BOARD_IOCTL_FLASH_READ \
6412 +    _IOWR(BOARD_IOCTL_MAGIC, 2, BOARD_IOCTL_PARMS)
6413 +
6414 +#define BOARD_IOCTL_GET_NR_PAGES \
6415 +    _IOWR(BOARD_IOCTL_MAGIC, 3, BOARD_IOCTL_PARMS)
6416 +
6417 +#define BOARD_IOCTL_DUMP_ADDR \
6418 +    _IOWR(BOARD_IOCTL_MAGIC, 4, BOARD_IOCTL_PARMS)
6419 +
6420 +#define BOARD_IOCTL_SET_MEMORY \
6421 +    _IOWR(BOARD_IOCTL_MAGIC, 5, BOARD_IOCTL_PARMS)
6422 +
6423 +#define BOARD_IOCTL_MIPS_SOFT_RESET \
6424 +    _IOWR(BOARD_IOCTL_MAGIC, 6, BOARD_IOCTL_PARMS)
6425 +
6426 +#define BOARD_IOCTL_LED_CTRL \
6427 +    _IOWR(BOARD_IOCTL_MAGIC, 7, BOARD_IOCTL_PARMS)
6428 +
6429 +#define BOARD_IOCTL_GET_ID \
6430 +    _IOWR(BOARD_IOCTL_MAGIC, 8, BOARD_IOCTL_PARMS)
6431 +
6432 +#define BOARD_IOCTL_GET_MAC_ADDRESS \
6433 +    _IOWR(BOARD_IOCTL_MAGIC, 9, BOARD_IOCTL_PARMS)
6434 +
6435 +#define BOARD_IOCTL_RELEASE_MAC_ADDRESS \
6436 +    _IOWR(BOARD_IOCTL_MAGIC, 10, BOARD_IOCTL_PARMS)
6437 +
6438 +#define BOARD_IOCTL_GET_PSI_SIZE \
6439 +    _IOWR(BOARD_IOCTL_MAGIC, 11, BOARD_IOCTL_PARMS)
6440 +
6441 +#define BOARD_IOCTL_GET_SDRAM_SIZE \
6442 +    _IOWR(BOARD_IOCTL_MAGIC, 12, BOARD_IOCTL_PARMS)
6443 +
6444 +#define BOARD_IOCTL_SET_MONITOR_FD \
6445 +    _IOWR(BOARD_IOCTL_MAGIC, 13, BOARD_IOCTL_PARMS)
6446 +
6447 +#define BOARD_IOCTL_WAKEUP_MONITOR_TASK \
6448 +    _IOWR(BOARD_IOCTL_MAGIC, 14, BOARD_IOCTL_PARMS)
6449 +
6450 +#define BOARD_IOCTL_GET_BOOTLINE \
6451 +    _IOWR(BOARD_IOCTL_MAGIC, 15, BOARD_IOCTL_PARMS)
6452 +
6453 +#define BOARD_IOCTL_SET_BOOTLINE \
6454 +    _IOWR(BOARD_IOCTL_MAGIC, 16, BOARD_IOCTL_PARMS)
6455 +
6456 +#define BOARD_IOCTL_GET_BASE_MAC_ADDRESS \
6457 +    _IOWR(BOARD_IOCTL_MAGIC, 17, BOARD_IOCTL_PARMS)
6458 +
6459 +#define BOARD_IOCTL_GET_CHIP_ID \
6460 +    _IOWR(BOARD_IOCTL_MAGIC, 18, BOARD_IOCTL_PARMS)
6461 +
6462 +#define BOARD_IOCTL_GET_NUM_ENET \
6463 +    _IOWR(BOARD_IOCTL_MAGIC, 19, BOARD_IOCTL_PARMS)
6464 +
6465 +#define BOARD_IOCTL_GET_CFE_VER \
6466 +    _IOWR(BOARD_IOCTL_MAGIC, 20, BOARD_IOCTL_PARMS)
6467 +
6468 +#define BOARD_IOCTL_GET_ENET_CFG \
6469 +    _IOWR(BOARD_IOCTL_MAGIC, 21, BOARD_IOCTL_PARMS)
6470 +
6471 +#define BOARD_IOCTL_GET_WLAN_ANT_INUSE \
6472 +    _IOWR(BOARD_IOCTL_MAGIC, 22, BOARD_IOCTL_PARMS)
6473 +
6474 +#define BOARD_IOCTL_SET_TRIGGER_EVENT \
6475 +    _IOWR(BOARD_IOCTL_MAGIC, 23, BOARD_IOCTL_PARMS)
6476 +
6477 +#define BOARD_IOCTL_GET_TRIGGER_EVENT \
6478 +    _IOWR(BOARD_IOCTL_MAGIC, 24, BOARD_IOCTL_PARMS)
6479 +
6480 +#define BOARD_IOCTL_UNSET_TRIGGER_EVENT \
6481 +    _IOWR(BOARD_IOCTL_MAGIC, 25, BOARD_IOCTL_PARMS)
6482 +
6483 +#define BOARD_IOCTL_SET_SES_LED \
6484 +    _IOWR(BOARD_IOCTL_MAGIC, 26, BOARD_IOCTL_PARMS)
6485 +
6486 +//<<JUNHON, 2004/09/15, get reset button status , tim hou , 05/04/12
6487 +#define RESET_BUTTON_UP           1
6488 +#define RESET_BUTTON_PRESSDOWN    0
6489 +#define BOARD_IOCTL_GET_RESETHOLD \
6490 +    _IOWR(BOARD_IOCTL_MAGIC, 27, BOARD_IOCTL_PARMS)
6491 +//>>JUNHON, 2004/09/15
6492 +
6493 +// for the action in BOARD_IOCTL_PARMS for flash operation
6494 +typedef enum
6495 +{
6496 +    PERSISTENT,
6497 +    NVRAM,
6498 +    BCM_IMAGE_CFE,
6499 +    BCM_IMAGE_FS,
6500 +    BCM_IMAGE_KERNEL,
6501 +    BCM_IMAGE_WHOLE,
6502 +    SCRATCH_PAD,
6503 +    FLASH_SIZE,
6504 +} BOARD_IOCTL_ACTION;
6505 +
6506 +
6507 +typedef struct boardIoctParms
6508 +{
6509 +    char *string;
6510 +    char *buf;
6511 +    int strLen;
6512 +    int offset;
6513 +    BOARD_IOCTL_ACTION  action;        /* flash read/write: nvram, persistent, bcm image */
6514 +    int result;
6515 +} BOARD_IOCTL_PARMS;
6516 +
6517 +
6518 +// LED defines
6519 +typedef enum
6520 +{
6521 +    kLedAdsl,
6522 +    kLedWireless,
6523 +    kLedUsb,
6524 +    kLedHpna,
6525 +    kLedWanData,
6526 +    kLedPPP,
6527 +    kLedVoip,
6528 +    kLedSes,
6529 +    kLedLan,
6530 +    kLedSelfTest,
6531 +    kLedEnd,                // NOTE: Insert the new led name before this one.  Alway stay at the end.
6532 +} BOARD_LED_NAME;
6533 +
6534 +typedef enum
6535 +{
6536 +    kLedStateOff,                        /* turn led off */
6537 +    kLedStateOn,                         /* turn led on */
6538 +    kLedStateFail,                       /* turn led on red */
6539 +    kLedStateBlinkOnce,                  /* blink once, ~100ms and ignore the same call during the 100ms period */
6540 +    kLedStateSlowBlinkContinues,         /* slow blink continues at ~600ms interval */
6541 +    kLedStateFastBlinkContinues,         /* fast blink continues at ~200ms interval */
6542 +} BOARD_LED_STATE;
6543 +
6544 +
6545 +// virtual and physical map pair defined in board.c
6546 +typedef struct ledmappair
6547 +{
6548 +    BOARD_LED_NAME ledName;         // virtual led name
6549 +    BOARD_LED_STATE ledInitState;   // initial led state when the board boots.
6550 +    unsigned short ledMask;         // physical GPIO pin mask
6551 +    unsigned short ledActiveLow;    // reset bit to turn on LED
6552 +    unsigned short ledMaskFail;     // physical GPIO pin mask for state failure
6553 +    unsigned short ledActiveLowFail;// reset bit to turn on LED
6554 +} LED_MAP_PAIR, *PLED_MAP_PAIR;
6555 +
6556 +typedef void (*HANDLE_LED_FUNC)(BOARD_LED_NAME ledName, BOARD_LED_STATE ledState);
6557 +
6558 +/* Flash storage address information that is determined by the flash driver. */
6559 +typedef struct flashaddrinfo
6560 +{
6561 +    int flash_persistent_start_blk;
6562 +    int flash_persistent_number_blk;
6563 +    int flash_persistent_length;
6564 +    unsigned long flash_persistent_blk_offset;
6565 +    int flash_scratch_pad_start_blk;         // start before psi (SP_BUF_LEN)
6566 +    int flash_scratch_pad_number_blk;
6567 +    int flash_scratch_pad_length;
6568 +    unsigned long flash_scratch_pad_blk_offset;
6569 +    int flash_nvram_start_blk;
6570 +    int flash_nvram_number_blk;
6571 +    int flash_nvram_length;
6572 +    unsigned long flash_nvram_blk_offset;
6573 +} FLASH_ADDR_INFO, *PFLASH_ADDR_INFO;
6574 +
6575 +// scratch pad defines
6576 +/* SP - Persisten Scratch Pad format:
6577 +       sp header        : 32 bytes
6578 +       tokenId-1        : 8 bytes
6579 +       tokenId-1 len    : 4 bytes
6580 +       tokenId-1 data
6581 +       ....
6582 +       tokenId-n        : 8 bytes
6583 +       tokenId-n len    : 4 bytes
6584 +       tokenId-n data
6585 +*/
6586 +
6587 +#define MAGIC_NUM_LEN       8
6588 +#define MAGIC_NUMBER        "gOGoBrCm"
6589 +#define TOKEN_NAME_LEN      16
6590 +#define SP_VERSION          1
6591 +#define SP_MAX_LEN          8 * 1024            // 8k buf before psi
6592 +#define SP_RESERVERD        16
6593 +
6594 +typedef struct _SP_HEADER
6595 +{
6596 +    char SPMagicNum[MAGIC_NUM_LEN];             // 8 bytes of magic number
6597 +    int SPVersion;                              // version number
6598 +    int SPUsedLen;                              // used sp len
6599 +    char SPReserved[SP_RESERVERD];              // reservied, total 32 bytes
6600 +} SP_HEADER, *PSP_HEADER;
6601 +
6602 +typedef struct _TOKEN_DEF
6603 +{
6604 +    char tokenName[TOKEN_NAME_LEN];
6605 +    int tokenLen;
6606 +} SP_TOKEN, *PSP_TOKEN;
6607 +
6608 +
6609 +/*****************************************************************************/
6610 +/*          Function Prototypes                                              */
6611 +/*****************************************************************************/
6612 +#if !defined(__ASM_ASM_H)
6613 +void dumpaddr( unsigned char *pAddr, int nLen );
6614 +
6615 +int kerSysNvRamGet(char *string, int strLen, int offset);
6616 +int kerSysNvRamSet(char *string, int strLen, int offset);
6617 +int kerSysPersistentGet(char *string, int strLen, int offset);
6618 +int kerSysPersistentSet(char *string, int strLen, int offset);
6619 +int kerSysScratchPadGet(char *tokName, char *tokBuf, int tokLen);
6620 +int kerSysScratchPadSet(char *tokName, char *tokBuf, int tokLen);
6621 +int kerSysBcmImageSet( int flash_start_addr, char *string, int size);
6622 +int kerSysGetMacAddress( unsigned char *pucaAddr, unsigned long ulId );
6623 +int kerSysReleaseMacAddress( unsigned char *pucaAddr );
6624 +int kerSysGetSdramSize( void );
6625 +void kerSysGetBootline(char *string, int strLen);
6626 +void kerSysSetBootline(char *string, int strLen);
6627 +void kerSysMipsSoftReset(void);
6628 +void kerSysLedCtrl(BOARD_LED_NAME, BOARD_LED_STATE);
6629 +void kerSysLedRegisterHwHandler( BOARD_LED_NAME, HANDLE_LED_FUNC, int );
6630 +int kerSysFlashSizeGet(void);
6631 +void kerSysRegisterDyingGaspHandler(char *devname, void *cbfn, void *context);
6632 +void kerSysDeregisterDyingGaspHandler(char *devname);
6633 +void kerSysWakeupMonitorTask( void );
6634 +#endif
6635 +
6636 +#define BOOT_CFE     0
6637 +#define BOOT_REDBOOT 1
6638 +
6639 +extern int boot_loader_type;
6640 +
6641 +#endif /* _BOARD_H */
6642 +
6643 diff -urN linux-2.6.19/arch/mips/bcm963xx/int-handler.S linux-2.6.19.new/arch/mips/bcm963xx/int-handler.S
6644 --- linux-2.6.19/arch/mips/bcm963xx/int-handler.S       1970-01-01 01:00:00.000000000 +0100
6645 +++ linux-2.6.19.new/arch/mips/bcm963xx/int-handler.S   2006-12-16 18:46:31.000000000 +0100
6646 @@ -0,0 +1,59 @@
6647 +/*
6648 +<:copyright-gpl
6649 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6650 +
6651 + This program is free software; you can distribute it and/or modify it
6652 + under the terms of the GNU General Public License (Version 2) as
6653 + published by the Free Software Foundation.
6654 +
6655 + This program is distributed in the hope it will be useful, but WITHOUT
6656 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6657 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
6658 + for more details.
6659 +
6660 + You should have received a copy of the GNU General Public License along
6661 + with this program; if not, write to the Free Software Foundation, Inc.,
6662 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6663 +:>
6664 +*/
6665 +/*
6666 + * Generic interrupt handler for Broadcom MIPS boards
6667 + */
6668 +
6669 +#include <linux/autoconf.h>
6670 +
6671 +#include <asm/asm.h>
6672 +#include <asm/mipsregs.h>
6673 +#include <asm/regdef.h>
6674 +#include <asm/stackframe.h>
6675 +
6676 +/*
6677 + *     MIPS IRQ        Source
6678 + *      --------        ------
6679 + *             0       Software (ignored)
6680 + *             1        Software (ignored)
6681 + *             2        Combined hardware interrupt (hw0)
6682 + *             3        Hardware
6683 + *             4        Hardware
6684 + *             5        Hardware
6685 + *             6        Hardware
6686 + *             7        R4k timer
6687 + */
6688 +
6689 +       .text
6690 +       .set    noreorder
6691 +       .set    noat
6692 +       .align  5
6693 +       NESTED(brcmIRQ, PT_SIZE, sp)
6694 +       SAVE_ALL
6695 +       CLI
6696 +       .set    noreorder
6697 +       .set    at
6698 +
6699 +       jal             plat_irq_dispatch
6700 +       move    a0, sp
6701 +
6702 +       j       ret_from_irq
6703 +       nop
6704 +
6705 +       END(brcmIRQ)
6706 diff -urN linux-2.6.19/arch/mips/bcm963xx/irq.c linux-2.6.19.new/arch/mips/bcm963xx/irq.c
6707 --- linux-2.6.19/arch/mips/bcm963xx/irq.c       1970-01-01 01:00:00.000000000 +0100
6708 +++ linux-2.6.19.new/arch/mips/bcm963xx/irq.c   2006-12-16 18:46:31.000000000 +0100
6709 @@ -0,0 +1,256 @@
6710 +/*
6711 +<:copyright-gpl
6712 + Copyright 2002 Broadcom Corp. All Rights Reserved.
6713 +
6714 + This program is free software; you can distribute it and/or modify it
6715 + under the terms of the GNU General Public License (Version 2) as
6716 + published by the Free Software Foundation.
6717 +
6718 + This program is distributed in the hope it will be useful, but WITHOUT
6719 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6720 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
6721 + for more details.
6722 +
6723 + You should have received a copy of the GNU General Public License along
6724 + with this program; if not, write to the Free Software Foundation, Inc.,
6725 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6726 +:>
6727 +*/
6728 +/*
6729 + * Interrupt control functions for Broadcom 963xx MIPS boards
6730 + */
6731 +
6732 +#include <asm/atomic.h>
6733 +
6734 +#include <linux/delay.h>
6735 +#include <linux/init.h>
6736 +#include <linux/ioport.h>
6737 +#include <linux/irq.h>
6738 +#include <linux/interrupt.h>
6739 +#include <linux/kernel.h>
6740 +#include <linux/slab.h>
6741 +#include <linux/module.h>
6742 +
6743 +#include <asm/irq.h>
6744 +#include <asm/mipsregs.h>
6745 +#include <asm/addrspace.h>
6746 +#include <asm/signal.h>
6747 +#include <bcm_map_part.h>
6748 +#include <bcm_intr.h>
6749 +
6750 +static void irq_dispatch_int(struct pt_regs *regs)
6751 +{
6752 +       unsigned int pendingIrqs;
6753 +       static unsigned int irqBit;
6754 +       static unsigned int isrNumber = 31;
6755 +
6756 +       pendingIrqs = PERF->IrqStatus & PERF->IrqMask;
6757 +       if (!pendingIrqs) {
6758 +               return;
6759 +       }
6760 +
6761 +       while (1) {
6762 +       irqBit <<= 1;
6763 +       isrNumber++;
6764 +       if (isrNumber == 32) {
6765 +               isrNumber = 0;
6766 +               irqBit = 0x1;
6767 +       }
6768 +       if (pendingIrqs & irqBit) {
6769 +                       PERF->IrqMask &= ~irqBit; // mask
6770 +                       do_IRQ(isrNumber + INTERNAL_ISR_TABLE_OFFSET);
6771 +               break;
6772 +       }
6773 +       }
6774 +}
6775 +
6776 +static void irq_dispatch_ext(uint32 irq)
6777 +{
6778 +       if (!(PERF->ExtIrqCfg & (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT)))) {
6779 +       printk("**** Ext IRQ mask. Should not dispatch ****\n");
6780 +       }
6781 +       /* disable and clear interrupt in the controller */
6782 +       PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
6783 +       PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
6784 +       do_IRQ(irq);
6785 +}
6786 +
6787 +
6788 +extern void brcm_timer_interrupt(struct pt_regs *regs);
6789 +
6790 +asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
6791 +{
6792 +       u32 cause;
6793 +       while((cause = (read_c0_cause()& CAUSEF_IP))) {
6794 +               if (cause & CAUSEF_IP7)
6795 +                       brcm_timer_interrupt(regs);
6796 +               else if (cause & CAUSEF_IP2)
6797 +                       irq_dispatch_int(regs);
6798 +               else if (cause & CAUSEF_IP3)
6799 +                       irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_0);
6800 +               else if (cause & CAUSEF_IP4)
6801 +                       irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_1);
6802 +               else if (cause & CAUSEF_IP5)
6803 +                       irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_2);
6804 +               else if (cause & CAUSEF_IP6)
6805 +                       irq_dispatch_ext(INTERRUPT_ID_EXTERNAL_3);
6806 +               local_irq_disable();
6807 +       }
6808 +}
6809 +
6810 +
6811 +void enable_brcm_irq(unsigned int irq)
6812 +{
6813 +       unsigned long flags;
6814 +
6815 +       local_irq_save(flags);
6816 +       if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
6817 +       PERF->IrqMask |= (1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
6818 +       }
6819 +       else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
6820 +       /* enable and clear interrupt in the controller */
6821 +       PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));
6822 +       PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
6823 +       }
6824 +       local_irq_restore(flags);
6825 +}
6826 +
6827 +void disable_brcm_irq(unsigned int irq)
6828 +{
6829 +       unsigned long flags;
6830 +
6831 +       local_irq_save(flags);
6832 +       if( irq >= INTERNAL_ISR_TABLE_OFFSET ) {
6833 +       PERF->IrqMask &= ~(1 << (irq - INTERNAL_ISR_TABLE_OFFSET));
6834 +       }
6835 +       else if (irq >= INTERRUPT_ID_EXTERNAL_0 && irq <= INTERRUPT_ID_EXTERNAL_3) {
6836 +       /* disable interrupt in the controller */
6837 +       PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));
6838 +       }
6839 +       local_irq_restore(flags);
6840 +}
6841 +
6842 +void ack_brcm_irq(unsigned int irq)
6843 +{
6844 +       /* Already done in brcm_irq_dispatch */
6845 +}
6846 +
6847 +unsigned int startup_brcm_irq(unsigned int irq)
6848 +{
6849 +       enable_brcm_irq(irq);
6850 +
6851 +       return 0; /* never anything pending */
6852 +}
6853 +
6854 +unsigned int startup_brcm_none(unsigned int irq)
6855 +{
6856 +       return 0;
6857 +}
6858 +
6859 +void end_brcm_irq(unsigned int irq)
6860 +{
6861 +       if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
6862 +               enable_brcm_irq(irq);
6863 +}
6864 +
6865 +void end_brcm_none(unsigned int irq)
6866 +{
6867 +}
6868 +
6869 +static struct hw_interrupt_type brcm_irq_type = {
6870 +       .typename       = "MIPS",
6871 +       .startup        = startup_brcm_irq,
6872 +       .shutdown       = disable_brcm_irq,
6873 +       .enable = enable_brcm_irq,
6874 +       .disable        = disable_brcm_irq,
6875 +       .ack    = ack_brcm_irq,
6876 +       .end    = end_brcm_irq,
6877 +       .set_affinity = NULL
6878 +};
6879 +
6880 +static struct hw_interrupt_type brcm_irq_no_end_type = {
6881 +       .typename       = "MIPS",
6882 +       .startup        = startup_brcm_none,
6883 +       .shutdown       = disable_brcm_irq,
6884 +       .enable = enable_brcm_irq,
6885 +       .disable        = disable_brcm_irq,
6886 +       .ack    = ack_brcm_irq,
6887 +       .end    = end_brcm_none,
6888 +       .set_affinity = NULL
6889 +};
6890 +
6891 +void __init arch_init_irq(void)
6892 +{
6893 +       int i;
6894 +
6895 +       clear_c0_status(ST0_BEV);
6896 +       change_c0_status(ST0_IM, (IE_IRQ0 | IE_IRQ1 | IE_IRQ2 | IE_IRQ3 | IE_IRQ4));
6897 +
6898 +       for (i = 0; i < NR_IRQS; i++) {
6899 +               irq_desc[i].status = IRQ_DISABLED;
6900 +               irq_desc[i].action = 0;
6901 +               irq_desc[i].depth = 1;
6902 +               irq_desc[i].chip = &brcm_irq_type;
6903 +       }
6904 +}
6905 +
6906 +int request_external_irq(unsigned int irq,
6907 +       FN_HANDLER handler,
6908 +               unsigned long irqflags,
6909 +               const char * devname,
6910 +               void *dev_id)
6911 +{
6912 +       unsigned long flags;
6913 +
6914 +       local_irq_save(flags);
6915 +
6916 +       PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_CLEAR_SHFT));      // Clear
6917 +       PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_MASK_SHFT));      // Mask
6918 +       PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_INSENS_SHFT));    // Edge insesnsitive
6919 +       PERF->ExtIrqCfg |= (1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_LEVEL_SHFT));      // Level triggered
6920 +       PERF->ExtIrqCfg &= ~(1 << (irq - INTERRUPT_ID_EXTERNAL_0 + EI_SENSE_SHFT));     // Low level
6921 +
6922 +       local_irq_restore(flags);
6923 +
6924 +       return( request_irq(irq, handler, irqflags, devname, dev_id) );
6925 +}
6926 +
6927 +/* VxWorks compatibility function(s). */
6928 +
6929 +unsigned int BcmHalMapInterrupt(FN_HANDLER pfunc, unsigned int param,
6930 +       unsigned int interruptId)
6931 +{
6932 +       int nRet = -1;
6933 +       char *devname;
6934 +
6935 +       devname = kmalloc(16, GFP_KERNEL);
6936 +       if (devname)
6937 +               sprintf( devname, "brcm_%d", interruptId );
6938 +
6939 +       /* Set the IRQ description to not automatically enable the interrupt at
6940 +        * the end of an ISR.  The driver that handles the interrupt must
6941 +        * explicitly call BcmHalInterruptEnable or enable_brcm_irq.  This behavior
6942 +        * is consistent with interrupt handling on VxWorks.
6943 +        */
6944 +       irq_desc[interruptId].chip = &brcm_irq_no_end_type;
6945 +
6946 +       if( interruptId >= INTERNAL_ISR_TABLE_OFFSET )
6947 +       {
6948 +               nRet = request_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
6949 +                       devname, (void *) param );
6950 +       }
6951 +       else if (interruptId >= INTERRUPT_ID_EXTERNAL_0 && interruptId <= INTERRUPT_ID_EXTERNAL_3)
6952 +       {
6953 +               nRet = request_external_irq( interruptId, pfunc, SA_SAMPLE_RANDOM | SA_INTERRUPT,
6954 +                       devname, (void *) param );
6955 +       }
6956 +
6957 +       return( nRet );
6958 +}
6959 +
6960 +
6961 +EXPORT_SYMBOL(enable_brcm_irq);
6962 +EXPORT_SYMBOL(disable_brcm_irq);
6963 +EXPORT_SYMBOL(request_external_irq);
6964 +EXPORT_SYMBOL(BcmHalMapInterrupt);
6965 +
6966 diff -urN linux-2.6.19/arch/mips/bcm963xx/prom.c linux-2.6.19.new/arch/mips/bcm963xx/prom.c
6967 --- linux-2.6.19/arch/mips/bcm963xx/prom.c      1970-01-01 01:00:00.000000000 +0100
6968 +++ linux-2.6.19.new/arch/mips/bcm963xx/prom.c  2006-12-16 18:46:31.000000000 +0100
6969 @@ -0,0 +1,143 @@
6970 +/*
6971 +<:copyright-gpl
6972 + Copyright 2004 Broadcom Corp. All Rights Reserved.
6973 +
6974 + This program is free software; you can distribute it and/or modify it
6975 + under the terms of the GNU General Public License (Version 2) as
6976 + published by the Free Software Foundation.
6977 +
6978 + This program is distributed in the hope it will be useful, but WITHOUT
6979 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6980 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
6981 + for more details.
6982 +
6983 + You should have received a copy of the GNU General Public License along
6984 + with this program; if not, write to the Free Software Foundation, Inc.,
6985 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
6986 +:>
6987 +*/
6988 +/*
6989 + * prom.c: PROM library initialization code.
6990 + *
6991 + */
6992 +#include <linux/init.h>
6993 +#include <linux/mm.h>
6994 +#include <linux/sched.h>
6995 +#include <linux/bootmem.h>
6996 +#include <linux/blkdev.h>
6997 +#include <asm/addrspace.h>
6998 +#include <asm/bootinfo.h>
6999 +#include <asm/cpu.h>
7000 +#include <asm/time.h>
7001 +
7002 +#include <bcm_map_part.h>
7003 +#include <board.h>
7004 +#include "boardparms.h"
7005 +#include "softdsl/AdslCoreDefs.h"
7006 +
7007 +
7008 +//char arcs_cmdline[CL_SIZE] __initdata = {0};
7009 +/* inv_xde */
7010 +int boot_loader_type;
7011 +int prom_argc;
7012 +char **prom_argv, **prom_envp;
7013 +
7014 +extern int  do_syslog(int, char *, int);
7015 +extern void serial_init(void);
7016 +extern void __init InitNvramInfo( void );
7017 +extern void kerSysFlashInit( void );
7018 +extern unsigned long get_nvram_start_addr(void);
7019 +void __init create_root_nfs_cmdline( char *cmdline );
7020 +
7021 +#define MACH_BCM                    MACH_BCM96348
7022 +
7023 +const char *get_system_type(void)
7024 +{
7025 +    /*PNVRAM_DATA pNvramData = (PNVRAM_DATA) get_nvram_start_addr();
7026 +
7027 +    return( pNvramData->szBoardId );*/
7028 +    return "brcm63xx";
7029 +}
7030 +
7031 +unsigned long getMemorySize(void)
7032 +{
7033 +    unsigned long ulSdramType = BOARD_SDRAM_TYPE;
7034 +
7035 +    unsigned long ulSdramSize;
7036 +
7037 +    switch( ulSdramType )
7038 +    {
7039 +    case BP_MEMORY_16MB_1_CHIP:
7040 +    case BP_MEMORY_16MB_2_CHIP:
7041 +        ulSdramSize = 16 * 1024 * 1024;
7042 +        break;
7043 +    case BP_MEMORY_32MB_1_CHIP:
7044 +    case BP_MEMORY_32MB_2_CHIP:
7045 +        ulSdramSize = 32 * 1024 * 1024;
7046 +        break;
7047 +    case BP_MEMORY_64MB_2_CHIP:
7048 +        ulSdramSize = 64 * 1024 * 1024;
7049 +        break;
7050 +    default:
7051 +        ulSdramSize = 8 * 1024 * 1024;
7052 +        break;
7053 +    }
7054 +    if (boot_loader_type == BOOT_CFE)
7055 +      return ulSdramSize;
7056 +    else
7057 +      // assume that there is one contiguous memory map
7058 +      return boot_mem_map.map[0].size;
7059 +}
7060 +
7061 +/* --------------------------------------------------------------------------
7062 +    Name: prom_init
7063 + -------------------------------------------------------------------------- */
7064 +void __init prom_init(void)
7065 +{
7066 +    extern ulong r4k_interval;
7067 +
7068 +    serial_init();
7069 +
7070 +    prom_argc = fw_arg0;
7071 +    prom_argv = (char **) fw_arg1;
7072 +    prom_envp = (char **) fw_arg2;
7073 +
7074 +    if ((prom_argv > 0x80000000) && (prom_argv < 0x82000000)) {
7075 +      strncpy(arcs_cmdline, prom_argv[1], CL_SIZE);
7076 +    }
7077 +
7078 +    if (strncmp(arcs_cmdline, "boot_loader=RedBoot", 19) != 0) {
7079 +      boot_loader_type =  BOOT_CFE;
7080 +    }
7081 +    else {
7082 +      boot_loader_type = BOOT_REDBOOT;
7083 +    }
7084 +
7085 +    do_syslog(8, NULL, 8);
7086 +
7087 +    printk( "%s prom init\n", get_system_type() );
7088 +
7089 +    PERF->IrqMask = 0;
7090 +
7091 +    arcs_cmdline[0] = '\0';
7092 +
7093 +       if (boot_loader_type == BOOT_CFE)
7094 +      add_memory_region(0, (getMemorySize() - ADSL_SDRAM_IMAGE_SIZE), BOOT_MEM_RAM);
7095 +    else
7096 +       add_memory_region(0, (0x01000000 - ADSL_SDRAM_IMAGE_SIZE), BOOT_MEM_RAM);
7097 +
7098 +    mips_machgroup = MACH_GROUP_BRCM;
7099 +    mips_machtype = MACH_BCM;
7100 +
7101 +       BpSetBoardId("96348GW-10");
7102 +}
7103 +
7104 +/* --------------------------------------------------------------------------
7105 +    Name: prom_free_prom_memory
7106 +Abstract:
7107 + -------------------------------------------------------------------------- */
7108 +void __init prom_free_prom_memory(void)
7109 +{
7110 +
7111 +}
7112 +
7113 diff -urN linux-2.6.19/arch/mips/bcm963xx/ser_init.c linux-2.6.19.new/arch/mips/bcm963xx/ser_init.c
7114 --- linux-2.6.19/arch/mips/bcm963xx/ser_init.c  1970-01-01 01:00:00.000000000 +0100
7115 +++ linux-2.6.19.new/arch/mips/bcm963xx/ser_init.c      2006-12-16 18:46:31.000000000 +0100
7116 @@ -0,0 +1,180 @@
7117 +/*
7118 +<:copyright-gpl
7119 + Copyright 2004 Broadcom Corp. All Rights Reserved.
7120 +
7121 + This program is free software; you can distribute it and/or modify it
7122 + under the terms of the GNU General Public License (Version 2) as
7123 + published by the Free Software Foundation.
7124 +
7125 + This program is distributed in the hope it will be useful, but WITHOUT
7126 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
7127 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
7128 + for more details.
7129 +
7130 + You should have received a copy of the GNU General Public License along
7131 + with this program; if not, write to the Free Software Foundation, Inc.,
7132 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
7133 +:>
7134 +*/
7135 +/*
7136 + *  Broadcom bcm63xx serial port initialization, also prepare for printk
7137 + *  by registering with console_init
7138 + *
7139 + */
7140 +
7141 +#include <linux/autoconf.h>
7142 +#include <linux/init.h>
7143 +#include <linux/interrupt.h>
7144 +#include <linux/kernel.h>
7145 +#include <linux/types.h>
7146 +#include <linux/console.h>
7147 +#include <linux/sched.h>
7148 +
7149 +#include <asm/addrspace.h>
7150 +#include <asm/irq.h>
7151 +#include <asm/reboot.h>
7152 +#include <asm/gdb-stub.h>
7153 +#include <asm/mc146818rtc.h>
7154 +
7155 +#include <bcm_map_part.h>
7156 +#include <board.h>
7157 +
7158 +#define  SER63XX_DEFAULT_BAUD      115200
7159 +#define BD_BCM63XX_TIMER_CLOCK_INPUT    (FPERIPH)
7160 +#define stUart ((volatile Uart * const) UART_BASE)
7161 +
7162 +// Transmit interrupts
7163 +#define TXINT       (TXFIFOEMT | TXUNDERR | TXOVFERR)
7164 +// Receive interrupts
7165 +#define RXINT       (RXFIFONE | RXOVFERR)
7166 +
7167 +/* --------------------------------------------------------------------------
7168 +    Name: serial_init
7169 + Purpose: Initalize the UART
7170 +-------------------------------------------------------------------------- */
7171 +void __init serial_init(void)
7172 +{
7173 +    UINT32 tmpVal = SER63XX_DEFAULT_BAUD;
7174 +    ULONG clockFreqHz;
7175 +
7176 +#if defined(CONFIG_BCM96345)
7177 +    // Make sure clock is ticking
7178 +    PERF->blkEnables |= UART_CLK_EN;
7179 +#endif
7180 +
7181 +    /* Dissable channel's receiver and transmitter.                */
7182 +    stUart->control &= ~(BRGEN|TXEN|RXEN);
7183 +
7184 +    /*--------------------------------------------------------------------*/
7185 +    /* Write the table value to the clock select register.                */
7186 +    /* DPullen - this is the equation to use:                             */
7187 +    /*       value = clockFreqHz / baud / 32-1;                           */
7188 +    /*   (snmod) Actually you should also take into account any necessary */
7189 +    /*           rounding.  Divide by 16, look at lsb, if 0, divide by 2  */
7190 +    /*           and subtract 1.  If 1, just divide by 2                  */
7191 +    /*--------------------------------------------------------------------*/
7192 +    clockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
7193 +    tmpVal = (clockFreqHz / tmpVal) / 16;
7194 +    if( tmpVal & 0x01 )
7195 +        tmpVal /= 2;  //Rounding up, so sub is already accounted for
7196 +    else
7197 +        tmpVal = (tmpVal / 2) - 1; // Rounding down so we must sub 1
7198 +    stUart->baudword = tmpVal;
7199 +
7200 +    /* Finally, re-enable the transmitter and receiver.            */
7201 +    stUart->control |= (BRGEN|TXEN|RXEN);
7202 +
7203 +    stUart->config   = (BITS8SYM | ONESTOP);
7204 +    // Set the FIFO interrupt depth ... stUart->fifocfg  = 0xAA;
7205 +    stUart->fifoctl  =  RSTTXFIFOS | RSTRXFIFOS;
7206 +    stUart->intMask  = 0;
7207 +    stUart->intMask = RXINT | TXINT;
7208 +}
7209 +
7210 +
7211 +/* prom_putc()
7212 + * Output a character to the UART
7213 + */
7214 +void prom_putc(char c)
7215 +{
7216 +       /* Wait for Tx uffer to empty */
7217 +       while (! (READ16(stUart->intStatus) & TXFIFOEMT));
7218 +       /* Send character */
7219 +       stUart->Data = c;
7220 +}
7221 +
7222 +/* prom_puts()
7223 + * Write a string to the UART
7224 + */
7225 +void prom_puts(const char *s)
7226 +{
7227 +       while (*s) {
7228 +               if (*s == '\n') {
7229 +                       prom_putc('\r');
7230 +               }
7231 +               prom_putc(*s++);
7232 +       }
7233 +}
7234 +
7235 +
7236 +/* prom_getc_nowait()
7237 + * Returns a character from the UART
7238 + * Returns -1 if no characters available or corrupted
7239 + */
7240 +int prom_getc_nowait(void)
7241 +{
7242 +    uint16  uStatus;
7243 +    int    cData = -1;
7244 +
7245 +     uStatus = READ16(stUart->intStatus);
7246 +
7247 +     if (uStatus & RXFIFONE) { /* Do we have a character? */
7248 +           cData =  READ16(stUart->Data) & 0xff; /* Read character */
7249 +           if (uStatus & (RXFRAMERR | RXPARERR)) {  /* If we got an error, throw it away */
7250 +               cData = -1;
7251 +           }
7252 +  }
7253 +
7254 +   return cData;
7255 +}
7256 +
7257 +/* prom_getc()
7258 + * Returns a charcter from the serial port
7259 + * Will block until it receives a valid character
7260 +*/
7261 +char prom_getc(void)
7262 +{
7263 +    int    cData = -1;
7264 +
7265 +    /* Loop until we get a valid character */
7266 +    while(cData == -1) {
7267 +       cData = prom_getc_nowait();
7268 +    }
7269 +   return (char) cData;
7270 +}
7271 +
7272 +/* prom_testc()
7273 + * Returns 0 if no characters available
7274 + */
7275 +int prom_testc(void)
7276 +{
7277 +    uint16  uStatus;
7278 +
7279 +     uStatus = READ16(stUart->intStatus);
7280 +
7281 +     return (uStatus & RXFIFONE);
7282 +}
7283 +
7284 +#if defined (CONFIG_REMOTE_DEBUG)
7285 +/* Prevent other code from writing to the serial port */
7286 +void _putc(char c) { }
7287 +void _puts(const char *ptr) { }
7288 +#else
7289 +/* Low level outputs call prom routines */
7290 +void _putc(char c) {
7291 +       prom_putc(c);
7292 +}
7293 +void _puts(const char *ptr) {
7294 +       prom_puts(ptr);
7295 +}
7296 +#endif
7297 diff -urN linux-2.6.19/arch/mips/bcm963xx/setup.c linux-2.6.19.new/arch/mips/bcm963xx/setup.c
7298 --- linux-2.6.19/arch/mips/bcm963xx/setup.c     1970-01-01 01:00:00.000000000 +0100
7299 +++ linux-2.6.19.new/arch/mips/bcm963xx/setup.c 2006-12-16 18:46:31.000000000 +0100
7300 @@ -0,0 +1,523 @@
7301 +/*
7302 +<:copyright-gpl
7303 + Copyright 2002 Broadcom Corp. All Rights Reserved.
7304 +
7305 + This program is free software; you can distribute it and/or modify it
7306 + under the terms of the GNU General Public License (Version 2) as
7307 + published by the Free Software Foundation.
7308 +
7309 + This program is distributed in the hope it will be useful, but WITHOUT
7310 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
7311 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
7312 + for more details.
7313 +
7314 + You should have received a copy of the GNU General Public License along
7315 + with this program; if not, write to the Free Software Foundation, Inc.,
7316 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
7317 +:>
7318 +*/
7319 +/*
7320 + * Generic setup routines for Broadcom 963xx MIPS boards
7321 + */
7322 +
7323 +#include <linux/autoconf.h>
7324 +#include <linux/init.h>
7325 +#include <linux/interrupt.h>
7326 +#include <linux/kernel.h>
7327 +#include <linux/kdev_t.h>
7328 +#include <linux/types.h>
7329 +#include <linux/console.h>
7330 +#include <linux/sched.h>
7331 +#include <linux/mm.h>
7332 +#include <linux/slab.h>
7333 +#include <linux/module.h>
7334 +#include <linux/pm.h>
7335 +
7336 +#include <asm/addrspace.h>
7337 +#include <asm/bcache.h>
7338 +#include <asm/irq.h>
7339 +#include <asm/time.h>
7340 +#include <asm/reboot.h>
7341 +#include <asm/gdb-stub.h>
7342 +
7343 +extern void brcm_time_init(void);
7344 +extern unsigned long getMemorySize(void);
7345 +
7346 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
7347 +#include <linux/pci.h>
7348 +#include <linux/delay.h>
7349 +#include <bcm_map_part.h>
7350 +#include <bcmpci.h>
7351 +
7352 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
7353 +#endif
7354 +
7355 +/* This function should be in a board specific directory.  For now,
7356 + * assume that all boards that include this file use a Broadcom chip
7357 + * with a soft reset bit in the PLL control register.
7358 + */
7359 +static void brcm_machine_restart(char *command)
7360 +{
7361 +    const unsigned long ulSoftReset = 0x00000001;
7362 +    unsigned long *pulPllCtrl = (unsigned long *) 0xfffe0008;
7363 +    *pulPllCtrl |= ulSoftReset;
7364 +}
7365 +
7366 +static void brcm_machine_halt(void)
7367 +{
7368 +    printk("System halted\n");
7369 +    while (1);
7370 +}
7371 +
7372 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
7373 +
7374 +static void mpi_SetLocalPciConfigReg(uint32 reg, uint32 value)
7375 +{
7376 +    /* write index then value */
7377 +    mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
7378 +    mpi->pcicfgdata = value;
7379 +}
7380 +
7381 +static uint32 mpi_GetLocalPciConfigReg(uint32 reg)
7382 +{
7383 +    /* write index then get value */
7384 +    mpi->pcicfgcntrl = PCI_CFG_REG_WRITE_EN + reg;;
7385 +    return mpi->pcicfgdata;
7386 +}
7387 +
7388 +/*
7389 + * mpi_ResetPcCard: Set/Reset the PcCard
7390 + */
7391 +static void mpi_ResetPcCard(int cardtype, BOOL bReset)
7392 +{
7393 +    if (cardtype == MPI_CARDTYPE_NONE) {
7394 +        return;
7395 +    }
7396 +
7397 +    if (cardtype == MPI_CARDTYPE_CARDBUS) {
7398 +        bReset = ! bReset;
7399 +    }
7400 +
7401 +    if (bReset) {
7402 +        mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
7403 +    } else {
7404 +        mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 | PCCARD_CARD_RESET);
7405 +    }
7406 +}
7407 +
7408 +/*
7409 + * mpi_ConfigCs: Configure an MPI/EBI chip select
7410 + */
7411 +static void mpi_ConfigCs(uint32 cs, uint32 base, uint32 size, uint32 flags)
7412 +{
7413 +    mpi->cs[cs].base = ((base & 0x1FFFFFFF) | size);
7414 +    mpi->cs[cs].config = flags;
7415 +}
7416 +
7417 +/*
7418 + * mpi_InitPcmciaSpace
7419 + */
7420 +static void mpi_InitPcmciaSpace(void)
7421 +{
7422 +    // ChipSelect 4 controls PCMCIA Memory accesses
7423 +    mpi_ConfigCs(PCMCIA_COMMON_BASE, pcmciaMem, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
7424 +    // ChipSelect 5 controls PCMCIA Attribute accesses
7425 +    mpi_ConfigCs(PCMCIA_ATTRIBUTE_BASE, pcmciaAttr, EBI_SIZE_1M, (EBI_WORD_WIDE|EBI_ENABLE));
7426 +    // ChipSelect 6 controls PCMCIA I/O accesses
7427 +    mpi_ConfigCs(PCMCIA_IO_BASE, pcmciaIo, EBI_SIZE_64K, (EBI_WORD_WIDE|EBI_ENABLE));
7428 +
7429 +    mpi->pcmcia_cntl2 = ((PCMCIA_ATTR_ACTIVE << RW_ACTIVE_CNT_BIT) |
7430 +                         (PCMCIA_ATTR_INACTIVE << INACTIVE_CNT_BIT) |
7431 +                         (PCMCIA_ATTR_CE_SETUP << CE_SETUP_CNT_BIT) |
7432 +                         (PCMCIA_ATTR_CE_HOLD << CE_HOLD_CNT_BIT));
7433 +
7434 +    mpi->pcmcia_cntl2 |= (PCMCIA_HALFWORD_EN | PCMCIA_BYTESWAP_DIS);
7435 +}
7436 +
7437 +/*
7438 + * cardtype_vcc_detect: PC Card's card detect and voltage sense connection
7439 + *
7440 + *   CD1#/      CD2#/     VS1#/     VS2#/    Card       Initial Vcc
7441 + *  CCD1#      CCD2#     CVS1      CVS2      Type
7442 + *
7443 + *   GND        GND       open      open     16-bit     5 vdc
7444 + *
7445 + *   GND        GND       GND       open     16-bit     3.3 vdc
7446 + *
7447 + *   GND        GND       open      GND      16-bit     x.x vdc
7448 + *
7449 + *   GND        GND       GND       GND      16-bit     3.3 & x.x vdc
7450 + *
7451 + *====================================================================
7452 + *
7453 + *   CVS1       GND       CCD1#     open     CardBus    3.3 vdc
7454 + *
7455 + *   GND        CVS2      open      CCD2#    CardBus    x.x vdc
7456 + *
7457 + *   GND        CVS1      CCD2#     open     CardBus    y.y vdc
7458 + *
7459 + *   GND        CVS2      GND       CCD2#    CardBus    3.3 & x.x vdc
7460 + *
7461 + *   CVS2       GND       open      CCD1#    CardBus    x.x & y.y vdc
7462 + *
7463 + *   GND        CVS1      CCD2#     open     CardBus    3.3, x.x & y.y vdc
7464 + *
7465 + */
7466 +static int cardtype_vcc_detect(void)
7467 +{
7468 +    uint32 data32;
7469 +    int cardtype;
7470 +
7471 +    cardtype = MPI_CARDTYPE_NONE;
7472 +    mpi->pcmcia_cntl1 = 0x0000A000; // Turn on the output enables and drive
7473 +                                        // the CVS pins to 0.
7474 +    data32 = mpi->pcmcia_cntl1;
7475 +    switch (data32 & 0x00000003)  // Test CD1# and CD2#, see if card is plugged in.
7476 +    {
7477 +    case 0x00000003:  // No Card is in the slot.
7478 +        printk("mpi: No Card is in the PCMCIA slot\n");
7479 +        break;
7480 +
7481 +    case 0x00000002:  // Partial insertion, No CD2#.
7482 +        printk("mpi: Card in the PCMCIA slot partial insertion, no CD2 signal\n");
7483 +        break;
7484 +
7485 +    case 0x00000001:  // Partial insertion, No CD1#.
7486 +        printk("mpi: Card in the PCMCIA slot partial insertion, no CD1 signal\n");
7487 +        break;
7488 +
7489 +    case 0x00000000:
7490 +        mpi->pcmcia_cntl1 = 0x0000A0C0; // Turn off the CVS output enables and
7491 +                                        // float the CVS pins.
7492 +        mdelay(1);
7493 +        data32 = mpi->pcmcia_cntl1;
7494 +        // Read the Register.
7495 +        switch (data32 & 0x0000000C)  // See what is on the CVS pins.
7496 +        {
7497 +        case 0x00000000: // CVS1 and CVS2 are tied to ground, only 1 option.
7498 +            printk("mpi: Detected 3.3 & x.x 16-bit PCMCIA card\n");
7499 +            cardtype = MPI_CARDTYPE_PCMCIA;
7500 +            break;
7501 +
7502 +        case 0x00000004: // CVS1 is open or tied to CCD1/CCD2 and CVS2 is tied to ground.
7503 +                         // 2 valid voltage options.
7504 +        switch (data32 & 0x00000003)  // Test the values of CCD1 and CCD2.
7505 +        {
7506 +            case 0x00000003:  // CCD1 and CCD2 are tied to 1 of the CVS pins.
7507 +                              // This is not a valid combination.
7508 +                printk("mpi: Unknown card plugged into slot\n");
7509 +                break;
7510 +
7511 +            case 0x00000002:  // CCD2 is tied to either CVS1 or CVS2.
7512 +                mpi->pcmcia_cntl1 = 0x0000A080; // Drive CVS1 to a 0.
7513 +                mdelay(1);
7514 +                data32 = mpi->pcmcia_cntl1;
7515 +                if (data32 & 0x00000002) { // CCD2 is tied to CVS2, not valid.
7516 +                    printk("mpi: Unknown card plugged into slot\n");
7517 +                } else {                   // CCD2 is tied to CVS1.
7518 +                    printk("mpi: Detected 3.3, x.x and y.y Cardbus card\n");
7519 +                    cardtype = MPI_CARDTYPE_CARDBUS;
7520 +                }
7521 +                break;
7522 +
7523 +            case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
7524 +                             // This is not a valid combination.
7525 +                printk("mpi: Unknown card plugged into slot\n");
7526 +                break;
7527 +
7528 +            case 0x00000000:  // CCD1 and CCD2 are tied to ground.
7529 +                printk("mpi: Detected x.x vdc 16-bit PCMCIA card\n");
7530 +                cardtype = MPI_CARDTYPE_PCMCIA;
7531 +                break;
7532 +            }
7533 +            break;
7534 +
7535 +        case 0x00000008: // CVS2 is open or tied to CCD1/CCD2 and CVS1 is tied to ground.
7536 +                         // 2 valid voltage options.
7537 +            switch (data32 & 0x00000003)  // Test the values of CCD1 and CCD2.
7538 +            {
7539 +            case 0x00000003:  // CCD1 and CCD2 are tied to 1 of the CVS pins.
7540 +                              // This is not a valid combination.
7541 +                printk("mpi: Unknown card plugged into slot\n");
7542 +                break;
7543 +
7544 +            case 0x00000002:  // CCD2 is tied to either CVS1 or CVS2.
7545 +                mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
7546 +                mdelay(1);
7547 +                data32 = mpi->pcmcia_cntl1;
7548 +                if (data32 & 0x00000002) { // CCD2 is tied to CVS1, not valid.
7549 +                    printk("mpi: Unknown card plugged into slot\n");
7550 +                } else {// CCD2 is tied to CVS2.
7551 +                    printk("mpi: Detected 3.3 and x.x Cardbus card\n");
7552 +                    cardtype = MPI_CARDTYPE_CARDBUS;
7553 +                }
7554 +                break;
7555 +
7556 +            case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
7557 +                             // This is not a valid combination.
7558 +                printk("mpi: Unknown card plugged into slot\n");
7559 +                break;
7560 +
7561 +            case 0x00000000:  // CCD1 and CCD2 are tied to ground.
7562 +                cardtype = MPI_CARDTYPE_PCMCIA;
7563 +                printk("mpi: Detected 3.3 vdc 16-bit PCMCIA card\n");
7564 +                break;
7565 +            }
7566 +            break;
7567 +
7568 +        case 0x0000000C:  // CVS1 and CVS2 are open or tied to CCD1/CCD2.
7569 +                          // 5 valid voltage options.
7570 +
7571 +            switch (data32 & 0x00000003)  // Test the values of CCD1 and CCD2.
7572 +            {
7573 +            case 0x00000003:  // CCD1 and CCD2 are tied to 1 of the CVS pins.
7574 +                              // This is not a valid combination.
7575 +                printk("mpi: Unknown card plugged into slot\n");
7576 +                break;
7577 +
7578 +            case 0x00000002:  // CCD2 is tied to either CVS1 or CVS2.
7579 +                              // CCD1 is tied to ground.
7580 +                mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
7581 +                mdelay(1);
7582 +                data32 = mpi->pcmcia_cntl1;
7583 +                if (data32 & 0x00000002) {  // CCD2 is tied to CVS1.
7584 +                    printk("mpi: Detected y.y vdc Cardbus card\n");
7585 +                } else {                    // CCD2 is tied to CVS2.
7586 +                    printk("mpi: Detected x.x vdc Cardbus card\n");
7587 +                }
7588 +                cardtype = MPI_CARDTYPE_CARDBUS;
7589 +                break;
7590 +
7591 +            case 0x00000001: // CCD1 is tied to either CVS1 or CVS2.
7592 +                             // CCD2 is tied to ground.
7593 +
7594 +                mpi->pcmcia_cntl1 = 0x0000A040; // Drive CVS2 to a 0.
7595 +                mdelay(1);
7596 +                data32 = mpi->pcmcia_cntl1;
7597 +                if (data32 & 0x00000001) {// CCD1 is tied to CVS1.
7598 +                    printk("mpi: Detected 3.3 vdc Cardbus card\n");
7599 +                } else {                    // CCD1 is tied to CVS2.
7600 +                    printk("mpi: Detected x.x and y.y Cardbus card\n");
7601 +                }
7602 +                cardtype = MPI_CARDTYPE_CARDBUS;
7603 +                break;
7604 +
7605 +            case 0x00000000:  // CCD1 and CCD2 are tied to ground.
7606 +                cardtype = MPI_CARDTYPE_PCMCIA;
7607 +                printk("mpi: Detected 5 vdc 16-bit PCMCIA card\n");
7608 +                break;
7609 +            }
7610 +            break;
7611 +
7612 +        default:
7613 +            printk("mpi: Unknown card plugged into slot\n");
7614 +            break;
7615 +
7616 +        }
7617 +    }
7618 +    return cardtype;
7619 +}
7620 +
7621 +/*
7622 + * mpi_DetectPcCard: Detect the plugged in PC-Card
7623 + * Return: < 0 => Unknown card detected
7624 + *         0 => No card detected
7625 + *         1 => 16-bit card detected
7626 + *         2 => 32-bit CardBus card detected
7627 + */
7628 +static int mpi_DetectPcCard(void)
7629 +{
7630 +    int cardtype;
7631 +
7632 +    cardtype = cardtype_vcc_detect();
7633 +    switch(cardtype) {
7634 +        case MPI_CARDTYPE_PCMCIA:
7635 +            mpi->pcmcia_cntl1 &= ~0x0000e000; // disable enable bits
7636 +            //mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & ~PCCARD_CARD_RESET);
7637 +            mpi->pcmcia_cntl1 |= (PCMCIA_ENABLE | PCMCIA_GPIO_ENABLE);
7638 +            mpi_InitPcmciaSpace();
7639 +            mpi_ResetPcCard(cardtype, FALSE);
7640 +            // Hold card in reset for 10ms
7641 +            mdelay(10);
7642 +            mpi_ResetPcCard(cardtype, TRUE);
7643 +            // Let card come out of reset
7644 +            mdelay(100);
7645 +            break;
7646 +        case MPI_CARDTYPE_CARDBUS:
7647 +            // 8 => CardBus Enable
7648 +            // 1 => PCI Slot Number
7649 +            // C => Float VS1 & VS2
7650 +            mpi->pcmcia_cntl1 = (mpi->pcmcia_cntl1 & 0xFFFF0000) |
7651 +                                CARDBUS_ENABLE |
7652 +                                (CARDBUS_SLOT << 8)|
7653 +                                VS2_OEN |
7654 +                                VS1_OEN;
7655 +            /* access to this memory window will be to/from CardBus */
7656 +            mpi->l2pmremap1 |= CARDBUS_MEM;
7657 +
7658 +            // Need to reset the Cardbus Card. There's no CardManager to do this,
7659 +            // and we need to be ready for PCI configuration.
7660 +            mpi_ResetPcCard(cardtype, FALSE);
7661 +            // Hold card in reset for 10ms
7662 +            mdelay(10);
7663 +            mpi_ResetPcCard(cardtype, TRUE);
7664 +            // Let card come out of reset
7665 +            mdelay(100);
7666 +            break;
7667 +        default:
7668 +            break;
7669 +    }
7670 +    return cardtype;
7671 +}
7672 +
7673 +static int mpi_init(void)
7674 +{
7675 +    unsigned long data;
7676 +    unsigned int chipid;
7677 +    unsigned int chiprev;
7678 +    unsigned int sdramsize;
7679 +
7680 +    chipid  = (PERF->RevID & 0xFFFF0000) >> 16;
7681 +    chiprev = (PERF->RevID & 0xFF);
7682 +    sdramsize = getMemorySize();
7683 +    /*
7684 +     * Init the pci interface
7685 +     */
7686 +    data = GPIO->GPIOMode; // GPIO mode register
7687 +    data |= GROUP2_PCI | GROUP1_MII_PCCARD; // PCI internal arbiter + Cardbus
7688 +    GPIO->GPIOMode = data; // PCI internal arbiter
7689 +
7690 +    /*
7691 +     * In the BCM6348 CardBus support is defaulted to Slot 0
7692 +     * because there is no external IDSEL for CardBus.  To disable
7693 +     * the CardBus and allow a standard PCI card in Slot 0
7694 +     * set the cbus_idsel field to 0x1f.
7695 +    */
7696 +    /*
7697 +    uData = mpi->pcmcia_cntl1;
7698 +    uData |= CARDBUS_IDSEL;
7699 +    mpi->pcmcia_cntl1 = uData;
7700 +    */
7701 +    // Setup PCI I/O Window range. Give 64K to PCI I/O
7702 +    mpi->l2piorange = ~(BCM_PCI_IO_SIZE_64KB-1);
7703 +    // UBUS to PCI I/O base address
7704 +    mpi->l2piobase = BCM_PCI_IO_BASE & BCM_PCI_ADDR_MASK;
7705 +    // UBUS to PCI I/O Window remap
7706 +    mpi->l2pioremap = (BCM_PCI_IO_BASE | MEM_WINDOW_EN);
7707 +
7708 +    // enable PCI related GPIO pins and data swap between system and PCI bus
7709 +    mpi->locbuscntrl = (EN_PCI_GPIO | DIR_U2P_NOSWAP);
7710 +
7711 +    /* Enable 6348 BusMaster and Memory access mode */
7712 +    data = mpi_GetLocalPciConfigReg(PCI_COMMAND);
7713 +    data |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
7714 +    mpi_SetLocalPciConfigReg(PCI_COMMAND, data);
7715 +
7716 +    /* Configure two 16 MByte PCI to System memory regions. */
7717 +    /* These memory regions are used when PCI device is a bus master */
7718 +    /* Accesses to the SDRAM from PCI bus will be "byte swapped" for this region */
7719 +    mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_3, BCM_HOST_MEM_SPACE1);
7720 +    mpi->sp0remap = 0x0;
7721 +
7722 +    /* Accesses to the SDRAM from PCI bus will not be "byte swapped" for this region */
7723 +    mpi_SetLocalPciConfigReg(PCI_BASE_ADDRESS_4, BCM_HOST_MEM_SPACE2);
7724 +    mpi->sp1remap = 0x0;
7725 +    mpi->pcimodesel |= (PCI_BAR2_NOSWAP | 0x40);
7726 +
7727 +    if ((chipid == 0x6348) && (chiprev == 0xb0)) {
7728 +        mpi->sp0range = ~(sdramsize-1);
7729 +        mpi->sp1range = ~(sdramsize-1);
7730 +    }
7731 +    /*
7732 +     * Change 6348 PCI Cfg Reg. offset 0x40 to PCI memory read retry count infinity
7733 +     * by set 0 in bit 8~15.  This resolve read Bcm4306 srom return 0xffff in
7734 +     * first read.
7735 +     */
7736 +    data = mpi_GetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER);
7737 +    data &= ~BRCM_PCI_CONFIG_TIMER_RETRY_MASK;
7738 +    data |= 0x00000080;
7739 +    mpi_SetLocalPciConfigReg(BRCM_PCI_CONFIG_TIMER, data);
7740 +
7741 +    /* enable pci interrupt */
7742 +    mpi->locintstat |= (EXT_PCI_INT << 16);
7743 +
7744 +    mpi_DetectPcCard();
7745 +
7746 +    ioport_resource.start = BCM_PCI_IO_BASE;
7747 +    ioport_resource.end = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB;
7748 +
7749 +#if defined(CONFIG_USB)
7750 +    PERF->blkEnables |= USBH_CLK_EN;
7751 +    mdelay(100);
7752 +    *USBH_NON_OHCI = NON_OHCI_BYTE_SWAP;
7753 +#endif
7754 +
7755 +    return 0;
7756 +}
7757 +#endif
7758 +
7759 +static int __init brcm63xx_setup(void)
7760 +{
7761 +    extern int panic_timeout;
7762 +
7763 +    _machine_restart = brcm_machine_restart;
7764 +    _machine_halt = brcm_machine_halt;
7765 +    pm_power_off = brcm_machine_halt;
7766 +
7767 +    board_time_init = brcm_time_init;
7768 +
7769 +    panic_timeout = 5;
7770 +
7771 +#if defined(CONFIG_BCM96348) && defined(CONFIG_PCI)
7772 +    /* mpi initialization */
7773 +    mpi_init();
7774 +#endif
7775 +    return 0;
7776 +}
7777 +
7778 +void __init plat_mem_setup(void)
7779 +{
7780 +    brcm63xx_setup();
7781 +}
7782 +
7783 +/***************************************************************************
7784 + * C++ New and delete operator functions
7785 + ***************************************************************************/
7786 +
7787 +/* void *operator new(unsigned int sz) */
7788 +void *_Znwj(unsigned int sz)
7789 +{
7790 +    return( kmalloc(sz, GFP_KERNEL) );
7791 +}
7792 +
7793 +/* void *operator new[](unsigned int sz)*/
7794 +void *_Znaj(unsigned int sz)
7795 +{
7796 +    return( kmalloc(sz, GFP_KERNEL) );
7797 +}
7798 +
7799 +/* placement new operator */
7800 +/* void *operator new (unsigned int size, void *ptr) */
7801 +void *ZnwjPv(unsigned int size, void *ptr)
7802 +{
7803 +    return ptr;
7804 +}
7805 +
7806 +/* void operator delete(void *m) */
7807 +void _ZdlPv(void *m)
7808 +{
7809 +    kfree(m);
7810 +}
7811 +
7812 +/* void operator delete[](void *m) */
7813 +void _ZdaPv(void *m)
7814 +{
7815 +    kfree(m);
7816 +}
7817 +
7818 +EXPORT_SYMBOL(_Znwj);
7819 +EXPORT_SYMBOL(_Znaj);
7820 +EXPORT_SYMBOL(ZnwjPv);
7821 +EXPORT_SYMBOL(_ZdlPv);
7822 +EXPORT_SYMBOL(_ZdaPv);
7823 +
7824 diff -urN linux-2.6.19/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h linux-2.6.19.new/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h
7825 --- linux-2.6.19/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h      1970-01-01 01:00:00.000000000 +0100
7826 +++ linux-2.6.19.new/arch/mips/bcm963xx/softdsl/AdslCoreDefs.h  2006-12-16 18:46:31.000000000 +0100
7827 @@ -0,0 +1,2 @@
7828 +#define ADSL_SDRAM_IMAGE_SIZE (384*1024)
7829 +
7830 diff -urN linux-2.6.19/arch/mips/bcm963xx/time.c linux-2.6.19.new/arch/mips/bcm963xx/time.c
7831 --- linux-2.6.19/arch/mips/bcm963xx/time.c      1970-01-01 01:00:00.000000000 +0100
7832 +++ linux-2.6.19.new/arch/mips/bcm963xx/time.c  2006-12-16 18:46:31.000000000 +0100
7833 @@ -0,0 +1,114 @@
7834 +/*
7835 +<:copyright-gpl
7836 + Copyright 2004 Broadcom Corp. All Rights Reserved.
7837 +
7838 + This program is free software; you can distribute it and/or modify it
7839 + under the terms of the GNU General Public License (Version 2) as
7840 + published by the Free Software Foundation.
7841 +
7842 + This program is distributed in the hope it will be useful, but WITHOUT
7843 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
7844 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
7845 + for more details.
7846 +
7847 + You should have received a copy of the GNU General Public License along
7848 + with this program; if not, write to the Free Software Foundation, Inc.,
7849 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
7850 +:>
7851 +*/
7852 +/*
7853 + * Setup time for Broadcom 963xx MIPS boards
7854 + */
7855 +
7856 +#include <linux/autoconf.h>
7857 +#include <linux/init.h>
7858 +#include <linux/kernel_stat.h>
7859 +#include <linux/sched.h>
7860 +#include <linux/spinlock.h>
7861 +#include <linux/interrupt.h>
7862 +#include <linux/module.h>
7863 +#include <linux/time.h>
7864 +#include <linux/timex.h>
7865 +
7866 +#include <asm/mipsregs.h>
7867 +#include <asm/ptrace.h>
7868 +#include <asm/div64.h>
7869 +#include <asm/time.h>
7870 +
7871 +#include <bcm_map_part.h>
7872 +#include <bcm_intr.h>
7873 +
7874 +static unsigned long r4k_offset;       /* Amount to increment compare reg each time */
7875 +static unsigned long r4k_cur;          /* What counter should be at next timer irq */
7876 +
7877 +/*  *********************************************************************
7878 +    *  calculateCpuSpeed()
7879 +    *      Calculate the BCM6348 CPU speed by reading the PLL strap register
7880 +    *      and applying the following formula:
7881 +    *      cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
7882 +    *  Input parameters:
7883 +    *      none
7884 +    *  Return value:
7885 +    *      none
7886 +    ********************************************************************* */
7887 +
7888 +static inline unsigned long __init calculateCpuSpeed(void)
7889 +{
7890 +    UINT32 pllStrap = PERF->PllStrap;
7891 +    int n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
7892 +    int n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
7893 +    int m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
7894 +
7895 +       return (16 * (n1 + 1) * (n2 + 2) / (m1cpu + 1)) * 1000000;
7896 +}
7897 +
7898 +
7899 +static inline unsigned long __init cal_r4koff(void)
7900 +{
7901 +       mips_hpt_frequency = calculateCpuSpeed() / 2;
7902 +       return (mips_hpt_frequency / HZ);
7903 +}
7904 +
7905 +
7906 +/*
7907 + * There are a lot of conceptually broken versions of the MIPS timer interrupt
7908 + * handler floating around.  This one is rather different, but the algorithm
7909 + * is provably more robust.
7910 + */
7911 +irqreturn_t brcm_timer_interrupt(struct pt_regs *regs)
7912 +{
7913 +       int irq = MIPS_TIMER_INT;
7914 +
7915 +       irq_enter();
7916 +       kstat_this_cpu.irqs[irq]++;
7917 +
7918 +       timer_interrupt(irq, regs);
7919 +       irq_exit();
7920 +       return IRQ_HANDLED;
7921 +}
7922 +
7923 +
7924 +void __init brcm_time_init(void)
7925 +{
7926 +       unsigned int est_freq, flags;
7927 +       local_irq_save(flags);
7928 +
7929 +       printk("calculating r4koff... ");
7930 +       r4k_offset = cal_r4koff();
7931 +       printk("%08lx(%d)\n", r4k_offset, (int)r4k_offset);
7932 +
7933 +       est_freq = 2 * r4k_offset * HZ;
7934 +       est_freq += 5000;   /* round */
7935 +       est_freq -= est_freq % 10000;
7936 +       printk("CPU frequency %d.%02d MHz\n", est_freq / 1000000,
7937 +                  (est_freq % 1000000) * 100 / 1000000);
7938 +       local_irq_restore(flags);
7939 +}
7940 +
7941 +
7942 +void __init plat_timer_setup(struct irqaction *irq)
7943 +{
7944 +       r4k_cur = (read_c0_count() + r4k_offset);
7945 +       write_c0_compare(r4k_cur);
7946 +       set_c0_status(IE_IRQ5);
7947 +}
7948 diff -urN linux-2.6.19/arch/mips/kernel/cpu-probe.c linux-2.6.19.new/arch/mips/kernel/cpu-probe.c
7949 --- linux-2.6.19/arch/mips/kernel/cpu-probe.c   2006-11-29 22:57:37.000000000 +0100
7950 +++ linux-2.6.19.new/arch/mips/kernel/cpu-probe.c       2006-12-16 18:46:31.000000000 +0100
7951 @@ -602,6 +602,25 @@
7952                 return;
7953  }
7954
7955 +static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
7956 +{
7957 +       decode_configs(c);
7958 +       switch (c->processor_id & 0xff00) {
7959 +       case PRID_IMP_BCM6338:
7960 +               c->cputype = CPU_BCM6338;
7961 +               break;
7962 +       case PRID_IMP_BCM6345:
7963 +               c->cputype = CPU_BCM6345;
7964 +               break;
7965 +       case PRID_IMP_BCM6348:
7966 +               c->cputype = CPU_BCM6348;
7967 +               break;
7968 +       default:
7969 +               c->cputype = CPU_UNKNOWN;
7970 +               break;
7971 +       }
7972 +}
7973 +
7974  static inline void cpu_probe_mips(struct cpuinfo_mips *c)
7975  {
7976         decode_configs(c);
7977 @@ -736,6 +755,9 @@
7978         case PRID_COMP_LEGACY:
7979                 cpu_probe_legacy(c);
7980                 break;
7981 +        case PRID_COMP_BROADCOM:
7982 +                cpu_probe_broadcom(c);
7983 +                break;
7984         case PRID_COMP_MIPS:
7985                 cpu_probe_mips(c);
7986                 break;
7987 diff -urN linux-2.6.19/arch/mips/kernel/proc.c linux-2.6.19.new/arch/mips/kernel/proc.c
7988 --- linux-2.6.19/arch/mips/kernel/proc.c        2006-11-29 22:57:37.000000000 +0100
7989 +++ linux-2.6.19.new/arch/mips/kernel/proc.c    2006-12-16 18:46:31.000000000 +0100
7990 @@ -84,6 +84,9 @@
7991         [CPU_VR4181A]   = "NEC VR4181A",
7992         [CPU_SR71000]   = "Sandcraft SR71000",
7993         [CPU_PR4450]    = "Philips PR4450",
7994 +       [CPU_BCM6338]   = "BCM6338",
7995 +       [CPU_BCM6345]   = "BCM6345",
7996 +       [CPU_BCM6348]   = "BCM6348",
7997  };
7998
7999
8000 diff -urN linux-2.6.19/arch/mips/mm/c-r4k.c linux-2.6.19.new/arch/mips/mm/c-r4k.c
8001 --- linux-2.6.19/arch/mips/mm/c-r4k.c   2006-11-29 22:57:37.000000000 +0100
8002 +++ linux-2.6.19.new/arch/mips/mm/c-r4k.c       2006-12-16 18:46:31.000000000 +0100
8003 @@ -852,6 +852,13 @@
8004                 if (!(config & MIPS_CONF_M))
8005                         panic("Don't know how to probe P-caches on this cpu.");
8006
8007 +               if (c->cputype == CPU_BCM6338 || c->cputype == CPU_BCM6345 || c->cputype == CPU_BCM6348)
8008 +               {
8009 +                       printk("brcm mips: enabling icache and dcache...\n");
8010 +                       /* Enable caches */
8011 +                       write_c0_diag(read_c0_diag() | 0xC0000000);
8012 +               }
8013 +
8014                 /*
8015                  * So we seem to be a MIPS32 or MIPS64 CPU
8016                  * So let's probe the I-cache ...
8017 diff -urN linux-2.6.19/arch/mips/mm/tlbex.c linux-2.6.19.new/arch/mips/mm/tlbex.c
8018 --- linux-2.6.19/arch/mips/mm/tlbex.c   2006-11-29 22:57:37.000000000 +0100
8019 +++ linux-2.6.19.new/arch/mips/mm/tlbex.c       2006-12-16 18:46:31.000000000 +0100
8020 @@ -880,6 +880,9 @@
8021         case CPU_4KSC:
8022         case CPU_20KC:
8023         case CPU_25KF:
8024 +       case CPU_BCM6338:
8025 +       case CPU_BCM6345:
8026 +       case CPU_BCM6348:
8027                 tlbw(p);
8028                 break;
8029
8030 diff -urN linux-2.6.19/arch/mips/pci/Makefile linux-2.6.19.new/arch/mips/pci/Makefile
8031 --- linux-2.6.19/arch/mips/pci/Makefile 2006-11-29 22:57:37.000000000 +0100
8032 +++ linux-2.6.19.new/arch/mips/pci/Makefile     2006-12-16 18:48:18.000000000 +0100
8033 @@ -17,6 +17,7 @@
8034  obj-$(CONFIG_PCI_VR41XX)       += ops-vr41xx.o pci-vr41xx.o
8035  obj-$(CONFIG_NEC_CMBVR4133)    += fixup-vr4133.o
8036  obj-$(CONFIG_MARKEINS)         += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o
8037 +obj-$(CONFIG_BCM_PCI)          += fixup-bcm96348.o pci-bcm96348.o ops-bcm96348.o
8038
8039  #
8040  # These are still pretty much in the old state, watch, go blind.
8041 diff -urN linux-2.6.19/arch/mips/pci/fixup-bcm96348.c linux-2.6.19.new/arch/mips/pci/fixup-bcm96348.c
8042 --- linux-2.6.19/arch/mips/pci/fixup-bcm96348.c 1970-01-01 01:00:00.000000000 +0100
8043 +++ linux-2.6.19.new/arch/mips/pci/fixup-bcm96348.c     2006-12-16 18:46:31.000000000 +0100
8044 @@ -0,0 +1,93 @@
8045 +/*
8046 +<:copyright-gpl
8047 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8048 +
8049 + This program is free software; you can distribute it and/or modify it
8050 + under the terms of the GNU General Public License (Version 2) as
8051 + published by the Free Software Foundation.
8052 +
8053 + This program is distributed in the hope it will be useful, but WITHOUT
8054 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8055 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
8056 + for more details.
8057 +
8058 + You should have received a copy of the GNU General Public License along
8059 + with this program; if not, write to the Free Software Foundation, Inc.,
8060 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8061 +:>
8062 +*/
8063 +#include <linux/init.h>
8064 +#include <linux/types.h>
8065 +#include <linux/pci.h>
8066 +
8067 +#include <bcmpci.h>
8068 +#include <bcm_intr.h>
8069 +#include <bcm_map_part.h>
8070 +
8071 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
8072 +
8073 +static char irq_tab_bcm96348[] __initdata = {
8074 +    [0] = INTERRUPT_ID_MPI,
8075 +    [1] = INTERRUPT_ID_MPI,
8076 +#if defined(CONFIG_USB)
8077 +    [USB_HOST_SLOT] = INTERRUPT_ID_USBH
8078 +#endif
8079 +};
8080 +
8081 +int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
8082 +{
8083 +    return irq_tab_bcm96348[slot];
8084 +}
8085 +
8086 +static void bcm96348_fixup(struct pci_dev *dev)
8087 +{
8088 +    uint32 memaddr;
8089 +    uint32 size;
8090 +
8091 +    memaddr = pci_resource_start(dev, 0);
8092 +    size = pci_resource_len(dev, 0);
8093 +
8094 +    switch (PCI_SLOT(dev->devfn)) {
8095 +        case 0:
8096 +            // UBUS to PCI address range
8097 +            // Memory Window 1. Mask determines which bits are decoded.
8098 +            mpi->l2pmrange1 = ~(size-1);
8099 +            // UBUS to PCI Memory base address. This is akin to the ChipSelect base
8100 +            // register.
8101 +            mpi->l2pmbase1 = memaddr & BCM_PCI_ADDR_MASK;
8102 +            // UBUS to PCI Remap Address. Replaces the masked address bits in the
8103 +            // range register with this setting.
8104 +            // Also, enable direct I/O and direct Memory accesses
8105 +            mpi->l2pmremap1 = (memaddr | MEM_WINDOW_EN);
8106 +            break;
8107 +
8108 +        case 1:
8109 +            // Memory Window 2
8110 +            mpi->l2pmrange2 = ~(size-1);
8111 +            // UBUS to PCI Memory base address.
8112 +            mpi->l2pmbase2 = memaddr & BCM_PCI_ADDR_MASK;
8113 +            // UBUS to PCI Remap Address
8114 +            mpi->l2pmremap2 = (memaddr | MEM_WINDOW_EN);
8115 +            break;
8116 +
8117 +#if defined(CONFIG_USB)
8118 +        case USB_HOST_SLOT:
8119 +            dev->resource[0].start = USB_HOST_BASE;
8120 +            dev->resource[0].end = USB_HOST_BASE+USB_BAR0_MEM_SIZE-1;
8121 +            break;
8122 +#endif
8123 +    }
8124 +}
8125 +
8126 +int pcibios_plat_dev_init(struct pci_dev *dev)
8127 +{
8128 +        return 0;
8129 +}
8130 +
8131 +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_BROADCOM, PCI_ANY_ID,
8132 +          bcm96348_fixup);
8133 +
8134 +/*struct pci_fixup pcibios_fixups[] = {
8135 +    { PCI_FIXUP_FINAL, PCI_ANY_ID, PCI_ANY_ID, bcm96348_fixup },
8136 +    {0}
8137 +};*/
8138 diff -urN linux-2.6.19/arch/mips/pci/ops-bcm96348.c linux-2.6.19.new/arch/mips/pci/ops-bcm96348.c
8139 --- linux-2.6.19/arch/mips/pci/ops-bcm96348.c   1970-01-01 01:00:00.000000000 +0100
8140 +++ linux-2.6.19.new/arch/mips/pci/ops-bcm96348.c       2006-12-16 18:46:31.000000000 +0100
8141 @@ -0,0 +1,276 @@
8142 +/*
8143 +<:copyright-gpl
8144 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8145 +
8146 + This program is free software; you can distribute it and/or modify it
8147 + under the terms of the GNU General Public License (Version 2) as
8148 + published by the Free Software Foundation.
8149 +
8150 + This program is distributed in the hope it will be useful, but WITHOUT
8151 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8152 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
8153 + for more details.
8154 +
8155 + You should have received a copy of the GNU General Public License along
8156 + with this program; if not, write to the Free Software Foundation, Inc.,
8157 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8158 +:>
8159 +*/
8160 +#include <linux/types.h>
8161 +#include <linux/pci.h>
8162 +#include <linux/kernel.h>
8163 +#include <linux/init.h>
8164 +#include <asm/addrspace.h>
8165 +
8166 +#include <bcm_intr.h>
8167 +#include <bcm_map_part.h>
8168 +#include <bcmpci.h>
8169 +
8170 +#include <linux/delay.h>
8171 +
8172 +#if defined(CONFIG_USB)
8173 +#if 0
8174 +#define DPRINT(x...)        printk(x)
8175 +#else
8176 +#define DPRINT(x...)
8177 +#endif
8178 +
8179 +static int
8180 +pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size);
8181 +static int
8182 +pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size);
8183 +
8184 +static bool usb_mem_size_rd = FALSE;
8185 +static uint32 usb_mem_base = 0;
8186 +static uint32 usb_cfg_space_cmd_reg = 0;
8187 +#endif
8188 +static bool pci_mem_size_rd = FALSE;
8189 +
8190 +static volatile MpiRegisters * mpi = (MpiRegisters *)(MPI_BASE);
8191 +
8192 +static void mpi_SetupPciConfigAccess(uint32 addr)
8193 +{
8194 +    mpi->l2pcfgctl = (DIR_CFG_SEL | DIR_CFG_USEREG | addr) & ~CONFIG_TYPE;
8195 +}
8196 +
8197 +static void mpi_ClearPciConfigAccess(void)
8198 +{
8199 +    mpi->l2pcfgctl = 0x00000000;
8200 +}
8201 +
8202 +#if defined(CONFIG_USB)
8203 +/* --------------------------------------------------------------------------
8204 +    Name: pci63xx_int_write
8205 +Abstract: PCI Config write on internal device(s)
8206 + -------------------------------------------------------------------------- */
8207 +static int
8208 +pci63xx_int_write(unsigned int devfn, int where, u32 * value, int size)
8209 +{
8210 +    if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
8211 +        return PCIBIOS_SUCCESSFUL;
8212 +    }
8213 +
8214 +    switch (size) {
8215 +        case 1:
8216 +            DPRINT("W => Slot: %d Where: %2X Len: %d Data: %02X\n",
8217 +                PCI_SLOT(devfn), where, size, *value);
8218 +            break;
8219 +        case 2:
8220 +            DPRINT("W => Slot: %d Where: %2X Len: %d Data: %04X\n",
8221 +                PCI_SLOT(devfn), where, size, *value);
8222 +            switch (where) {
8223 +                case PCI_COMMAND:
8224 +                    usb_cfg_space_cmd_reg = *value;
8225 +                    break;
8226 +                default:
8227 +                    break;
8228 +            }
8229 +            break;
8230 +        case 4:
8231 +            DPRINT("W => Slot: %d Where: %2X Len: %d Data: %08lX\n",
8232 +                PCI_SLOT(devfn), where, size, *value);
8233 +            switch (where) {
8234 +                case PCI_BASE_ADDRESS_0:
8235 +                    if (*value == 0xffffffff) {
8236 +                        usb_mem_size_rd = TRUE;
8237 +                    } else {
8238 +                        usb_mem_base = *value;
8239 +                    }
8240 +                    break;
8241 +                default:
8242 +                    break;
8243 +            }
8244 +            break;
8245 +        default:
8246 +            break;
8247 +    }
8248 +
8249 +    return PCIBIOS_SUCCESSFUL;
8250 +}
8251 +
8252 +/* --------------------------------------------------------------------------
8253 +    Name: pci63xx_int_read
8254 +Abstract: PCI Config read on internal device(s)
8255 + -------------------------------------------------------------------------- */
8256 +static int
8257 +pci63xx_int_read(unsigned int devfn, int where, u32 * value, int size)
8258 +{
8259 +    uint32 retValue = 0xFFFFFFFF;
8260 +
8261 +    if (PCI_SLOT(devfn) != USB_HOST_SLOT) {
8262 +        return PCIBIOS_SUCCESSFUL;
8263 +    }
8264 +
8265 +    // For now, this is specific to the USB Host controller. We can
8266 +    // make it more general if we have to...
8267 +    // Emulate PCI Config accesses
8268 +    switch (where) {
8269 +        case PCI_VENDOR_ID:
8270 +        case PCI_DEVICE_ID:
8271 +            retValue = PCI_VENDOR_ID_BROADCOM | 0x63000000;
8272 +            break;
8273 +        case PCI_COMMAND:
8274 +        case PCI_STATUS:
8275 +            retValue = (0x0006 << 16) | usb_cfg_space_cmd_reg;
8276 +            break;
8277 +        case PCI_CLASS_REVISION:
8278 +        case PCI_CLASS_DEVICE:
8279 +            retValue = (PCI_CLASS_SERIAL_USB << 16) | (0x10 << 8) | 0x01;
8280 +            break;
8281 +        case PCI_BASE_ADDRESS_0:
8282 +            if (usb_mem_size_rd) {
8283 +                retValue = USB_BAR0_MEM_SIZE;
8284 +            } else {
8285 +                if (usb_mem_base != 0)
8286 +                    retValue = usb_mem_base;
8287 +                else
8288 +                    retValue = USB_HOST_BASE;
8289 +            }
8290 +            usb_mem_size_rd = FALSE;
8291 +            break;
8292 +        case PCI_CACHE_LINE_SIZE:
8293 +        case PCI_LATENCY_TIMER:
8294 +            retValue = 0;
8295 +            break;
8296 +        case PCI_HEADER_TYPE:
8297 +            retValue = PCI_HEADER_TYPE_NORMAL;
8298 +            break;
8299 +        case PCI_SUBSYSTEM_VENDOR_ID:
8300 +            retValue = PCI_VENDOR_ID_BROADCOM;
8301 +            break;
8302 +        case PCI_SUBSYSTEM_ID:
8303 +            retValue = 0x6300;
8304 +            break;
8305 +        case PCI_INTERRUPT_LINE:
8306 +            retValue = INTERRUPT_ID_USBH;
8307 +            break;
8308 +        default:
8309 +            break;
8310 +    }
8311 +
8312 +    switch (size) {
8313 +        case 1:
8314 +            *value = (retValue >> ((where & 3) << 3)) & 0xff;
8315 +            DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %02X\n",
8316 +                PCI_SLOT(devfn), where, size, *value);
8317 +            break;
8318 +        case 2:
8319 +            *value = (retValue >> ((where & 3) << 3)) & 0xffff;
8320 +            DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %04X\n",
8321 +                PCI_SLOT(devfn), where, size, *value);
8322 +            break;
8323 +        case 4:
8324 +            *value = retValue;
8325 +            DPRINT("R <= Slot: %d Where: %2X Len: %d Data: %08lX\n",
8326 +                PCI_SLOT(devfn), where, size, *value);
8327 +            break;
8328 +        default:
8329 +            break;
8330 +    }
8331 +
8332 +    return PCIBIOS_SUCCESSFUL;
8333 +}
8334 +#endif
8335 +
8336 +static int bcm96348_pcibios_read(struct pci_bus *bus, unsigned int devfn,
8337 +       int where, int size, u32 * val)
8338 +{
8339 +    volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
8340 +    uint32 data;
8341 +
8342 +#if defined(CONFIG_USB)
8343 +    if (PCI_SLOT(devfn) == USB_HOST_SLOT)
8344 +        return pci63xx_int_read(devfn, where, val, size);
8345 +#endif
8346 +
8347 +    mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
8348 +    data = *(uint32 *)ioBase;
8349 +    switch(size) {
8350 +        case 1:
8351 +            *val = (data >> ((where & 3) << 3)) & 0xff;
8352 +            break;
8353 +        case 2:
8354 +            *val = (data >> ((where & 3) << 3)) & 0xffff;
8355 +            break;
8356 +        case 4:
8357 +            *val = data;
8358 +             /* Special case for reading PCI device range */
8359 +            if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
8360 +                if (pci_mem_size_rd) {
8361 +                    /* bcm6348 PCI memory window minimum size is 64K */
8362 +                    *val &= PCI_SIZE_64K;
8363 +                }
8364 +            }
8365 +            break;
8366 +        default:
8367 +            break;
8368 +    }
8369 +    pci_mem_size_rd = FALSE;
8370 +    mpi_ClearPciConfigAccess();
8371 +
8372 +    return PCIBIOS_SUCCESSFUL;
8373 +}
8374 +
8375 +static int bcm96348_pcibios_write(struct pci_bus *bus, unsigned int devfn,
8376 +       int where, int size, u32 val)
8377 +{
8378 +    volatile unsigned char *ioBase = (unsigned char *)(mpi->l2piobase | KSEG1);
8379 +    uint32 data;
8380 +
8381 +#if defined(CONFIG_USB)
8382 +    if (PCI_SLOT(devfn) == USB_HOST_SLOT)
8383 +        return pci63xx_int_write(devfn, where, &val, size);
8384 +#endif
8385 +    mpi_SetupPciConfigAccess(BCM_PCI_CFG(PCI_SLOT(devfn), PCI_FUNC(devfn), where));
8386 +    data = *(uint32 *)ioBase;
8387 +    switch(size) {
8388 +        case 1:
8389 +            data = (data & ~(0xff << ((where & 3) << 3))) |
8390 +                (val << ((where & 3) << 3));
8391 +            break;
8392 +        case 2:
8393 +            data = (data & ~(0xffff << ((where & 3) << 3))) |
8394 +                (val << ((where & 3) << 3));
8395 +            break;
8396 +        case 4:
8397 +            data = val;
8398 +            /* Special case for reading PCI device range */
8399 +            if ((where >= PCI_BASE_ADDRESS_0) && (where <= PCI_BASE_ADDRESS_5)) {
8400 +                if (val == 0xffffffff)
8401 +                    pci_mem_size_rd = TRUE;
8402 +            }
8403 +            break;
8404 +        default:
8405 +            break;
8406 +    }
8407 +    *(uint32 *)ioBase = data;
8408 +    udelay(500);
8409 +    mpi_ClearPciConfigAccess();
8410 +
8411 +    return PCIBIOS_SUCCESSFUL;
8412 +}
8413 +
8414 +struct pci_ops bcm96348_pci_ops = {
8415 +    .read   = bcm96348_pcibios_read,
8416 +    .write  = bcm96348_pcibios_write
8417 +};
8418 diff -urN linux-2.6.19/arch/mips/pci/pci-bcm96348.c linux-2.6.19.new/arch/mips/pci/pci-bcm96348.c
8419 --- linux-2.6.19/arch/mips/pci/pci-bcm96348.c   1970-01-01 01:00:00.000000000 +0100
8420 +++ linux-2.6.19.new/arch/mips/pci/pci-bcm96348.c       2006-12-16 18:46:31.000000000 +0100
8421 @@ -0,0 +1,54 @@
8422 +/*
8423 +<:copyright-gpl
8424 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8425 +
8426 + This program is free software; you can distribute it and/or modify it
8427 + under the terms of the GNU General Public License (Version 2) as
8428 + published by the Free Software Foundation.
8429 +
8430 + This program is distributed in the hope it will be useful, but WITHOUT
8431 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8432 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
8433 + for more details.
8434 +
8435 + You should have received a copy of the GNU General Public License along
8436 + with this program; if not, write to the Free Software Foundation, Inc.,
8437 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8438 +:>
8439 +*/
8440 +#include <linux/types.h>
8441 +#include <linux/pci.h>
8442 +#include <linux/kernel.h>
8443 +#include <linux/init.h>
8444 +
8445 +//#include <asm/pci_channel.h>
8446 +#include <bcmpci.h>
8447 +
8448 +static struct resource bcm_pci_io_resource = {
8449 +    .name   = "bcm96348 pci IO space",
8450 +    .start  = BCM_PCI_IO_BASE,
8451 +    .end    = BCM_PCI_IO_BASE + BCM_PCI_IO_SIZE_64KB - 1,
8452 +    .flags  = IORESOURCE_IO
8453 +};
8454 +
8455 +static struct resource bcm_pci_mem_resource = {
8456 +    .name   = "bcm96348 pci memory space",
8457 +    .start  = BCM_PCI_MEM_BASE,
8458 +    .end    = BCM_PCI_MEM_BASE + BCM_PCI_MEM_SIZE_16MB - 1,
8459 +    .flags  = IORESOURCE_MEM
8460 +};
8461 +
8462 +extern struct pci_ops bcm96348_pci_ops;
8463 +
8464 +struct pci_controller bcm96348_controller = {
8465 +    .pci_ops   = &bcm96348_pci_ops,
8466 +    .io_resource       = &bcm_pci_io_resource,
8467 +    .mem_resource      = &bcm_pci_mem_resource,
8468 +};
8469 +
8470 +static void bcm96348_pci_init(void)
8471 +{
8472 +    register_pci_controller(&bcm96348_controller);
8473 +}
8474 +
8475 +arch_initcall(bcm96348_pci_init);
8476 diff -urN linux-2.6.19/drivers/serial/Makefile linux-2.6.19.new/drivers/serial/Makefile
8477 --- linux-2.6.19/drivers/serial/Makefile        2006-11-29 22:57:37.000000000 +0100
8478 +++ linux-2.6.19.new/drivers/serial/Makefile    2006-12-16 18:49:17.000000000 +0100
8479 @@ -56,3 +56,4 @@
8480  obj-$(CONFIG_SERIAL_SGI_IOC3) += ioc3_serial.o
8481  obj-$(CONFIG_SERIAL_ATMEL) += atmel_serial.o
8482  obj-$(CONFIG_SERIAL_NETX) += netx-serial.o
8483 +obj-$(CONFIG_BCM_SERIAL) += bcm63xx_cons.o
8484 diff -urN linux-2.6.19/drivers/serial/bcm63xx_cons.c linux-2.6.19.new/drivers/serial/bcm63xx_cons.c
8485 --- linux-2.6.19/drivers/serial/bcm63xx_cons.c  1970-01-01 01:00:00.000000000 +0100
8486 +++ linux-2.6.19.new/drivers/serial/bcm63xx_cons.c      2006-12-16 18:46:31.000000000 +0100
8487 @@ -0,0 +1,1049 @@
8488 +/*
8489 +<:copyright-gpl
8490 + Copyright 2002 Broadcom Corp. All Rights Reserved.
8491 +
8492 + This program is free software; you can distribute it and/or modify it
8493 + under the terms of the GNU General Public License (Version 2) as
8494 + published by the Free Software Foundation.
8495 +
8496 + This program is distributed in the hope it will be useful, but WITHOUT
8497 + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8498 + FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
8499 + for more details.
8500 +
8501 + You should have received a copy of the GNU General Public License along
8502 + with this program; if not, write to the Free Software Foundation, Inc.,
8503 + 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
8504 +:>
8505 +*/
8506 +
8507 +/* Description: Serial port driver for the BCM963XX. */
8508 +
8509 +#define CARDNAME    "bcm963xx_serial driver"
8510 +#define VERSION     "2.0"
8511 +#define VER_STR     CARDNAME " v" VERSION "\n"
8512 +
8513 +
8514 +#include <linux/kernel.h>
8515 +#include <linux/module.h>
8516 +#include <linux/version.h>
8517 +#include <linux/init.h>
8518 +#include <linux/slab.h>
8519 +#include <linux/interrupt.h>
8520 +#include <linux/spinlock.h>
8521 +
8522 +/* for definition of struct console */
8523 +#include <linux/console.h>
8524 +#include <linux/tty.h>
8525 +#include <linux/tty_flip.h>
8526 +#include <linux/serial.h>
8527 +#include <linux/serialP.h>
8528 +#include <asm/uaccess.h>
8529 +
8530 +#include <bcmtypes.h>
8531 +#include <board.h>
8532 +#include <bcm_map_part.h>
8533 +#include <bcm_intr.h>
8534 +
8535 +static DEFINE_SPINLOCK(bcm963xx_serial_lock);
8536 +
8537 +extern void _putc(char);
8538 +extern void _puts(const char *);
8539 +
8540 +typedef struct bcm_serial {
8541 +    volatile Uart *         port;
8542 +    int                     type;
8543 +    int                     flags;
8544 +    int                     irq;
8545 +    int                     baud_base;
8546 +    int                     blocked_open;
8547 +    unsigned short          close_delay;
8548 +    unsigned short          closing_wait;
8549 +    unsigned short          line;                /* port/line number */
8550 +    unsigned short          cflags;              /* line configuration flag */
8551 +    unsigned short          x_char;              /* xon/xoff character */
8552 +    unsigned short          read_status_mask;    /* mask for read condition */
8553 +    unsigned short          ignore_status_mask;  /* mask for ignore condition */
8554 +    unsigned long           event;               /* mask used in BH */
8555 +    int                     xmit_head;           /* Position of the head */
8556 +    int                     xmit_tail;           /* Position of the tail */
8557 +    int                     xmit_cnt;            /* Count of the chars in the buffer */
8558 +    int                     count;               /* indicates how many times it has been opened */
8559 +    int                     magic;
8560 +
8561 +    struct async_icount     icount;              /* keep track of things ... */
8562 +    struct tty_struct       *tty;                /* tty associated */
8563 +    struct termios          normal_termios;
8564 +
8565 +    wait_queue_head_t       open_wait;
8566 +    wait_queue_head_t       close_wait;
8567 +
8568 +    long                    session;             /* Session of opening process */
8569 +    long                    pgrp;                /* pgrp of opening process */
8570 +
8571 +    unsigned char           is_initialized;
8572 +} Context;
8573 +
8574 +
8575 +/*---------------------------------------------------------------------*/
8576 +/* Define bits in the Interrupt Enable register                        */
8577 +/*---------------------------------------------------------------------*/
8578 +/* Enable receive interrupt              */
8579 +#define RXINT   (RXFIFONE|RXOVFERR)
8580 +
8581 +/* Enable transmit interrupt             */
8582 +#define TXINT    (TXFIFOEMT|TXUNDERR|TXOVFERR)
8583 +
8584 +/* Enable receiver line status interrupt */
8585 +#define LSINT    (RXBRK|RXPARERR|RXFRAMERR)
8586 +
8587 +#define BCM_NUM_UARTS                   1
8588 +
8589 +#define BD_BCM63XX_TIMER_CLOCK_INPUT    (FPERIPH)
8590 +
8591 +
8592 +static struct bcm_serial multi[BCM_NUM_UARTS];
8593 +static struct bcm_serial *lines[BCM_NUM_UARTS];
8594 +static struct tty_driver *serial_driver;
8595 +static struct termios *serial_termios[BCM_NUM_UARTS];
8596 +static struct termios *serial_termios_locked[BCM_NUM_UARTS];
8597 +
8598 +
8599 +static void bcm_stop (struct tty_struct *tty);
8600 +static void bcm_start (struct tty_struct *tty);
8601 +static inline void receive_chars (struct bcm_serial * info);
8602 +static int startup (struct bcm_serial *info);
8603 +static void shutdown (struct bcm_serial * info);
8604 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag );
8605 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty);
8606 +static int bcm63xx_cons_write (struct tty_struct *tty,
8607 +    const unsigned char *buf, int count);
8608 +static int bcm63xx_cons_write_room (struct tty_struct *tty);
8609 +static int bcm_chars_in_buffer (struct tty_struct *tty);
8610 +static void bcm_flush_buffer (struct tty_struct *tty);
8611 +static void bcm_throttle (struct tty_struct *tty);
8612 +static void bcm_unthrottle (struct tty_struct *tty);
8613 +static void bcm_send_xchar (struct tty_struct *tty, char ch);
8614 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo);
8615 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info);
8616 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value);
8617 +static void send_break (struct bcm_serial *info, int duration);
8618 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
8619 +    unsigned int cmd, unsigned long arg);
8620 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios);
8621 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp);
8622 +static void bcm_hangup (struct tty_struct *tty);
8623 +static int block_til_ready (struct tty_struct *tty, struct file *filp, struct bcm_serial *info);
8624 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp);
8625 +static int __init bcm63xx_serialinit(void);
8626 +
8627 +
8628 +/*
8629 + * ------------------------------------------------------------
8630 + * rs_stop () and rs_start ()
8631 + *
8632 + * These routines are called before setting or resetting
8633 + * tty->stopped. They enable or disable transmitter interrupts,
8634 + * as necessary.
8635 + * ------------------------------------------------------------
8636 + */
8637 +static void bcm_stop (struct tty_struct *tty)
8638 +{
8639 +}
8640 +
8641 +static void bcm_start (struct tty_struct *tty)
8642 +{
8643 +    _puts(CARDNAME " Start\n");
8644 +}
8645 +
8646 +/*
8647 + * ------------------------------------------------------------
8648 + * receive_char ()
8649 + *
8650 + * This routine deals with inputs from any lines.
8651 + * ------------------------------------------------------------
8652 + */
8653 +static inline void receive_chars (struct bcm_serial * info)
8654 +{
8655 +    struct tty_struct *tty = 0;
8656 +    struct async_icount * icount;
8657 +    int ignore = 0;
8658 +    unsigned short status, tmp;
8659 +    UCHAR ch = 0;
8660 +    while ((status = info->port->intStatus) & RXINT)
8661 +    {
8662 +               char flag_char = TTY_NORMAL;
8663 +
8664 +        if (status & RXFIFONE)
8665 +            ch = info->port->Data;  // Read the character
8666 +        tty = info->tty;                  /* now tty points to the proper dev */
8667 +        icount = &info->icount;
8668 +        if (! tty)
8669 +            break;
8670 +        if (!tty_buffer_request_room(tty, 1))
8671 +            break;
8672 +        icount->rx++;
8673 +        if (status & RXBRK)
8674 +        {
8675 +            flag_char = TTY_BREAK;
8676 +            icount->brk++;
8677 +        }
8678 +        // keep track of the statistics
8679 +        if (status & (RXFRAMERR | RXPARERR | RXOVFERR))
8680 +        {
8681 +            if (status & RXPARERR)                /* parity error */
8682 +                icount->parity++;
8683 +            else
8684 +                if (status & RXFRAMERR)           /* frame error */
8685 +                    icount->frame++;
8686 +            if (status & RXOVFERR)
8687 +            {
8688 +                // Overflow. Reset the RX FIFO
8689 +                info->port->fifoctl |= RSTRXFIFOS;
8690 +                icount->overrun++;
8691 +            }
8692 +            // check to see if we should ignore the character
8693 +            // and mask off conditions that should be ignored
8694 +            if (status & info->ignore_status_mask)
8695 +            {
8696 +                if (++ignore > 100 )
8697 +                    break;
8698 +                goto ignore_char;
8699 +            }
8700 +            // Mask off the error conditions we want to ignore
8701 +            tmp = status & info->read_status_mask;
8702 +            if (tmp & RXPARERR)
8703 +            {
8704 +                flag_char = TTY_PARITY;
8705 +            }
8706 +            else
8707 +                if (tmp & RXFRAMERR)
8708 +                {
8709 +                    flag_char = TTY_FRAME;
8710 +                }
8711 +            if (tmp & RXOVFERR)
8712 +            {
8713 +               tty_insert_flip_char(tty, ch, flag_char);
8714 +               ch = 0;
8715 +               flag_char = TTY_OVERRUN;
8716 +               if (!tty_buffer_request_room(tty, 1))
8717 +                 break;
8718 +            }
8719 +        }
8720 +       tty_insert_flip_char(tty, ch, flag_char);
8721 +    }
8722 +ignore_char:;
8723 +       tty_flip_buffer_push(tty);
8724 +       tty_schedule_flip(tty);
8725 +
8726 +}
8727 +
8728 +
8729 +/*
8730 + * ------------------------------------------------------------
8731 + * bcm_interrupt ()
8732 + *
8733 + * this is the main interrupt routine for the chip.
8734 + * It deals with the multiple ports.
8735 + * ------------------------------------------------------------
8736 + */
8737 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
8738 +static irqreturn_t bcm_interrupt (int irq, void * dev)
8739 +#else
8740 +static void bcm_interrupt (int irq, void * dev, struct pt_regs * regs)
8741 +#endif
8742 +{
8743 +    struct bcm_serial * info = lines[0];
8744 +    UINT16  intStat;
8745 +
8746 +    /* get pending interrupt flags from UART  */
8747 +
8748 +    /* Mask with only the serial interrupts that are enabled */
8749 +    intStat = info->port->intStatus & info->port->intMask;
8750 +    while (intStat)
8751 +    {
8752 +        if (intStat & RXINT)
8753 +            receive_chars (info);
8754 +        else
8755 +            if (intStat & TXINT)
8756 +                info->port->intStatus = TXINT;
8757 +            else /* don't know what it was, so let's mask it */
8758 +                info->port->intMask &= ~intStat;
8759 +
8760 +        intStat = info->port->intStatus & info->port->intMask;
8761 +    }
8762 +
8763 +    // Clear the interrupt
8764 +    BcmHalInterruptEnable (INTERRUPT_ID_UART);
8765 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
8766 +    return IRQ_HANDLED;
8767 +#endif
8768 +}
8769 +
8770 +/*
8771 + * -------------------------------------------------------------------
8772 + * startup ()
8773 + *
8774 + * various initialization tasks
8775 + * -------------------------------------------------------------------
8776 + */
8777 +static int startup (struct bcm_serial *info)
8778 +{
8779 +    // Port is already started...
8780 +    return 0;
8781 +}
8782 +
8783 +/*
8784 + * -------------------------------------------------------------------
8785 + * shutdown ()
8786 + *
8787 + * This routine will shutdown a serial port; interrupts are disabled, and
8788 + * DTR is dropped if the hangup on close termio flag is on.
8789 + * -------------------------------------------------------------------
8790 + */
8791 +static void shutdown (struct bcm_serial * info)
8792 +{
8793 +    unsigned long flags;
8794 +    if (!info->is_initialized)
8795 +        return;
8796 +
8797 +    spin_lock_irqsave(&bcm963xx_serial_lock, flags);
8798 +
8799 +    info->port->control &= ~(BRGEN|TXEN|RXEN);
8800 +    if (info->tty)
8801 +        set_bit (TTY_IO_ERROR, &info->tty->flags);
8802 +    info->is_initialized = 0;
8803 +
8804 +    spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
8805 +}
8806 +/*
8807 + * -------------------------------------------------------------------
8808 + * change_speed ()
8809 + *
8810 + * Set the baud rate, character size, parity and stop bits.
8811 + * -------------------------------------------------------------------
8812 + */
8813 +static void change_speed( volatile Uart *pUart, tcflag_t cFlag )
8814 +{
8815 +    unsigned long ulFlags, ulBaud, ulClockFreqHz, ulTmp;
8816 +
8817 +    spin_lock_irqsave(&bcm963xx_serial_lock, ulFlags);
8818 +    switch( cFlag & (CBAUD | CBAUDEX) )
8819 +    {
8820 +    case B115200:
8821 +        ulBaud = 115200;
8822 +        break;
8823 +    case B57600:
8824 +        ulBaud = 57600;
8825 +        break;
8826 +    case B38400:
8827 +        ulBaud = 38400;
8828 +        break;
8829 +    case B19200:
8830 +        ulBaud = 19200;
8831 +        break;
8832 +    case B9600:
8833 +        ulBaud = 9600;
8834 +        break;
8835 +    case B4800:
8836 +        ulBaud = 4800;
8837 +        break;
8838 +    case B2400:
8839 +        ulBaud = 2400;
8840 +        break;
8841 +    case B1800:
8842 +        ulBaud = 1800;
8843 +        break;
8844 +    case B1200:
8845 +        ulBaud = 1200;
8846 +        break;
8847 +    case B600:
8848 +        ulBaud = 600;
8849 +        break;
8850 +    case B300:
8851 +        ulBaud = 300;
8852 +        break;
8853 +    case B200:
8854 +        ulBaud = 200;
8855 +        break;
8856 +    case B150:
8857 +        ulBaud = 150;
8858 +        break;
8859 +    case B134:
8860 +        ulBaud = 134;
8861 +        break;
8862 +    case B110:
8863 +        ulBaud = 110;
8864 +        break;
8865 +    case B75:
8866 +        ulBaud = 75;
8867 +        break;
8868 +    case B50:
8869 +        ulBaud = 50;
8870 +        break;
8871 +    default:
8872 +        ulBaud = 115200;
8873 +        break;
8874 +    }
8875 +
8876 +    /* Calculate buad rate.  */
8877 +    ulClockFreqHz = BD_BCM63XX_TIMER_CLOCK_INPUT;
8878 +    ulTmp = (ulClockFreqHz / ulBaud) / 16;
8879 +    if( ulTmp & 0x01 )
8880 +        ulTmp /= 2; /* Rounding up, so sub is already accounted for */
8881 +    else
8882 +        ulTmp = (ulTmp / 2) - 1; /* Rounding down so we must sub 1 */
8883 +    pUart->baudword = ulTmp;
8884 +
8885 +    /* Set character size, stop bits and parity.  */
8886 +    switch( cFlag & CSIZE )
8887 +    {
8888 +    case CS5:
8889 +        ulTmp = BITS5SYM; /* select transmit 5 bit data size */
8890 +        break;
8891 +    case CS6:
8892 +        ulTmp = BITS6SYM; /* select transmit 6 bit data size */
8893 +        break;
8894 +    case CS7:
8895 +        ulTmp = BITS7SYM; /* select transmit 7 bit data size */
8896 +        break;
8897 +    default:
8898 +        ulTmp = BITS8SYM; /* select transmit 8 bit data size */
8899 +        break;
8900 +    }
8901 +    if( cFlag & CSTOPB )
8902 +        ulTmp |= TWOSTOP;         /* select 2 stop bits */
8903 +    else
8904 +        ulTmp |= ONESTOP;         /* select one stop bit */
8905 +
8906 +    /* Write these values into the config reg.  */
8907 +    pUart->config = ulTmp;
8908 +    pUart->control &= ~(RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN);
8909 +    switch( cFlag & (PARENB | PARODD) )
8910 +    {
8911 +    case PARENB|PARODD:
8912 +        pUart->control |= RXPARITYEN | TXPARITYEN;
8913 +        break;
8914 +    case PARENB:
8915 +        pUart->control |= RXPARITYEN | TXPARITYEN | RXPARITYEVEN | TXPARITYEVEN;
8916 +        break;
8917 +    default:
8918 +        pUart->control |= 0;
8919 +        break;
8920 +    }
8921 +
8922 +    /* Reset and flush uart */
8923 +    pUart->fifoctl = RSTTXFIFOS | RSTRXFIFOS;
8924 +    spin_unlock_irqrestore(&bcm963xx_serial_lock, ulFlags);
8925 +}
8926 +
8927 +
8928 +/*
8929 + * -------------------------------------------------------------------
8930 + * bcm_flush_char ()
8931 + *
8932 + * Nothing to flush.  Polled I/O is used.
8933 + * -------------------------------------------------------------------
8934 + */
8935 +static void bcm63xx_cons_flush_chars (struct tty_struct *tty)
8936 +{
8937 +}
8938 +
8939 +
8940 +/*
8941 + * -------------------------------------------------------------------
8942 + * bcm63xx_cons_write ()
8943 + *
8944 + * Main output routine using polled I/O.
8945 + * -------------------------------------------------------------------
8946 + */
8947 +static int bcm63xx_cons_write (struct tty_struct *tty,
8948 +    const unsigned char *buf, int count)
8949 +{
8950 +    int c;
8951 +
8952 +    for (c = 0; c < count; c++)
8953 +        _putc(buf[c]);
8954 +    return count;
8955 +}
8956 +
8957 +/*
8958 + * -------------------------------------------------------------------
8959 + * bcm63xx_cons_write_room ()
8960 + *
8961 + * Compute the amount of space available for writing.
8962 + * -------------------------------------------------------------------
8963 + */
8964 +static int bcm63xx_cons_write_room (struct tty_struct *tty)
8965 +{
8966 +    /* Pick a number.  Any number.  Polled I/O is used. */
8967 +    return 1024;
8968 +}
8969 +
8970 +/*
8971 + * -------------------------------------------------------------------
8972 + * bcm_chars_in_buffer ()
8973 + *
8974 + * compute the amount of char left to be transmitted
8975 + * -------------------------------------------------------------------
8976 + */
8977 +static int bcm_chars_in_buffer (struct tty_struct *tty)
8978 +{
8979 +    return 0;
8980 +}
8981 +
8982 +/*
8983 + * -------------------------------------------------------------------
8984 + * bcm_flush_buffer ()
8985 + *
8986 + * Empty the output buffer
8987 + * -------------------------------------------------------------------
8988 + */
8989 +static void bcm_flush_buffer (struct tty_struct *tty)
8990 +{
8991 +       tty_wakeup(tty);
8992 +}
8993 +
8994 +/*
8995 + * ------------------------------------------------------------
8996 + * bcm_throttle () and bcm_unthrottle ()
8997 + *
8998 + * This routine is called by the upper-layer tty layer to signal that
8999 + * incoming characters should be throttled (or not).
9000 + * ------------------------------------------------------------
9001 + */
9002 +static void bcm_throttle (struct tty_struct *tty)
9003 +{
9004 +    struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9005 +    if (I_IXOFF(tty))
9006 +        info->x_char = STOP_CHAR(tty);
9007 +}
9008 +
9009 +static void bcm_unthrottle (struct tty_struct *tty)
9010 +{
9011 +    struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9012 +    if (I_IXOFF(tty))
9013 +    {
9014 +        if (info->x_char)
9015 +            info->x_char = 0;
9016 +        else
9017 +            info->x_char = START_CHAR(tty);
9018 +    }
9019 +}
9020 +
9021 +static void bcm_send_xchar (struct tty_struct *tty, char ch)
9022 +{
9023 +    struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9024 +    info->x_char = ch;
9025 +    if (ch)
9026 +        bcm_start (info->tty);
9027 +}
9028 +
9029 +/*
9030 + * ------------------------------------------------------------
9031 + * rs_ioctl () and friends
9032 + * ------------------------------------------------------------
9033 + */
9034 +static int get_serial_info(struct bcm_serial *info, struct serial_struct *retinfo)
9035 +{
9036 +    struct serial_struct tmp;
9037 +
9038 +    if (!retinfo)
9039 +        return -EFAULT;
9040 +
9041 +    memset (&tmp, 0, sizeof(tmp));
9042 +    tmp.type            = info->type;
9043 +    tmp.line            = info->line;
9044 +    tmp.port            = (int) info->port;
9045 +    tmp.irq             = info->irq;
9046 +    tmp.flags           = 0;
9047 +    tmp.baud_base       = info->baud_base;
9048 +    tmp.close_delay     = info->close_delay;
9049 +    tmp.closing_wait    = info->closing_wait;
9050 +
9051 +    return copy_to_user (retinfo, &tmp, sizeof(*retinfo));
9052 +}
9053 +
9054 +static int set_serial_info (struct bcm_serial *info, struct serial_struct *new_info)
9055 +{
9056 +    struct serial_struct new_serial;
9057 +    struct bcm_serial old_info;
9058 +    int retval = 0;
9059 +
9060 +    if (!new_info)
9061 +        return -EFAULT;
9062 +
9063 +    copy_from_user (&new_serial, new_info, sizeof(new_serial));
9064 +    old_info = *info;
9065 +
9066 +    if (!capable(CAP_SYS_ADMIN))
9067 +        return -EPERM;
9068 +
9069 +
9070 +    if (info->count > 1)
9071 +        return -EBUSY;
9072 +
9073 +    /* OK, past this point, all the error checking has been done.
9074 +     * At this point, we start making changes.....
9075 +     */
9076 +    info->baud_base = new_serial.baud_base;
9077 +    info->type = new_serial.type;
9078 +    info->close_delay = new_serial.close_delay;
9079 +    info->closing_wait = new_serial.closing_wait;
9080 +    retval = startup (info);
9081 +    return retval;
9082 +}
9083 +
9084 +/*
9085 + * get_lsr_info - get line status register info
9086 + *
9087 + * Purpose: Let user call ioctl() to get info when the UART physically
9088 + *          is emptied.  On bus types like RS485, the transmitter must
9089 + *          release the bus after transmitting. This must be done when
9090 + *          the transmit shift register is empty, not be done when the
9091 + *          transmit holding register is empty.  This functionality
9092 + *          allows an RS485 driver to be written in user space.
9093 + */
9094 +static int get_lsr_info (struct bcm_serial *info, unsigned int *value)
9095 +{
9096 +    return( 0 );
9097 +}
9098 +
9099 +/*
9100 + * This routine sends a break character out the serial port.
9101 + */
9102 +static void send_break (struct bcm_serial *info, int duration)
9103 +{
9104 +    unsigned long flags;
9105 +
9106 +    if (!info->port)
9107 +        return;
9108 +
9109 +    current->state = TASK_INTERRUPTIBLE;
9110 +
9111 +    /*save_flags (flags);
9112 +    cli();*/
9113 +    spin_lock_irqsave(&bcm963xx_serial_lock, flags);
9114 +
9115 +    info->port->control |= XMITBREAK;
9116 +    schedule_timeout(duration);
9117 +    info->port->control &= ~XMITBREAK;
9118 +
9119 +    spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9120 +    //restore_flags (flags);
9121 +}
9122 +
9123 +static int bcm_ioctl (struct tty_struct * tty, struct file * file,
9124 +    unsigned int cmd, unsigned long arg)
9125 +{
9126 +    int error;
9127 +    struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
9128 +    int retval;
9129 +
9130 +    if ((cmd != TIOCGSERIAL) && (cmd != TIOCSSERIAL) &&
9131 +        (cmd != TIOCSERCONFIG) && (cmd != TIOCSERGWILD)  &&
9132 +        (cmd != TIOCSERSWILD) && (cmd != TIOCSERGSTRUCT))
9133 +    {
9134 +        if (tty->flags & (1 << TTY_IO_ERROR))
9135 +            return -EIO;
9136 +    }
9137 +    switch (cmd)
9138 +    {
9139 +
9140 +    case TCSBRK:    /* SVID version: non-zero arg --> no break */
9141 +        retval = tty_check_change (tty);
9142 +        if (retval)
9143 +            return retval;
9144 +        tty_wait_until_sent (tty, 0);
9145 +        if (!arg)
9146 +            send_break (info, HZ/4); /* 1/4 second */
9147 +        return 0;
9148 +
9149 +    case TCSBRKP:   /* support for POSIX tcsendbreak() */
9150 +        retval = tty_check_change (tty);
9151 +        if (retval)
9152 +            return retval;
9153 +        tty_wait_until_sent (tty, 0);
9154 +        send_break (info, arg ? arg*(HZ/10) : HZ/4);
9155 +        return 0;
9156 +
9157 +    case TIOCGSOFTCAR:
9158 +        error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(long));
9159 +        if (!error)
9160 +            return -EFAULT;
9161 +       else
9162 +       {
9163 +           put_user (C_CLOCAL(tty) ? 1 : 0, (unsigned long *)arg);
9164 +           return 0;
9165 +       }
9166 +
9167 +    case TIOCSSOFTCAR:
9168 +        error = get_user (arg, (unsigned long *)arg);
9169 +        if (error)
9170 +            return error;
9171 +        tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
9172 +        return 0;
9173 +
9174 +    case TIOCGSERIAL:
9175 +        error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(struct serial_struct));
9176 +        if (!error)
9177 +            return -EFAULT;
9178 +       else
9179 +           return get_serial_info (info, (struct serial_struct *)arg);
9180 +
9181 +    case TIOCSSERIAL:
9182 +        return set_serial_info (info, (struct serial_struct *) arg);
9183 +
9184 +    case TIOCSERGETLSR: /* Get line status register */
9185 +        error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(unsigned int));
9186 +        if (!error)
9187 +            return -EFAULT;
9188 +        else
9189 +            return get_lsr_info (info, (unsigned int *)arg);
9190 +
9191 +    case TIOCSERGSTRUCT:
9192 +        error = access_ok (VERIFY_WRITE, (void *)arg, sizeof(struct bcm_serial));
9193 +        if (!error)
9194 +            return -EFAULT;
9195 +       else
9196 +       {
9197 +           copy_to_user((struct bcm_serial *)arg, info, sizeof(struct bcm_serial));
9198 +           return 0;
9199 +       }
9200 +
9201 +    default:
9202 +        return -ENOIOCTLCMD;
9203 +    }
9204 +    return 0;
9205 +}
9206 +
9207 +static void bcm_set_termios (struct tty_struct *tty, struct termios *old_termios)
9208 +{
9209 +    struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9210 +
9211 +    if( tty->termios->c_cflag != old_termios->c_cflag )
9212 +        change_speed (info->port, tty->termios->c_cflag);
9213 +}
9214 +
9215 +/*
9216 + * ------------------------------------------------------------
9217 + * bcm63xx_cons_close()
9218 + *
9219 + * This routine is called when the serial port gets closed.  First, we
9220 + * wait for the last remaining data to be sent.  Then, we turn off
9221 + * the transmit enable and receive enable flags.
9222 + * ------------------------------------------------------------
9223 + */
9224 +static void bcm63xx_cons_close (struct tty_struct *tty, struct file *filp)
9225 +{
9226 +    struct bcm_serial * info = (struct bcm_serial *)tty->driver_data;
9227 +    unsigned long flags;
9228 +
9229 +    if (!info)
9230 +        return;
9231 +
9232 +    /*save_flags (flags);
9233 +    cli();*/
9234 +    spin_lock_irqsave(&bcm963xx_serial_lock, flags);
9235 +
9236 +    if (tty_hung_up_p (filp))
9237 +    {
9238 +        spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9239 +        //restore_flags (flags);
9240 +        return;
9241 +    }
9242 +
9243 +    if ((tty->count == 1) && (info->count != 1))
9244 +    {
9245 +
9246 +        /* Uh, oh.  tty->count is 1, which means that the tty
9247 +         * structure will be freed.  Info->count should always
9248 +         * be one in these conditions.  If it's greater than
9249 +         * one, we've got real problems, since it means the
9250 +         * serial port won't be shutdown.
9251 +         */
9252 +        printk("bcm63xx_cons_close: bad serial port count; tty->count is 1, "
9253 +            "info->count is %d\n", info->count);
9254 +        info->count = 1;
9255 +    }
9256 +
9257 +    if (--info->count < 0)
9258 +    {
9259 +        printk("ds_close: bad serial port count for ttys%d: %d\n",
9260 +        info->line, info->count);
9261 +        info->count = 0;
9262 +    }
9263 +
9264 +    if (info->count)
9265 +    {
9266 +        //restore_flags (flags);
9267 +       spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9268 +        return;
9269 +    }
9270 +
9271 +    /* Now we wait for the transmit buffer to clear; and we notify
9272 +     * the line discipline to only process XON/XOFF characters.
9273 +     */
9274 +    tty->closing = 1;
9275 +
9276 +    /* At this point we stop accepting input.  To do this, we
9277 +     * disable the receive line status interrupts.
9278 +     */
9279 +    shutdown (info);
9280 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
9281 +    if (tty->driver->flush_buffer)
9282 +        tty->driver->flush_buffer (tty);
9283 +#else
9284 +    if (tty->driver.flush_buffer)
9285 +        tty->driver.flush_buffer (tty);
9286 +#endif
9287 +    if (tty->ldisc.flush_buffer)
9288 +        tty->ldisc.flush_buffer (tty);
9289 +
9290 +    tty->closing = 0;
9291 +    info->event = 0;
9292 +    info->tty = 0;
9293 +    if (tty->ldisc.num != tty_ldisc_get(N_TTY)->num)
9294 +    {
9295 +        if (tty->ldisc.close)
9296 +            (tty->ldisc.close)(tty);
9297 +        tty->ldisc = *tty_ldisc_get(N_TTY);
9298 +        tty->termios->c_line = N_TTY;
9299 +        if (tty->ldisc.open)
9300 +            (tty->ldisc.open)(tty);
9301 +    }
9302 +    if (info->blocked_open)
9303 +    {
9304 +        if (info->close_delay)
9305 +        {
9306 +            current->state = TASK_INTERRUPTIBLE;
9307 +            schedule_timeout(info->close_delay);
9308 +        }
9309 +        wake_up_interruptible (&info->open_wait);
9310 +    }
9311 +    wake_up_interruptible (&info->close_wait);
9312 +
9313 +    //restore_flags (flags);
9314 +    spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9315 +}
9316 +
9317 +/*
9318 + * bcm_hangup () --- called by tty_hangup() when a hangup is signaled.
9319 + */
9320 +static void bcm_hangup (struct tty_struct *tty)
9321 +{
9322 +
9323 +    struct bcm_serial *info = (struct bcm_serial *)tty->driver_data;
9324 +
9325 +    shutdown (info);
9326 +    info->event = 0;
9327 +    info->count = 0;
9328 +    info->tty = 0;
9329 +    wake_up_interruptible (&info->open_wait);
9330 +}
9331 +
9332 +/*
9333 + * ------------------------------------------------------------
9334 + * rs_open() and friends
9335 + * ------------------------------------------------------------
9336 + */
9337 +static int block_til_ready (struct tty_struct *tty, struct file *filp,
9338 +    struct bcm_serial *info)
9339 +{
9340 +    return 0;
9341 +}
9342 +
9343 +/*
9344 + * This routine is called whenever a serial port is opened.  It
9345 + * enables interrupts for a serial port. It also performs the
9346 + * serial-specific initialization for the tty structure.
9347 + */
9348 +static int bcm63xx_cons_open (struct tty_struct * tty, struct file * filp)
9349 +{
9350 +    struct bcm_serial *info;
9351 +    int retval, line;
9352 +
9353 +    // Make sure we're only opening on of the ports we support
9354 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
9355 +    line = MINOR(tty->driver->cdev.dev) - tty->driver->minor_start;
9356 +#else
9357 +    line = MINOR(tty->device) - tty->driver.minor_start;
9358 +#endif
9359 +
9360 +    if ((line < 0) || (line >= BCM_NUM_UARTS))
9361 +        return -ENODEV;
9362 +
9363 +    info = lines[line];
9364 +
9365 +    tty->low_latency=1;
9366 +    info->port->intMask  = 0;     /* Clear any pending interrupts */
9367 +    info->port->intMask  = RXINT; /* Enable RX */
9368 +
9369 +    info->count++;
9370 +    tty->driver_data = info;
9371 +    info->tty = tty;
9372 +    BcmHalInterruptEnable (INTERRUPT_ID_UART);
9373 +
9374 +    // Start up serial port
9375 +    retval = startup (info);
9376 +    if (retval)
9377 +        return retval;
9378 +
9379 +    retval = block_til_ready (tty, filp, info);
9380 +    if (retval)
9381 +        return retval;
9382 +
9383 +
9384 +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
9385 +    info->pgrp = process_group(current);
9386 +    info->session = current->signal->session;
9387 +#else
9388 +    info->session = current->session;
9389 +    info->pgrp = current->pgrp;
9390 +#endif
9391 +
9392 +    return 0;
9393 +}
9394 +
9395 +
9396 +static struct tty_operations rs_ops = {
9397 +       .open = bcm63xx_cons_open,
9398 +       .close = bcm63xx_cons_close,
9399 +       .write = bcm63xx_cons_write,
9400 +       .flush_chars = bcm63xx_cons_flush_chars,
9401 +       .write_room = bcm63xx_cons_write_room,
9402 +       .chars_in_buffer = bcm_chars_in_buffer,
9403 +       .flush_buffer = bcm_flush_buffer,
9404 +       .ioctl = bcm_ioctl,
9405 +       .throttle = bcm_throttle,
9406 +       .unthrottle = bcm_unthrottle,
9407 +       .send_xchar = bcm_send_xchar,
9408 +       .set_termios = bcm_set_termios,
9409 +       .stop = bcm_stop,
9410 +       .start = bcm_start,
9411 +       .hangup = bcm_hangup,
9412 +};
9413 +
9414 +/* --------------------------------------------------------------------------
9415 +    Name: bcm63xx_serialinit
9416 + Purpose: Initialize our BCM63xx serial driver
9417 +-------------------------------------------------------------------------- */
9418 +static int __init bcm63xx_serialinit(void)
9419 +{
9420 +    int i, flags;
9421 +    struct bcm_serial * info;
9422 +
9423 +    // Print the driver version information
9424 +    printk(VER_STR);
9425 +    serial_driver = alloc_tty_driver(BCM_NUM_UARTS);
9426 +    if (!serial_driver)
9427 +       return -ENOMEM;
9428 +
9429 +       serial_driver->owner        = THIS_MODULE;
9430 +       serial_driver->devfs_name           = "tts/";
9431 +//    serial_driver.magic             = TTY_DRIVER_MAGIC;
9432 +    serial_driver->name              = "ttyS";
9433 +    serial_driver->major             = TTY_MAJOR;
9434 +    serial_driver->minor_start       = 64;
9435 +//    serial_driver.num               = BCM_NUM_UARTS;
9436 +    serial_driver->type              = TTY_DRIVER_TYPE_SERIAL;
9437 +    serial_driver->subtype           = SERIAL_TYPE_NORMAL;
9438 +    serial_driver->init_termios      = tty_std_termios;
9439 +    serial_driver->init_termios.c_cflag = B115200 | CS8 | CREAD | HUPCL | CLOCAL;
9440 +    serial_driver->flags             = TTY_DRIVER_REAL_RAW;
9441 +
9442 +    serial_driver->termios           = serial_termios;
9443 +    serial_driver->termios_locked    = serial_termios_locked;
9444 +
9445 +    tty_set_operations(serial_driver, &rs_ops);
9446 +
9447 +    if (tty_register_driver (serial_driver))
9448 +        panic("Couldn't register serial driver\n");
9449 +
9450 +    //save_flags(flags); cli();
9451 +    spin_lock_irqsave(&bcm963xx_serial_lock, flags);
9452 +
9453 +    for (i = 0; i < BCM_NUM_UARTS; i++)
9454 +    {
9455 +        info = &multi[i];
9456 +        lines[i] = info;
9457 +        info->magic = SERIAL_MAGIC;
9458 +        info->port                  = (Uart *) ((char *)UART_BASE + (i * 0x20));
9459 +        info->tty                   = 0;
9460 +        info->irq                   = (2 - i) + 8;
9461 +        info->line                  = i;
9462 +        info->close_delay           = 50;
9463 +        info->closing_wait          = 3000;
9464 +        info->x_char                = 0;
9465 +        info->event                 = 0;
9466 +        info->count                 = 0;
9467 +        info->blocked_open          = 0;
9468 +        info->normal_termios        = serial_driver->init_termios;
9469 +        init_waitqueue_head(&info->open_wait);
9470 +        init_waitqueue_head(&info->close_wait);
9471 +
9472 +        /* If we are pointing to address zero then punt - not correctly
9473 +         * set up in setup.c to handle this.
9474 +         */
9475 +        if (! info->port)
9476 +            return 0;
9477 +        BcmHalMapInterrupt(bcm_interrupt, 0, INTERRUPT_ID_UART);
9478 +    }
9479 +
9480 +    /* order matters here... the trick is that flags
9481 +     * is updated... in request_irq - to immediatedly obliterate
9482 +     * it is unwise.
9483 +     */
9484 +    spin_unlock_irqrestore(&bcm963xx_serial_lock, flags);
9485 +    return 0;
9486 +}
9487 +
9488 +module_init(bcm63xx_serialinit);
9489 +
9490 +/* --------------------------------------------------------------------------
9491 +    Name: bcm_console_print
9492 + Purpose: bcm_console_print is registered for printk.
9493 +          The console_lock must be held when we get here.
9494 +-------------------------------------------------------------------------- */
9495 +static void bcm_console_print (struct console * cons, const char * str,
9496 +    unsigned int count)
9497 +{
9498 +    unsigned int i;
9499 +    //_puts(str);
9500 +    for(i=0; i<count; i++, str++)
9501 +    {
9502 +        _putc(*str);
9503 +        if (*str == 10)
9504 +        {
9505 +            _putc(13);
9506 +        }
9507 +    }
9508 +}
9509 +
9510 +static struct tty_driver * bcm_console_device(struct console * c, int *index)
9511 +{
9512 +    *index = c->index;
9513 +    return serial_driver;
9514 +}
9515 +
9516 +static int __init bcm_console_setup(struct console * co, char * options)
9517 +{
9518 +    return 0;
9519 +}
9520 +
9521 +static struct console bcm_sercons = {
9522 +    .name      = "ttyS",
9523 +    .write     = bcm_console_print,
9524 +    .device    = bcm_console_device,
9525 +    .setup     = bcm_console_setup,
9526 +    .flags     = CON_PRINTBUFFER,
9527 +    .index     = -1,
9528 +};
9529 +
9530 +static int __init bcm63xx_console_init(void)
9531 +{
9532 +    register_console(&bcm_sercons);
9533 +    return 0;
9534 +}
9535 +
9536 +console_initcall(bcm63xx_console_init);
9537 diff -urN linux-2.6.19/include/asm-mips/bootinfo.h linux-2.6.19.new/include/asm-mips/bootinfo.h
9538 --- linux-2.6.19/include/asm-mips/bootinfo.h    2006-11-29 22:57:37.000000000 +0100
9539 +++ linux-2.6.19.new/include/asm-mips/bootinfo.h        2006-12-16 18:46:31.000000000 +0100
9540 @@ -212,6 +212,14 @@
9541  #define MACH_GROUP_NEC_EMMA2RH 25      /* NEC EMMA2RH (was 23)         */
9542  #define  MACH_NEC_MARKEINS     0       /* NEC EMMA2RH Mark-eins        */
9543
9544 +/*
9545 + * Valid machtype for group BRCM
9546 + */
9547 +#define MACH_GROUP_BRCM        23      /* Broadcom boards              */
9548 +#define MACH_BCM96338          0
9549 +#define MACH_BCM96345          1
9550 +#define MACH_BCM96348          2
9551 +
9552  #define CL_SIZE                        COMMAND_LINE_SIZE
9553
9554  const char *get_system_type(void);
9555 diff -urN linux-2.6.19/include/asm-mips/cpu.h linux-2.6.19.new/include/asm-mips/cpu.h
9556 --- linux-2.6.19/include/asm-mips/cpu.h 2006-11-29 22:57:37.000000000 +0100
9557 +++ linux-2.6.19.new/include/asm-mips/cpu.h     2006-12-16 18:46:31.000000000 +0100
9558 @@ -103,6 +103,13 @@
9559
9560  #define PRID_IMP_SR71000        0x0400
9561
9562 +/* These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
9563 + */
9564 +
9565 +#define PRID_IMP_BCM6338               0x9000
9566 +#define PRID_IMP_BCM6345               0x8000
9567 +#define PRID_IMP_BCM6348               0x9100
9568 +
9569  /*
9570   * Definitions for 7:0 on legacy processors
9571   */
9572 @@ -200,7 +207,10 @@
9573  #define CPU_SB1A               62
9574  #define CPU_74K                        63
9575  #define CPU_R14000             64
9576 -#define CPU_LAST               64
9577 +#define CPU_BCM6338             65
9578 +#define CPU_BCM6345             66
9579 +#define CPU_BCM6348             67
9580 +#define CPU_LAST               67
9581
9582  /*
9583   * ISA Level encodings
9584 diff -urN linux-2.6.19/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h linux-2.6.19.new/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h
9585 --- linux-2.6.19/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h 1970-01-01 01:00:00.000000000 +0100
9586 +++ linux-2.6.19.new/include/asm-mips/mach-bcm963xx/cpu-feature-overrides.h     2006-12-16 18:52:30.000000000 +0100
9587 @@ -0,0 +1,36 @@
9588 +#ifndef __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
9589 +#define __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H
9590 +
9591 +#define cpu_has_tlb                            1
9592 +#define cpu_has_4kex                           4
9593 +#define cpu_has_4ktlb                          8
9594 +#define cpu_has_fpu                            0
9595 +#define cpu_has_32fpr                          0
9596 +#define cpu_has_counter                        0x40
9597 +#define cpu_has_watch                          0
9598 +#define cpu_has_mips16                         0
9599 +#define cpu_has_divec                          0x200
9600 +#define cpu_has_vce                            0
9601 +#define cpu_has_cache_cdex_p                   0
9602 +#define cpu_has_cache_cdex_s                   0
9603 +#define cpu_has_prefetch                       0x40000
9604 +#define cpu_has_mcheck                         0x2000
9605 +#define cpu_has_ejtag                          0x4000
9606 +#define cpu_has_llsc                           0x10000
9607 +#define cpu_has_vtag_icache                    0
9608 +#define cpu_has_dc_aliases                     0
9609 +#define cpu_has_ic_fills_f_dc                  0
9610 +
9611 +#define cpu_has_nofpuex                0
9612 +#define cpu_has_64bits                         0
9613 +#define cpu_has_64bit_zero_reg                 0
9614 +#define cpu_has_64bit_gp_regs                  0
9615 +#define cpu_has_64bit_addresses                0
9616 +
9617 +#define cpu_has_subset_pcaches                 0
9618 +
9619 +#define cpu_dcache_line_size()                 16
9620 +#define cpu_icache_line_size()                 16
9621 +#define cpu_scache_line_size()                 0
9622 +
9623 +#endif /* __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H */
9624 diff -urN linux-2.6.19/include/asm-mips/module.h linux-2.6.19.new/include/asm-mips/module.h
9625 --- linux-2.6.19/include/asm-mips/module.h      2006-11-29 22:57:37.000000000 +0100
9626 +++ linux-2.6.19.new/include/asm-mips/module.h  2006-12-16 19:03:22.000000000 +0100
9627 @@ -112,6 +112,12 @@
9628  #define MODULE_PROC_FAMILY "RM9000 "
9629  #elif defined CONFIG_CPU_SB1
9630  #define MODULE_PROC_FAMILY "SB1 "
9631 +#elif defined CONFIG_CPU_BCM6338
9632 +#define MODULE_PROC_FAMILY "BCM6338 "
9633 +#elif defined CONFIG_CPU_BCM6345
9634 +#define MODULE_PROC_FAMILY "BCM6345 "
9635 +#elif defined CONFIG_CPU_BCM6348
9636 +#define MODULE_PROC_FAMILY "BCM6348 "
9637  #else
9638  #error MODULE_PROC_FAMILY undefined for your processor configuration
9639  #endif