target/linux/brcm47xx/patches-3.3/022-ssb-move-flash-to-chipcommon.patch

   1 --- a/arch/mips/bcm47xx/nvram.c
   2 +++ b/arch/mips/bcm47xx/nvram.c
   3 @@ -27,7 +27,7 @@ static char nvram_buf[NVRAM_SPACE];
   4  static void early_nvram_init(void)
   5  {
   6  #ifdef CONFIG_BCM47XX_SSB
   7 -       struct ssb_mipscore *mcore_ssb;
   8 +       struct ssb_chipcommon *ssb_cc;
   9  #endif
  10  #ifdef CONFIG_BCM47XX_BCMA
  11         struct bcma_drv_cc *bcma_cc;
  12 @@ -42,9 +42,9 @@ static void early_nvram_init(void)
  13         switch (bcm47xx_bus_type) {
  14  #ifdef CONFIG_BCM47XX_SSB
  15         case BCM47XX_BUS_TYPE_SSB:
  16 -               mcore_ssb = &bcm47xx_bus.ssb.mipscore;
  17 -               base = mcore_ssb->flash_window;
  18 -               lim = mcore_ssb->flash_window_size;
  19 +               ssb_cc = &bcm47xx_bus.ssb.chipco;
  20 +               base = ssb_cc->pflash.window;
  21 +               lim = ssb_cc->pflash.window_size;
  22                 break;
  23  #endif
  24  #ifdef CONFIG_BCM47XX_BCMA
  25 --- a/arch/mips/bcm47xx/wgt634u.c
  26 +++ b/arch/mips/bcm47xx/wgt634u.c
  27 @@ -156,10 +156,10 @@ static int __init wgt634u_init(void)
  28                                             SSB_CHIPCO_IRQ_GPIO);
  29                 }
  30
  31 -               wgt634u_flash_data.width = mcore->flash_buswidth;
  32 -               wgt634u_flash_resource.start = mcore->flash_window;
  33 -               wgt634u_flash_resource.end = mcore->flash_window
  34 -                                          + mcore->flash_window_size
  35 +               wgt634u_flash_data.width = mcore->pflash.buswidth;
  36 +               wgt634u_flash_resource.start = mcore->pflash.window;
  37 +               wgt634u_flash_resource.end = mcore->pflash.window
  38 +                                          + mcore->pflash.window_size
  39                                            - 1;
  40                 return platform_add_devices(wgt634u_devices,
  41                                             ARRAY_SIZE(wgt634u_devices));
  42 --- a/drivers/ssb/driver_mipscore.c
  43 +++ b/drivers/ssb/driver_mipscore.c
  44 @@ -190,16 +190,34 @@ static void ssb_mips_flash_detect(struct
  45  {
  46         struct ssb_bus *bus = mcore->dev->bus;
  47
  48 -       mcore->flash_buswidth = 2;
  49 -       if (bus->chipco.dev) {
  50 -               mcore->flash_window = 0x1c000000;
  51 -               mcore->flash_window_size = 0x02000000;
  52 +       /* When there is no chipcommon on the bus there is 4MB flash */
  53 +       if (!bus->chipco.dev) {
  54 +               pr_info("found parallel flash.\n");
  55 +               bus->chipco.flash_type = SSB_PFLASH;
  56 +               bus->chipco.pflash.window = SSB_FLASH1;
  57 +               bus->chipco.pflash.window_size = SSB_FLASH1_SZ;
  58 +               bus->chipco.pflash.buswidth = 2;
  59 +               return;
  60 +       }
  61 +
  62 +       switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
  63 +       case SSB_CHIPCO_FLASHT_STSER:
  64 +       case SSB_CHIPCO_FLASHT_ATSER:
  65 +               pr_info("serial flash not supported.\n");
  66 +               break;
  67 +       case SSB_CHIPCO_FLASHT_PARA:
  68 +               pr_info("found parallel flash.\n");
  69 +               bus->chipco.flash_type = SSB_PFLASH;
  70 +               bus->chipco.pflash.window = SSB_FLASH2;
  71 +               bus->chipco.pflash.window_size = SSB_FLASH2_SZ;
  72                 if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
  73 -                              & SSB_CHIPCO_CFG_DS16) == 0)
  74 -                       mcore->flash_buswidth = 1;
  75 -       } else {
  76 -               mcore->flash_window = 0x1fc00000;
  77 -               mcore->flash_window_size = 0x00400000;
  78 +                    & SSB_CHIPCO_CFG_DS16) == 0)
  79 +                       bus->chipco.pflash.buswidth = 1;
  80 +               else
  81 +                       bus->chipco.pflash.buswidth = 2;
  82 +               break;
  83 +       default:
  84 +               pr_err("flash not supported.\n");
  85         }
  86  }
  87
  88 --- a/include/linux/ssb/ssb_driver_chipcommon.h
  89 +++ b/include/linux/ssb/ssb_driver_chipcommon.h
  90 @@ -582,6 +582,18 @@ struct ssb_chipcommon_pmu {
  91         u32 crystalfreq;        /* The active crystal frequency (in kHz) */
  92  };
  93
  94 +#ifdef CONFIG_SSB_DRIVER_MIPS
  95 +enum ssb_flash_type {
  96 +       SSB_PFLASH,
  97 +};
  98 +
  99 +struct ssb_pflash {
 100 +       u8 buswidth;
 101 +       u32 window;
 102 +       u32 window_size;
 103 +};
 104 +#endif /* CONFIG_SSB_DRIVER_MIPS */
 105 +
 106  struct ssb_chipcommon {
 107         struct ssb_device *dev;
 108         u32 capabilities;
 109 @@ -589,6 +601,12 @@ struct ssb_chipcommon {
 110         /* Fast Powerup Delay constant */
 111         u16 fast_pwrup_delay;
 112         struct ssb_chipcommon_pmu pmu;
 113 +#ifdef CONFIG_SSB_DRIVER_MIPS
 114 +       enum ssb_flash_type flash_type;
 115 +       union {
 116 +               struct ssb_pflash pflash;
 117 +       };
 118 +#endif /* CONFIG_SSB_DRIVER_MIPS */
 119  };
 120
 121  static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
 122 --- a/include/linux/ssb/ssb_driver_mips.h
 123 +++ b/include/linux/ssb/ssb_driver_mips.h
 124 @@ -19,10 +19,6 @@ struct ssb_mipscore {
 125
 126         int nr_serial_ports;
 127         struct ssb_serial_port serial_ports[4];
 128 -
 129 -       u8 flash_buswidth;
 130 -       u32 flash_window;
 131 -       u32 flash_window_size;
 132  };
 133
 134  extern void ssb_mipscore_init(struct ssb_mipscore *mcore);