12055bff0326b0c1980fd4a5d4aa7663a926caa8
[openwrt.git] / target / linux / brcm47xx / patches-3.3 / 022-ssb-move-flash-to-chipcommon.patch
1 --- a/arch/mips/bcm47xx/nvram.c
2 +++ b/arch/mips/bcm47xx/nvram.c
3 @@ -27,7 +27,7 @@ static char nvram_buf[NVRAM_SPACE];
4  static void early_nvram_init(void)
5  {
6  #ifdef CONFIG_BCM47XX_SSB
7 -       struct ssb_mipscore *mcore_ssb;
8 +       struct ssb_chipcommon *ssb_cc;
9  #endif
10  #ifdef CONFIG_BCM47XX_BCMA
11         struct bcma_drv_cc *bcma_cc;
12 @@ -42,9 +42,9 @@ static void early_nvram_init(void)
13         switch (bcm47xx_bus_type) {
14  #ifdef CONFIG_BCM47XX_SSB
15         case BCM47XX_BUS_TYPE_SSB:
16 -               mcore_ssb = &bcm47xx_bus.ssb.mipscore;
17 -               base = mcore_ssb->flash_window;
18 -               lim = mcore_ssb->flash_window_size;
19 +               ssb_cc = &bcm47xx_bus.ssb.chipco;
20 +               base = ssb_cc->pflash.window;
21 +               lim = ssb_cc->pflash.window_size;
22                 break;
23  #endif
24  #ifdef CONFIG_BCM47XX_BCMA
25 --- a/arch/mips/bcm47xx/wgt634u.c
26 +++ b/arch/mips/bcm47xx/wgt634u.c
27 @@ -142,24 +142,24 @@ static int __init wgt634u_init(void)
28         if (et0mac[0] == 0x00 &&
29             ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) ||
30              (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) {
31 -               struct ssb_mipscore *mcore = &bcm47xx_bus.ssb.mipscore;
32 +               struct ssb_chipcommon *ccore = &bcm47xx_bus.ssb.chipco;
33  
34                 printk(KERN_INFO "WGT634U machine detected.\n");
35  
36                 if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET),
37                                  gpio_interrupt, IRQF_SHARED,
38 -                                "WGT634U GPIO", &bcm47xx_bus.ssb.chipco)) {
39 +                                "WGT634U GPIO", ccore)) {
40                         gpio_direction_input(WGT634U_GPIO_RESET);
41                         gpio_intmask(WGT634U_GPIO_RESET, 1);
42 -                       ssb_chipco_irq_mask(&bcm47xx_bus.ssb.chipco,
43 +                       ssb_chipco_irq_mask(ccore,
44                                             SSB_CHIPCO_IRQ_GPIO,
45                                             SSB_CHIPCO_IRQ_GPIO);
46                 }
47  
48 -               wgt634u_flash_data.width = mcore->flash_buswidth;
49 -               wgt634u_flash_resource.start = mcore->flash_window;
50 -               wgt634u_flash_resource.end = mcore->flash_window
51 -                                          + mcore->flash_window_size
52 +               wgt634u_flash_data.width = ccore->pflash.buswidth;
53 +               wgt634u_flash_resource.start = ccore->pflash.window;
54 +               wgt634u_flash_resource.end = ccore->pflash.window
55 +                                          + ccore->pflash.window_size
56                                            - 1;
57                 return platform_add_devices(wgt634u_devices,
58                                             ARRAY_SIZE(wgt634u_devices));
59 --- a/drivers/ssb/driver_mipscore.c
60 +++ b/drivers/ssb/driver_mipscore.c
61 @@ -190,16 +190,34 @@ static void ssb_mips_flash_detect(struct
62  {
63         struct ssb_bus *bus = mcore->dev->bus;
64  
65 -       mcore->flash_buswidth = 2;
66 -       if (bus->chipco.dev) {
67 -               mcore->flash_window = 0x1c000000;
68 -               mcore->flash_window_size = 0x02000000;
69 +       /* When there is no chipcommon on the bus there is 4MB flash */
70 +       if (!bus->chipco.dev) {
71 +               pr_info("found parallel flash.\n");
72 +               bus->chipco.flash_type = SSB_PFLASH;
73 +               bus->chipco.pflash.window = SSB_FLASH1;
74 +               bus->chipco.pflash.window_size = SSB_FLASH1_SZ;
75 +               bus->chipco.pflash.buswidth = 2;
76 +               return;
77 +       }
78 +
79 +       switch (bus->chipco.capabilities & SSB_CHIPCO_CAP_FLASHT) {
80 +       case SSB_CHIPCO_FLASHT_STSER:
81 +       case SSB_CHIPCO_FLASHT_ATSER:
82 +               pr_info("serial flash not supported.\n");
83 +               break;
84 +       case SSB_CHIPCO_FLASHT_PARA:
85 +               pr_info("found parallel flash.\n");
86 +               bus->chipco.flash_type = SSB_PFLASH;
87 +               bus->chipco.pflash.window = SSB_FLASH2;
88 +               bus->chipco.pflash.window_size = SSB_FLASH2_SZ;
89                 if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
90 -                              & SSB_CHIPCO_CFG_DS16) == 0)
91 -                       mcore->flash_buswidth = 1;
92 -       } else {
93 -               mcore->flash_window = 0x1fc00000;
94 -               mcore->flash_window_size = 0x00400000;
95 +                    & SSB_CHIPCO_CFG_DS16) == 0)
96 +                       bus->chipco.pflash.buswidth = 1;
97 +               else
98 +                       bus->chipco.pflash.buswidth = 2;
99 +               break;
100 +       default:
101 +               pr_err("flash not supported.\n");
102         }
103  }
104  
105 --- a/include/linux/ssb/ssb_driver_chipcommon.h
106 +++ b/include/linux/ssb/ssb_driver_chipcommon.h
107 @@ -582,6 +582,18 @@ struct ssb_chipcommon_pmu {
108         u32 crystalfreq;        /* The active crystal frequency (in kHz) */
109  };
110  
111 +#ifdef CONFIG_SSB_DRIVER_MIPS
112 +enum ssb_flash_type {
113 +       SSB_PFLASH,
114 +};
115 +
116 +struct ssb_pflash {
117 +       u8 buswidth;
118 +       u32 window;
119 +       u32 window_size;
120 +};
121 +#endif /* CONFIG_SSB_DRIVER_MIPS */
122 +
123  struct ssb_chipcommon {
124         struct ssb_device *dev;
125         u32 capabilities;
126 @@ -589,6 +601,12 @@ struct ssb_chipcommon {
127         /* Fast Powerup Delay constant */
128         u16 fast_pwrup_delay;
129         struct ssb_chipcommon_pmu pmu;
130 +#ifdef CONFIG_SSB_DRIVER_MIPS
131 +       enum ssb_flash_type flash_type;
132 +       union {
133 +               struct ssb_pflash pflash;
134 +       };
135 +#endif /* CONFIG_SSB_DRIVER_MIPS */
136  };
137  
138  static inline bool ssb_chipco_available(struct ssb_chipcommon *cc)
139 --- a/include/linux/ssb/ssb_driver_mips.h
140 +++ b/include/linux/ssb/ssb_driver_mips.h
141 @@ -19,10 +19,6 @@ struct ssb_mipscore {
142  
143         int nr_serial_ports;
144         struct ssb_serial_port serial_ports[4];
145 -
146 -       u8 flash_buswidth;
147 -       u32 flash_window;
148 -       u32 flash_window_size;
149  };
150  
151  extern void ssb_mipscore_init(struct ssb_mipscore *mcore);