target/linux/brcm2708/patches-4.1/0009-Adding-bcm2835-sdhost-driver-and-an-overlay-to-enabl.patch

   1 From 7bf3e966797438781e11dbc233e17bbe4746bd5b Mon Sep 17 00:00:00 2001
   2 From: Phil Elwell <phil@raspberrypi.org>
   3 Date: Wed, 25 Mar 2015 17:49:47 +0000
   4 Subject: [PATCH 009/121] Adding bcm2835-sdhost driver, and an overlay to
   5  enable it
   6
   7 BCM2835 has two SD card interfaces. This driver uses the other one.
   8
   9 bcm2835-sdhost: Error handling fix, and code clarification
  10
  11 bcm2835-sdhost: Adding overclocking option
  12
  13 Allow a different clock speed to be substitued for a requested 50MHz.
  14 This option is exposed using the "overclock_50" DT parameter.
  15 Note that the sdhost interface is restricted to integer divisions of
  16 core_freq, and the highest sensible option for a core_freq of 250MHz
  17 is 84 (250/3 = 83.3MHz), the next being 125 (250/2) which is much too
  18 high.
  19
  20 Use at your own risk.
  21
  22 bcm2835-sdhost: Round up the overclock, so 62 works for 62.5Mhz
  23
  24 Also only warn once for each overclock setting.
  25 ---
  26  drivers/mmc/host/Kconfig          |   10 +
  27  drivers/mmc/host/Makefile         |    1 +
  28  drivers/mmc/host/bcm2835-sdhost.c | 1702 +++++++++++++++++++++++++++++++++++++
  29  3 files changed, 1713 insertions(+)
  30  create mode 100644 drivers/mmc/host/bcm2835-sdhost.c
  31
  32 --- a/drivers/mmc/host/Kconfig
  33 +++ b/drivers/mmc/host/Kconfig
  34 @@ -33,6 +33,16 @@ config MMC_BCM2835_PIO_DMA_BARRIER
  35
  36           If unsure, say 2 here.
  37
  38 +config MMC_BCM2835_SDHOST
  39 +       tristate "Support for the SDHost controller on BCM2708/9"
  40 +       depends on MACH_BCM2708 || MACH_BCM2709 || ARCH_BCM2835
  41 +       help
  42 +         This selects the SDHost controller on BCM2835/6.
  43 +
  44 +         If you have a controller with this interface, say Y or M here.
  45 +
  46 +         If unsure, say N.
  47 +
  48  config MMC_ARMMMCI
  49         tristate "ARM AMBA Multimedia Card Interface support"
  50         depends on ARM_AMBA
  51 --- a/drivers/mmc/host/Makefile
  52 +++ b/drivers/mmc/host/Makefile
  53 @@ -18,6 +18,7 @@ obj-$(CONFIG_MMC_SDHCI_S3C)   += sdhci-s3c
  54  obj-$(CONFIG_MMC_SDHCI_SIRF)           += sdhci-sirf.o
  55  obj-$(CONFIG_MMC_SDHCI_F_SDH30)        += sdhci_f_sdh30.o
  56  obj-$(CONFIG_MMC_SDHCI_SPEAR)  += sdhci-spear.o
  57 +obj-$(CONFIG_MMC_BCM2835_SDHOST)       += bcm2835-sdhost.o
  58  obj-$(CONFIG_MMC_BCM2835)      += bcm2835-mmc.o
  59  obj-$(CONFIG_MMC_WBSD)         += wbsd.o
  60  obj-$(CONFIG_MMC_AU1X)         += au1xmmc.o
  61 --- /dev/null
  62 +++ b/drivers/mmc/host/bcm2835-sdhost.c
  63 @@ -0,0 +1,1702 @@
  64 +/*
  65 + * BCM2835 SD host driver.
  66 + *
  67 + * Author:      Phil Elwell <phil@raspberrypi.org>
  68 + *              Copyright 2015
  69 + *
  70 + * Based on
  71 + *  mmc-bcm2835.c by Gellert Weisz
  72 + * which is, in turn, based on
  73 + *  sdhci-bcm2708.c by Broadcom
  74 + *  sdhci-bcm2835.c by Stephen Warren and Oleksandr Tymoshenko
  75 + *  sdhci.c and sdhci-pci.c by Pierre Ossman
  76 + *
  77 + * This program is free software; you can redistribute it and/or modify it
  78 + * under the terms and conditions of the GNU General Public License,
  79 + * version 2, as published by the Free Software Foundation.
  80 + *
  81 + * This program is distributed in the hope it will be useful, but WITHOUT
  82 + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  83 + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  84 + * more details.
  85 + *
  86 + * You should have received a copy of the GNU General Public License
  87 + * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  88 + */
  89 +
  90 +#define SAFE_READ_THRESHOLD     4
  91 +#define SAFE_WRITE_THRESHOLD    4
  92 +#define ALLOW_DMA               1
  93 +#define ALLOW_CMD23             0
  94 +#define ALLOW_FAST              1
  95 +#define USE_BLOCK_IRQ           1
  96 +
  97 +#include <linux/delay.h>
  98 +#include <linux/module.h>
  99 +#include <linux/io.h>
 100 +#include <linux/mmc/mmc.h>
 101 +#include <linux/mmc/host.h>
 102 +#include <linux/mmc/sd.h>
 103 +#include <linux/scatterlist.h>
 104 +#include <linux/of_address.h>
 105 +#include <linux/of_irq.h>
 106 +#include <linux/clk.h>
 107 +#include <linux/platform_device.h>
 108 +#include <linux/err.h>
 109 +#include <linux/blkdev.h>
 110 +#include <linux/dmaengine.h>
 111 +#include <linux/dma-mapping.h>
 112 +#include <linux/of_dma.h>
 113 +#include <linux/time.h>
 114 +
 115 +#define DRIVER_NAME "sdhost-bcm2835"
 116 +
 117 +#define SDCMD  0x00 /* Command to SD card              - 16 R/W */
 118 +#define SDARG  0x04 /* Argument to SD card             - 32 R/W */
 119 +#define SDTOUT 0x08 /* Start value for timeout counter - 32 R/W */
 120 +#define SDCDIV 0x0c /* Start value for clock divider   - 11 R/W */
 121 +#define SDRSP0 0x10 /* SD card response (31:0)         - 32 R   */
 122 +#define SDRSP1 0x14 /* SD card response (63:32)        - 32 R   */
 123 +#define SDRSP2 0x18 /* SD card response (95:64)        - 32 R   */
 124 +#define SDRSP3 0x1c /* SD card response (127:96)       - 32 R   */
 125 +#define SDHSTS 0x20 /* SD host status                  - 11 R   */
 126 +#define SDVDD  0x30 /* SD card power control           -  1 R/W */
 127 +#define SDEDM  0x34 /* Emergency Debug Mode            - 13 R/W */
 128 +#define SDHCFG 0x38 /* Host configuration              -  2 R/W */
 129 +#define SDHBCT 0x3c /* Host byte count (debug)         - 32 R/W */
 130 +#define SDDATA 0x40 /* Data to/from SD card            - 32 R/W */
 131 +#define SDHBLC 0x50 /* Host block count (SDIO/SDHC)    -  9 R/W */
 132 +
 133 +#define SDCMD_NEW_FLAG                  0x8000
 134 +#define SDCMD_FAIL_FLAG                 0x4000
 135 +#define SDCMD_BUSYWAIT                  0x800
 136 +#define SDCMD_NO_RESPONSE               0x400
 137 +#define SDCMD_LONG_RESPONSE             0x200
 138 +#define SDCMD_WRITE_CMD                 0x80
 139 +#define SDCMD_READ_CMD                  0x40
 140 +#define SDCMD_CMD_MASK                  0x3f
 141 +
 142 +#define SDCDIV_MAX_CDIV                 0x7ff
 143 +
 144 +#define SDHSTS_BUSY_IRPT                0x400
 145 +#define SDHSTS_BLOCK_IRPT               0x200
 146 +#define SDHSTS_SDIO_IRPT                0x100
 147 +#define SDHSTS_REW_TIME_OUT             0x80
 148 +#define SDHSTS_CMD_TIME_OUT             0x40
 149 +#define SDHSTS_CRC16_ERROR              0x20
 150 +#define SDHSTS_CRC7_ERROR               0x10
 151 +#define SDHSTS_FIFO_ERROR               0x08
 152 +/* Reserved */
 153 +/* Reserved */
 154 +#define SDHSTS_DATA_FLAG                0x01
 155 +
 156 +#define SDHSTS_TRANSFER_ERROR_MASK      (SDHSTS_CRC16_ERROR|SDHSTS_REW_TIME_OUT|SDHSTS_FIFO_ERROR)
 157 +#define SDHSTS_ERROR_MASK               (SDHSTS_CMD_TIME_OUT|SDHSTS_TRANSFER_ERROR_MASK)
 158 +/* SDHSTS_CRC7_ERROR - ignore this as MMC cards generate this spuriously */
 159 +
 160 +#define SDHCFG_BUSY_IRPT_EN     (1<<10)
 161 +#define SDHCFG_BLOCK_IRPT_EN    (1<<8)
 162 +#define SDHCFG_SDIO_IRPT_EN     (1<<5)
 163 +#define SDHCFG_DATA_IRPT_EN     (1<<4)
 164 +#define SDHCFG_SLOW_CARD        (1<<3)
 165 +#define SDHCFG_WIDE_EXT_BUS     (1<<2)
 166 +#define SDHCFG_WIDE_INT_BUS     (1<<1)
 167 +#define SDHCFG_REL_CMD_LINE     (1<<0)
 168 +
 169 +#define SDEDM_FORCE_DATA_MODE   (1<<19)
 170 +#define SDEDM_CLOCK_PULSE       (1<<20)
 171 +#define SDEDM_BYPASS            (1<<21)
 172 +
 173 +#define SDEDM_WRITE_THRESHOLD_SHIFT 9
 174 +#define SDEDM_READ_THRESHOLD_SHIFT 14
 175 +#define SDEDM_THRESHOLD_MASK     0x1f
 176 +
 177 +/* the inclusive limit in bytes under which PIO will be used instead of DMA */
 178 +#ifdef CONFIG_MMC_BCM2835_SDHOST_PIO_DMA_BARRIER
 179 +#define PIO_DMA_BARRIER CONFIG_MMC_BCM2835_SDHOST_PIO_DMA_BARRIER
 180 +#else
 181 +#define PIO_DMA_BARRIER 0
 182 +#endif
 183 +
 184 +#define MIN_FREQ 400000
 185 +#define TIMEOUT_VAL 0xE
 186 +#define BCM2835_SDHOST_WRITE_DELAY(f)  (((2 * 1000000) / f) + 1)
 187 +
 188 +#ifndef BCM2708_PERI_BASE
 189 + #define BCM2708_PERI_BASE 0x20000000
 190 +#endif
 191 +
 192 +/* FIXME: Needs IOMMU support */
 193 +#define BCM2835_VCMMU_SHIFT            (0x7E000000 - BCM2708_PERI_BASE)
 194 +
 195 +
 196 +struct bcm2835_host {
 197 +       spinlock_t              lock;
 198 +
 199 +       void __iomem            *ioaddr;
 200 +       u32                     phys_addr;
 201 +
 202 +       struct mmc_host         *mmc;
 203 +
 204 +       u32                     timeout;
 205 +
 206 +       int                     clock;          /* Current clock speed */
 207 +
 208 +       bool                    slow_card;      /* Force 11-bit divisor */
 209 +
 210 +       unsigned int            max_clk;        /* Max possible freq */
 211 +       unsigned int            timeout_clk;    /* Timeout freq (KHz) */
 212 +
 213 +       struct tasklet_struct   finish_tasklet; /* Tasklet structures */
 214 +
 215 +       struct timer_list       timer;          /* Timer for timeouts */
 216 +
 217 +       struct sg_mapping_iter  sg_miter;       /* SG state for PIO */
 218 +       unsigned int            blocks;         /* remaining PIO blocks */
 219 +
 220 +       int                     irq;            /* Device IRQ */
 221 +
 222 +
 223 +       /* cached registers */
 224 +       u32                     hcfg;
 225 +       u32                     cdiv;
 226 +
 227 +       struct mmc_request              *mrq;                   /* Current request */
 228 +       struct mmc_command              *cmd;                   /* Current command */
 229 +       struct mmc_data                 *data;                  /* Current data request */
 230 +       unsigned int                    data_complete:1;        /* Data finished before cmd */
 231 +
 232 +       unsigned int                    flush_fifo:1;           /* Drain the fifo when finishing */
 233 +
 234 +       unsigned int                    use_busy:1;             /* Wait for busy interrupt */
 235 +
 236 +       u32                             thread_isr;
 237 +
 238 +       /*DMA part*/
 239 +       struct dma_chan                 *dma_chan_rx;           /* DMA channel for reads */
 240 +       struct dma_chan                 *dma_chan_tx;           /* DMA channel for writes */
 241 +
 242 +       bool                            allow_dma;
 243 +       bool                            have_dma;
 244 +       bool                            use_dma;
 245 +       /*end of DMA part*/
 246 +
 247 +       int                             max_delay;      /* maximum length of time spent waiting */
 248 +       struct timeval                  stop_time;      /* when the last stop was issued */
 249 +       u32                             delay_after_stop; /* minimum time between stop and subsequent data transfer */
 250 +       u32                             overclock_50;   /* frequency to use when 50MHz is requested (in MHz) */
 251 +       u32                             max_overclock;  /* Highest reported */
 252 +};
 253 +
 254 +
 255 +static inline void bcm2835_sdhost_write(struct bcm2835_host *host, u32 val, int reg)
 256 +{
 257 +       writel(val, host->ioaddr + reg);
 258 +}
 259 +
 260 +static inline u32 bcm2835_sdhost_read(struct bcm2835_host *host, int reg)
 261 +{
 262 +       return readl(host->ioaddr + reg);
 263 +}
 264 +
 265 +static inline u32 bcm2835_sdhost_read_relaxed(struct bcm2835_host *host, int reg)
 266 +{
 267 +       return readl_relaxed(host->ioaddr + reg);
 268 +}
 269 +
 270 +static void bcm2835_sdhost_dumpregs(struct bcm2835_host *host)
 271 +{
 272 +       pr_info(DRIVER_NAME ": =========== REGISTER DUMP (%s)===========\n",
 273 +               mmc_hostname(host->mmc));
 274 +
 275 +       pr_info(DRIVER_NAME ": SDCMD  0x%08x\n",
 276 +               bcm2835_sdhost_read(host, SDCMD));
 277 +       pr_info(DRIVER_NAME ": SDARG  0x%08x\n",
 278 +               bcm2835_sdhost_read(host, SDARG));
 279 +       pr_info(DRIVER_NAME ": SDTOUT 0x%08x\n",
 280 +               bcm2835_sdhost_read(host, SDTOUT));
 281 +       pr_info(DRIVER_NAME ": SDCDIV 0x%08x\n",
 282 +               bcm2835_sdhost_read(host, SDCDIV));
 283 +       pr_info(DRIVER_NAME ": SDRSP0 0x%08x\n",
 284 +               bcm2835_sdhost_read(host, SDRSP0));
 285 +       pr_info(DRIVER_NAME ": SDRSP1 0x%08x\n",
 286 +               bcm2835_sdhost_read(host, SDRSP1));
 287 +       pr_info(DRIVER_NAME ": SDRSP2 0x%08x\n",
 288 +               bcm2835_sdhost_read(host, SDRSP2));
 289 +       pr_info(DRIVER_NAME ": SDRSP3 0x%08x\n",
 290 +               bcm2835_sdhost_read(host, SDRSP3));
 291 +       pr_info(DRIVER_NAME ": SDHSTS 0x%08x\n",
 292 +               bcm2835_sdhost_read(host, SDHSTS));
 293 +       pr_info(DRIVER_NAME ": SDVDD  0x%08x\n",
 294 +               bcm2835_sdhost_read(host, SDVDD));
 295 +       pr_info(DRIVER_NAME ": SDEDM  0x%08x\n",
 296 +               bcm2835_sdhost_read(host, SDEDM));
 297 +       pr_info(DRIVER_NAME ": SDHCFG 0x%08x\n",
 298 +               bcm2835_sdhost_read(host, SDHCFG));
 299 +       pr_info(DRIVER_NAME ": SDHBCT 0x%08x\n",
 300 +               bcm2835_sdhost_read(host, SDHBCT));
 301 +       pr_info(DRIVER_NAME ": SDHBLC 0x%08x\n",
 302 +               bcm2835_sdhost_read(host, SDHBLC));
 303 +
 304 +       pr_debug(DRIVER_NAME ": ===========================================\n");
 305 +}
 306 +
 307 +
 308 +static void bcm2835_sdhost_set_power(struct bcm2835_host *host, bool on)
 309 +{
 310 +       bcm2835_sdhost_write(host, on ? 1 : 0, SDVDD);
 311 +}
 312 +
 313 +
 314 +static void bcm2835_sdhost_reset(struct bcm2835_host *host)
 315 +{
 316 +       u32 temp;
 317 +
 318 +       pr_debug("bcm2835_sdhost_reset\n");
 319 +
 320 +       bcm2835_sdhost_set_power(host, false);
 321 +
 322 +       bcm2835_sdhost_write(host, 0, SDCMD);
 323 +       bcm2835_sdhost_write(host, 0, SDARG);
 324 +       bcm2835_sdhost_write(host, 0xf00000, SDTOUT);
 325 +       bcm2835_sdhost_write(host, 0, SDCDIV);
 326 +       bcm2835_sdhost_write(host, 0x7f8, SDHSTS); /* Write 1s to clear */
 327 +       bcm2835_sdhost_write(host, 0, SDHCFG);
 328 +       bcm2835_sdhost_write(host, 0, SDHBCT);
 329 +       bcm2835_sdhost_write(host, 0, SDHBLC);
 330 +
 331 +       /* Limit fifo usage due to silicon bug */
 332 +       temp = bcm2835_sdhost_read(host, SDEDM);
 333 +       temp &= ~((SDEDM_THRESHOLD_MASK<<SDEDM_READ_THRESHOLD_SHIFT) |
 334 +                 (SDEDM_THRESHOLD_MASK<<SDEDM_WRITE_THRESHOLD_SHIFT));
 335 +       temp |= (SAFE_READ_THRESHOLD << SDEDM_READ_THRESHOLD_SHIFT) |
 336 +               (SAFE_WRITE_THRESHOLD << SDEDM_WRITE_THRESHOLD_SHIFT);
 337 +       bcm2835_sdhost_write(host, temp, SDEDM);
 338 +       mdelay(10);
 339 +       bcm2835_sdhost_set_power(host, true);
 340 +       mdelay(10);
 341 +       host->clock = 0;
 342 +       bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
 343 +       bcm2835_sdhost_write(host, host->cdiv, SDCDIV);
 344 +       mmiowb();
 345 +}
 346 +
 347 +static void bcm2835_sdhost_set_ios(struct mmc_host *mmc, struct mmc_ios *ios);
 348 +
 349 +static void bcm2835_sdhost_init(struct bcm2835_host *host, int soft)
 350 +{
 351 +       pr_debug("bcm2835_sdhost_init(%d)\n", soft);
 352 +
 353 +       /* Set interrupt enables */
 354 +       host->hcfg = SDHCFG_BUSY_IRPT_EN;
 355 +
 356 +       bcm2835_sdhost_reset(host);
 357 +
 358 +       if (soft) {
 359 +               /* force clock reconfiguration */
 360 +               host->clock = 0;
 361 +               bcm2835_sdhost_set_ios(host->mmc, &host->mmc->ios);
 362 +       }
 363 +}
 364 +
 365 +static bool bcm2835_sdhost_is_write_complete(struct bcm2835_host *host)
 366 +{
 367 +       bool write_complete = ((bcm2835_sdhost_read(host, SDEDM) & 0xf) == 1);
 368 +
 369 +       if (!write_complete) {
 370 +               /* Request an IRQ for the last block */
 371 +               host->hcfg |= SDHCFG_BLOCK_IRPT_EN;
 372 +               bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
 373 +               if ((bcm2835_sdhost_read(host, SDEDM) & 0xf) == 1) {
 374 +                       /* The write has now completed. Disable the interrupt
 375 +                          and clear the status flag */
 376 +                       host->hcfg &= ~SDHCFG_BLOCK_IRPT_EN;
 377 +                       bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
 378 +                       bcm2835_sdhost_write(host, SDHSTS_BLOCK_IRPT, SDHSTS);
 379 +                       write_complete = true;
 380 +               }
 381 +       }
 382 +
 383 +       return write_complete;
 384 +}
 385 +
 386 +static void bcm2835_sdhost_wait_write_complete(struct bcm2835_host *host)
 387 +{
 388 +       int timediff;
 389 +#ifdef DEBUG
 390 +       static struct timeval start_time;
 391 +       static int max_stall_time = 0;
 392 +       static int total_stall_time = 0;
 393 +       struct timeval before, after;
 394 +
 395 +       do_gettimeofday(&before);
 396 +       if (max_stall_time == 0)
 397 +               start_time = before;
 398 +#endif
 399 +
 400 +       timediff = 0;
 401 +
 402 +       while (1) {
 403 +               u32 edm = bcm2835_sdhost_read(host, SDEDM);
 404 +               if ((edm & 0xf) == 1)
 405 +                       break;
 406 +               timediff++;
 407 +               if (timediff > 5000000) {
 408 +#ifdef DEBUG
 409 +                       do_gettimeofday(&after);
 410 +                       timediff = (after.tv_sec - before.tv_sec)*1000000 +
 411 +                               (after.tv_usec - before.tv_usec);
 412 +
 413 +                       pr_err(" wait_write_complete - still waiting after %dus\n",
 414 +                              timediff);
 415 +#else
 416 +                       pr_err(" wait_write_complete - still waiting after %d retries\n",
 417 +                              timediff);
 418 +#endif
 419 +                       bcm2835_sdhost_dumpregs(host);
 420 +                       host->data->error = -ETIMEDOUT;
 421 +                       return;
 422 +               }
 423 +       }
 424 +
 425 +#ifdef DEBUG
 426 +       do_gettimeofday(&after);
 427 +       timediff = (after.tv_sec - before.tv_sec)*1000000 + (after.tv_usec - before.tv_usec);
 428 +
 429 +       total_stall_time += timediff;
 430 +       if (timediff > max_stall_time)
 431 +               max_stall_time = timediff;
 432 +
 433 +       if ((after.tv_sec - start_time.tv_sec) > 10) {
 434 +               pr_debug(" wait_write_complete - max wait %dus, total %dus\n",
 435 +                        max_stall_time, total_stall_time);
 436 +               start_time = after;
 437 +               max_stall_time = 0;
 438 +               total_stall_time = 0;
 439 +       }
 440 +#endif
 441 +}
 442 +
 443 +static void bcm2835_sdhost_finish_data(struct bcm2835_host *host);
 444 +
 445 +static void bcm2835_sdhost_dma_complete(void *param)
 446 +{
 447 +       struct bcm2835_host *host = param;
 448 +       struct dma_chan *dma_chan;
 449 +       unsigned long flags;
 450 +       u32 dir_data;
 451 +
 452 +       spin_lock_irqsave(&host->lock, flags);
 453 +
 454 +       if (host->data) {
 455 +               bool write_complete;
 456 +               if (USE_BLOCK_IRQ)
 457 +                       write_complete = bcm2835_sdhost_is_write_complete(host);
 458 +               else {
 459 +                       bcm2835_sdhost_wait_write_complete(host);
 460 +                       write_complete = true;
 461 +               }
 462 +               pr_debug("dma_complete() - write_complete=%d\n",
 463 +                        write_complete);
 464 +
 465 +               if (write_complete || (host->data->flags & MMC_DATA_READ))
 466 +               {
 467 +                       if (write_complete) {
 468 +                               dma_chan = host->dma_chan_tx;
 469 +                               dir_data = DMA_TO_DEVICE;
 470 +                       } else {
 471 +                               dma_chan = host->dma_chan_rx;
 472 +                               dir_data = DMA_FROM_DEVICE;
 473 +                       }
 474 +
 475 +                       dma_unmap_sg(dma_chan->device->dev,
 476 +                                    host->data->sg, host->data->sg_len,
 477 +                                    dir_data);
 478 +
 479 +                       bcm2835_sdhost_finish_data(host);
 480 +               }
 481 +       }
 482 +
 483 +       spin_unlock_irqrestore(&host->lock, flags);
 484 +}
 485 +
 486 +static void bcm2835_sdhost_read_block_pio(struct bcm2835_host *host)
 487 +{
 488 +       unsigned long flags;
 489 +       size_t blksize, len;
 490 +       u32 *buf;
 491 +
 492 +       blksize = host->data->blksz;
 493 +
 494 +       local_irq_save(flags);
 495 +
 496 +       while (blksize) {
 497 +               if (!sg_miter_next(&host->sg_miter))
 498 +                       BUG();
 499 +
 500 +               len = min(host->sg_miter.length, blksize);
 501 +               BUG_ON(len % 4);
 502 +
 503 +               blksize -= len;
 504 +               host->sg_miter.consumed = len;
 505 +
 506 +               buf = (u32 *)host->sg_miter.addr;
 507 +
 508 +               while (len) {
 509 +                       while (1) {
 510 +                               u32 hsts;
 511 +                               hsts = bcm2835_sdhost_read(host, SDHSTS);
 512 +                               if (hsts & SDHSTS_DATA_FLAG)
 513 +                                       break;
 514 +
 515 +                               if (hsts & SDHSTS_ERROR_MASK) {
 516 +                                       pr_err("%s: Transfer error - HSTS %x, HBCT %x - %x left\n",
 517 +                                              mmc_hostname(host->mmc),
 518 +                                              hsts,
 519 +                                              bcm2835_sdhost_read(host, SDHBCT),
 520 +                                              blksize + len);
 521 +                                       if (hsts & SDHSTS_REW_TIME_OUT)
 522 +                                               host->data->error = -ETIMEDOUT;
 523 +                                       else if (hsts & (SDHSTS_CRC16_ERROR ||
 524 +                                                   SDHSTS_CRC7_ERROR))
 525 +                                               host->data->error = -EILSEQ;
 526 +                                       else {
 527 +                                               pr_err("%s: unexpected data error\n",
 528 +                                                      mmc_hostname(host->mmc));
 529 +                                               bcm2835_sdhost_dumpregs(host);
 530 +                                               host->cmd->error = -EIO;
 531 +                                       }
 532 +                               }
 533 +                       }
 534 +
 535 +                       *(buf++) = bcm2835_sdhost_read(host, SDDATA);
 536 +                       len -= 4;
 537 +               }
 538 +       }
 539 +
 540 +       sg_miter_stop(&host->sg_miter);
 541 +
 542 +       local_irq_restore(flags);
 543 +}
 544 +
 545 +static void bcm2835_sdhost_write_block_pio(struct bcm2835_host *host)
 546 +{
 547 +       unsigned long flags;
 548 +       size_t blksize, len;
 549 +       u32 *buf;
 550 +
 551 +       blksize = host->data->blksz;
 552 +
 553 +       local_irq_save(flags);
 554 +
 555 +       while (blksize) {
 556 +               if (!sg_miter_next(&host->sg_miter))
 557 +                       BUG();
 558 +
 559 +               len = min(host->sg_miter.length, blksize);
 560 +               BUG_ON(len % 4);
 561 +
 562 +               blksize -= len;
 563 +               host->sg_miter.consumed = len;
 564 +
 565 +               buf = host->sg_miter.addr;
 566 +
 567 +               while (len) {
 568 +                       while (!(bcm2835_sdhost_read(host, SDHSTS) & SDHSTS_DATA_FLAG))
 569 +                               continue;
 570 +                       bcm2835_sdhost_write(host, *(buf++), SDDATA);
 571 +                       len -= 4;
 572 +               }
 573 +       }
 574 +
 575 +       sg_miter_stop(&host->sg_miter);
 576 +
 577 +       local_irq_restore(flags);
 578 +}
 579 +
 580 +
 581 +static void bcm2835_sdhost_transfer_pio(struct bcm2835_host *host)
 582 +{
 583 +       BUG_ON(!host->data);
 584 +
 585 +       if (host->data->flags & MMC_DATA_READ)
 586 +               bcm2835_sdhost_read_block_pio(host);
 587 +       else
 588 +               bcm2835_sdhost_write_block_pio(host);
 589 +}
 590 +
 591 +
 592 +static void bcm2835_sdhost_transfer_dma(struct bcm2835_host *host)
 593 +{
 594 +       u32 len, dir_data, dir_slave;
 595 +       struct dma_async_tx_descriptor *desc = NULL;
 596 +       struct dma_chan *dma_chan;
 597 +
 598 +       pr_debug("bcm2835_sdhost_transfer_dma()\n");
 599 +
 600 +       WARN_ON(!host->data);
 601 +
 602 +       if (!host->data)
 603 +               return;
 604 +
 605 +       if (host->data->flags & MMC_DATA_READ) {
 606 +               dma_chan = host->dma_chan_rx;
 607 +               dir_data = DMA_FROM_DEVICE;
 608 +               dir_slave = DMA_DEV_TO_MEM;
 609 +       } else {
 610 +               dma_chan = host->dma_chan_tx;
 611 +               dir_data = DMA_TO_DEVICE;
 612 +               dir_slave = DMA_MEM_TO_DEV;
 613 +       }
 614 +
 615 +       BUG_ON(!dma_chan->device);
 616 +       BUG_ON(!dma_chan->device->dev);
 617 +       BUG_ON(!host->data->sg);
 618 +
 619 +       len = dma_map_sg(dma_chan->device->dev, host->data->sg,
 620 +                        host->data->sg_len, dir_data);
 621 +       if (len > 0) {
 622 +               desc = dmaengine_prep_slave_sg(dma_chan, host->data->sg,
 623 +                                              len, dir_slave,
 624 +                                              DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
 625 +       } else {
 626 +               dev_err(mmc_dev(host->mmc), "dma_map_sg returned zero length\n");
 627 +       }
 628 +       if (desc) {
 629 +               desc->callback = bcm2835_sdhost_dma_complete;
 630 +               desc->callback_param = host;
 631 +               dmaengine_submit(desc);
 632 +               dma_async_issue_pending(dma_chan);
 633 +       }
 634 +
 635 +}
 636 +
 637 +
 638 +static void bcm2835_sdhost_set_transfer_irqs(struct bcm2835_host *host)
 639 +{
 640 +       u32 all_irqs = SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN |
 641 +               SDHCFG_BUSY_IRPT_EN;
 642 +       if (host->use_dma)
 643 +               host->hcfg = (host->hcfg & ~all_irqs) |
 644 +                       SDHCFG_BUSY_IRPT_EN;
 645 +       else
 646 +               host->hcfg = (host->hcfg & ~all_irqs) |
 647 +                       SDHCFG_DATA_IRPT_EN |
 648 +                       SDHCFG_BUSY_IRPT_EN;
 649 +
 650 +       bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
 651 +}
 652 +
 653 +
 654 +static void bcm2835_sdhost_prepare_data(struct bcm2835_host *host, struct mmc_command *cmd)
 655 +{
 656 +       struct mmc_data *data = cmd->data;
 657 +
 658 +       WARN_ON(host->data);
 659 +
 660 +       if (!data)
 661 +               return;
 662 +
 663 +       /* Sanity checks */
 664 +       BUG_ON(data->blksz * data->blocks > 524288);
 665 +       BUG_ON(data->blksz > host->mmc->max_blk_size);
 666 +       BUG_ON(data->blocks > 65535);
 667 +
 668 +       host->data = data;
 669 +       host->data_complete = 0;
 670 +       host->flush_fifo = 0;
 671 +       host->data->bytes_xfered = 0;
 672 +
 673 +       if (!host->use_dma) {
 674 +               int flags;
 675 +
 676 +               flags = SG_MITER_ATOMIC;
 677 +               if (data->flags & MMC_DATA_READ)
 678 +                       flags |= SG_MITER_TO_SG;
 679 +               else
 680 +                       flags |= SG_MITER_FROM_SG;
 681 +               sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags);
 682 +               host->blocks = data->blocks;
 683 +       }
 684 +
 685 +       host->use_dma = host->have_dma && data->blocks > PIO_DMA_BARRIER;
 686 +
 687 +       bcm2835_sdhost_set_transfer_irqs(host);
 688 +
 689 +       bcm2835_sdhost_write(host, data->blksz, SDHBCT);
 690 +       if (host->use_dma)
 691 +               bcm2835_sdhost_write(host, data->blocks, SDHBLC);
 692 +
 693 +       BUG_ON(!host->data);
 694 +}
 695 +
 696 +
 697 +void bcm2835_sdhost_send_command(struct bcm2835_host *host, struct mmc_command *cmd)
 698 +{
 699 +       u32 sdcmd;
 700 +       unsigned long timeout;
 701 +
 702 +       WARN_ON(host->cmd);
 703 +
 704 +       if (1) {
 705 +               pr_debug("bcm2835_sdhost_send_command: %08x %08x (flags %x)\n",
 706 +                        cmd->opcode, cmd->arg, (cmd->flags & 0xff) | (cmd->data ? cmd->data->flags : 0));
 707 +               if (cmd->data)
 708 +                       pr_debug("bcm2835_sdhost_send_command: %s %d*%x\n",
 709 +                                (cmd->data->flags & MMC_DATA_READ) ?
 710 +                                "read" : "write", cmd->data->blocks,
 711 +                                cmd->data->blksz);
 712 +       }
 713 +
 714 +       /* Wait max 10 ms */
 715 +       timeout = 1000;
 716 +
 717 +       while (bcm2835_sdhost_read(host, SDCMD) & SDCMD_NEW_FLAG) {
 718 +               if (timeout == 0) {
 719 +                       pr_err("%s: Previous command never completed.\n",
 720 +                               mmc_hostname(host->mmc));
 721 +                       bcm2835_sdhost_dumpregs(host);
 722 +                       cmd->error = -EIO;
 723 +                       tasklet_schedule(&host->finish_tasklet);
 724 +                       return;
 725 +               }
 726 +               timeout--;
 727 +               udelay(10);
 728 +       }
 729 +
 730 +       if ((1000-timeout)/100 > 1 && (1000-timeout)/100 > host->max_delay) {
 731 +               host->max_delay = (1000-timeout)/100;
 732 +               pr_warning("Warning: SDHost controller hung for %d ms\n", host->max_delay);
 733 +       }
 734 +
 735 +       timeout = jiffies;
 736 +#ifdef CONFIG_ARCH_BCM2835
 737 +       if (!cmd->data && cmd->busy_timeout > 9000)
 738 +               timeout += DIV_ROUND_UP(cmd->busy_timeout, 1000) * HZ + HZ;
 739 +       else
 740 +#endif
 741 +       timeout += 10 * HZ;
 742 +       mod_timer(&host->timer, timeout);
 743 +
 744 +       host->cmd = cmd;
 745 +
 746 +       bcm2835_sdhost_prepare_data(host, cmd);
 747 +
 748 +       bcm2835_sdhost_write(host, cmd->arg, SDARG);
 749 +
 750 +       if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 751 +               pr_err("%s: Unsupported response type!\n",
 752 +                       mmc_hostname(host->mmc));
 753 +               cmd->error = -EINVAL;
 754 +               tasklet_schedule(&host->finish_tasklet);
 755 +               return;
 756 +       }
 757 +
 758 +       sdcmd = cmd->opcode & SDCMD_CMD_MASK;
 759 +
 760 +       if (!(cmd->flags & MMC_RSP_PRESENT))
 761 +               sdcmd |= SDCMD_NO_RESPONSE;
 762 +       else {
 763 +               if (cmd->flags & MMC_RSP_136)
 764 +                       sdcmd |= SDCMD_LONG_RESPONSE;
 765 +               if (cmd->flags & MMC_RSP_BUSY) {
 766 +                       sdcmd |= SDCMD_BUSYWAIT;
 767 +                       host->use_busy = 1;
 768 +               }
 769 +       }
 770 +
 771 +       if (cmd->data) {
 772 +               if (host->delay_after_stop) {
 773 +                       struct timeval now;
 774 +                       int time_since_stop;
 775 +                       do_gettimeofday(&now);
 776 +                       time_since_stop = (now.tv_sec - host->stop_time.tv_sec);
 777 +                       if (time_since_stop < 2) {
 778 +                               /* Possibly less than one second */
 779 +                               time_since_stop = time_since_stop * 1000000 +
 780 +                                       (now.tv_usec - host->stop_time.tv_usec);
 781 +                               if (time_since_stop < host->delay_after_stop)
 782 +                                       udelay(host->delay_after_stop -
 783 +                                              time_since_stop);
 784 +                       }
 785 +               }
 786 +
 787 +               if (cmd->data->flags & MMC_DATA_WRITE)
 788 +                       sdcmd |= SDCMD_WRITE_CMD;
 789 +               if (cmd->data->flags & MMC_DATA_READ)
 790 +                       sdcmd |= SDCMD_READ_CMD;
 791 +       }
 792 +
 793 +       bcm2835_sdhost_write(host, sdcmd | SDCMD_NEW_FLAG, SDCMD);
 794 +}
 795 +
 796 +
 797 +static void bcm2835_sdhost_finish_command(struct bcm2835_host *host);
 798 +static void bcm2835_sdhost_transfer_complete(struct bcm2835_host *host);
 799 +
 800 +static void bcm2835_sdhost_finish_data(struct bcm2835_host *host)
 801 +{
 802 +       struct mmc_data *data;
 803 +
 804 +       data = host->data;
 805 +       BUG_ON(!data);
 806 +
 807 +       pr_debug("finish_data(error %d, stop %d, sbc %d)\n",
 808 +              data->error, data->stop ? 1 : 0,
 809 +              host->mrq->sbc ? 1 : 0);
 810 +
 811 +       host->hcfg &= ~(SDHCFG_DATA_IRPT_EN | SDHCFG_BLOCK_IRPT_EN);
 812 +       bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
 813 +
 814 +       if (data->error) {
 815 +               data->bytes_xfered = 0;
 816 +       } else
 817 +               data->bytes_xfered = data->blksz * data->blocks;
 818 +
 819 +       host->data_complete = 1;
 820 +
 821 +       if (host->cmd) {
 822 +               /*
 823 +                * Data managed to finish before the
 824 +                * command completed. Make sure we do
 825 +                * things in the proper order.
 826 +                */
 827 +               pr_debug("Finished early - HSTS %x\n",
 828 +                        bcm2835_sdhost_read(host, SDHSTS));
 829 +       }
 830 +       else
 831 +               bcm2835_sdhost_transfer_complete(host);
 832 +}
 833 +
 834 +
 835 +static void bcm2835_sdhost_transfer_complete(struct bcm2835_host *host)
 836 +{
 837 +       struct mmc_data *data;
 838 +
 839 +       BUG_ON(host->cmd);
 840 +       BUG_ON(!host->data);
 841 +       BUG_ON(!host->data_complete);
 842 +
 843 +       data = host->data;
 844 +       host->data = NULL;
 845 +
 846 +       pr_debug("transfer_complete(error %d, stop %d)\n",
 847 +              data->error, data->stop ? 1 : 0);
 848 +
 849 +       if (data->error)
 850 +               /*
 851 +                * The controller needs a reset of internal state machines
 852 +                * upon error conditions.
 853 +                */
 854 +               bcm2835_sdhost_reset(host);
 855 +
 856 +       /*
 857 +        * Need to send CMD12 if -
 858 +        * a) open-ended multiblock transfer (no CMD23)
 859 +        * b) error in multiblock transfer
 860 +        */
 861 +       if (data->stop &&
 862 +           (data->error ||
 863 +            !host->mrq->sbc)) {
 864 +               host->flush_fifo = 1;
 865 +               bcm2835_sdhost_send_command(host, data->stop);
 866 +               if (host->delay_after_stop)
 867 +                       do_gettimeofday(&host->stop_time);
 868 +               if (!host->use_busy)
 869 +                       bcm2835_sdhost_finish_command(host);
 870 +       } else {
 871 +               tasklet_schedule(&host->finish_tasklet);
 872 +       }
 873 +}
 874 +
 875 +static void bcm2835_sdhost_finish_command(struct bcm2835_host *host)
 876 +{
 877 +       u32 sdcmd;
 878 +       int timeout = 1000;
 879 +#ifdef DEBUG
 880 +       struct timeval before, after;
 881 +       int timediff = 0;
 882 +#endif
 883 +
 884 +       pr_debug("finish_command(%x)\n", bcm2835_sdhost_read(host, SDCMD));
 885 +
 886 +       BUG_ON(!host->cmd || !host->mrq);
 887 +
 888 +#ifdef DEBUG
 889 +       do_gettimeofday(&before);
 890 +#endif
 891 +       for (sdcmd = bcm2835_sdhost_read(host, SDCMD);
 892 +            (sdcmd & SDCMD_NEW_FLAG) && timeout;
 893 +            timeout--) {
 894 +               if (host->flush_fifo) {
 895 +                       while (bcm2835_sdhost_read(host, SDHSTS) &
 896 +                              SDHSTS_DATA_FLAG)
 897 +                               (void)bcm2835_sdhost_read(host, SDDATA);
 898 +               }
 899 +               udelay(10);
 900 +               sdcmd = bcm2835_sdhost_read(host, SDCMD);
 901 +       }
 902 +#ifdef DEBUG
 903 +       do_gettimeofday(&after);
 904 +       timediff = (after.tv_sec - before.tv_sec)*1000000 +
 905 +               (after.tv_usec - before.tv_usec);
 906 +
 907 +       pr_debug(" finish_command - waited %dus\n", timediff);
 908 +#endif
 909 +
 910 +       if (timeout == 0) {
 911 +               pr_err("%s: Command never completed.\n",
 912 +                      mmc_hostname(host->mmc));
 913 +               bcm2835_sdhost_dumpregs(host);
 914 +               host->cmd->error = -EIO;
 915 +               tasklet_schedule(&host->finish_tasklet);
 916 +               return;
 917 +       }
 918 +
 919 +       if (host->flush_fifo) {
 920 +               for (timeout = 100;
 921 +                    (bcm2835_sdhost_read(host, SDHSTS) & SDHSTS_DATA_FLAG) && timeout;
 922 +                    timeout--) {
 923 +                       (void)bcm2835_sdhost_read(host, SDDATA);
 924 +               }
 925 +               host->flush_fifo = 0;
 926 +               if (timeout == 0) {
 927 +                       pr_err("%s: FIFO never drained.\n",
 928 +                              mmc_hostname(host->mmc));
 929 +                       bcm2835_sdhost_dumpregs(host);
 930 +                       host->cmd->error = -EIO;
 931 +                       tasklet_schedule(&host->finish_tasklet);
 932 +                       return;
 933 +               }
 934 +       }
 935 +
 936 +       /* Check for errors */
 937 +       if (sdcmd & SDCMD_FAIL_FLAG)
 938 +       {
 939 +               u32 sdhsts = bcm2835_sdhost_read(host, SDHSTS);
 940 +
 941 +               pr_debug("%s: error detected - CMD %x, HSTS %03x, EDM %x\n",
 942 +                      mmc_hostname(host->mmc), sdcmd, sdhsts,
 943 +                      bcm2835_sdhost_read(host, SDEDM));
 944 +
 945 +               if (sdhsts & SDHSTS_CMD_TIME_OUT)
 946 +                       host->cmd->error = -ETIMEDOUT;
 947 +               else
 948 +               {
 949 +                       pr_err("%s: unexpected command error\n",
 950 +                              mmc_hostname(host->mmc));
 951 +                       bcm2835_sdhost_dumpregs(host);
 952 +                       host->cmd->error = -EIO;
 953 +               }
 954 +               tasklet_schedule(&host->finish_tasklet);
 955 +               return;
 956 +       }
 957 +
 958 +       if (host->cmd->flags & MMC_RSP_PRESENT) {
 959 +               if (host->cmd->flags & MMC_RSP_136) {
 960 +                       int i;
 961 +                       for (i = 0; i < 4; i++)
 962 +                               host->cmd->resp[3 - i] = bcm2835_sdhost_read(host, SDRSP0 + i*4);
 963 +                       pr_debug("bcm2835_sdhost_finish_command: %08x %08x %08x %08x\n",
 964 +                                host->cmd->resp[0], host->cmd->resp[1], host->cmd->resp[2], host->cmd->resp[3]);
 965 +               } else {
 966 +                       host->cmd->resp[0] = bcm2835_sdhost_read(host, SDRSP0);
 967 +                       pr_debug("bcm2835_sdhost_finish_command: %08x\n",
 968 +                                host->cmd->resp[0]);
 969 +               }
 970 +       }
 971 +
 972 +       host->cmd->error = 0;
 973 +
 974 +       if (host->cmd == host->mrq->sbc) {
 975 +               /* Finished CMD23, now send actual command. */
 976 +               host->cmd = NULL;
 977 +               bcm2835_sdhost_send_command(host, host->mrq->cmd);
 978 +
 979 +               if (host->cmd->data && host->use_dma)
 980 +                       /* DMA transfer starts now, PIO starts after irq */
 981 +                       bcm2835_sdhost_transfer_dma(host);
 982 +
 983 +               if (!host->use_busy)
 984 +                       bcm2835_sdhost_finish_command(host);
 985 +       } else if (host->cmd == host->mrq->stop)
 986 +               /* Finished CMD12 */
 987 +               tasklet_schedule(&host->finish_tasklet);
 988 +       else {
 989 +               /* Processed actual command. */
 990 +               host->cmd = NULL;
 991 +               if (!host->data)
 992 +                       tasklet_schedule(&host->finish_tasklet);
 993 +               else if (host->data_complete)
 994 +                       bcm2835_sdhost_transfer_complete(host);
 995 +       }
 996 +}
 997 +
 998 +static void bcm2835_sdhost_timeout_timer(unsigned long data)
 999 +{
1000 +       struct bcm2835_host *host;
1001 +       unsigned long flags;
1002 +
1003 +       host = (struct bcm2835_host *)data;
1004 +
1005 +       spin_lock_irqsave(&host->lock, flags);
1006 +
1007 +       if (host->mrq) {
1008 +               pr_err("%s: Timeout waiting for hardware interrupt.\n",
1009 +                       mmc_hostname(host->mmc));
1010 +               bcm2835_sdhost_dumpregs(host);
1011 +
1012 +               if (host->data) {
1013 +                       host->data->error = -ETIMEDOUT;
1014 +                       bcm2835_sdhost_finish_data(host);
1015 +               } else {
1016 +                       if (host->cmd)
1017 +                               host->cmd->error = -ETIMEDOUT;
1018 +                       else
1019 +                               host->mrq->cmd->error = -ETIMEDOUT;
1020 +
1021 +                       pr_debug("timeout_timer tasklet_schedule\n");
1022 +                       tasklet_schedule(&host->finish_tasklet);
1023 +               }
1024 +       }
1025 +
1026 +       mmiowb();
1027 +       spin_unlock_irqrestore(&host->lock, flags);
1028 +}
1029 +
1030 +static void bcm2835_sdhost_enable_sdio_irq_nolock(struct bcm2835_host *host, int enable)
1031 +{
1032 +       if (enable)
1033 +               host->hcfg |= SDHCFG_SDIO_IRPT_EN;
1034 +       else
1035 +               host->hcfg &= ~SDHCFG_SDIO_IRPT_EN;
1036 +       bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
1037 +       mmiowb();
1038 +}
1039 +
1040 +static void bcm2835_sdhost_enable_sdio_irq(struct mmc_host *mmc, int enable)
1041 +{
1042 +       struct bcm2835_host *host = mmc_priv(mmc);
1043 +       unsigned long flags;
1044 +
1045 +       pr_debug("bcm2835_sdhost_enable_sdio_irq(%d)\n", enable);
1046 +       spin_lock_irqsave(&host->lock, flags);
1047 +       bcm2835_sdhost_enable_sdio_irq_nolock(host, enable);
1048 +       spin_unlock_irqrestore(&host->lock, flags);
1049 +}
1050 +
1051 +static u32 bcm2835_sdhost_busy_irq(struct bcm2835_host *host, u32 intmask)
1052 +{
1053 +       const u32 handled = (SDHSTS_CMD_TIME_OUT | SDHSTS_CRC16_ERROR |
1054 +                            SDHSTS_CRC7_ERROR | SDHSTS_FIFO_ERROR);
1055 +
1056 +       if (!host->cmd) {
1057 +               pr_err("%s: Got command busy interrupt 0x%08x even "
1058 +                       "though no command operation was in progress.\n",
1059 +                       mmc_hostname(host->mmc), (unsigned)intmask);
1060 +               bcm2835_sdhost_dumpregs(host);
1061 +               return 0;
1062 +       }
1063 +
1064 +       if (!host->use_busy) {
1065 +               pr_err("%s: Got command busy interrupt 0x%08x even "
1066 +                       "though not expecting one.\n",
1067 +                       mmc_hostname(host->mmc), (unsigned)intmask);
1068 +               bcm2835_sdhost_dumpregs(host);
1069 +               return 0;
1070 +       }
1071 +       host->use_busy = 0;
1072 +
1073 +       if (intmask & SDHSTS_CMD_TIME_OUT)
1074 +               host->cmd->error = -ETIMEDOUT;
1075 +       else if (intmask & (SDHSTS_CRC16_ERROR | SDHSTS_CRC7_ERROR |
1076 +                       SDHSTS_FIFO_ERROR))
1077 +               host->cmd->error = -EILSEQ;
1078 +
1079 +       if (host->cmd->error)
1080 +               tasklet_schedule(&host->finish_tasklet);
1081 +       else
1082 +               bcm2835_sdhost_finish_command(host);
1083 +
1084 +       return handled;
1085 +}
1086 +
1087 +static u32 bcm2835_sdhost_data_irq(struct bcm2835_host *host, u32 intmask)
1088 +{
1089 +       const u32 handled = (SDHSTS_CMD_TIME_OUT | SDHSTS_CRC16_ERROR |
1090 +                            SDHSTS_CRC7_ERROR | SDHSTS_FIFO_ERROR);
1091 +
1092 +       /* There are no dedicated data/space available interrupt
1093 +          status bits, so it is necessary to use the single shared
1094 +          data/space available FIFO status bits. It is therefore not
1095 +          an error to get here when there is no data transfer in
1096 +          progress. */
1097 +       if (!host->data)
1098 +               return 0;
1099 +
1100 +       // XXX FIFO_ERROR
1101 +       if (intmask & SDHSTS_CMD_TIME_OUT)
1102 +               host->cmd->error = -ETIMEDOUT;
1103 +       else if ((intmask & (SDHSTS_CRC16_ERROR | SDHSTS_CRC7_ERROR)) &&
1104 +                ((bcm2835_sdhost_read(host, SDCMD) & SDCMD_CMD_MASK)
1105 +                 != MMC_BUS_TEST_R))
1106 +               host->cmd->error = -EILSEQ;
1107 +
1108 +       /* Use the block interrupt for writes after the first block */
1109 +       if (host->data->flags & MMC_DATA_WRITE) {
1110 +               host->hcfg &= ~(SDHCFG_DATA_IRPT_EN);
1111 +               host->hcfg |= SDHCFG_BLOCK_IRPT_EN;
1112 +               bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
1113 +               if (host->data->error)
1114 +                       bcm2835_sdhost_finish_data(host);
1115 +               else
1116 +                       bcm2835_sdhost_transfer_pio(host);
1117 +       } else {
1118 +               if (!host->data->error) {
1119 +                       bcm2835_sdhost_transfer_pio(host);
1120 +                       host->blocks--;
1121 +               }
1122 +               if ((host->blocks == 0) || host->data->error)
1123 +                       bcm2835_sdhost_finish_data(host);
1124 +       }
1125 +
1126 +       return handled;
1127 +}
1128 +
1129 +static u32 bcm2835_sdhost_block_irq(struct bcm2835_host *host, u32 intmask)
1130 +{
1131 +       struct dma_chan *dma_chan;
1132 +       u32 dir_data;
1133 +       const u32 handled = (SDHSTS_CMD_TIME_OUT | SDHSTS_CRC16_ERROR |
1134 +                            SDHSTS_CRC7_ERROR | SDHSTS_FIFO_ERROR);
1135 +
1136 +       if (!host->data) {
1137 +               pr_err("%s: Got block interrupt 0x%08x even "
1138 +                       "though no data operation was in progress.\n",
1139 +                       mmc_hostname(host->mmc), (unsigned)intmask);
1140 +               bcm2835_sdhost_dumpregs(host);
1141 +               return handled;
1142 +       }
1143 +
1144 +       if (intmask & SDHSTS_CMD_TIME_OUT)
1145 +               host->cmd->error = -ETIMEDOUT;
1146 +       else if ((intmask & (SDHSTS_CRC16_ERROR | SDHSTS_CRC7_ERROR)) &&
1147 +                ((bcm2835_sdhost_read(host, SDCMD) & SDCMD_CMD_MASK)
1148 +                 != MMC_BUS_TEST_R))
1149 +               host->cmd->error = -EILSEQ;
1150 +
1151 +       if (!host->use_dma) {
1152 +               BUG_ON(!host->blocks);
1153 +               host->blocks--;
1154 +               if ((host->blocks == 0) || host->data->error)
1155 +                       bcm2835_sdhost_finish_data(host);
1156 +               else
1157 +                       bcm2835_sdhost_transfer_pio(host);
1158 +       } else if (host->data->flags & MMC_DATA_WRITE) {
1159 +               dma_chan = host->dma_chan_tx;
1160 +               dir_data = DMA_TO_DEVICE;
1161 +               dma_unmap_sg(dma_chan->device->dev,
1162 +                            host->data->sg, host->data->sg_len,
1163 +                            dir_data);
1164 +
1165 +               bcm2835_sdhost_finish_data(host);
1166 +       }
1167 +
1168 +       return handled;
1169 +}
1170 +
1171 +
1172 +static irqreturn_t bcm2835_sdhost_irq(int irq, void *dev_id)
1173 +{
1174 +       irqreturn_t result = IRQ_NONE;
1175 +       struct bcm2835_host *host = dev_id;
1176 +       u32 unexpected = 0, early = 0;
1177 +       int loops = 0;
1178 +#ifndef CONFIG_ARCH_BCM2835
1179 +       int cardint = 0;
1180 +#endif
1181 +       spin_lock(&host->lock);
1182 +
1183 +       for (loops = 0; loops < 1; loops++) {
1184 +               u32 intmask, handled;
1185 +
1186 +               intmask = bcm2835_sdhost_read(host, SDHSTS);
1187 +               handled = intmask & (SDHSTS_BUSY_IRPT |
1188 +                                    SDHSTS_BLOCK_IRPT |
1189 +                                    SDHSTS_SDIO_IRPT |
1190 +                                    SDHSTS_DATA_FLAG);
1191 +               if ((handled == SDHSTS_DATA_FLAG) && // XXX
1192 +                   (loops == 0) && !host->data) {
1193 +                       pr_err("%s: sdhost_irq data interrupt 0x%08x even "
1194 +                              "though no data operation was in progress.\n",
1195 +                              mmc_hostname(host->mmc),
1196 +                              (unsigned)intmask);
1197 +
1198 +                       bcm2835_sdhost_dumpregs(host);
1199 +               }
1200 +
1201 +               if (!handled)
1202 +                       break;
1203 +
1204 +               if (loops)
1205 +                       early |= handled;
1206 +
1207 +               result = IRQ_HANDLED;
1208 +
1209 +               /* Clear all interrupts and notifications */
1210 +               bcm2835_sdhost_write(host, intmask, SDHSTS);
1211 +
1212 +               if (intmask & SDHSTS_BUSY_IRPT)
1213 +                       handled |= bcm2835_sdhost_busy_irq(host, intmask);
1214 +
1215 +               /* There is no true data interrupt status bit, so it is
1216 +                  necessary to qualify the data flag with the interrupt
1217 +                  enable bit */
1218 +               if ((intmask & SDHSTS_DATA_FLAG) &&
1219 +                   (host->hcfg & SDHCFG_DATA_IRPT_EN))
1220 +                       handled |= bcm2835_sdhost_data_irq(host, intmask);
1221 +
1222 +               if (intmask & SDHSTS_BLOCK_IRPT)
1223 +                       handled |= bcm2835_sdhost_block_irq(host, intmask);
1224 +
1225 +               if (intmask & SDHSTS_SDIO_IRPT) {
1226 +#ifndef CONFIG_ARCH_BCM2835
1227 +                       cardint = 1;
1228 +#else
1229 +                       bcm2835_sdhost_enable_sdio_irq_nolock(host, false);
1230 +                       host->thread_isr |= SDHSTS_SDIO_IRPT;
1231 +                       result = IRQ_WAKE_THREAD;
1232 +#endif
1233 +               }
1234 +
1235 +               unexpected |= (intmask & ~handled);
1236 +       }
1237 +
1238 +       mmiowb();
1239 +
1240 +       spin_unlock(&host->lock);
1241 +
1242 +       if (early)
1243 +               pr_debug("%s: early %x (loops %d)\n", mmc_hostname(host->mmc), early, loops);
1244 +
1245 +       if (unexpected) {
1246 +               pr_err("%s: Unexpected interrupt 0x%08x.\n",
1247 +                          mmc_hostname(host->mmc), unexpected);
1248 +               bcm2835_sdhost_dumpregs(host);
1249 +       }
1250 +
1251 +#ifndef CONFIG_ARCH_BCM2835
1252 +       if (cardint)
1253 +               mmc_signal_sdio_irq(host->mmc);
1254 +#endif
1255 +
1256 +       return result;
1257 +}
1258 +
1259 +#ifdef CONFIG_ARCH_BCM2835
1260 +static irqreturn_t bcm2835_sdhost_thread_irq(int irq, void *dev_id)
1261 +{
1262 +       struct bcm2835_host *host = dev_id;
1263 +       unsigned long flags;
1264 +       u32 isr;
1265 +
1266 +       spin_lock_irqsave(&host->lock, flags);
1267 +       isr = host->thread_isr;
1268 +       host->thread_isr = 0;
1269 +       spin_unlock_irqrestore(&host->lock, flags);
1270 +
1271 +       if (isr & SDHSTS_SDIO_IRPT) {
1272 +               sdio_run_irqs(host->mmc);
1273 +
1274 +/* Is this necessary? Why re-enable an interrupt which is enabled?
1275 +               spin_lock_irqsave(&host->lock, flags);
1276 +               if (host->flags & SDHSTS_SDIO_IRPT_ENABLED)
1277 +                       bcm2835_sdhost_enable_sdio_irq_nolock(host, true);
1278 +               spin_unlock_irqrestore(&host->lock, flags);
1279 +*/
1280 +       }
1281 +
1282 +       return isr ? IRQ_HANDLED : IRQ_NONE;
1283 +}
1284 +#endif
1285 +
1286 +
1287 +
1288 +void bcm2835_sdhost_set_clock(struct bcm2835_host *host, unsigned int clock)
1289 +{
1290 +       int div = 0; /* Initialized for compiler warning */
1291 +       unsigned int input_clock = clock;
1292 +
1293 +       if (host->overclock_50 && (clock == 50000000))
1294 +               clock = host->overclock_50 * 1000000 + 999999;
1295 +
1296 +       /* The SDCDIV register has 11 bits, and holds (div - 2).
1297 +          But in data mode the max is 50MHz wihout a minimum, and only the
1298 +          bottom 3 bits are used. Since the switch over is automatic (unless
1299 +          we have marked the card as slow...), chosen values have to make
1300 +          sense in both modes.
1301 +          Ident mode must be 100-400KHz, so can range check the requested
1302 +          clock. CMD15 must be used to return to data mode, so this can be
1303 +          monitored.
1304 +
1305 +          clock 250MHz -> 0->125MHz, 1->83.3MHz, 2->62.5MHz, 3->50.0MHz
1306 +                           4->41.7MHz, 5->35.7MHz, 6->31.3MHz, 7->27.8MHz
1307 +
1308 +                        623->400KHz/27.8MHz
1309 +                        reset value (507)->491159/50MHz
1310 +
1311 +          BUT, the 3-bit clock divisor in data mode is too small if the
1312 +          core clock is higher than 250MHz, so instead use the SLOW_CARD
1313 +          configuration bit to force the use of the ident clock divisor
1314 +          at all times.
1315 +       */
1316 +
1317 +       host->mmc->actual_clock = 0;
1318 +
1319 +       if (clock < 100000) {
1320 +           /* Can't stop the clock, but make it as slow as possible
1321 +            * to show willing
1322 +            */
1323 +           host->cdiv = SDCDIV_MAX_CDIV;
1324 +           bcm2835_sdhost_write(host, host->cdiv, SDCDIV);
1325 +           return;
1326 +       }
1327 +
1328 +       div = host->max_clk / clock;
1329 +       if (div < 2)
1330 +               div = 2;
1331 +       if ((host->max_clk / div) > clock)
1332 +               div++;
1333 +       div -= 2;
1334 +
1335 +       if (div > SDCDIV_MAX_CDIV)
1336 +           div = SDCDIV_MAX_CDIV;
1337 +
1338 +       clock = host->max_clk / (div + 2);
1339 +       host->mmc->actual_clock = clock;
1340 +
1341 +       if ((clock > input_clock) && (clock > host->max_overclock)) {
1342 +               pr_warn("%s: Overclocking to %dHz\n",
1343 +                       mmc_hostname(host->mmc), clock);
1344 +               host->max_overclock = clock;
1345 +       }
1346 +
1347 +       host->cdiv = div;
1348 +       bcm2835_sdhost_write(host, host->cdiv, SDCDIV);
1349 +
1350 +       pr_debug(DRIVER_NAME ": clock=%d -> max_clk=%d, cdiv=%x (actual clock %d)\n",
1351 +                input_clock, host->max_clk, host->cdiv, host->mmc->actual_clock);
1352 +}
1353 +
1354 +static void bcm2835_sdhost_request(struct mmc_host *mmc, struct mmc_request *mrq)
1355 +{
1356 +       struct bcm2835_host *host;
1357 +       unsigned long flags;
1358 +
1359 +       if (1) {
1360 +               struct mmc_command *cmd = mrq->cmd;
1361 +               const char *src = "cmd";
1362 +               BUG_ON(!cmd);
1363 +               pr_debug("bcm2835_sdhost_request: %s %08x %08x (flags %x)\n",
1364 +                        src, cmd->opcode, cmd->arg, cmd->flags);
1365 +               if (cmd->data)
1366 +                       pr_debug("bcm2835_sdhost_request: %s %d*%d\n",
1367 +                                (cmd->data->flags & MMC_DATA_READ) ?
1368 +                                "read" : "write", cmd->data->blocks,
1369 +                                cmd->data->blksz);
1370 +       }
1371 +
1372 +       if (mrq->data && !is_power_of_2(mrq->data->blksz)) {
1373 +               pr_err("%s: Unsupported block size (%d bytes)\n",
1374 +                      mmc_hostname(mmc), mrq->data->blksz);
1375 +               mrq->cmd->error = -EINVAL;
1376 +               mmc_request_done(mmc, mrq);
1377 +               return;
1378 +       }
1379 +
1380 +       host = mmc_priv(mmc);
1381 +
1382 +       spin_lock_irqsave(&host->lock, flags);
1383 +
1384 +       WARN_ON(host->mrq != NULL);
1385 +
1386 +       host->mrq = mrq;
1387 +
1388 +       if (mrq->sbc)
1389 +               bcm2835_sdhost_send_command(host, mrq->sbc);
1390 +       else
1391 +               bcm2835_sdhost_send_command(host, mrq->cmd);
1392 +
1393 +       mmiowb();
1394 +       spin_unlock_irqrestore(&host->lock, flags);
1395 +
1396 +       if (!mrq->sbc && mrq->cmd->data && host->use_dma)
1397 +               /* DMA transfer starts now, PIO starts after irq */
1398 +               bcm2835_sdhost_transfer_dma(host);
1399 +
1400 +       if (!host->use_busy)
1401 +               bcm2835_sdhost_finish_command(host);
1402 +}
1403 +
1404 +
1405 +static void bcm2835_sdhost_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1406 +{
1407 +
1408 +       struct bcm2835_host *host = mmc_priv(mmc);
1409 +       unsigned long flags;
1410 +
1411 +       pr_debug("bcm2835_sdhost_set_ios: clock %d, pwr %d, bus_width %d, timing %d, vdd %d, drv_type %d\n",
1412 +              ios->clock, ios->power_mode, ios->bus_width,
1413 +              ios->timing, ios->signal_voltage, ios->drv_type);
1414 +
1415 +       spin_lock_irqsave(&host->lock, flags);
1416 +
1417 +       if (!ios->clock || ios->clock != host->clock) {
1418 +               bcm2835_sdhost_set_clock(host, ios->clock);
1419 +               host->clock = ios->clock;
1420 +       }
1421 +
1422 +       /* set bus width */
1423 +       host->hcfg &= ~SDHCFG_WIDE_EXT_BUS;
1424 +       if (ios->bus_width == MMC_BUS_WIDTH_4)
1425 +               host->hcfg |= SDHCFG_WIDE_EXT_BUS;
1426 +
1427 +       host->hcfg |= SDHCFG_WIDE_INT_BUS;
1428 +
1429 +       /* Disable clever clock switching, to cope with fast core clocks */
1430 +       host->hcfg |= SDHCFG_SLOW_CARD;
1431 +
1432 +       bcm2835_sdhost_write(host, host->hcfg, SDHCFG);
1433 +
1434 +       mmiowb();
1435 +
1436 +       spin_unlock_irqrestore(&host->lock, flags);
1437 +}
1438 +
1439 +static int bcm2835_sdhost_multi_io_quirk(struct mmc_card *card,
1440 +                                        unsigned int direction,
1441 +                                        u32 blk_pos, int blk_size)
1442 +{
1443 +       /* There is a bug in the host controller hardware that makes
1444 +          reading the final sector of the card as part of a multiple read
1445 +          problematic. Detect that case and shorten the read accordingly.
1446 +       */
1447 +       /* csd.capacity is in weird units - convert to sectors */
1448 +       u32 card_sectors = (card->csd.capacity << (card->csd.read_blkbits - 9));
1449 +
1450 +       if ((direction == MMC_DATA_READ) &&
1451 +           ((blk_pos + blk_size) == card_sectors))
1452 +               blk_size--;
1453 +
1454 +       return blk_size;
1455 +}
1456 +
1457 +
1458 +static struct mmc_host_ops bcm2835_sdhost_ops = {
1459 +       .request = bcm2835_sdhost_request,
1460 +       .set_ios = bcm2835_sdhost_set_ios,
1461 +       .enable_sdio_irq = bcm2835_sdhost_enable_sdio_irq,
1462 +       .multi_io_quirk = bcm2835_sdhost_multi_io_quirk,
1463 +};
1464 +
1465 +
1466 +static void bcm2835_sdhost_tasklet_finish(unsigned long param)
1467 +{
1468 +       struct bcm2835_host *host;
1469 +       unsigned long flags;
1470 +       struct mmc_request *mrq;
1471 +
1472 +       host = (struct bcm2835_host *)param;
1473 +
1474 +       spin_lock_irqsave(&host->lock, flags);
1475 +
1476 +       /*
1477 +        * If this tasklet gets rescheduled while running, it will
1478 +        * be run again afterwards but without any active request.
1479 +        */
1480 +       if (!host->mrq) {
1481 +               spin_unlock_irqrestore(&host->lock, flags);
1482 +               return;
1483 +       }
1484 +
1485 +       del_timer(&host->timer);
1486 +
1487 +       mrq = host->mrq;
1488 +
1489 +       /*
1490 +        * The controller needs a reset of internal state machines
1491 +        * upon error conditions.
1492 +        */
1493 +       if (((mrq->cmd && mrq->cmd->error) ||
1494 +                (mrq->data && (mrq->data->error ||
1495 +                 (mrq->data->stop && mrq->data->stop->error))))) {
1496 +
1497 +               bcm2835_sdhost_reset(host);
1498 +       }
1499 +
1500 +       host->mrq = NULL;
1501 +       host->cmd = NULL;
1502 +       host->data = NULL;
1503 +
1504 +       mmiowb();
1505 +
1506 +       spin_unlock_irqrestore(&host->lock, flags);
1507 +       mmc_request_done(host->mmc, mrq);
1508 +}
1509 +
1510 +
1511 +
1512 +int bcm2835_sdhost_add_host(struct bcm2835_host *host)
1513 +{
1514 +       struct mmc_host *mmc;
1515 +       struct dma_slave_config cfg;
1516 +       int ret;
1517 +
1518 +       mmc = host->mmc;
1519 +
1520 +       bcm2835_sdhost_reset(host);
1521 +
1522 +       mmc->f_max = host->max_clk;
1523 +       mmc->f_min = host->max_clk / SDCDIV_MAX_CDIV;
1524 +
1525 +       /* SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK */
1526 +       host->timeout_clk = mmc->f_max / 1000;
1527 +#ifdef CONFIG_ARCH_BCM2835
1528 +       mmc->max_busy_timeout = (1 << 27) / host->timeout_clk;
1529 +#endif
1530 +       /* host controller capabilities */
1531 +       mmc->caps |= /* MMC_CAP_SDIO_IRQ |*/ MMC_CAP_4_BIT_DATA |
1532 +               MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
1533 +               MMC_CAP_NEEDS_POLL |
1534 +               (ALLOW_CMD23 * MMC_CAP_CMD23);
1535 +
1536 +       spin_lock_init(&host->lock);
1537 +
1538 +       if (host->allow_dma) {
1539 +               if (!host->dma_chan_tx || !host->dma_chan_rx ||
1540 +                   IS_ERR(host->dma_chan_tx) || IS_ERR(host->dma_chan_rx)) {
1541 +                       pr_err("%s: Unable to initialise DMA channels. Falling back to PIO\n", DRIVER_NAME);
1542 +                       host->have_dma = false;
1543 +               } else {
1544 +                       pr_info("DMA channels allocated for the SDHost driver");
1545 +                       host->have_dma = true;
1546 +
1547 +                       cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1548 +                       cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
1549 +                       cfg.slave_id = 13;              /* DREQ channel */
1550 +
1551 +                       cfg.direction = DMA_MEM_TO_DEV;
1552 +                       cfg.src_addr = 0;
1553 +                       cfg.dst_addr = host->phys_addr + SDDATA;
1554 +                       ret = dmaengine_slave_config(host->dma_chan_tx, &cfg);
1555 +
1556 +                       cfg.direction = DMA_DEV_TO_MEM;
1557 +                       cfg.src_addr = host->phys_addr + SDDATA;
1558 +                       cfg.dst_addr = 0;
1559 +                       ret = dmaengine_slave_config(host->dma_chan_rx, &cfg);
1560 +               }
1561 +       } else {
1562 +               pr_info("Forcing PIO mode\n");
1563 +               host->have_dma = false;
1564 +       }
1565 +
1566 +       mmc->max_segs = 128;
1567 +       mmc->max_req_size = 524288;
1568 +       mmc->max_seg_size = mmc->max_req_size;
1569 +       mmc->max_blk_size = 512;
1570 +       mmc->max_blk_count =  65535;
1571 +
1572 +       /* report supported voltage ranges */
1573 +       mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
1574 +
1575 +       tasklet_init(&host->finish_tasklet,
1576 +               bcm2835_sdhost_tasklet_finish, (unsigned long)host);
1577 +
1578 +       setup_timer(&host->timer, bcm2835_sdhost_timeout_timer, (unsigned long)host);
1579 +
1580 +       bcm2835_sdhost_init(host, 0);
1581 +#ifndef CONFIG_ARCH_BCM2835
1582 +       ret = request_irq(host->irq, bcm2835_sdhost_irq, 0 /*IRQF_SHARED*/,
1583 +                                 mmc_hostname(mmc), host);
1584 +#else
1585 +       ret = request_threaded_irq(host->irq, bcm2835_sdhost_irq, bcm2835_sdhost_thread_irq,
1586 +                                  IRQF_SHARED, mmc_hostname(mmc), host);
1587 +#endif
1588 +       if (ret) {
1589 +               pr_err("%s: Failed to request IRQ %d: %d\n",
1590 +                      mmc_hostname(mmc), host->irq, ret);
1591 +               goto untasklet;
1592 +       }
1593 +
1594 +       mmiowb();
1595 +       mmc_add_host(mmc);
1596 +
1597 +       pr_info("Load BCM2835 SDHost driver\n");
1598 +       if (host->delay_after_stop)
1599 +               pr_info("BCM2835 SDHost: delay_after_stop=%dus\n",
1600 +                       host->delay_after_stop);
1601 +
1602 +       return 0;
1603 +
1604 +untasklet:
1605 +       tasklet_kill(&host->finish_tasklet);
1606 +
1607 +       return ret;
1608 +}
1609 +
1610 +static int bcm2835_sdhost_probe(struct platform_device *pdev)
1611 +{
1612 +       struct device *dev = &pdev->dev;
1613 +       struct device_node *node = dev->of_node;
1614 +       struct clk *clk;
1615 +       struct resource *iomem;
1616 +       struct bcm2835_host *host;
1617 +       struct mmc_host *mmc;
1618 +       int ret;
1619 +
1620 +       pr_debug("bcm2835_sdhost_probe\n");
1621 +       mmc = mmc_alloc_host(sizeof(*host), dev);
1622 +       if (!mmc)
1623 +               return -ENOMEM;
1624 +
1625 +       mmc->ops = &bcm2835_sdhost_ops;
1626 +       host = mmc_priv(mmc);
1627 +       host->mmc = mmc;
1628 +       host->timeout = msecs_to_jiffies(1000);
1629 +       spin_lock_init(&host->lock);
1630 +
1631 +       iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1632 +       host->ioaddr = devm_ioremap_resource(dev, iomem);
1633 +       if (IS_ERR(host->ioaddr)) {
1634 +               ret = PTR_ERR(host->ioaddr);
1635 +               goto err;
1636 +       }
1637 +
1638 +       host->phys_addr = iomem->start + BCM2835_VCMMU_SHIFT;
1639 +       pr_debug(" - ioaddr %lx, iomem->start %lx, phys_addr %lx\n",
1640 +                (unsigned long)host->ioaddr,
1641 +                (unsigned long)iomem->start,
1642 +                (unsigned long)host->phys_addr);
1643 +
1644 +       host->allow_dma = ALLOW_DMA;
1645 +
1646 +       if (node) {
1647 +               /* Read any custom properties */
1648 +               of_property_read_u32(node,
1649 +                                    "brcm,delay-after-stop",
1650 +                                    &host->delay_after_stop);
1651 +               of_property_read_u32(node,
1652 +                                    "brcm,overclock-50",
1653 +                                    &host->overclock_50);
1654 +               host->allow_dma = ALLOW_DMA &&
1655 +                       !of_property_read_bool(node, "brcm,force-pio");
1656 +       }
1657 +
1658 +       if (host->allow_dma) {
1659 +               if (node) {
1660 +                       host->dma_chan_tx =
1661 +                               dma_request_slave_channel(dev, "tx");
1662 +                       host->dma_chan_rx =
1663 +                               dma_request_slave_channel(dev, "rx");
1664 +               } else {
1665 +                       dma_cap_mask_t mask;
1666 +
1667 +                       dma_cap_zero(mask);
1668 +                       /* we don't care about the channel, any would work */
1669 +                       dma_cap_set(DMA_SLAVE, mask);
1670 +                       host->dma_chan_tx =
1671 +                               dma_request_channel(mask, NULL, NULL);
1672 +                       host->dma_chan_rx =
1673 +                               dma_request_channel(mask, NULL, NULL);
1674 +               }
1675 +       }
1676 +
1677 +       clk = devm_clk_get(dev, NULL);
1678 +       if (IS_ERR(clk)) {
1679 +               dev_err(dev, "could not get clk\n");
1680 +               ret = PTR_ERR(clk);
1681 +               goto err;
1682 +       }
1683 +
1684 +       host->max_clk = clk_get_rate(clk);
1685 +
1686 +       host->irq = platform_get_irq(pdev, 0);
1687 +       if (host->irq <= 0) {
1688 +               dev_err(dev, "get IRQ failed\n");
1689 +               ret = -EINVAL;
1690 +               goto err;
1691 +       }
1692 +
1693 +       pr_debug(" - max_clk %lx, irq %d\n",
1694 +                (unsigned long)host->max_clk,
1695 +                (int)host->irq);
1696 +
1697 +       if (node)
1698 +               mmc_of_parse(mmc);
1699 +       else
1700 +               mmc->caps |= MMC_CAP_4_BIT_DATA;
1701 +
1702 +       ret = bcm2835_sdhost_add_host(host);
1703 +       if (ret)
1704 +               goto err;
1705 +
1706 +       platform_set_drvdata(pdev, host);
1707 +
1708 +       pr_debug("bcm2835_sdhost_probe -> OK\n");
1709 +
1710 +       return 0;
1711 +
1712 +err:
1713 +       pr_debug("bcm2835_sdhost_probe -> err %d\n", ret);
1714 +       mmc_free_host(mmc);
1715 +
1716 +       return ret;
1717 +}
1718 +
1719 +static int bcm2835_sdhost_remove(struct platform_device *pdev)
1720 +{
1721 +       struct bcm2835_host *host = platform_get_drvdata(pdev);
1722 +
1723 +       pr_debug("bcm2835_sdhost_remove\n");
1724 +
1725 +       mmc_remove_host(host->mmc);
1726 +
1727 +       bcm2835_sdhost_set_power(host, false);
1728 +
1729 +       free_irq(host->irq, host);
1730 +
1731 +       del_timer_sync(&host->timer);
1732 +
1733 +       tasklet_kill(&host->finish_tasklet);
1734 +
1735 +       mmc_free_host(host->mmc);
1736 +       platform_set_drvdata(pdev, NULL);
1737 +
1738 +       pr_debug("bcm2835_sdhost_remove - OK\n");
1739 +       return 0;
1740 +}
1741 +
1742 +
1743 +static const struct of_device_id bcm2835_sdhost_match[] = {
1744 +       { .compatible = "brcm,bcm2835-sdhost" },
1745 +       { }
1746 +};
1747 +MODULE_DEVICE_TABLE(of, bcm2835_sdhost_match);
1748 +
1749 +
1750 +
1751 +static struct platform_driver bcm2835_sdhost_driver = {
1752 +       .probe      = bcm2835_sdhost_probe,
1753 +       .remove     = bcm2835_sdhost_remove,
1754 +       .driver     = {
1755 +               .name           = DRIVER_NAME,
1756 +               .owner          = THIS_MODULE,
1757 +               .of_match_table = bcm2835_sdhost_match,
1758 +       },
1759 +};
1760 +module_platform_driver(bcm2835_sdhost_driver);
1761 +
1762 +MODULE_ALIAS("platform:sdhost-bcm2835");
1763 +MODULE_DESCRIPTION("BCM2835 SDHost driver");
1764 +MODULE_LICENSE("GPL v2");
1765 +MODULE_AUTHOR("Phil Elwell");