target/linux/at91/patches/100-at91_i2c.patch

   1 --- a/drivers/i2c/busses/Kconfig
   2 +++ b/drivers/i2c/busses/Kconfig
   3 @@ -282,7 +282,7 @@ comment "I2C system bus drivers (mostly
   4
   5  config I2C_AT91
   6         tristate "Atmel AT91 I2C Two-Wire interface (TWI)"
   7 -       depends on ARCH_AT91 && EXPERIMENTAL && BROKEN
   8 +       depends on ARCH_AT91 && EXPERIMENTAL
   9         help
  10           This supports the use of the I2C interface on Atmel AT91
  11           processors.
  12 --- a/drivers/i2c/busses/i2c-at91.c
  13 +++ b/drivers/i2c/busses/i2c-at91.c
  14 @@ -11,8 +11,18 @@
  15      it under the terms of the GNU General Public License as published by
  16      the Free Software Foundation; either version 2 of the License, or
  17      (at your option) any later version.
  18 +
  19 +    D. Gilbert [20100318 AT91SAM9G20]
  20 +       - Check for NACK, a NACK will abort current tranfser,
  21 +          returned as errno=EREMOTEIO unless I2C_M_IGNORE_NAK is set
  22 +        - Only supports 7 bit I2C device (slave) address
  23 +       - clockrate adjustable (module_param).
  24  */
  25
  26 +
  27 +/* Uncomment following line to see dev_dbg() output in logs */
  28 +/* #define DEBUG 1 */
  29 +
  30  #include <linux/module.h>
  31  #include <linux/kernel.h>
  32  #include <linux/err.h>
  33 @@ -32,26 +42,28 @@
  34  #define TWI_CLOCK              100000          /* Hz. max 400 Kbits/sec */
  35
  36
  37 +static unsigned int clockrate = TWI_CLOCK;
  38 +static unsigned int prev_clockrate = TWI_CLOCK;
  39  static struct clk *twi_clk;
  40  static void __iomem *twi_base;
  41
  42  #define at91_twi_read(reg)             __raw_readl(twi_base + (reg))
  43  #define at91_twi_write(reg, val)       __raw_writel((val), twi_base + (reg))
  44
  45 -
  46  /*
  47 - * Initialize the TWI hardware registers.
  48 + * Set TWI clock dividers based on clockrate (clock rate for SCL)
  49   */
  50 -static void __devinit at91_twi_hwinit(void)
  51 +static void at91_twi_clock_dividers(void)
  52  {
  53         unsigned long cdiv, ckdiv;
  54
  55 -       at91_twi_write(AT91_TWI_IDR, 0xffffffff);       /* Disable all interrupts */
  56 -       at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST);    /* Reset peripheral */
  57 -       at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);     /* Set Master mode */
  58 +       if (clockrate < 1000)
  59 +               clockrate = 1000;
  60 +       else if (clockrate > 400000)
  61 +               clockrate = 400000;
  62
  63 -       /* Calcuate clock dividers */
  64 -       cdiv = (clk_get_rate(twi_clk) / (2 * TWI_CLOCK)) - 3;
  65 +       /* Calculate clock dividers */
  66 +       cdiv = (clk_get_rate(twi_clk) / (2 * clockrate)) - 3;
  67         cdiv = cdiv + 1;        /* round up */
  68         ckdiv = 0;
  69         while (cdiv > 255) {
  70 @@ -61,41 +73,92 @@ static void __devinit at91_twi_hwinit(vo
  71
  72         if (cpu_is_at91rm9200()) {                      /* AT91RM9200 Errata #22 */
  73                 if (ckdiv > 5) {
  74 -                       printk(KERN_ERR "AT91 I2C: Invalid TWI_CLOCK value!\n");
  75 +                       printk(KERN_ERR "i2c-at91: Invalid AT91RM9200 clock rate\n");
  76                         ckdiv = 5;
  77                 }
  78         }
  79 +       /* AT91SAM9G20 has 3 bits for ckdiv so it cannot exceed 7 */
  80 +       if (cpu_is_at91sam9g20()) {
  81 +               if (ckdiv > 7) {
  82 +                       printk(KERN_ERR "i2c-at91: Invalid AT91SAM9G20 clock "
  83 +                              "rate, ckdiv=%lu\n", ckdiv);
  84 +                       ckdiv = 7;
  85 +               }
  86 +       }
  87
  88         at91_twi_write(AT91_TWI_CWGR, (ckdiv << 16) | (cdiv << 8) | cdiv);
  89 +       prev_clockrate = clockrate;
  90  }
  91
  92  /*
  93 - * Poll the i2c status register until the specified bit is set.
  94 - * Returns 0 if timed out (100 msec).
  95 + * Initialize the TWI hardware registers.
  96   */
  97 -static short at91_poll_status(unsigned long bit)
  98 +static void __devinit at91_twi_hwinit(void)
  99  {
 100 -       int loop_cntr = 10000;
 101 +       at91_twi_write(AT91_TWI_IDR, 0xffffffff);  /* Disable all interrupts */
 102 +       at91_twi_write(AT91_TWI_CR, AT91_TWI_SWRST);     /* Reset peripheral */
 103 +       /* Set Master mode; Atmel suggests disabling slave mode */
 104 +       at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN | AT91_TWI_SVDIS);
 105
 106 +       at91_twi_clock_dividers();
 107 +}
 108 +
 109 +/*
 110 + * Poll the i2c status register until the specified bit is set or a NACK
 111 + * occurs. Returns 0 if timed out (50 msec). If nack_seen_p is non-NULL
 112 + * then write 0 to it first, then if the NACK bit is set in the status
 113 + * register then write 1 to it and immediately return with a value of 1.
 114 + */
 115 +static short at91_poll_status(unsigned long bit, int * nack_seen_p)
 116 +{
 117 +       int loop_cntr = 5000;
 118 +       unsigned long stat;
 119 +
 120 +       if (nack_seen_p)
 121 +               *nack_seen_p = 0;
 122 +       if (clockrate <= 20000)
 123 +               loop_cntr = 100;
 124         do {
 125 -               udelay(10);
 126 -       } while (!(at91_twi_read(AT91_TWI_SR) & bit) && (--loop_cntr > 0));
 127 +               if (clockrate <= 20000)
 128 +                       udelay(100);
 129 +               else if (clockrate <= 100000)
 130 +                       udelay(10);
 131 +               else
 132 +                       udelay(3);
 133 +               stat = at91_twi_read(AT91_TWI_SR);
 134 +               if ((stat & AT91_TWI_NACK) && nack_seen_p) {
 135 +                       *nack_seen_p = 1;
 136 +                       return 1;
 137 +               }
 138 +       } while (!(stat & bit) && (--loop_cntr > 0));
 139
 140         return (loop_cntr > 0);
 141  }
 142
 143  static int xfer_read(struct i2c_adapter *adap, unsigned char *buf, int length)
 144  {
 145 +       int nack_seen = 0;
 146 +       int sent_stop = 0;
 147 +
 148         /* Send Start */
 149 -       at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
 150 +       if (1 == length) {
 151 +           at91_twi_write(AT91_TWI_CR, AT91_TWI_START | AT91_TWI_STOP);
 152 +           sent_stop = 1;
 153 +       } else
 154 +           at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
 155
 156         /* Read data */
 157         while (length--) {
 158 -               if (!length)    /* need to send Stop before reading last byte */
 159 +               /* send Stop before reading last byte (if not already done) */
 160 +               if ((0 == length) && (0 == sent_stop))
 161                         at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
 162 -               if (!at91_poll_status(AT91_TWI_RXRDY)) {
 163 +               if (!at91_poll_status(AT91_TWI_RXRDY, &nack_seen)) {
 164                         dev_dbg(&adap->dev, "RXRDY timeout\n");
 165                         return -ETIMEDOUT;
 166 +               } else if (nack_seen) {
 167 +                       dev_dbg(&adap->dev, "read NACKed\n");
 168 +                       /* NACK supplies Stop */
 169 +                       return -EREMOTEIO;
 170                 }
 171                 *buf++ = (at91_twi_read(AT91_TWI_RHR) & 0xff);
 172         }
 173 @@ -105,16 +168,24 @@ static int xfer_read(struct i2c_adapter
 174
 175  static int xfer_write(struct i2c_adapter *adap, unsigned char *buf, int length)
 176  {
 177 +       int nack_seen = 0;
 178 +
 179         /* Load first byte into transmitter */
 180         at91_twi_write(AT91_TWI_THR, *buf++);
 181
 182 -       /* Send Start */
 183 +       /* Send Start [AT91SAM9G20 does not need this on write] */
 184         at91_twi_write(AT91_TWI_CR, AT91_TWI_START);
 185
 186         do {
 187 -               if (!at91_poll_status(AT91_TWI_TXRDY)) {
 188 +               if (!at91_poll_status(AT91_TWI_TXRDY, &nack_seen)) {
 189                         dev_dbg(&adap->dev, "TXRDY timeout\n");
 190 +                       /* Set Master mode again */
 191 +                       at91_twi_write(AT91_TWI_CR, AT91_TWI_MSEN);
 192                         return -ETIMEDOUT;
 193 +               } else if (nack_seen) {
 194 +                       dev_dbg(&adap->dev, "write NACKed\n");
 195 +                       /* NACK supplies Stop */
 196 +                       return -EREMOTEIO;
 197                 }
 198
 199                 length--;       /* byte was transmitted */
 200 @@ -123,7 +194,7 @@ static int xfer_write(struct i2c_adapter
 201                         at91_twi_write(AT91_TWI_THR, *buf++);
 202         } while (length);
 203
 204 -       /* Send Stop */
 205 +       /* Send Stop [AT91SAM9G20 does not need this on write] */
 206         at91_twi_write(AT91_TWI_CR, AT91_TWI_STOP);
 207
 208         return 0;
 209 @@ -136,11 +207,19 @@ static int xfer_write(struct i2c_adapter
 210   * Instead the "internal device address" has to be written using a separate
 211   * i2c message.
 212   * http://lists.arm.linux.org.uk/pipermail/linux-arm-kernel/2004-September/024411.html
 213 + * [dpg] By 2010 silicon bugs should be fixed, will need IADR for 10 bit device address
 214   */
 215  static int at91_xfer(struct i2c_adapter *adap, struct i2c_msg *pmsg, int num)
 216  {
 217         int i, ret;
 218 +       int nack_seen = 0;
 219
 220 +       if (prev_clockrate != clockrate) {
 221 +               dev_dbg(&adap->dev, "at91_xfer: prev_clockrate=%u "
 222 +                       "clockrate=%u, change\n", prev_clockrate, clockrate);
 223 +               at91_twi_clock_dividers();
 224 +               msleep(1);      /* let things settle */
 225 +       }
 226         dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num);
 227
 228         for (i = 0; i < num; i++) {
 229 @@ -158,13 +237,23 @@ static int at91_xfer(struct i2c_adapter
 230                         else
 231                                 ret = xfer_write(adap, pmsg->buf, pmsg->len);
 232
 233 -                       if (ret)
 234 -                               return ret;
 235 -
 236 +                       if (ret) {
 237 +                               if ((I2C_M_IGNORE_NAK & pmsg->flags) &&
 238 +                                   (-EREMOTEIO == ret)) {
 239 +                                       dev_dbg(&adap->dev, "transfer "
 240 +                                               "NACKed, skip to next\n");
 241 +                                       pmsg++;
 242 +                                       continue;
 243 +                               } else
 244 +                                       return ret;
 245 +                       }
 246                         /* Wait until transfer is finished */
 247 -                       if (!at91_poll_status(AT91_TWI_TXCOMP)) {
 248 +                       if (!at91_poll_status(AT91_TWI_TXCOMP, &nack_seen)) {
 249                                 dev_dbg(&adap->dev, "TXCOMP timeout\n");
 250                                 return -ETIMEDOUT;
 251 +                       } else if (nack_seen) {
 252 +                               dev_dbg(&adap->dev, "TXCOMP NACKed\n");
 253 +                               return -EREMOTEIO;
 254                         }
 255                 }
 256                 dev_dbg(&adap->dev, "transfer complete\n");
 257 @@ -239,7 +328,8 @@ static int __devinit at91_i2c_probe(stru
 258                 goto fail3;
 259         }
 260
 261 -       dev_info(&pdev->dev, "AT91 i2c bus driver.\n");
 262 +       dev_info(&pdev->dev, "AT91 TWI (I2C) bus driver [SCL %d Hz]\n",
 263 +                clockrate);
 264         return 0;
 265
 266  fail3:
 267 @@ -295,6 +385,11 @@ static int at91_i2c_resume(struct platfo
 268  #define at91_i2c_resume                NULL
 269  #endif
 270
 271 +/* I2C clock speed, in Hz 0-400kHz*/
 272 +module_param(clockrate, uint,  S_IRUGO | S_IWUSR);
 273 +MODULE_PARM_DESC(clockrate,
 274 +                "SCL clock rate, 1000 to 400000 Hz (def: 100 kHz)");
 275 +
 276  /* work with "modprobe at91_i2c" from hotplugging or coldplugging */
 277  MODULE_ALIAS("platform:at91_i2c");
 278
 279 @@ -323,5 +418,5 @@ module_init(at91_i2c_init);
 280  module_exit(at91_i2c_exit);
 281
 282  MODULE_AUTHOR("Rick Bronson");
 283 -MODULE_DESCRIPTION("I2C (TWI) driver for Atmel AT91");
 284 +MODULE_DESCRIPTION("I2C (TWI) master driver for Atmel AT91");
 285  MODULE_LICENSE("GPL");