target/linux/ar71xx/patches-3.8/009-MIPS-ath79-simplify-MISC-IRQ-handling.patch

   1 From 1690e8f8efdeedbd23bb34a3bc5803c34f2d3f66 Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Tue, 29 Jan 2013 16:13:17 +0000
   4 Subject: [PATCH] MIPS: ath79: simplify MISC IRQ handling
   5
   6 commit 9c099c4e79b67d5578ce8142e6214950be4fcf43 upstream.
   7
   8 The current code uses multiple if statements for
   9 demultiplexing the different interrupt sources.
  10 Additionally, the MISC interrupt controller has
  11 32 interrupt sources and the current code does not
  12 handles all of them.
  13
  14 Get rid of the if statements and process all interrupt
  15 sources in a loop to fix these issues.
  16
  17 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
  18 Patchwork: http://patchwork.linux-mips.org/patch/4874/
  19 Signed-off-by: John Crispin <blogic@openwrt.org>
  20 ---
  21  arch/mips/ath79/irq.c                  |   45 +++++++-------------------------
  22  arch/mips/include/asm/mach-ath79/irq.h |    1 +
  23  2 files changed, 10 insertions(+), 36 deletions(-)
  24
  25 --- a/arch/mips/ath79/irq.c
  26 +++ b/arch/mips/ath79/irq.c
  27 @@ -35,44 +35,17 @@ static void ath79_misc_irq_handler(unsig
  28         pending = __raw_readl(base + AR71XX_RESET_REG_MISC_INT_STATUS) &
  29                   __raw_readl(base + AR71XX_RESET_REG_MISC_INT_ENABLE);
  30
  31 -       if (pending & MISC_INT_UART)
  32 -               generic_handle_irq(ATH79_MISC_IRQ_UART);
  33 -
  34 -       else if (pending & MISC_INT_DMA)
  35 -               generic_handle_irq(ATH79_MISC_IRQ_DMA);
  36 -
  37 -       else if (pending & MISC_INT_PERFC)
  38 -               generic_handle_irq(ATH79_MISC_IRQ_PERFC);
  39 -
  40 -       else if (pending & MISC_INT_TIMER)
  41 -               generic_handle_irq(ATH79_MISC_IRQ_TIMER);
  42 -
  43 -       else if (pending & MISC_INT_TIMER2)
  44 -               generic_handle_irq(ATH79_MISC_IRQ_TIMER2);
  45 -
  46 -       else if (pending & MISC_INT_TIMER3)
  47 -               generic_handle_irq(ATH79_MISC_IRQ_TIMER3);
  48 -
  49 -       else if (pending & MISC_INT_TIMER4)
  50 -               generic_handle_irq(ATH79_MISC_IRQ_TIMER4);
  51 -
  52 -       else if (pending & MISC_INT_OHCI)
  53 -               generic_handle_irq(ATH79_MISC_IRQ_OHCI);
  54 -
  55 -       else if (pending & MISC_INT_ERROR)
  56 -               generic_handle_irq(ATH79_MISC_IRQ_ERROR);
  57 -
  58 -       else if (pending & MISC_INT_GPIO)
  59 -               generic_handle_irq(ATH79_MISC_IRQ_GPIO);
  60 -
  61 -       else if (pending & MISC_INT_WDOG)
  62 -               generic_handle_irq(ATH79_MISC_IRQ_WDOG);
  63 +       if (!pending) {
  64 +               spurious_interrupt();
  65 +               return;
  66 +       }
  67
  68 -       else if (pending & MISC_INT_ETHSW)
  69 -               generic_handle_irq(ATH79_MISC_IRQ_ETHSW);
  70 +       while (pending) {
  71 +               int bit = __ffs(pending);
  72
  73 -       else
  74 -               spurious_interrupt();
  75 +               generic_handle_irq(ATH79_MISC_IRQ(bit));
  76 +               pending &= ~BIT(bit);
  77 +       }
  78  }
  79
  80  static void ar71xx_misc_irq_unmask(struct irq_data *d)
  81 --- a/arch/mips/include/asm/mach-ath79/irq.h
  82 +++ b/arch/mips/include/asm/mach-ath79/irq.h
  83 @@ -14,6 +14,7 @@
  84
  85  #define ATH79_MISC_IRQ_BASE    8
  86  #define ATH79_MISC_IRQ_COUNT   32
  87 +#define ATH79_MISC_IRQ(_x)     (ATH79_MISC_IRQ_BASE + (_x))
  88
  89  #define ATH79_PCI_IRQ_BASE     (ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT)
  90  #define ATH79_PCI_IRQ_COUNT    6