target/linux/ar71xx/patches-3.6/152-MIPS-pci-ar724x-setup-command-register-of-the-PCI-co.patch

   1 From 93824983ceb36d4ce1f4a644031ec6fb5f332f1d Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Tue, 26 Jun 2012 15:14:47 +0200
   4 Subject: [PATCH 13/34] MIPS: pci-ar724x: setup command register of the PCI controller
   5
   6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
   7 ---
   8  arch/mips/ath79/pci.c                          |   10 +++-
   9  arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    2 +
  10  arch/mips/pci/pci-ar724x.c                     |   63 ++++++++++++++++++++++++
  11  3 files changed, 74 insertions(+), 1 deletions(-)
  12
  13 --- a/arch/mips/ath79/pci.c
  14 +++ b/arch/mips/ath79/pci.c
  15 @@ -137,13 +137,14 @@ static struct platform_device *
  16  ath79_register_pci_ar724x(int id,
  17                           unsigned long cfg_base,
  18                           unsigned long ctrl_base,
  19 +                         unsigned long crp_base,
  20                           unsigned long mem_base,
  21                           unsigned long mem_size,
  22                           unsigned long io_base,
  23                           int irq)
  24  {
  25         struct platform_device *pdev;
  26 -       struct resource res[5];
  27 +       struct resource res[6];
  28
  29         memset(res, 0, sizeof(res));
  30
  31 @@ -171,6 +172,11 @@ ath79_register_pci_ar724x(int id,
  32         res[4].start = io_base;
  33         res[4].end = io_base;
  34
  35 +       res[5].name = "crp_base";
  36 +       res[5].flags = IORESOURCE_MEM;
  37 +       res[5].start = crp_base;
  38 +       res[5].end = crp_base + AR724X_PCI_CRP_SIZE - 1;
  39 +
  40         pdev = platform_device_register_simple("ar724x-pci", id,
  41                                                res, ARRAY_SIZE(res));
  42         return pdev;
  43 @@ -186,6 +192,7 @@ int __init ath79_register_pci(void)
  44                 pdev = ath79_register_pci_ar724x(-1,
  45                                                  AR724X_PCI_CFG_BASE,
  46                                                  AR724X_PCI_CTRL_BASE,
  47 +                                                AR724X_PCI_CRP_BASE,
  48                                                  AR724X_PCI_MEM_BASE,
  49                                                  AR724X_PCI_MEM_SIZE,
  50                                                  0,
  51 @@ -201,6 +208,7 @@ int __init ath79_register_pci(void)
  52                 pdev = ath79_register_pci_ar724x(-1,
  53                                                  AR724X_PCI_CFG_BASE,
  54                                                  AR724X_PCI_CTRL_BASE,
  55 +                                                AR724X_PCI_CRP_BASE,
  56                                                  AR724X_PCI_MEM_BASE,
  57                                                  AR724X_PCI_MEM_SIZE,
  58                                                  0,
  59 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  60 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
  61 @@ -67,6 +67,8 @@
  62
  63  #define AR724X_PCI_CFG_BASE    0x14000000
  64  #define AR724X_PCI_CFG_SIZE    0x1000
  65 +#define AR724X_PCI_CRP_BASE    (AR71XX_APB_BASE + 0x000c0000)
  66 +#define AR724X_PCI_CRP_SIZE    0x1000
  67  #define AR724X_PCI_CTRL_BASE   (AR71XX_APB_BASE + 0x000f0000)
  68  #define AR724X_PCI_CTRL_SIZE   0x100
  69
  70 --- a/arch/mips/pci/pci-ar724x.c
  71 +++ b/arch/mips/pci/pci-ar724x.c
  72 @@ -29,9 +29,17 @@
  73
  74  #define AR7240_BAR0_WAR_VALUE  0xffff
  75
  76 +#define AR724X_PCI_CMD_INIT    (PCI_COMMAND_MEMORY |           \
  77 +                                PCI_COMMAND_MASTER |           \
  78 +                                PCI_COMMAND_INVALIDATE |       \
  79 +                                PCI_COMMAND_PARITY |           \
  80 +                                PCI_COMMAND_SERR |             \
  81 +                                PCI_COMMAND_FAST_BACK)
  82 +
  83  struct ar724x_pci_controller {
  84         void __iomem *devcfg_base;
  85         void __iomem *ctrl_base;
  86 +       void __iomem *crp_base;
  87
  88         int irq;
  89         int irq_base;
  90 @@ -64,6 +72,51 @@ pci_bus_to_ar724x_controller(struct pci_
  91         return container_of(hose, struct ar724x_pci_controller, pci_controller);
  92  }
  93
  94 +static int ar724x_pci_local_write(struct ar724x_pci_controller *apc,
  95 +                                 int where, int size, u32 value)
  96 +{
  97 +       unsigned long flags;
  98 +       void __iomem *base;
  99 +       u32 data;
 100 +       int s;
 101 +
 102 +       WARN_ON(where & (size - 1));
 103 +
 104 +       if (!apc->link_up)
 105 +               return PCIBIOS_DEVICE_NOT_FOUND;
 106 +
 107 +       base = apc->crp_base;
 108 +
 109 +       spin_lock_irqsave(&apc->lock, flags);
 110 +       data = __raw_readl(base + (where & ~3));
 111 +
 112 +       switch (size) {
 113 +       case 1:
 114 +               s = ((where & 3) * 8);
 115 +               data &= ~(0xff << s);
 116 +               data |= ((value & 0xff) << s);
 117 +               break;
 118 +       case 2:
 119 +               s = ((where & 2) * 8);
 120 +               data &= ~(0xffff << s);
 121 +               data |= ((value & 0xffff) << s);
 122 +               break;
 123 +       case 4:
 124 +               data = value;
 125 +               break;
 126 +       default:
 127 +               spin_unlock_irqrestore(&apc->lock, flags);
 128 +               return PCIBIOS_BAD_REGISTER_NUMBER;
 129 +       }
 130 +
 131 +       __raw_writel(data, base + (where & ~3));
 132 +       /* flush write */
 133 +       __raw_readl(base + (where & ~3));
 134 +       spin_unlock_irqrestore(&apc->lock, flags);
 135 +
 136 +       return PCIBIOS_SUCCESSFUL;
 137 +}
 138 +
 139  static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
 140                             int size, uint32_t *value)
 141  {
 142 @@ -324,6 +377,14 @@ static int __devinit ar724x_pci_probe(st
 143         if (!apc->devcfg_base)
 144                 return -EBUSY;
 145
 146 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "crp_base");
 147 +       if (!res)
 148 +               return -EINVAL;
 149 +
 150 +       apc->crp_base = devm_request_and_ioremap(&pdev->dev, res);
 151 +       if (apc->crp_base == NULL)
 152 +               return -EBUSY;
 153 +
 154         apc->irq = platform_get_irq(pdev, 0);
 155         if (apc->irq < 0)
 156                 return -EINVAL;
 157 @@ -360,6 +421,8 @@ static int __devinit ar724x_pci_probe(st
 158
 159         ar724x_pci_irq_init(apc, id);
 160
 161 +       ar724x_pci_local_write(apc, PCI_COMMAND, 4, AR724X_PCI_CMD_INIT);
 162 +
 163         register_pci_controller(&apc->pci_controller);
 164
 165         return 0;