ar71xx: switch to 3.3.2
[openwrt.git] / target / linux / ar71xx / patches-3.2 / 005-MIPS-ath79-add-revision-id-for-the-AR933X-SoCs.patch
1 From a6b04a056cd63e9241b94bc5dcc8847fa4cb1d34 Mon Sep 17 00:00:00 2001
2 From: Gabor Juhos <juhosg@openwrt.org>
3 Date: Thu, 23 Jun 2011 18:13:14 +0200
4 Subject: [PATCH 05/27] MIPS: ath79: add revision id for the AR933X SoCs
5
6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
7 Cc: linux-mips@linux-mips.org
8 Cc: Kathy Giori <kgiori@qca.qualcomm.com>
9 Cc: "Luis R.  Rodriguez" <rodrigue@qca.qualcomm.com>
10 Patchwork: https://patchwork.linux-mips.org/patch/2538/
11 Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
12 ---
13  arch/mips/ath79/setup.c                        |   12 ++++++++++++
14  arch/mips/include/asm/mach-ath79/ar71xx_regs.h |    4 ++++
15  arch/mips/include/asm/mach-ath79/ath79.h       |    4 +++-
16  3 files changed, 19 insertions(+), 1 deletions(-)
17
18 --- a/arch/mips/ath79/setup.c
19 +++ b/arch/mips/ath79/setup.c
20 @@ -116,6 +116,18 @@ static void __init ath79_detect_sys_type
21                 rev = id & AR724X_REV_ID_REVISION_MASK;
22                 break;
23  
24 +       case REV_ID_MAJOR_AR9330:
25 +               ath79_soc = ATH79_SOC_AR9330;
26 +               chip = "9330";
27 +               rev = id & AR933X_REV_ID_REVISION_MASK;
28 +               break;
29 +
30 +       case REV_ID_MAJOR_AR9331:
31 +               ath79_soc = ATH79_SOC_AR9331;
32 +               chip = "9331";
33 +               rev = id & AR933X_REV_ID_REVISION_MASK;
34 +               break;
35 +
36         case REV_ID_MAJOR_AR913X:
37                 minor = id & AR913X_REV_ID_MINOR_MASK;
38                 rev = id >> AR913X_REV_ID_REVISION_SHIFT;
39 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
40 +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
41 @@ -207,6 +207,8 @@
42  #define REV_ID_MAJOR_AR7240            0x00c0
43  #define REV_ID_MAJOR_AR7241            0x0100
44  #define REV_ID_MAJOR_AR7242            0x1100
45 +#define REV_ID_MAJOR_AR9330            0x0110
46 +#define REV_ID_MAJOR_AR9331            0x1110
47  
48  #define AR71XX_REV_ID_MINOR_MASK       0x3
49  #define AR71XX_REV_ID_MINOR_AR7130     0x0
50 @@ -221,6 +223,8 @@
51  #define AR913X_REV_ID_REVISION_MASK    0x3
52  #define AR913X_REV_ID_REVISION_SHIFT   2
53  
54 +#define AR933X_REV_ID_REVISION_MASK    0x3
55 +
56  #define AR724X_REV_ID_REVISION_MASK    0x3
57  
58  /*
59 --- a/arch/mips/include/asm/mach-ath79/ath79.h
60 +++ b/arch/mips/include/asm/mach-ath79/ath79.h
61 @@ -26,7 +26,9 @@ enum ath79_soc_type {
62         ATH79_SOC_AR7241,
63         ATH79_SOC_AR7242,
64         ATH79_SOC_AR9130,
65 -       ATH79_SOC_AR9132
66 +       ATH79_SOC_AR9132,
67 +       ATH79_SOC_AR9330,
68 +       ATH79_SOC_AR9331,
69  };
70  
71  extern enum ath79_soc_type ath79_soc;