target/linux/ar71xx/patches-3.18/206-spi-ath79-make-chipselect-logic-more-flexible.patch

   1 From 7008284716403237f6bc7d7590b3ed073555bd56 Mon Sep 17 00:00:00 2001
   2 From: Gabor Juhos <juhosg@openwrt.org>
   3 Date: Wed, 11 Jan 2012 22:25:11 +0100
   4 Subject: [PATCH 34/34] spi/ath79: make chipselect logic more flexible
   5
   6 Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
   7 ---
   8  arch/mips/ath79/mach-ap121.c                       |    6 ++
   9  arch/mips/ath79/mach-ap136.c                       |    6 ++
  10  arch/mips/ath79/mach-ap81.c                        |    6 ++
  11  arch/mips/ath79/mach-db120.c                       |    6 ++
  12  arch/mips/ath79/mach-pb44.c                        |    6 ++
  13  arch/mips/ath79/mach-ubnt-xm.c                     |    6 ++
  14  .../include/asm/mach-ath79/ath79_spi_platform.h    |    8 ++-
  15  drivers/spi/spi-ath79.c                            |   67 +++++++++++++-------
  16  8 files changed, 88 insertions(+), 23 deletions(-)
  17
  18 --- a/arch/mips/ath79/mach-ap121.c
  19 +++ b/arch/mips/ath79/mach-ap121.c
  20 @@ -58,12 +58,18 @@ static struct gpio_keys_button ap121_gpi
  21         }
  22  };
  23
  24 +static struct ath79_spi_controller_data ap121_spi0_data = {
  25 +       .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
  26 +       .cs_line = 0,
  27 +};
  28 +
  29  static struct spi_board_info ap121_spi_info[] = {
  30         {
  31                 .bus_num        = 0,
  32                 .chip_select    = 0,
  33                 .max_speed_hz   = 25000000,
  34                 .modalias       = "mx25l1606e",
  35 +               .controller_data = &ap121_spi0_data,
  36         }
  37  };
  38
  39 --- a/arch/mips/ath79/mach-ap136.c
  40 +++ b/arch/mips/ath79/mach-ap136.c
  41 @@ -98,12 +98,18 @@ static struct gpio_keys_button ap136_gpi
  42         },
  43  };
  44
  45 +static struct ath79_spi_controller_data ap136_spi0_data = {
  46 +       .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
  47 +       .cs_line = 0,
  48 +};
  49 +
  50  static struct spi_board_info ap136_spi_info[] = {
  51         {
  52                 .bus_num        = 0,
  53                 .chip_select    = 0,
  54                 .max_speed_hz   = 25000000,
  55                 .modalias       = "mx25l6405d",
  56 +               .controller_data = &ap136_spi0_data,
  57         }
  58  };
  59
  60 --- a/arch/mips/ath79/mach-db120.c
  61 +++ b/arch/mips/ath79/mach-db120.c
  62 @@ -76,12 +76,18 @@ static struct gpio_keys_button db120_gpi
  63         },
  64  };
  65
  66 +static struct ath79_spi_controller_data db120_spi0_data = {
  67 +       .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
  68 +       .cs_line = 0,
  69 +};
  70 +
  71  static struct spi_board_info db120_spi_info[] = {
  72         {
  73                 .bus_num        = 0,
  74                 .chip_select    = 0,
  75                 .max_speed_hz   = 25000000,
  76                 .modalias       = "s25sl064a",
  77 +               .controller_data = &db120_spi0_data,
  78         }
  79  };
  80
  81 --- a/arch/mips/ath79/mach-pb44.c
  82 +++ b/arch/mips/ath79/mach-pb44.c
  83 @@ -87,12 +87,18 @@ static struct gpio_keys_button pb44_gpio
  84         }
  85  };
  86
  87 +static struct ath79_spi_controller_data pb44_spi0_data = {
  88 +       .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
  89 +       .cs_line = 0,
  90 +};
  91 +
  92  static struct spi_board_info pb44_spi_info[] = {
  93         {
  94                 .bus_num        = 0,
  95                 .chip_select    = 0,
  96                 .max_speed_hz   = 25000000,
  97                 .modalias       = "m25p64",
  98 +               .controller_data = &pb44_spi0_data,
  99         },
 100  };
 101
 102 --- a/arch/mips/ath79/mach-ubnt-xm.c
 103 +++ b/arch/mips/ath79/mach-ubnt-xm.c
 104 @@ -65,12 +65,18 @@ static struct gpio_keys_button ubnt_xm_g
 105         }
 106  };
 107
 108 +static struct ath79_spi_controller_data ubnt_xm_spi0_data = {
 109 +       .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
 110 +       .cs_line = 0,
 111 +};
 112 +
 113  static struct spi_board_info ubnt_xm_spi_info[] = {
 114         {
 115                 .bus_num        = 0,
 116                 .chip_select    = 0,
 117                 .max_speed_hz   = 25000000,
 118                 .modalias       = "mx25l6405d",
 119 +               .controller_data = &ubnt_xm_spi0_data,
 120         }
 121  };
 122
 123 --- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
 124 +++ b/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h
 125 @@ -16,8 +16,14 @@ struct ath79_spi_platform_data {
 126         unsigned        num_chipselect;
 127  };
 128
 129 +enum ath79_spi_cs_type {
 130 +       ATH79_SPI_CS_TYPE_INTERNAL,
 131 +       ATH79_SPI_CS_TYPE_GPIO,
 132 +};
 133 +
 134  struct ath79_spi_controller_data {
 135 -       unsigned        gpio;
 136 +       enum ath79_spi_cs_type cs_type;
 137 +       unsigned cs_line;
 138  };
 139
 140  #endif /* _ATH79_SPI_PLATFORM_H */
 141 --- a/drivers/spi/spi-ath79.c
 142 +++ b/drivers/spi/spi-ath79.c
 143 @@ -33,6 +33,8 @@
 144  #define ATH79_SPI_RRW_DELAY_FACTOR     12000
 145  #define MHZ                            (1000 * 1000)
 146
 147 +#define ATH79_SPI_CS_LINE_MAX          2
 148 +
 149  struct ath79_spi {
 150         struct spi_bitbang      bitbang;
 151         u32                     ioc_base;
 152 @@ -67,6 +69,7 @@ static void ath79_spi_chipselect(struct
 153  {
 154         struct ath79_spi *sp = ath79_spidev_to_sp(spi);
 155         int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;
 156 +       struct ath79_spi_controller_data *cdata = spi->controller_data;
 157
 158         if (is_active) {
 159                 /* set initial clock polarity */
 160 @@ -78,20 +81,24 @@ static void ath79_spi_chipselect(struct
 161                 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
 162         }
 163
 164 -       if (spi->chip_select) {
 165 -               struct ath79_spi_controller_data *cdata = spi->controller_data;
 166 -
 167 -               /* SPI is normally active-low */
 168 -               gpio_set_value(cdata->gpio, cs_high);
 169 -       } else {
 170 +       switch (cdata->cs_type) {
 171 +       case ATH79_SPI_CS_TYPE_INTERNAL:
 172                 if (cs_high)
 173 -                       sp->ioc_base |= AR71XX_SPI_IOC_CS0;
 174 +                       sp->ioc_base |= AR71XX_SPI_IOC_CS(cdata->cs_line);
 175                 else
 176 -                       sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
 177 +                       sp->ioc_base &= ~AR71XX_SPI_IOC_CS(cdata->cs_line);
 178
 179                 ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
 180 -       }
 181 +               break;
 182
 183 +       case ATH79_SPI_CS_TYPE_GPIO:
 184 +               /* SPI is normally active-low */
 185 +               if (gpio_cansleep(cdata->cs_line))
 186 +                       gpio_set_value_cansleep(cdata->cs_line, cs_high);
 187 +               else
 188 +                       gpio_set_value(cdata->cs_line, cs_high);
 189 +               break;
 190 +       }
 191  }
 192
 193  static void ath79_spi_enable(struct ath79_spi *sp)
 194 @@ -118,24 +125,30 @@ static void ath79_spi_disable(struct ath
 195  static int ath79_spi_setup_cs(struct spi_device *spi)
 196  {
 197         struct ath79_spi_controller_data *cdata;
 198 +       unsigned long flags;
 199         int status;
 200
 201         cdata = spi->controller_data;
 202 -       if (spi->chip_select && !cdata)
 203 +       if (!cdata)
 204                 return -EINVAL;
 205
 206         status = 0;
 207 -       if (spi->chip_select) {
 208 -               unsigned long flags;
 209 +       switch (cdata->cs_type) {
 210 +       case ATH79_SPI_CS_TYPE_INTERNAL:
 211 +               if (cdata->cs_line > ATH79_SPI_CS_LINE_MAX)
 212 +                       status = -EINVAL;
 213 +               break;
 214
 215 +       case ATH79_SPI_CS_TYPE_GPIO:
 216                 flags = GPIOF_DIR_OUT;
 217                 if (spi->mode & SPI_CS_HIGH)
 218                         flags |= GPIOF_INIT_LOW;
 219                 else
 220                         flags |= GPIOF_INIT_HIGH;
 221
 222 -               status = gpio_request_one(cdata->gpio, flags,
 223 +               status = gpio_request_one(cdata->cs_line, flags,
 224                                           dev_name(&spi->dev));
 225 +               break;
 226         }
 227
 228         return status;
 229 @@ -143,9 +156,19 @@ static int ath79_spi_setup_cs(struct spi
 230
 231  static void ath79_spi_cleanup_cs(struct spi_device *spi)
 232  {
 233 -       if (spi->chip_select) {
 234 -               struct ath79_spi_controller_data *cdata = spi->controller_data;
 235 -               gpio_free(cdata->gpio);
 236 +       struct ath79_spi_controller_data *cdata;
 237 +
 238 +       cdata = spi->controller_data;
 239 +       if (!cdata)
 240 +               return;
 241 +
 242 +       switch (cdata->cs_type) {
 243 +       case ATH79_SPI_CS_TYPE_INTERNAL:
 244 +               /* nothing to do */
 245 +               break;
 246 +       case ATH79_SPI_CS_TYPE_GPIO:
 247 +               gpio_free(cdata->cs_line);
 248 +               break;
 249         }
 250  }
 251
 252 @@ -210,6 +233,10 @@ static int ath79_spi_probe(struct platfo
 253         unsigned long rate;
 254         int ret;
 255
 256 +       pdata = pdev->dev.platform_data;
 257 +       if (!pdata)
 258 +               return -EINVAL;
 259 +
 260         master = spi_alloc_master(&pdev->dev, sizeof(*sp));
 261         if (master == NULL) {
 262                 dev_err(&pdev->dev, "failed to allocate spi master\n");
 263 @@ -219,15 +246,11 @@ static int ath79_spi_probe(struct platfo
 264         sp = spi_master_get_devdata(master);
 265         platform_set_drvdata(pdev, sp);
 266
 267 -       pdata = dev_get_platdata(&pdev->dev);
 268 -
 269         master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
 270         master->setup = ath79_spi_setup;
 271         master->cleanup = ath79_spi_cleanup;
 272 -       if (pdata) {
 273 -               master->bus_num = pdata->bus_num;
 274 -               master->num_chipselect = pdata->num_chipselect;
 275 -       }
 276 +       master->bus_num = pdata->bus_num;
 277 +       master->num_chipselect = pdata->num_chipselect;
 278
 279         sp->bitbang.master = master;
 280         sp->bitbang.chipselect = ath79_spi_chipselect;