2 * Atheros AR71xx built-in ethernet mac driver
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Based on Atheros' AG7100 driver
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
16 static void ag71xx_dump_regs(struct ag71xx *ag)
18 DBG("%s: mac_cfg1=%08x, mac_cfg2=%08x, ipg=%08x, hdx=%08x, mfl=%08x\n",
20 ag71xx_rr(ag, AG71XX_REG_MAC_CFG1),
21 ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
22 ag71xx_rr(ag, AG71XX_REG_MAC_IPG),
23 ag71xx_rr(ag, AG71XX_REG_MAC_HDX),
24 ag71xx_rr(ag, AG71XX_REG_MAC_MFL));
25 DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n",
27 ag71xx_rr(ag, AG71XX_REG_MII_CFG),
28 ag71xx_rr(ag, AG71XX_REG_MII_CMD),
29 ag71xx_rr(ag, AG71XX_REG_MII_ADDR));
30 DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n",
32 ag71xx_rr(ag, AG71XX_REG_MII_CTRL),
33 ag71xx_rr(ag, AG71XX_REG_MII_STATUS),
34 ag71xx_rr(ag, AG71XX_REG_MII_IND));
35 DBG("%s: mac_ifctl=%08x, mac_addr1=%08x, mac_addr2=%08x\n",
37 ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
38 ag71xx_rr(ag, AG71XX_REG_MAC_ADDR1),
39 ag71xx_rr(ag, AG71XX_REG_MAC_ADDR2));
40 DBG("%s: fifo_cfg0=%08x, fifo_cfg1=%08x, fifo_cfg2=%08x\n",
42 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
43 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
44 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
45 DBG("%s: fifo_cfg3=%08x, fifo_cfg3=%08x, fifo_cfg5=%08x\n",
47 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
48 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
49 ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
52 static void ag71xx_ring_free(struct ag71xx_ring *ring)
57 dma_free_coherent(NULL, ring->size * sizeof(*ring->descs),
58 ring->descs, ring->descs_dma);
61 static int ag71xx_ring_alloc(struct ag71xx_ring *ring, unsigned int size)
65 ring->descs = dma_alloc_coherent(NULL, size * sizeof(*ring->descs),
75 ring->buf = kzalloc(size * sizeof(*ring->buf), GFP_KERNEL);
87 static void ag71xx_ring_tx_clean(struct ag71xx *ag)
89 struct ag71xx_ring *ring = &ag->tx_ring;
90 struct net_device *dev = ag->dev;
92 while (ring->curr != ring->dirty) {
93 u32 i = ring->dirty % AG71XX_TX_RING_SIZE;
95 if (!ag71xx_desc_empty(&ring->descs[i])) {
96 ring->descs[i].ctrl = 0;
97 dev->stats.tx_errors++;
100 if (ring->buf[i].skb)
101 dev_kfree_skb_any(ring->buf[i].skb);
103 ring->buf[i].skb = NULL;
108 /* flush descriptors */
113 static void ag71xx_ring_tx_init(struct ag71xx *ag)
115 struct ag71xx_ring *ring = &ag->tx_ring;
118 for (i = 0; i < AG71XX_TX_RING_SIZE; i++) {
119 ring->descs[i].next = (u32) (ring->descs_dma +
120 sizeof(*ring->descs) * ((i + 1) % AG71XX_TX_RING_SIZE));
122 ring->descs[i].ctrl = DESC_EMPTY;
123 ring->buf[i].skb = NULL;
126 /* flush descriptors */
133 static void ag71xx_ring_rx_clean(struct ag71xx *ag)
135 struct ag71xx_ring *ring = &ag->rx_ring;
141 for (i = 0; i < AG71XX_RX_RING_SIZE; i++)
142 if (ring->buf[i].skb)
143 kfree_skb(ring->buf[i].skb);
147 static int ag71xx_ring_rx_init(struct ag71xx *ag)
149 struct ag71xx_ring *ring = &ag->rx_ring;
154 for (i = 0; i < AG71XX_RX_RING_SIZE; i++)
155 ring->descs[i].next = (u32) (ring->descs_dma +
156 sizeof(*ring->descs) * ((i + 1) % AG71XX_RX_RING_SIZE));
158 for (i = 0; i < AG71XX_RX_RING_SIZE; i++) {
161 skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE);
168 skb_reserve(skb, AG71XX_RX_PKT_RESERVE);
170 ring->buf[i].skb = skb;
171 ring->descs[i].data = virt_to_phys(skb->data);
172 ring->descs[i].ctrl = DESC_EMPTY;
175 /* flush descriptors */
184 static int ag71xx_ring_rx_refill(struct ag71xx *ag)
186 struct ag71xx_ring *ring = &ag->rx_ring;
190 for (; ring->curr - ring->dirty > 0; ring->dirty++) {
193 i = ring->dirty % AG71XX_RX_RING_SIZE;
195 if (ring->buf[i].skb == NULL) {
198 skb = dev_alloc_skb(AG71XX_RX_PKT_SIZE);
200 printk(KERN_ERR "%s: no memory for skb\n",
205 skb_reserve(skb, AG71XX_RX_PKT_RESERVE);
207 ring->buf[i].skb = skb;
208 ring->descs[i].data = virt_to_phys(skb->data);
211 ring->descs[i].ctrl = DESC_EMPTY;
215 /* flush descriptors */
218 DBG("%s: %u rx descriptors refilled\n", ag->dev->name, count);
223 static int ag71xx_rings_init(struct ag71xx *ag)
227 ret = ag71xx_ring_alloc(&ag->tx_ring, AG71XX_TX_RING_SIZE);
231 ag71xx_ring_tx_init(ag);
233 ret = ag71xx_ring_alloc(&ag->rx_ring, AG71XX_RX_RING_SIZE);
237 ret = ag71xx_ring_rx_init(ag);
241 static void ag71xx_rings_cleanup(struct ag71xx *ag)
243 ag71xx_ring_rx_clean(ag);
244 ag71xx_ring_free(&ag->rx_ring);
246 ag71xx_ring_tx_clean(ag);
247 ag71xx_ring_free(&ag->tx_ring);
250 static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac)
254 t = (((u32) mac[0]) << 24) | (((u32) mac[1]) << 16)
255 | (((u32) mac[2]) << 8) | ((u32) mac[2]);
257 ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t);
259 t = (((u32) mac[4]) << 24) | (((u32) mac[5]) << 16);
260 ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t);
263 #define MAC_CFG1_INIT (MAC_CFG1_RXE | MAC_CFG1_TXE | MAC_CFG1_SRX \
266 static void ag71xx_hw_init(struct ag71xx *ag)
268 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
270 ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
273 ar71xx_device_stop(pdata->reset_bit);
275 ar71xx_device_start(pdata->reset_bit);
278 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_INIT);
280 /* TODO: set max packet size */
282 ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
283 MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);
285 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, 0x00001f00);
287 ag71xx_mii_ctrl_set_if(ag, pdata->mii_if);
289 ag71xx_wr(ag, AG71XX_REG_MII_CFG, MII_CFG_CLK_DIV_28);
291 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000);
292 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff);
293 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG4, 0x0000ffff);
294 ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, 0x0007ffef);
297 static void ag71xx_hw_start(struct ag71xx *ag)
299 /* start RX engine */
300 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE);
302 /* enable interrupts */
303 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, AG71XX_INT_INIT);
306 static void ag71xx_hw_stop(struct ag71xx *ag)
309 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0);
310 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0);
312 /* disable all interrupts */
313 ag71xx_wr(ag, AG71XX_REG_INT_ENABLE, 0);
316 static int ag71xx_open(struct net_device *dev)
318 struct ag71xx *ag = netdev_priv(dev);
321 ret = ag71xx_rings_init(ag);
325 napi_enable(&ag->napi);
327 netif_carrier_off(dev);
329 phy_start(ag->phy_dev);
331 ag->duplex = DUPLEX_FULL;
332 ag->speed = SPEED_100;
334 ag71xx_link_update(ag);
337 ag71xx_wr(ag, AG71XX_REG_TX_DESC, ag->tx_ring.descs_dma);
338 ag71xx_wr(ag, AG71XX_REG_RX_DESC, ag->rx_ring.descs_dma);
340 ag71xx_hw_set_macaddr(ag, dev->dev_addr);
344 netif_start_queue(dev);
349 ag71xx_rings_cleanup(ag);
353 static int ag71xx_stop(struct net_device *dev)
355 struct ag71xx *ag = netdev_priv(dev);
358 spin_lock_irqsave(&ag->lock, flags);
360 netif_stop_queue(dev);
364 netif_carrier_off(dev);
366 phy_stop(ag->phy_dev);
371 ag71xx_link_update(ag);
374 napi_disable(&ag->napi);
376 spin_unlock_irqrestore(&ag->lock, flags);
378 ag71xx_rings_cleanup(ag);
383 static int ag71xx_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
385 struct ag71xx *ag = netdev_priv(dev);
386 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
387 struct ag71xx_ring *ring = &ag->tx_ring;
388 struct ag71xx_desc *desc;
392 i = ring->curr % AG71XX_TX_RING_SIZE;
393 desc = &ring->descs[i];
395 spin_lock_irqsave(&ag->lock, flags);
396 ar71xx_ddr_flush(pdata->flush_reg);
397 spin_unlock_irqrestore(&ag->lock, flags);
399 if (!ag71xx_desc_empty(desc))
403 DBG("%s: packet len is too small\n", ag->dev->name);
407 dma_cache_wback_inv((unsigned long)skb->data, skb->len);
409 ring->buf[i].skb = skb;
411 /* setup descriptor fields */
412 desc->data = virt_to_phys(skb->data);
413 desc->ctrl = (skb->len & DESC_PKTLEN_M);
415 /* flush descriptor */
419 if (ring->curr == (ring->dirty + AG71XX_TX_THRES_STOP)) {
420 DBG("%s: tx queue full\n", ag->dev->name);
421 netif_stop_queue(dev);
424 DBG("%s: packet injected into TX queue\n", ag->dev->name);
426 /* enable TX engine */
427 ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE);
429 dev->trans_start = jiffies;
434 dev->stats.tx_dropped++;
440 static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
442 struct mii_ioctl_data *data = (struct mii_ioctl_data *) &ifr->ifr_data;
443 struct ag71xx *ag = netdev_priv(dev);
448 if (ag->phy_dev == NULL)
451 spin_lock_irq(&ag->lock);
452 ret = phy_ethtool_ioctl(ag->phy_dev, (void *) ifr->ifr_data);
453 spin_unlock_irq(&ag->lock);
458 (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr)))
464 (ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr)))
471 if (ag->phy_dev == NULL)
474 return phy_mii_ioctl(ag->phy_dev, data, cmd);
483 static void ag71xx_tx_packets(struct ag71xx *ag)
485 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
486 struct ag71xx_ring *ring = &ag->tx_ring;
489 DBG("%s: processing TX ring\n", ag->dev->name);
491 #ifdef AG71XX_NAPI_TX
492 ar71xx_ddr_flush(pdata->flush_reg);
496 while (ring->dirty != ring->curr) {
497 unsigned int i = ring->dirty % AG71XX_TX_RING_SIZE;
498 struct ag71xx_desc *desc = &ring->descs[i];
499 struct sk_buff *skb = ring->buf[i].skb;
501 if (!ag71xx_desc_empty(desc))
504 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS);
506 ag->dev->stats.tx_bytes += skb->len;
507 ag->dev->stats.tx_packets++;
509 dev_kfree_skb_any(skb);
510 ring->buf[i].skb = NULL;
516 DBG("%s: %d packets sent out\n", ag->dev->name, sent);
518 if ((ring->curr - ring->dirty) < AG71XX_TX_THRES_WAKEUP)
519 netif_wake_queue(ag->dev);
523 static int ag71xx_rx_packets(struct ag71xx *ag, int limit)
525 struct net_device *dev = ag->dev;
526 struct ag71xx_ring *ring = &ag->rx_ring;
527 #ifndef AG71XX_NAPI_TX
528 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
533 #ifndef AG71XX_NAPI_TX
534 spin_lock_irqsave(&ag->lock, flags);
535 ar71xx_ddr_flush(pdata->flush_reg);
536 spin_unlock_irqrestore(&ag->lock, flags);
539 DBG("%s: rx packets, limit=%d, curr=%u, dirty=%u\n",
540 dev->name, limit, ring->curr, ring->dirty);
542 while (done < limit) {
543 unsigned int i = ring->curr % AG71XX_RX_RING_SIZE;
544 struct ag71xx_desc *desc = &ring->descs[i];
548 if (ag71xx_desc_empty(desc))
551 if ((ring->dirty + AG71XX_RX_RING_SIZE) == ring->curr) {
556 skb = ring->buf[i].skb;
557 pktlen = ag71xx_desc_pktlen(desc);
558 pktlen -= ETH_FCS_LEN;
560 /* TODO: move it into the refill function */
561 dma_cache_wback_inv((unsigned long)skb->data, pktlen);
562 skb_put(skb, pktlen);
565 skb->protocol = eth_type_trans(skb, dev);
566 skb->ip_summed = CHECKSUM_UNNECESSARY;
568 netif_receive_skb(skb);
570 dev->last_rx = jiffies;
571 dev->stats.rx_packets++;
572 dev->stats.rx_bytes += pktlen;
574 ring->buf[i].skb = NULL;
577 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR);
580 if ((ring->curr - ring->dirty) > (AG71XX_RX_RING_SIZE / 4))
581 ag71xx_ring_rx_refill(ag);
584 ag71xx_ring_rx_refill(ag);
586 DBG("%s: rx finish, curr=%u, dirty=%u, done=%d\n",
587 dev->name, ring->curr, ring->dirty, done);
592 static int ag71xx_poll(struct napi_struct *napi, int limit)
594 struct ag71xx *ag = container_of(napi, struct ag71xx, napi);
595 #ifdef AG71XX_NAPI_TX
596 struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
598 struct net_device *dev = ag->dev;
603 #ifdef AG71XX_NAPI_TX
604 ar71xx_ddr_flush(pdata->flush_reg);
605 ag71xx_tx_packets(ag);
608 DBG("%s: processing RX ring\n", dev->name);
609 done = ag71xx_rx_packets(ag, limit);
611 /* TODO: add OOM handler */
613 status = ag71xx_rr(ag, AG71XX_REG_INT_STATUS);
614 status &= AG71XX_INT_POLL;
616 if ((done < limit) && (!status)) {
617 DBG("%s: disable polling mode, done=%d, status=%x\n",
618 dev->name, done, status);
620 netif_rx_complete(dev, napi);
622 /* enable interrupts */
623 spin_lock_irqsave(&ag->lock, flags);
624 ag71xx_int_enable(ag, AG71XX_INT_POLL);
625 spin_unlock_irqrestore(&ag->lock, flags);
629 if (status & AG71XX_INT_RX_OF) {
630 printk(KERN_ALERT "%s: rx owerflow, restarting dma\n",
634 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_OF);
636 ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE);
639 DBG("%s: stay in polling mode, done=%d, status=%x\n",
640 dev->name, done, status);
644 static irqreturn_t ag71xx_interrupt(int irq, void *dev_id)
646 struct net_device *dev = dev_id;
647 struct ag71xx *ag = netdev_priv(dev);
650 status = ag71xx_rr(ag, AG71XX_REG_INT_STATUS);
651 status &= ag71xx_rr(ag, AG71XX_REG_INT_ENABLE);
653 if (unlikely(!status))
656 if (unlikely(status & AG71XX_INT_ERR)) {
657 if (status & AG71XX_INT_TX_BE) {
658 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE);
659 dev_err(&dev->dev, "TX BUS error\n");
661 if (status & AG71XX_INT_RX_BE) {
662 ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE);
663 dev_err(&dev->dev, "RX BUS error\n");
668 if (unlikely(status & AG71XX_INT_TX_UR)) {
669 ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_UR);
670 DBG("%s: TX underrun\n", dev->name);
674 #ifndef AG71XX_NAPI_TX
675 if (likely(status & AG71XX_INT_TX_PS))
676 ag71xx_tx_packets(ag);
679 if (likely(status & AG71XX_INT_POLL)) {
680 ag71xx_int_disable(ag, AG71XX_INT_POLL);
681 DBG("%s: enable polling mode\n", dev->name);
682 netif_rx_schedule(dev, &ag->napi);
688 static void ag71xx_set_multicast_list(struct net_device *dev)
693 static int __init ag71xx_probe(struct platform_device *pdev)
695 static u8 default_mac[ETH_ALEN] = {0x00, 0xba, 0xdb, 0xad, 0xba, 0xd0};
696 struct net_device *dev;
697 struct resource *res;
701 if (!pdev->dev.platform_data) {
702 dev_err(&pdev->dev, "no platform data specified\n");
707 dev = alloc_etherdev(sizeof(*ag));
709 dev_err(&pdev->dev, "alloc_etherdev failed\n");
714 SET_NETDEV_DEV(dev, &pdev->dev);
716 ag = netdev_priv(dev);
719 spin_lock_init(&ag->lock);
721 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mac_base");
723 dev_err(&pdev->dev, "no mac_base resource found\n");
728 ag->mac_base = ioremap_nocache(res->start, res->end - res->start + 1);
730 dev_err(&pdev->dev, "unable to ioremap mac_base\n");
735 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mii_ctrl");
737 dev_err(&pdev->dev, "no mii_ctrl resource found\n");
742 ag->mii_ctrl = ioremap_nocache(res->start, res->end - res->start + 1);
744 dev_err(&pdev->dev, "unable to ioremap mii_ctrl\n");
749 dev->irq = platform_get_irq(pdev, 0);
750 err = request_irq(dev->irq, ag71xx_interrupt,
751 IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
754 dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq);
755 goto err_unmap_mii_ctrl;
758 dev->base_addr = (unsigned long)ag->mac_base;
759 dev->open = ag71xx_open;
760 dev->stop = ag71xx_stop;
761 dev->hard_start_xmit = ag71xx_hard_start_xmit;
762 dev->set_multicast_list = ag71xx_set_multicast_list;
763 dev->do_ioctl = ag71xx_do_ioctl;
764 dev->ethtool_ops = &ag71xx_ethtool_ops;
766 netif_napi_add(dev, &ag->napi, ag71xx_poll, AG71XX_NAPI_WEIGHT);
768 memcpy(dev->dev_addr, default_mac, ETH_ALEN);
769 dev->dev_addr[5] += pdev->id & 0xff;
771 err = register_netdev(dev);
773 dev_err(&pdev->dev, "unable to register net device\n");
777 printk(KERN_INFO "%s: Atheros AG71xx at 0x%08lx, irq %d\n",
778 dev->name, dev->base_addr, dev->irq);
780 ag71xx_dump_regs(ag);
784 ag71xx_dump_regs(ag);
786 err = ag71xx_mdio_init(ag, pdev->id);
788 goto err_unregister_netdev;
790 platform_set_drvdata(pdev, dev);
794 err_unregister_netdev:
795 unregister_netdev(dev);
797 free_irq(dev->irq, dev);
799 iounmap(ag->mii_ctrl);
801 iounmap(ag->mac_base);
805 platform_set_drvdata(pdev, NULL);
809 static int __exit ag71xx_remove(struct platform_device *pdev)
811 struct net_device *dev = platform_get_drvdata(pdev);
814 struct ag71xx *ag = netdev_priv(dev);
817 phy_disconnect(ag->phy_dev);
818 ag71xx_mdio_cleanup(ag);
819 unregister_netdev(dev);
820 free_irq(dev->irq, dev);
821 iounmap(ag->mii_ctrl);
822 iounmap(ag->mac_base);
824 platform_set_drvdata(pdev, NULL);
830 static struct platform_driver ag71xx_driver = {
831 .probe = ag71xx_probe,
832 .remove = __exit_p(ag71xx_remove),
834 .name = AG71XX_DRV_NAME,
838 static int __init ag71xx_module_init(void)
840 return platform_driver_register(&ag71xx_driver);
843 static void __exit ag71xx_module_exit(void)
845 platform_driver_unregister(&ag71xx_driver);
848 module_init(ag71xx_module_init);
849 module_exit(ag71xx_module_exit);
851 MODULE_VERSION(AG71XX_DRV_VERSION);
852 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
853 MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>");
854 MODULE_LICENSE("GPL v2");
855 MODULE_ALIAS("platform:" AG71XX_DRV_NAME);