target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-c1.c

   1 /*
   2  *  D-Link DIR-825 rev. C1 board support
   3  *
   4  *  Copyright (C) 2013 Alexander Stadler
   5  *
   6  *  This program is free software; you can redistribute it and/or modify it
   7  *  under the terms of the GNU General Public License version 2 as published
   8  *  by the Free Software Foundation.
   9  */
  10
  11 #include <linux/pci.h>
  12 #include <linux/phy.h>
  13 #include <linux/gpio.h>
  14 #include <linux/platform_device.h>
  15 #include <linux/ath9k_platform.h>
  16 #include <linux/ar8216_platform.h>
  17
  18 #include <asm/mach-ath79/ar71xx_regs.h>
  19
  20 #include "common.h"
  21 #include "dev-ap9x-pci.h"
  22 #include "dev-eth.h"
  23 #include "dev-gpio-buttons.h"
  24 #include "dev-leds-gpio.h"
  25 #include "dev-m25p80.h"
  26 #include "dev-spi.h"
  27 #include "dev-usb.h"
  28 #include "dev-wmac.h"
  29 #include "machtypes.h"
  30
  31 #define DIR825C1_GPIO_LED_BLUE_USB              11
  32 #define DIR825C1_GPIO_LED_ORANGE_POWER          14
  33 #define DIR825C1_GPIO_LED_BLUE_POWER            22
  34 #define DIR825C1_GPIO_LED_BLUE_WPS              15
  35 #define DIR825C1_GPIO_LED_ORANGE_PLANET         19
  36 #define DIR825C1_GPIO_LED_BLUE_PLANET           18
  37
  38 #define DIR825C1_GPIO_BTN_RESET                 17
  39 #define DIR825C1_GPIO_BTN_WPS                   16
  40
  41 #define DIR825C1_KEYS_POLL_INTERVAL             20      /* msecs */
  42 #define DIR825C1_KEYS_DEBOUNCE_INTERVAL         (3 * DIR825C1_KEYS_POLL_INTERVAL)
  43
  44 #define DIR825C1_MAC0_OFFSET                    0x4
  45 #define DIR825C1_MAC1_OFFSET                    0x18
  46 #define DIR825C1_WMAC_CALDATA_OFFSET            0x1000
  47 #define DIR825C1_PCIE_CALDATA_OFFSET            0x5000
  48
  49 static struct gpio_led dir825c1_leds_gpio[] __initdata = {
  50         {
  51                 .name           = "d-link:blue:usb",
  52                 .gpio           = DIR825C1_GPIO_LED_BLUE_USB,
  53                 .active_low     = 1,
  54         },
  55         {
  56                 .name           = "d-link:orange:power",
  57                 .gpio           = DIR825C1_GPIO_LED_ORANGE_POWER,
  58                 .active_low     = 1,
  59         },
  60         {
  61                 .name           = "d-link:blue:power",
  62                 .gpio           = DIR825C1_GPIO_LED_BLUE_POWER,
  63                 .active_low     = 1,
  64         },
  65         {
  66                 .name           = "d-link:blue:wps",
  67                 .gpio           = DIR825C1_GPIO_LED_BLUE_WPS,
  68                 .active_low     = 1,
  69         },
  70         {
  71                 .name           = "d-link:orange:planet",
  72                 .gpio           = DIR825C1_GPIO_LED_ORANGE_PLANET,
  73                 .active_low     = 1,
  74         },
  75         {
  76                 .name           = "d-link:blue:planet",
  77                 .gpio           = DIR825C1_GPIO_LED_BLUE_PLANET,
  78                 .active_low     = 1,
  79         },
  80 };
  81
  82 static struct gpio_led dir835a1_leds_gpio[] __initdata = {
  83         {
  84                 .name           = "d-link:orange:power",
  85                 .gpio           = DIR825C1_GPIO_LED_ORANGE_POWER,
  86                 .active_low     = 1,
  87         },
  88         {
  89                 .name           = "d-link:green:power",
  90                 .gpio           = DIR825C1_GPIO_LED_BLUE_POWER,
  91                 .active_low     = 1,
  92         },
  93         {
  94                 .name           = "d-link:blue:wps",
  95                 .gpio           = DIR825C1_GPIO_LED_BLUE_WPS,
  96                 .active_low     = 1,
  97         },
  98         {
  99                 .name           = "d-link:orange:planet",
 100                 .gpio           = DIR825C1_GPIO_LED_ORANGE_PLANET,
 101                 .active_low     = 1,
 102         },
 103         {
 104                 .name           = "d-link:green:planet",
 105                 .gpio           = DIR825C1_GPIO_LED_BLUE_PLANET,
 106                 .active_low     = 1,
 107         },
 108 };
 109
 110 static struct gpio_keys_button dir825c1_gpio_keys[] __initdata = {
 111         {
 112                 .desc           = "reset",
 113                 .type           = EV_KEY,
 114                 .code           = KEY_RESTART,
 115                 .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
 116                 .gpio           = DIR825C1_GPIO_BTN_RESET,
 117                 .active_low     = 1,
 118         },
 119         {
 120                 .desc           = "wps",
 121                 .type           = EV_KEY,
 122                 .code           = KEY_WPS_BUTTON,
 123                 .debounce_interval = DIR825C1_KEYS_DEBOUNCE_INTERVAL,
 124                 .gpio           = DIR825C1_GPIO_BTN_WPS,
 125                 .active_low     = 1,
 126         },
 127 };
 128
 129 static struct ar8327_pad_cfg dir825c1_ar8327_pad0_cfg = {
 130         .mode = AR8327_PAD_MAC_RGMII,
 131         .txclk_delay_en = true,
 132         .rxclk_delay_en = true,
 133         .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
 134         .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
 135 };
 136
 137 static struct ar8327_led_cfg dir825c1_ar8327_led_cfg = {
 138         .led_ctrl0 = 0xc737c737,
 139         .led_ctrl1 = 0x00000000,
 140         .led_ctrl2 = 0x00000000,
 141         .led_ctrl3 = 0x0030c300,
 142         .open_drain = false,
 143 };
 144
 145 static struct ar8327_platform_data dir825c1_ar8327_data = {
 146         .pad0_cfg = &dir825c1_ar8327_pad0_cfg,
 147         .port0_cfg = {
 148                 .force_link = 1,
 149                 .speed = AR8327_PORT_SPEED_1000,
 150                 .duplex = 1,
 151                 .txpause = 1,
 152                 .rxpause = 1,
 153         },
 154         .led_cfg = &dir825c1_ar8327_led_cfg,
 155 };
 156
 157 static struct mdio_board_info dir825c1_mdio0_info[] = {
 158         {
 159                 .bus_id = "ag71xx-mdio.0",
 160                 .phy_addr = 0,
 161                 .platform_data = &dir825c1_ar8327_data,
 162         },
 163 };
 164
 165 static void dir825c1_read_ascii_mac(u8 *dest, u8 *src)
 166 {
 167         int ret;
 168
 169         ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
 170                      &dest[0], &dest[1], &dest[2],
 171                      &dest[3], &dest[4], &dest[5]);
 172
 173         if (ret != ETH_ALEN)
 174                 memset(dest, 0, ETH_ALEN);
 175 }
 176
 177 static void __init dir825c1_generic_setup(void)
 178 {
 179         u8 *mac = (u8 *) KSEG1ADDR(0x1ffe0000);
 180         u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
 181         u8 mac0[ETH_ALEN], mac1[ETH_ALEN];
 182         u8 wmac0[ETH_ALEN], wmac1[ETH_ALEN];
 183
 184         dir825c1_read_ascii_mac(mac0, mac + DIR825C1_MAC0_OFFSET);
 185         dir825c1_read_ascii_mac(mac1, mac + DIR825C1_MAC1_OFFSET);
 186
 187         ath79_register_m25p80(NULL);
 188
 189         ath79_register_gpio_keys_polled(-1, DIR825C1_KEYS_POLL_INTERVAL,
 190                                         ARRAY_SIZE(dir825c1_gpio_keys),
 191                                         dir825c1_gpio_keys);
 192
 193         ath79_init_mac(wmac0, mac0, 0);
 194         ath79_register_wmac(art + DIR825C1_WMAC_CALDATA_OFFSET, wmac0);
 195
 196         ath79_init_mac(wmac1, mac1, 1);
 197         ap91_pci_init(art + DIR825C1_PCIE_CALDATA_OFFSET, wmac1);
 198
 199         ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0);
 200
 201         mdiobus_register_board_info(dir825c1_mdio0_info,
 202                                     ARRAY_SIZE(dir825c1_mdio0_info));
 203
 204         ath79_register_mdio(0, 0x0);
 205
 206         ath79_init_mac(ath79_eth0_data.mac_addr, mac0, 0);
 207
 208         /* GMAC0 is connected to an AR8327N switch */
 209         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 210         ath79_eth0_data.phy_mask = BIT(0);
 211         ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
 212         ath79_eth0_pll_data.pll_1000 = 0x06000000;
 213         ath79_register_eth(0);
 214
 215         ath79_register_usb();
 216 }
 217
 218 static void __init dir825c1_setup(void)
 219 {
 220         ath79_gpio_output_select(DIR825C1_GPIO_LED_BLUE_USB,
 221                                  AR934X_GPIO_OUT_GPIO);
 222
 223         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825c1_leds_gpio),
 224                                  dir825c1_leds_gpio);
 225
 226         ap9x_pci_setup_wmac_led_pin(0, 13);
 227         ap9x_pci_setup_wmac_led_pin(1, 32);
 228
 229         dir825c1_generic_setup();
 230 }
 231
 232 static void __init dir835a1_setup(void)
 233 {
 234         dir825c1_ar8327_data.led_cfg = NULL;
 235
 236         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir835a1_leds_gpio),
 237                                  dir835a1_leds_gpio);
 238
 239         dir825c1_generic_setup();
 240 }
 241
 242 MIPS_MACHINE(ATH79_MACH_DIR_825_C1, "DIR-825-C1",
 243              "D-Link DIR-825 rev. C1",
 244              dir825c1_setup);
 245
 246 MIPS_MACHINE(ATH79_MACH_DIR_835_A1, "DIR-835-A1",
 247              "D-Link DIR-835 rev. A1",
 248              dir835a1_setup);