target/linux/ar71xx/files/arch/mips/ath79/mach-dir-825-b1.c

   1 /*
   2  *  D-Link DIR-825 rev. B1 board support
   3  *
   4  *  Copyright (C) 2009-2011 Lukas Kuna, Evkanet, s.r.o.
   5  *
   6  *  based on mach-wndr3700.c
   7  *
   8  *  This program is free software; you can redistribute it and/or modify it
   9  *  under the terms of the GNU General Public License version 2 as published
  10  *  by the Free Software Foundation.
  11  */
  12
  13 #include <linux/platform_device.h>
  14 #include <linux/mtd/mtd.h>
  15 #include <linux/mtd/partitions.h>
  16 #include <linux/delay.h>
  17 #include <linux/rtl8366.h>
  18
  19 #include <asm/mach-ath79/ath79.h>
  20
  21 #include "dev-eth.h"
  22 #include "dev-ap9x-pci.h"
  23 #include "dev-gpio-buttons.h"
  24 #include "dev-leds-gpio.h"
  25 #include "dev-m25p80.h"
  26 #include "dev-usb.h"
  27 #include "machtypes.h"
  28
  29 #define DIR825B1_GPIO_LED_BLUE_USB              0
  30 #define DIR825B1_GPIO_LED_ORANGE_POWER          1
  31 #define DIR825B1_GPIO_LED_BLUE_POWER            2
  32 #define DIR825B1_GPIO_LED_BLUE_WPS              4
  33 #define DIR825B1_GPIO_LED_ORANGE_PLANET         6
  34 #define DIR825B1_GPIO_LED_BLUE_PLANET           11
  35
  36 #define DIR825B1_GPIO_BTN_RESET                 3
  37 #define DIR825B1_GPIO_BTN_WPS                   8
  38
  39 #define DIR825B1_GPIO_RTL8366_SDA               5
  40 #define DIR825B1_GPIO_RTL8366_SCK               7
  41
  42 #define DIR825B1_KEYS_POLL_INTERVAL             20      /* msecs */
  43 #define DIR825B1_KEYS_DEBOUNCE_INTERVAL         (3 * DIR825B1_KEYS_POLL_INTERVAL)
  44
  45 #define DIR825B1_CAL_LOCATION_0                 0x1f661000
  46 #define DIR825B1_CAL_LOCATION_1                 0x1f665000
  47
  48 #define DIR825B1_MAC_LOCATION_0                 0x1f66ffa0
  49 #define DIR825B1_MAC_LOCATION_1                 0x1f66ffb4
  50
  51 static struct mtd_partition dir825b1_partitions[] = {
  52         {
  53                 .name           = "uboot",
  54                 .offset         = 0,
  55                 .size           = 0x040000,
  56                 .mask_flags     = MTD_WRITEABLE,
  57         }, {
  58                 .name           = "config",
  59                 .offset         = 0x040000,
  60                 .size           = 0x010000,
  61                 .mask_flags     = MTD_WRITEABLE,
  62         }, {
  63                 .name           = "firmware",
  64                 .offset         = 0x050000,
  65                 .size           = 0x610000,
  66         }, {
  67                 .name           = "caldata",
  68                 .offset         = 0x660000,
  69                 .size           = 0x010000,
  70                 .mask_flags     = MTD_WRITEABLE,
  71         }, {
  72                 .name           = "unknown",
  73                 .offset         = 0x670000,
  74                 .size           = 0x190000,
  75                 .mask_flags     = MTD_WRITEABLE,
  76         }
  77 };
  78
  79 static struct flash_platform_data dir825b1_flash_data = {
  80         .parts          = dir825b1_partitions,
  81         .nr_parts       = ARRAY_SIZE(dir825b1_partitions),
  82 };
  83
  84 static struct gpio_led dir825b1_leds_gpio[] __initdata = {
  85         {
  86                 .name           = "d-link:blue:usb",
  87                 .gpio           = DIR825B1_GPIO_LED_BLUE_USB,
  88                 .active_low     = 1,
  89         }, {
  90                 .name           = "d-link:orange:power",
  91                 .gpio           = DIR825B1_GPIO_LED_ORANGE_POWER,
  92                 .active_low     = 1,
  93         }, {
  94                 .name           = "d-link:blue:power",
  95                 .gpio           = DIR825B1_GPIO_LED_BLUE_POWER,
  96                 .active_low     = 1,
  97         }, {
  98                 .name           = "d-link:blue:wps",
  99                 .gpio           = DIR825B1_GPIO_LED_BLUE_WPS,
 100                 .active_low     = 1,
 101         }, {
 102                 .name           = "d-link:orange:planet",
 103                 .gpio           = DIR825B1_GPIO_LED_ORANGE_PLANET,
 104                 .active_low     = 1,
 105         }, {
 106                 .name           = "d-link:blue:planet",
 107                 .gpio           = DIR825B1_GPIO_LED_BLUE_PLANET,
 108                 .active_low     = 1,
 109         }
 110 };
 111
 112 static struct gpio_keys_button dir825b1_gpio_keys[] __initdata = {
 113         {
 114                 .desc           = "reset",
 115                 .type           = EV_KEY,
 116                 .code           = KEY_RESTART,
 117                 .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
 118                 .gpio           = DIR825B1_GPIO_BTN_RESET,
 119                 .active_low     = 1,
 120         }, {
 121                 .desc           = "wps",
 122                 .type           = EV_KEY,
 123                 .code           = KEY_WPS_BUTTON,
 124                 .debounce_interval = DIR825B1_KEYS_DEBOUNCE_INTERVAL,
 125                 .gpio           = DIR825B1_GPIO_BTN_WPS,
 126                 .active_low     = 1,
 127         }
 128 };
 129
 130 static struct rtl8366_initval dir825b1_rtl8366s_initvals[] = {
 131         { .reg = 0x06, .val = 0x0108 },
 132 };
 133
 134 static struct rtl8366_platform_data dir825b1_rtl8366s_data = {
 135         .gpio_sda       = DIR825B1_GPIO_RTL8366_SDA,
 136         .gpio_sck       = DIR825B1_GPIO_RTL8366_SCK,
 137         .num_initvals   = ARRAY_SIZE(dir825b1_rtl8366s_initvals),
 138         .initvals       = dir825b1_rtl8366s_initvals,
 139 };
 140
 141 static struct platform_device dir825b1_rtl8366s_device = {
 142         .name           = RTL8366S_DRIVER_NAME,
 143         .id             = -1,
 144         .dev = {
 145                 .platform_data  = &dir825b1_rtl8366s_data,
 146         }
 147 };
 148
 149 static void dir825b1_read_ascii_mac(u8 *dest, unsigned int src_addr)
 150 {
 151         int ret;
 152         u8 *src = (u8 *)KSEG1ADDR(src_addr);
 153
 154         ret = sscanf(src, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
 155                      &dest[0], &dest[1], &dest[2],
 156                      &dest[3], &dest[4], &dest[5]);
 157
 158         if (ret != ETH_ALEN)
 159                 memset(dest, 0, ETH_ALEN);
 160 }
 161
 162 static void __init dir825b1_setup(void)
 163 {
 164         u8 mac1[ETH_ALEN], mac2[ETH_ALEN];
 165
 166         dir825b1_read_ascii_mac(mac1, DIR825B1_MAC_LOCATION_0);
 167         dir825b1_read_ascii_mac(mac2, DIR825B1_MAC_LOCATION_1);
 168
 169         ath79_register_mdio(0, 0x0);
 170
 171         ath79_init_mac(ath79_eth0_data.mac_addr, mac1, 2);
 172         ath79_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
 173         ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 174         ath79_eth0_data.speed = SPEED_1000;
 175         ath79_eth0_data.duplex = DUPLEX_FULL;
 176         ath79_eth0_pll_data.pll_1000 = 0x11110000;
 177
 178         ath79_init_mac(ath79_eth1_data.mac_addr, mac1, 3);
 179         ath79_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
 180         ath79_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
 181         ath79_eth1_data.phy_mask = 0x10;
 182         ath79_eth1_pll_data.pll_1000 = 0x11110000;
 183
 184         ath79_register_eth(0);
 185         ath79_register_eth(1);
 186
 187         ath79_register_m25p80(&dir825b1_flash_data);
 188
 189         ath79_register_leds_gpio(-1, ARRAY_SIZE(dir825b1_leds_gpio),
 190                                  dir825b1_leds_gpio);
 191
 192         ath79_register_gpio_keys_polled(-1, DIR825B1_KEYS_POLL_INTERVAL,
 193                                         ARRAY_SIZE(dir825b1_gpio_keys),
 194                                         dir825b1_gpio_keys);
 195
 196         ath79_register_usb();
 197
 198         platform_device_register(&dir825b1_rtl8366s_device);
 199
 200         ap9x_pci_setup_wmac_led_pin(0, 5);
 201         ap9x_pci_setup_wmac_led_pin(1, 5);
 202
 203         ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0), mac1,
 204                       (u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_1), mac2);
 205 }
 206
 207 MIPS_MACHINE(ATH79_MACH_DIR_825_B1, "DIR-825-B1", "D-Link DIR-825 rev. B1",
 208              dir825b1_setup);