2 * Atheros AR71xx SoC specific setup
4 * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
7 * Parts of this file are based on Atheros' 2.6.15 BSP
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/init.h>
17 #include <linux/types.h>
18 #include <linux/pci.h>
19 #include <linux/serial_8250.h>
20 #include <linux/bootmem.h>
22 #include <asm/bootinfo.h>
23 #include <asm/traps.h>
24 #include <asm/time.h> /* for mips_hpt_frequency */
25 #include <asm/reboot.h> /* for _machine_{restart,halt} */
27 #include <asm/mach-ar71xx/ar71xx.h>
28 #include <asm/mach-ar71xx/pci.h>
29 #include <asm/mach-ar71xx/platform.h>
31 #define AR71XX_SYS_TYPE_LEN 64
32 #define AR71XX_BASE_FREQ 40000000
34 #define AR71XX_MEM_SIZE_MIN 0x0200000
35 #define AR71XX_MEM_SIZE_MAX 0x8000000
38 EXPORT_SYMBOL_GPL(ar71xx_cpu_freq);
41 EXPORT_SYMBOL_GPL(ar71xx_ahb_freq);
44 EXPORT_SYMBOL_GPL(ar71xx_ddr_freq);
46 int (*ar71xx_pci_bios_init)(unsigned nr_irqs,
47 struct ar71xx_pci_irq *map) __initdata;
49 int (*ar71xx_pci_be_handler)(int is_fixup);
51 static char ar71xx_sys_type[AR71XX_SYS_TYPE_LEN];
53 static void ar71xx_restart(char *command)
55 ar71xx_device_stop(RESET_MODULE_FULL_CHIP);
61 static void ar71xx_halt(void)
67 static int ar71xx_be_handler(struct pt_regs *regs, int is_fixup)
71 if (ar71xx_pci_be_handler)
72 err = ar71xx_pci_be_handler(is_fixup);
74 return (is_fixup && !err) ? MIPS_BE_FIXUP : MIPS_BE_FATAL;
77 int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map)
79 if (!ar71xx_pci_bios_init)
82 return ar71xx_pci_bios_init(nr_irqs, map);
85 static void __init ar71xx_detect_mem_size(void)
91 p = (volatile u8 *) KSEG1ADDR(0);
93 for (size = AR71XX_MEM_SIZE_MIN;
94 size <= (AR71XX_MEM_SIZE_MAX >> 1); size <<= 1) {
100 /* Mirrored data found, try another pattern */
103 /* Mirrored data found again, stop detection */
110 add_memory_region(0, size, BOOT_MEM_RAM);
113 static void __init ar71xx_detect_sys_type(void)
119 id = ar71xx_reset_rr(RESET_REG_REV_ID) & REV_ID_MASK;
120 rev = (id >> REV_ID_REVISION_SHIFT) & REV_ID_REVISION_MASK;
121 switch (id & REV_ID_CHIP_MASK) {
122 case REV_ID_CHIP_AR7130:
125 case REV_ID_CHIP_AR7141:
128 case REV_ID_CHIP_AR7161:
135 sprintf(ar71xx_sys_type, "Atheros AR%s rev %u (id:0x%02x)",
139 static void __init ar71xx_detect_sys_frequency(void)
145 pll = ar71xx_pll_rr(PLL_REG_CPU_PLL_CFG);
147 div = ((pll >> PLL_DIV_SHIFT) & PLL_DIV_MASK) + 1;
148 freq = div * AR71XX_BASE_FREQ;
150 div = ((pll >> CPU_DIV_SHIFT) & CPU_DIV_MASK) + 1;
151 ar71xx_cpu_freq = freq / div;
153 div = ((pll >> DDR_DIV_SHIFT) & DDR_DIV_MASK) + 1;
154 ar71xx_ddr_freq = freq / div;
156 div = (((pll >> AHB_DIV_SHIFT) & AHB_DIV_MASK) + 1) * 2;
157 ar71xx_ahb_freq = ar71xx_cpu_freq / div;
160 #ifdef CONFIG_AR71XX_EARLY_SERIAL
161 static void __init ar71xx_early_serial_setup(void)
165 memset(&p, 0, sizeof(p));
167 p.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP;
168 p.iotype = UPIO_MEM32;
169 p.uartclk = ar71xx_ahb_freq;
170 p.irq = AR71XX_MISC_IRQ_UART;
172 p.mapbase = AR71XX_UART_BASE;
174 early_serial_setup(&p);
177 static inline void ar71xx_early_serial_setup(void) {};
178 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
180 const char *get_system_type(void)
182 return ar71xx_sys_type;
185 unsigned int __cpuinit get_c0_compare_irq(void)
187 return CP0_LEGACY_COMPARE_IRQ;
190 void __init plat_mem_setup(void)
192 set_io_port_base(KSEG1);
194 ar71xx_ddr_base = ioremap_nocache(AR71XX_DDR_CTRL_BASE,
195 AR71XX_DDR_CTRL_SIZE);
197 ar71xx_pll_base = ioremap_nocache(AR71XX_PLL_BASE,
200 ar71xx_reset_base = ioremap_nocache(AR71XX_RESET_BASE,
203 ar71xx_gpio_base = ioremap_nocache(AR71XX_GPIO_BASE, AR71XX_GPIO_SIZE);
205 ar71xx_usb_ctrl_base = ioremap_nocache(AR71XX_USB_CTRL_BASE,
206 AR71XX_USB_CTRL_SIZE);
208 ar71xx_detect_mem_size();
209 ar71xx_detect_sys_type();
210 ar71xx_detect_sys_frequency();
212 _machine_restart = ar71xx_restart;
213 _machine_halt = ar71xx_halt;
214 pm_power_off = ar71xx_halt;
216 board_be_handler = ar71xx_be_handler;
218 ar71xx_print_cmdline();
220 ar71xx_early_serial_setup();
223 void __init plat_time_init(void)
225 mips_hpt_frequency = ar71xx_cpu_freq / 2;