target/linux/ar71xx/files/arch/mips/ar71xx/platform.c

   1 /*
   2  *  Atheros AR71xx SoC platform devices
   3  *
   4  *  Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  Parts of this file are based on Atheros' 2.6.15 BSP
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/platform_device.h>
  19 #include <linux/serial_8250.h>
  20
  21 #include <asm/mips_machine.h>
  22 #include <asm/mach-ar71xx/ar71xx.h>
  23 #include <asm/mach-ar71xx/platform.h>
  24
  25 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
  26
  27 /*
  28  * OHCI (USB full speed host controller)
  29  */
  30 static struct resource ar71xx_ohci_resources[] = {
  31         [0] = {
  32                 .start  = AR71XX_OHCI_BASE,
  33                 .end    = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
  34                 .flags  = IORESOURCE_MEM,
  35         },
  36         [1] = {
  37                 .start  = AR71XX_MISC_IRQ_OHCI,
  38                 .end    = AR71XX_MISC_IRQ_OHCI,
  39                 .flags  = IORESOURCE_IRQ,
  40         },
  41 };
  42
  43 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
  44 static struct platform_device ar71xx_ohci_device = {
  45         .name           = "ar71xx-ohci",
  46         .id             = -1,
  47         .resource       = ar71xx_ohci_resources,
  48         .num_resources  = ARRAY_SIZE(ar71xx_ohci_resources),
  49         .dev = {
  50                 .dma_mask               = &ar71xx_ohci_dmamask,
  51                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  52         },
  53 };
  54
  55 /*
  56  * EHCI (USB full speed host controller)
  57  */
  58 static struct resource ar71xx_ehci_resources[] = {
  59         [0] = {
  60                 .start  = AR71XX_EHCI_BASE,
  61                 .end    = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
  62                 .flags  = IORESOURCE_MEM,
  63         },
  64         [1] = {
  65                 .start  = AR71XX_CPU_IRQ_USB,
  66                 .end    = AR71XX_CPU_IRQ_USB,
  67                 .flags  = IORESOURCE_IRQ,
  68         },
  69 };
  70
  71
  72 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
  73 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
  74
  75 static struct platform_device ar71xx_ehci_device = {
  76         .name           = "ar71xx-ehci",
  77         .id             = -1,
  78         .resource       = ar71xx_ehci_resources,
  79         .num_resources  = ARRAY_SIZE(ar71xx_ehci_resources),
  80         .dev = {
  81                 .dma_mask               = &ar71xx_ehci_dmamask,
  82                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  83                 .platform_data          = &ar71xx_ehci_data,
  84         },
  85 };
  86
  87 #define AR71XX_USB_RESET_MASK \
  88         (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
  89         | RESET_MODULE_USB_OHCI_DLL)
  90
  91 static void ar71xx_usb_setup(void)
  92 {
  93         ar71xx_device_stop(AR71XX_USB_RESET_MASK);
  94         mdelay(1000);
  95         ar71xx_device_start(AR71XX_USB_RESET_MASK);
  96
  97         /* Turning on the Buff and Desc swap bits */
  98         ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
  99
 100         /* WAR for HW bug. Here it adjusts the duration between two SOFS */
 101         ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
 102
 103         mdelay(900);
 104 }
 105
 106 void __init ar71xx_add_device_usb(void)
 107 {
 108         switch (ar71xx_soc) {
 109         case AR71XX_SOC_AR7130:
 110         case AR71XX_SOC_AR7141:
 111         case AR71XX_SOC_AR7161:
 112                 ar71xx_usb_setup();
 113                 platform_device_register(&ar71xx_ohci_device);
 114                 platform_device_register(&ar71xx_ehci_device);
 115                 break;
 116
 117         case AR71XX_SOC_AR9130:
 118         case AR71XX_SOC_AR9132:
 119                 ar71xx_ehci_data.is_ar91xx = 1;
 120                 platform_device_register(&ar71xx_ehci_device);
 121                 break;
 122
 123         default:
 124                 BUG();
 125         }
 126 }
 127
 128 #ifdef CONFIG_AR71XX_EARLY_SERIAL
 129 static void __init ar71xx_add_device_uart(void) {};
 130 #else
 131 static struct resource ar71xx_uart_resources[] = {
 132         {
 133                 .start  = AR71XX_UART_BASE,
 134                 .end    = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
 135                 .flags  = IORESOURCE_MEM,
 136         },
 137 };
 138
 139 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
 140 static struct plat_serial8250_port ar71xx_uart_data[] = {
 141         {
 142                 .mapbase        = AR71XX_UART_BASE,
 143                 .irq            = AR71XX_MISC_IRQ_UART,
 144                 .flags          = AR71XX_UART_FLAGS,
 145                 .iotype         = UPIO_MEM32,
 146                 .regshift       = 2,
 147         }, {
 148                 /* terminating entry */
 149         }
 150 };
 151
 152 static struct platform_device ar71xx_uart_device = {
 153         .name           = "serial8250",
 154         .id             = PLAT8250_DEV_PLATFORM,
 155         .resource       = ar71xx_uart_resources,
 156         .num_resources  = ARRAY_SIZE(ar71xx_uart_resources),
 157         .dev = {
 158                 .platform_data  = ar71xx_uart_data
 159         },
 160 };
 161
 162 static void __init ar71xx_add_device_uart(void)
 163 {
 164         ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
 165         platform_device_register(&ar71xx_uart_device);
 166 }
 167 #endif /* CONFIG_AR71XX_EARLY_SERIAL */
 168
 169 static struct resource ar71xx_mdio_resources[] = {
 170         {
 171                 .name   = "mdio_base",
 172                 .flags  = IORESOURCE_MEM,
 173                 .start  = AR71XX_GE0_BASE + 0x20,
 174                 .end    = AR71XX_GE0_BASE + 0x38 - 1,
 175         }
 176 };
 177
 178 static struct ag71xx_mdio_platform_data ar71xx_mdio_data = {
 179         .phy_mask       = 0xffffffff,
 180 };
 181
 182 static struct platform_device ar71xx_mdio_device = {
 183         .name           = "ag71xx-mdio",
 184         .id             = -1,
 185         .resource       = ar71xx_mdio_resources,
 186         .num_resources  = ARRAY_SIZE(ar71xx_mdio_resources),
 187         .dev = {
 188                 .platform_data = &ar71xx_mdio_data,
 189         },
 190 };
 191
 192 void __init ar71xx_add_device_mdio(u32 phy_mask)
 193 {
 194         ar71xx_mdio_data.phy_mask = phy_mask;
 195         platform_device_register(&ar71xx_mdio_device);
 196 }
 197
 198 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
 199 {
 200         void __iomem *base;
 201         u32 t;
 202
 203         base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
 204
 205         t = __raw_readl(base + cfg_reg);
 206         t &= ~(3 << shift);
 207         t |=  (2 << shift);
 208         __raw_writel(t, base + cfg_reg);
 209         udelay(100);
 210
 211         __raw_writel(pll_val, base + pll_reg);
 212
 213         t |= (3 << shift);
 214         __raw_writel(t, base + cfg_reg);
 215         udelay(100);
 216
 217         t &= ~(3 << shift);
 218         __raw_writel(t, base + cfg_reg);
 219         udelay(100);
 220
 221         printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
 222                 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
 223
 224         iounmap(base);
 225 }
 226
 227 static void ar71xx_set_pll_ge0(u32 val)
 228 {
 229         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
 230                         val, AR71XX_ETH0_PLL_SHIFT);
 231 }
 232
 233 static void ar71xx_set_pll_ge1(u32 val)
 234 {
 235         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
 236                          val, AR71XX_ETH1_PLL_SHIFT);
 237 }
 238
 239 static void ar91xx_set_pll_ge0(u32 val)
 240 {
 241         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
 242                          val, AR91XX_ETH0_PLL_SHIFT);
 243 }
 244
 245 static void ar91xx_set_pll_ge1(u32 val)
 246 {
 247         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
 248                          val, AR91XX_ETH1_PLL_SHIFT);
 249 }
 250
 251 static void ar71xx_ddr_flush_ge0(void)
 252 {
 253         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
 254 }
 255
 256 static void ar71xx_ddr_flush_ge1(void)
 257 {
 258         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
 259 }
 260
 261 static void ar91xx_ddr_flush_ge0(void)
 262 {
 263         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
 264 }
 265
 266 static void ar91xx_ddr_flush_ge1(void)
 267 {
 268         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
 269 }
 270
 271 static struct resource ar71xx_eth0_resources[] = {
 272         {
 273                 .name   = "mac_base",
 274                 .flags  = IORESOURCE_MEM,
 275                 .start  = AR71XX_GE0_BASE,
 276                 .end    = AR71XX_GE0_BASE + 0x20 - 1,
 277         }, {
 278                 .name   = "mac_base2",
 279                 .flags  = IORESOURCE_MEM,
 280                 .start  = AR71XX_GE0_BASE + 0x38,
 281                 .end    = AR71XX_GE0_BASE + 0x200 - 1,
 282         }, {
 283                 .name   = "mii_ctrl",
 284                 .flags  = IORESOURCE_MEM,
 285                 .start  = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
 286                 .end    = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
 287         }, {
 288                 .name   = "mac_irq",
 289                 .flags  = IORESOURCE_IRQ,
 290                 .start  = AR71XX_CPU_IRQ_GE0,
 291                 .end    = AR71XX_CPU_IRQ_GE0,
 292         },
 293 };
 294
 295 struct ag71xx_platform_data ar71xx_eth0_data = {
 296         .reset_bit      = RESET_MODULE_GE0_MAC,
 297 };
 298
 299 static struct platform_device ar71xx_eth0_device = {
 300         .name           = "ag71xx",
 301         .id             = 0,
 302         .resource       = ar71xx_eth0_resources,
 303         .num_resources  = ARRAY_SIZE(ar71xx_eth0_resources),
 304         .dev = {
 305                 .platform_data = &ar71xx_eth0_data,
 306         },
 307 };
 308
 309 static struct resource ar71xx_eth1_resources[] = {
 310         {
 311                 .name   = "mac_base",
 312                 .flags  = IORESOURCE_MEM,
 313                 .start  = AR71XX_GE1_BASE,
 314                 .end    = AR71XX_GE1_BASE + 0x20 - 1,
 315         }, {
 316                 .name   = "mac_base2",
 317                 .flags  = IORESOURCE_MEM,
 318                 .start  = AR71XX_GE1_BASE + 0x38,
 319                 .end    = AR71XX_GE1_BASE + 0x200 - 1,
 320         }, {
 321                 .name   = "mii_ctrl",
 322                 .flags  = IORESOURCE_MEM,
 323                 .start  = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
 324                 .end    = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
 325         }, {
 326                 .name   = "mac_irq",
 327                 .flags  = IORESOURCE_IRQ,
 328                 .start  = AR71XX_CPU_IRQ_GE1,
 329                 .end    = AR71XX_CPU_IRQ_GE1,
 330         },
 331 };
 332
 333 struct ag71xx_platform_data ar71xx_eth1_data = {
 334         .reset_bit      = RESET_MODULE_GE1_MAC,
 335 };
 336
 337 static struct platform_device ar71xx_eth1_device = {
 338         .name           = "ag71xx",
 339         .id             = 1,
 340         .resource       = ar71xx_eth1_resources,
 341         .num_resources  = ARRAY_SIZE(ar71xx_eth1_resources),
 342         .dev = {
 343                 .platform_data = &ar71xx_eth1_data,
 344         },
 345 };
 346
 347 static int ar71xx_eth_instance __initdata;
 348 void __init ar71xx_add_device_eth(unsigned int id)
 349 {
 350         struct platform_device *pdev;
 351         struct ag71xx_platform_data *pdata;
 352
 353         switch (id) {
 354         case 0:
 355                 switch (ar71xx_eth0_data.phy_if_mode) {
 356                 case PHY_INTERFACE_MODE_MII:
 357                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
 358                         break;
 359                 case PHY_INTERFACE_MODE_GMII:
 360                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
 361                         break;
 362                 case PHY_INTERFACE_MODE_RGMII:
 363                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
 364                         break;
 365                 case PHY_INTERFACE_MODE_RMII:
 366                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
 367                         break;
 368                 default:
 369                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 370                                         "for eth0\n");
 371                         return;
 372                 }
 373                 pdev = &ar71xx_eth0_device;
 374                 break;
 375         case 1:
 376                 switch (ar71xx_eth1_data.phy_if_mode) {
 377                 case PHY_INTERFACE_MODE_RMII:
 378                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
 379                         break;
 380                 case PHY_INTERFACE_MODE_RGMII:
 381                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
 382                         break;
 383                 default:
 384                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 385                                         "for eth1\n");
 386                         return;
 387                 }
 388                 pdev = &ar71xx_eth1_device;
 389                 break;
 390         default:
 391                 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
 392                 return;
 393         }
 394
 395         pdata = pdev->dev.platform_data;
 396
 397         switch (ar71xx_soc) {
 398         case AR71XX_SOC_AR7130:
 399                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 400                                       : ar71xx_ddr_flush_ge0;
 401                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 402                                      : ar71xx_set_pll_ge0;
 403                 break;
 404
 405         case AR71XX_SOC_AR7141:
 406         case AR71XX_SOC_AR7161:
 407                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 408                                       : ar71xx_ddr_flush_ge0;
 409                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 410                                      : ar71xx_set_pll_ge0;
 411                 pdata->has_gbit = 1;
 412                 break;
 413
 414         case AR71XX_SOC_AR9130:
 415                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 416                                       : ar91xx_ddr_flush_ge0;
 417                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 418                                      : ar91xx_set_pll_ge0;
 419                 pdata->is_ar91xx = 1;
 420                 break;
 421
 422         case AR71XX_SOC_AR9132:
 423                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 424                                       : ar91xx_ddr_flush_ge0;
 425                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 426                                       : ar91xx_set_pll_ge0;
 427                 pdata->is_ar91xx = 1;
 428                 pdata->has_gbit = 1;
 429                 break;
 430
 431         default:
 432                 BUG();
 433         }
 434
 435         switch (pdata->phy_if_mode) {
 436         case PHY_INTERFACE_MODE_GMII:
 437         case PHY_INTERFACE_MODE_RGMII:
 438                 if (!pdata->has_gbit) {
 439                         printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
 440                                         id);
 441                         return;
 442                 }
 443                 /* fallthrough */
 444         default:
 445                 break;
 446         }
 447
 448         memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
 449         pdata->mac_addr[5] += ar71xx_eth_instance;
 450
 451         platform_device_register(pdev);
 452         ar71xx_eth_instance++;
 453 }
 454
 455 static struct resource ar71xx_spi_resources[] = {
 456         [0] = {
 457                 .start  = AR71XX_SPI_BASE,
 458                 .end    = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
 459                 .flags  = IORESOURCE_MEM,
 460         },
 461 };
 462
 463 static struct platform_device ar71xx_spi_device = {
 464         .name           = "ar71xx-spi",
 465         .id             = -1,
 466         .resource       = ar71xx_spi_resources,
 467         .num_resources  = ARRAY_SIZE(ar71xx_spi_resources),
 468 };
 469
 470 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
 471                                 struct spi_board_info const *info,
 472                                 unsigned n)
 473 {
 474         ar71xx_gpio_function_enable(GPIO_FUNC_SPI_EN);
 475
 476         spi_register_board_info(info, n);
 477         ar71xx_spi_device.dev.platform_data = pdata;
 478         platform_device_register(&ar71xx_spi_device);
 479 }
 480
 481 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
 482                                 struct gpio_led *leds)
 483 {
 484         struct platform_device *pdev;
 485         struct gpio_led_platform_data pdata;
 486         struct gpio_led *p;
 487         int err;
 488
 489         p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
 490         if (!p)
 491                 return;
 492
 493         memcpy(p, leds, num_leds * sizeof(*p));
 494
 495         pdev = platform_device_alloc("leds-gpio", id);
 496         if (!pdev)
 497                 goto err_free_leds;
 498
 499         memset(&pdata, 0, sizeof(pdata));
 500         pdata.num_leds = num_leds;
 501         pdata.leds = leds;
 502
 503         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 504         if (err)
 505                 goto err_put_pdev;
 506
 507         err = platform_device_add(pdev);
 508         if (err)
 509                 goto err_put_pdev;
 510
 511         return;
 512
 513 err_put_pdev:
 514         platform_device_put(pdev);
 515
 516 err_free_leds:
 517         kfree(p);
 518 }
 519
 520 void __init ar71xx_add_device_gpio_buttons(int id,
 521                                            unsigned poll_interval,
 522                                            unsigned nbuttons,
 523                                            struct gpio_button *buttons)
 524 {
 525         struct platform_device *pdev;
 526         struct gpio_buttons_platform_data pdata;
 527         struct gpio_button *p;
 528         int err;
 529
 530         p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
 531         if (!p)
 532                 return;
 533
 534         memcpy(p, buttons, nbuttons * sizeof(*p));
 535
 536         pdev = platform_device_alloc("gpio-buttons", id);
 537         if (!pdev)
 538                 goto err_free_buttons;
 539
 540         memset(&pdata, 0, sizeof(pdata));
 541         pdata.poll_interval = poll_interval;
 542         pdata.nbuttons = nbuttons;
 543         pdata.buttons = p;
 544
 545         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 546         if (err)
 547                 goto err_put_pdev;
 548
 549
 550         err = platform_device_add(pdev);
 551         if (err)
 552                 goto err_put_pdev;
 553
 554         return;
 555
 556 err_put_pdev:
 557         platform_device_put(pdev);
 558
 559 err_free_buttons:
 560         kfree(p);
 561 }
 562
 563 void __init ar71xx_add_device_wdt(void)
 564 {
 565         platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
 566 }
 567
 568 void __init ar71xx_set_mac_base(unsigned char *mac)
 569 {
 570         memcpy(ar71xx_mac_base, mac, ETH_ALEN);
 571 }
 572
 573 void __init ar71xx_parse_mac_addr(char *mac_str)
 574 {
 575         u8 tmp[ETH_ALEN];
 576         int t;
 577
 578         t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
 579                         &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
 580
 581         if (t == ETH_ALEN)
 582                 ar71xx_set_mac_base(tmp);
 583         else
 584                 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
 585                                 "\"%s\"\n", mac_str);
 586 }
 587
 588 static int __init ar71xx_machine_setup(void)
 589 {
 590         ar71xx_gpio_init();
 591
 592         ar71xx_add_device_uart();
 593         ar71xx_add_device_wdt();
 594
 595         mips_machine_setup(ar71xx_mach_type);
 596         return 0;
 597 }
 598
 599 arch_initcall(ar71xx_machine_setup);