target/linux/adm5120/files/drivers/usb/host/adm5120-hcd.c

   1 /*
   2  * OHCI HCD (Host Controller Driver) for USB.
   3  *
   4  * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
   5  * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
   6  *
   7  * [ Initialisation is based on Linus'  ]
   8  * [ uhci code and gregs ahcd fragments ]
   9  * [ (C) Copyright 1999 Linus Torvalds  ]
  10  * [ (C) Copyright 1999 Gregory P. Smith]
  11  *
  12  *
  13  * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
  14  * interfaces (though some non-x86 Intel chips use it).  It supports
  15  * smarter hardware than UHCI.  A download link for the spec available
  16  * through the http://www.usb.org website.
  17  *
  18  * This file is licenced under the GPL.
  19  */
  20
  21 #include <linux/module.h>
  22 #include <linux/moduleparam.h>
  23 #include <linux/pci.h>
  24 #include <linux/kernel.h>
  25 #include <linux/delay.h>
  26 #include <linux/ioport.h>
  27 #include <linux/sched.h>
  28 #include <linux/slab.h>
  29 #include <linux/errno.h>
  30 #include <linux/init.h>
  31 #include <linux/timer.h>
  32 #include <linux/list.h>
  33 #include <linux/usb.h>
  34 #include <linux/usb/otg.h>
  35 #include <linux/dma-mapping.h>
  36 #include <linux/dmapool.h>
  37 #include <linux/reboot.h>
  38
  39 #include <asm/io.h>
  40 #include <asm/irq.h>
  41 #include <asm/system.h>
  42 #include <asm/unaligned.h>
  43 #include <asm/byteorder.h>
  44
  45 #include "../core/hcd.h"
  46 #include "../core/hub.h"
  47
  48 #define DRIVER_VERSION  "v0.06"
  49 #define DRIVER_AUTHOR   "Gabor Juhos <juhosg at openwrt.org>"
  50 #define DRIVER_DESC     "ADMtek USB 1.1 Host Controller Driver"
  51
  52 /*-------------------------------------------------------------------------*/
  53
  54 #undef ADMHC_VERBOSE_DEBUG      /* not always helpful */
  55
  56 /* For initializing controller (mask in an HCFS mode too) */
  57 #define OHCI_CONTROL_INIT       OHCI_CTRL_CBSR
  58
  59 #define ADMHC_INTR_INIT \
  60                 ( ADMHC_INTR_MIE | ADMHC_INTR_INSM | ADMHC_INTR_FATI \
  61                 | ADMHC_INTR_RESI | ADMHC_INTR_TDC | ADMHC_INTR_BABI \
  62                 | ADMHC_INTR_7 | ADMHC_INTR_6 )
  63
  64 /*-------------------------------------------------------------------------*/
  65
  66 static const char hcd_name [] = "admhc-hcd";
  67
  68 #define STATECHANGE_DELAY       msecs_to_jiffies(300)
  69
  70 #include "adm5120.h"
  71
  72 static void admhc_dump(struct admhcd *ahcd, int verbose);
  73 static int admhc_init(struct admhcd *ahcd);
  74 static void admhc_stop(struct usb_hcd *hcd);
  75
  76 #include "adm5120-dbg.c"
  77 #include "adm5120-mem.c"
  78 #include "adm5120-pm.c"
  79 #include "adm5120-hub.c"
  80 #include "adm5120-q.c"
  81
  82 /*-------------------------------------------------------------------------*/
  83
  84 /*
  85  * queue up an urb for anything except the root hub
  86  */
  87 static int admhc_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
  88         struct urb *urb, gfp_t mem_flags)
  89 {
  90         struct admhcd   *ahcd = hcd_to_admhcd(hcd);
  91         struct ed       *ed;
  92         struct urb_priv *urb_priv;
  93         unsigned int    pipe = urb->pipe;
  94         int             td_cnt = 0;
  95         unsigned long   flags;
  96         int             ret = 0;
  97
  98 #ifdef ADMHC_VERBOSE_DEBUG
  99         spin_lock_irqsave(&ahcd->lock, flags);
 100         urb_print(ahcd, urb, "ENQEUE", usb_pipein(pipe));
 101         spin_unlock_irqrestore(&ahcd->lock, flags);
 102 #endif
 103
 104         /* every endpoint has an ed, locate and maybe (re)initialize it */
 105         ed = ed_get(ahcd, ep, urb->dev, pipe, urb->interval);
 106         if (!ed)
 107                 return -ENOMEM;
 108
 109         /* for the private part of the URB we need the number of TDs */
 110         switch (ed->type) {
 111         case PIPE_CONTROL:
 112                 if (urb->transfer_buffer_length > TD_DATALEN_MAX)
 113                         /* td_submit_urb() doesn't yet handle these */
 114                         return -EMSGSIZE;
 115
 116                 /* 1 TD for setup, 1 for ACK, plus ... */
 117                 td_cnt = 2;
 118                 if (urb->transfer_buffer_length)
 119                         td_cnt++;
 120                 break;
 121         case PIPE_BULK:
 122                 /* one TD for every 4096 Bytes (can be upto 8K) */
 123                 td_cnt = urb->transfer_buffer_length / TD_DATALEN_MAX;
 124                 /* ... and for any remaining bytes ... */
 125                 if ((urb->transfer_buffer_length % TD_DATALEN_MAX) != 0)
 126                         td_cnt++;
 127                 /* ... and maybe a zero length packet to wrap it up */
 128                 if (td_cnt == 0)
 129                         td_cnt++;
 130                 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
 131                         && (urb->transfer_buffer_length
 132                                 % usb_maxpacket(urb->dev, pipe,
 133                                         usb_pipeout (pipe))) == 0)
 134                         td_cnt++;
 135                 break;
 136         case PIPE_INTERRUPT:
 137                 /*
 138                  * for Interrupt IN/OUT transactions, each ED contains
 139                  * only 1 TD.
 140                  * TODO: check transfer_buffer_length?
 141                  */
 142                 td_cnt = 1;
 143                 break;
 144         case PIPE_ISOCHRONOUS:
 145                 /* number of packets from URB */
 146                 td_cnt = urb->number_of_packets;
 147                 break;
 148         default:
 149                 /* paranoia */
 150                 admhc_err(ahcd, "bad EP type %d", ed->type);
 151                 return -EINVAL;
 152         }
 153
 154         urb_priv = urb_priv_alloc(ahcd, td_cnt, mem_flags);
 155         if (!urb_priv)
 156                 return -ENOMEM;
 157
 158         urb_priv->ed = ed;
 159         urb_priv->urb = urb;
 160
 161         spin_lock_irqsave(&ahcd->lock, flags);
 162         /* don't submit to a dead HC */
 163         if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
 164                 ret = -ENODEV;
 165                 goto fail;
 166         }
 167         if (!HC_IS_RUNNING(hcd->state)) {
 168                 ret = -ENODEV;
 169                 goto fail;
 170         }
 171
 172         /* in case of unlink-during-submit */
 173         spin_lock(&urb->lock);
 174         if (urb->status != -EINPROGRESS) {
 175                 spin_unlock(&urb->lock);
 176                 urb->hcpriv = urb_priv;
 177                 finish_urb(ahcd, urb);
 178                 ret = 0;
 179                 goto fail;
 180         }
 181
 182         if (ed->type == PIPE_ISOCHRONOUS) {
 183                 if (ed->state == ED_NEW) {
 184                         u16     frame = admhc_frame_no(ahcd);
 185
 186                         /* delay a few frames before the first TD */
 187                         frame += max_t (u16, 8, ed->interval);
 188                         frame &= ~(ed->interval - 1);
 189                         frame |= ed->branch;
 190                         urb->start_frame = frame;
 191
 192                         /* yes, only URB_ISO_ASAP is supported, and
 193                          * urb->start_frame is never used as input.
 194                          */
 195                 } else
 196                         urb->start_frame = ed->last_iso + ed->interval;
 197         }
 198
 199         urb->hcpriv = urb_priv;
 200         td_submit_urb(ahcd, urb_priv->urb);
 201
 202         /* append it to the ED's queue */
 203         list_add_tail(&urb_priv->pending, &ed->urb_pending);
 204
 205         /* schedule the ED */
 206         ret = ed_schedule(ahcd, ed);
 207
 208         spin_unlock(&urb->lock);
 209 fail:
 210         if (ret) {
 211                 urb_priv = urb->hcpriv;
 212                 urb_priv_free(ahcd, urb_priv);
 213         }
 214
 215         spin_unlock_irqrestore(&ahcd->lock, flags);
 216         return ret;
 217 }
 218
 219 /*
 220  * decouple the URB from the HC queues (TDs, urb_priv); it's
 221  * already marked using urb->status.  reporting is always done
 222  * asynchronously, and we might be dealing with an urb that's
 223  * partially transferred, or an ED with other urbs being unlinked.
 224  */
 225 static int admhc_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
 226 {
 227         struct admhcd *ahcd = hcd_to_admhcd(hcd);
 228         struct urb_priv *up;
 229         unsigned long flags;
 230
 231         up = urb->hcpriv;
 232         if (!up)
 233                 return 0;
 234
 235         spin_lock_irqsave(&ahcd->lock, flags);
 236
 237 #ifdef ADMHC_VERBOSE_DEBUG
 238         urb_print(ahcd, urb, "DEQEUE", 1);
 239 #endif
 240
 241         if (HC_IS_RUNNING(hcd->state)) {
 242                 /* Unless an IRQ completed the unlink while it was being
 243                  * handed to us, flag it for unlink and giveback, and force
 244                  * some upcoming INTR_SF to call finish_unlinks()
 245                  */
 246                 if (up->ed->urb_active != up) {
 247                         list_del(&up->pending);
 248                         finish_urb(ahcd, urb);
 249                 } else {
 250                         ed_start_deschedule(ahcd, up->ed);
 251                 }
 252         } else {
 253                 /*
 254                  * with HC dead, we won't respect hc queue pointers
 255                  * any more ... just clean up every urb's memory.
 256                  */
 257                 if (up->ed->urb_active != up) {
 258                         list_del(&up->pending);
 259                         finish_urb(ahcd, urb);
 260                 } else {
 261                         finish_urb(ahcd, urb);
 262                         up->ed->urb_active = NULL;
 263                         up->ed->state = ED_IDLE;
 264                 }
 265         }
 266         spin_unlock_irqrestore(&ahcd->lock, flags);
 267
 268         return 0;
 269 }
 270
 271 /*-------------------------------------------------------------------------*/
 272
 273 /* frees config/altsetting state for endpoints,
 274  * including ED memory, dummy TD, and bulk/intr data toggle
 275  */
 276 static void admhc_endpoint_disable(struct usb_hcd *hcd,
 277                 struct usb_host_endpoint *ep)
 278 {
 279         struct admhcd           *ahcd = hcd_to_admhcd(hcd);
 280         unsigned long           flags;
 281         struct ed               *ed = ep->hcpriv;
 282         unsigned                limit = 1000;
 283
 284         /* ASSERT:  any requests/urbs are being unlinked */
 285         /* ASSERT:  nobody can be submitting urbs for this any more */
 286
 287         if (!ed)
 288                 return;
 289
 290 #ifdef ADMHC_VERBOSE_DEBUG
 291         spin_lock_irqsave(&ahcd->lock, flags);
 292         admhc_dump_ed(ahcd, "EP-DISABLE", ed, 1);
 293         spin_unlock_irqrestore(&ahcd->lock, flags);
 294 #endif
 295
 296 rescan:
 297         spin_lock_irqsave(&ahcd->lock, flags);
 298
 299         if (!HC_IS_RUNNING(hcd->state)) {
 300 sanitize:
 301                 ed->state = ED_UNLINK;
 302                 admhc_finish_unlinks(ahcd, 0);
 303         }
 304
 305         switch (ed->state) {
 306         case ED_UNLINK:         /* wait for hw to finish? */
 307                 /* major IRQ delivery trouble loses INTR_SOFI too... */
 308                 if (limit-- == 0) {
 309                         admhc_warn(ahcd, "IRQ INTR_SOFI lossage\n");
 310                         goto sanitize;
 311                 }
 312                 spin_unlock_irqrestore(&ahcd->lock, flags);
 313                 schedule_timeout_uninterruptible(1);
 314                 goto rescan;
 315         case ED_IDLE:
 316         case ED_NEW:            /* fully unlinked */
 317                 if (list_empty(&ed->urb_pending)) {
 318                         td_free(ahcd, ed->dummy);
 319                         ed_free(ahcd, ed);
 320                         break;
 321                 }
 322                 /* else FALL THROUGH */
 323         default:
 324                 /* caller was supposed to have unlinked any requests;
 325                  * that's not our job.  can't recover; must leak ed.
 326                  */
 327                 admhc_err(ahcd, "leak ed %p (#%02x) %s act %p%s\n",
 328                         ed, ep->desc.bEndpointAddress,
 329                         ed_statestring(ed->state),
 330                         ed->urb_active,
 331                         list_empty(&ed->urb_pending) ? "" : " (has urbs)");
 332                 break;
 333         }
 334
 335         ep->hcpriv = NULL;
 336
 337         spin_unlock_irqrestore(&ahcd->lock, flags);
 338         return;
 339 }
 340
 341 static int admhc_get_frame_number(struct usb_hcd *hcd)
 342 {
 343         struct admhcd *ahcd = hcd_to_admhcd(hcd);
 344
 345         return admhc_frame_no(ahcd);
 346 }
 347
 348 static void admhc_usb_reset(struct admhcd *ahcd)
 349 {
 350         admhc_dbg(ahcd, "usb reset\n");
 351         ahcd->host_control = ADMHC_BUSS_RESET;
 352         admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
 353 }
 354
 355 /* admhc_shutdown forcibly disables IRQs and DMA, helping kexec and
 356  * other cases where the next software may expect clean state from the
 357  * "firmware".  this is bus-neutral, unlike shutdown() methods.
 358  */
 359 static void
 360 admhc_shutdown(struct usb_hcd *hcd)
 361 {
 362         struct admhcd *ahcd;
 363
 364         admhc_dbg(ahcd, "shutdown\n");
 365
 366         ahcd = hcd_to_admhcd(hcd);
 367         admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
 368         admhc_dma_disable(ahcd);
 369         admhc_usb_reset(ahcd);
 370 }
 371
 372 /*-------------------------------------------------------------------------*
 373  * HC functions
 374  *-------------------------------------------------------------------------*/
 375
 376 static void admhc_eds_cleanup(struct admhcd *ahcd)
 377 {
 378         if (ahcd->ed_tails[PIPE_INTERRUPT]) {
 379                 ed_free(ahcd, ahcd->ed_tails[PIPE_INTERRUPT]);
 380                 ahcd->ed_tails[PIPE_INTERRUPT] = NULL;
 381         }
 382
 383         if (ahcd->ed_tails[PIPE_ISOCHRONOUS]) {
 384                 ed_free(ahcd, ahcd->ed_tails[PIPE_ISOCHRONOUS]);
 385                 ahcd->ed_tails[PIPE_ISOCHRONOUS] = NULL;
 386         }
 387
 388         if (ahcd->ed_tails[PIPE_CONTROL]) {
 389                 ed_free(ahcd, ahcd->ed_tails[PIPE_CONTROL]);
 390                 ahcd->ed_tails[PIPE_CONTROL] = NULL;
 391         }
 392
 393         if (ahcd->ed_tails[PIPE_BULK]) {
 394                 ed_free(ahcd, ahcd->ed_tails[PIPE_BULK]);
 395                 ahcd->ed_tails[PIPE_BULK] = NULL;
 396         }
 397
 398         ahcd->ed_head = NULL;
 399 }
 400
 401 #define ED_DUMMY_INFO   0
 402
 403 static int admhc_eds_init(struct admhcd *ahcd)
 404 {
 405         struct ed *ed;
 406
 407         ed = ed_create(ahcd, PIPE_INTERRUPT, ED_DUMMY_INFO);
 408         if (!ed)
 409                 goto err;
 410
 411         ahcd->ed_tails[PIPE_INTERRUPT] = ed;
 412
 413         ed = ed_create(ahcd, PIPE_ISOCHRONOUS, ED_DUMMY_INFO);
 414         if (!ed)
 415                 goto err;
 416
 417         ahcd->ed_tails[PIPE_ISOCHRONOUS] = ed;
 418         ed->ed_prev = ahcd->ed_tails[PIPE_INTERRUPT];
 419         ahcd->ed_tails[PIPE_INTERRUPT]->ed_next = ed;
 420         ahcd->ed_tails[PIPE_INTERRUPT]->hwNextED = cpu_to_hc32(ahcd, ed->dma);
 421
 422         ed = ed_create(ahcd, PIPE_CONTROL, ED_DUMMY_INFO);
 423         if (!ed)
 424                 goto err;
 425
 426         ahcd->ed_tails[PIPE_CONTROL] = ed;
 427         ed->ed_prev = ahcd->ed_tails[PIPE_ISOCHRONOUS];
 428         ahcd->ed_tails[PIPE_ISOCHRONOUS]->ed_next = ed;
 429         ahcd->ed_tails[PIPE_ISOCHRONOUS]->hwNextED = cpu_to_hc32(ahcd, ed->dma);
 430
 431         ed = ed_create(ahcd, PIPE_BULK, ED_DUMMY_INFO);
 432         if (!ed)
 433                 goto err;
 434
 435         ahcd->ed_tails[PIPE_BULK] = ed;
 436         ed->ed_prev = ahcd->ed_tails[PIPE_CONTROL];
 437         ahcd->ed_tails[PIPE_CONTROL]->ed_next = ed;
 438         ahcd->ed_tails[PIPE_CONTROL]->hwNextED = cpu_to_hc32(ahcd, ed->dma);
 439
 440         ahcd->ed_head = ahcd->ed_tails[PIPE_INTERRUPT];
 441
 442 #ifdef ADMHC_VERBOSE_DEBUG
 443         admhc_dump_ed(ahcd, "ed intr", ahcd->ed_tails[PIPE_INTERRUPT], 1);
 444         admhc_dump_ed(ahcd, "ed isoc", ahcd->ed_tails[PIPE_ISOCHRONOUS], 1);
 445         admhc_dump_ed(ahcd, "ed ctrl", ahcd->ed_tails[PIPE_CONTROL], 1);
 446         admhc_dump_ed(ahcd, "ed bulk", ahcd->ed_tails[PIPE_BULK], 1);
 447 #endif
 448
 449         return 0;
 450
 451 err:
 452         admhc_eds_cleanup(ahcd);
 453         return -ENOMEM;
 454 }
 455
 456 /* init memory, and kick BIOS/SMM off */
 457
 458 static int admhc_init(struct admhcd *ahcd)
 459 {
 460         struct usb_hcd *hcd = admhcd_to_hcd(ahcd);
 461         int ret;
 462
 463         admhc_disable(ahcd);
 464         ahcd->regs = hcd->regs;
 465
 466         /* Disable HC interrupts */
 467         admhc_intr_disable(ahcd, ADMHC_INTR_MIE);
 468
 469         /* Read the number of ports unless overridden */
 470         if (ahcd->num_ports == 0)
 471                 ahcd->num_ports = admhc_read_rhdesc(ahcd) & ADMHC_RH_NUMP;
 472
 473         ret = admhc_mem_init(ahcd);
 474         if (ret)
 475                 goto err;
 476
 477         /* init dummy endpoints */
 478         ret = admhc_eds_init(ahcd);
 479         if (ret)
 480                 goto err;
 481
 482         create_debug_files(ahcd);
 483
 484         return 0;
 485
 486 err:
 487         admhc_stop(hcd);
 488         return ret;
 489 }
 490
 491 /*-------------------------------------------------------------------------*/
 492
 493 /* Start an OHCI controller, set the BUS operational
 494  * resets USB and controller
 495  * enable interrupts
 496  */
 497 static int admhc_run(struct admhcd *ahcd)
 498 {
 499         u32                     temp;
 500         int                     first = ahcd->fminterval == 0;
 501         struct usb_hcd          *hcd = admhcd_to_hcd(ahcd);
 502
 503         admhc_disable(ahcd);
 504
 505         /* boot firmware should have set this up (5.1.1.3.1) */
 506         if (first) {
 507                 temp = admhc_readl(ahcd, &ahcd->regs->fminterval);
 508                 ahcd->fminterval = temp & ADMHC_SFI_FI_MASK;
 509                 if (ahcd->fminterval != FI)
 510                         admhc_dbg(ahcd, "fminterval delta %d\n",
 511                                 ahcd->fminterval - FI);
 512                 ahcd->fminterval |=
 513                         (FSLDP(ahcd->fminterval) << ADMHC_SFI_FSLDP_SHIFT);
 514                 /* also: power/overcurrent flags in rhdesc */
 515         }
 516
 517         switch (ahcd->host_control & ADMHC_HC_BUSS) {
 518         case ADMHC_BUSS_OPER:
 519                 temp = 0;
 520                 break;
 521         case ADMHC_BUSS_SUSPEND:
 522                 /* FALLTHROUGH ? */
 523         case ADMHC_BUSS_RESUME:
 524                 ahcd->host_control = ADMHC_BUSS_RESUME;
 525                 temp = 10 /* msec wait */;
 526                 break;
 527         /* case ADMHC_BUSS_RESET: */
 528         default:
 529                 ahcd->host_control = ADMHC_BUSS_RESET;
 530                 temp = 50 /* msec wait */;
 531                 break;
 532         }
 533         admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
 534         msleep(temp);
 535
 536         temp = admhc_read_rhdesc(ahcd);
 537         if (!(temp & ADMHC_RH_NPS)) {
 538                 /* power down each port */
 539                 for (temp = 0; temp < ahcd->num_ports; temp++)
 540                         admhc_write_portstatus(ahcd, temp, ADMHC_PS_CPP);
 541         }
 542
 543         /* 2msec timelimit here means no irqs/preempt */
 544         spin_lock_irq(&ahcd->lock);
 545
 546         admhc_writel(ahcd, ADMHC_CTRL_SR,  &ahcd->regs->gencontrol);
 547         temp = 30;      /* ... allow extra time */
 548         while ((admhc_readl(ahcd, &ahcd->regs->gencontrol) & ADMHC_CTRL_SR) != 0) {
 549                 if (--temp == 0) {
 550                         spin_unlock_irq(&ahcd->lock);
 551                         admhc_err(ahcd, "USB HC reset timed out!\n");
 552                         return -1;
 553                 }
 554                 udelay(1);
 555         }
 556
 557         /* enable HOST mode, before access any host specific register */
 558         admhc_writel(ahcd, ADMHC_CTRL_UHFE,  &ahcd->regs->gencontrol);
 559
 560         /* Tell the controller where the descriptor list is */
 561         admhc_writel(ahcd, (u32)ahcd->ed_head->dma, &ahcd->regs->hosthead);
 562
 563         periodic_reinit(ahcd);
 564
 565         /* use rhsc irqs after khubd is fully initialized */
 566         hcd->poll_rh = 1;
 567         hcd->uses_new_polling = 1;
 568
 569         /* start controller operations */
 570         ahcd->host_control = ADMHC_BUSS_OPER;
 571         admhc_writel(ahcd, ahcd->host_control, &ahcd->regs->host_control);
 572         hcd->state = HC_STATE_RUNNING;
 573
 574         temp = 20;
 575         while ((admhc_readl(ahcd, &ahcd->regs->host_control)
 576                         & ADMHC_HC_BUSS) != ADMHC_BUSS_OPER) {
 577                 if (--temp == 0) {
 578                         spin_unlock_irq(&ahcd->lock);
 579                         admhc_err(ahcd, "unable to setup operational mode!\n");
 580                         return -1;
 581                 }
 582                 mdelay(1);
 583         }
 584
 585 #if 0
 586         /* FIXME */
 587         /* wake on ConnectStatusChange, matching external hubs */
 588         admhc_writel(ahcd, ADMHC_RH_DRWE, &ahcd->regs->rhdesc);
 589 #endif
 590
 591         /* Choose the interrupts we care about now, others later on demand */
 592         temp = ADMHC_INTR_INIT;
 593         admhc_intr_ack(ahcd, ~0);
 594         admhc_intr_enable(ahcd, temp);
 595
 596         admhc_writel(ahcd, ADMHC_RH_NPS | ADMHC_RH_LPSC, &ahcd->regs->rhdesc);
 597
 598         ahcd->next_statechange = jiffies + STATECHANGE_DELAY;
 599         spin_unlock_irq(&ahcd->lock);
 600
 601         mdelay(ADMHC_POTPGT);
 602         hcd->state = HC_STATE_RUNNING;
 603
 604         return 0;
 605 }
 606
 607 /*-------------------------------------------------------------------------*/
 608
 609 /* an interrupt happens */
 610
 611 static irqreturn_t admhc_irq(struct usb_hcd *hcd)
 612 {
 613         struct admhcd *ahcd = hcd_to_admhcd(hcd);
 614         struct admhcd_regs __iomem *regs = ahcd->regs;
 615         u32 ints;
 616
 617         ints = admhc_readl(ahcd, &regs->int_status);
 618         if (!(ints & ADMHC_INTR_INTA)) {
 619                 /* no unmasked interrupt status is set */
 620                 admhc_err(ahcd, "spurious interrupt %08x\n", ints);
 621                 return IRQ_NONE;
 622         }
 623
 624         ints &= admhc_readl(ahcd, &regs->int_enable);
 625         if (!ints) {
 626                 admhc_err(ahcd, "hardware irq problems?\n");
 627                 return IRQ_NONE;
 628         }
 629
 630         if (ints & ADMHC_INTR_6) {
 631                 admhc_err(ahcd, "unknown interrupt 6\n");
 632                 admhc_dump(ahcd, 0);
 633         }
 634
 635         if (ints & ADMHC_INTR_7) {
 636                 admhc_err(ahcd, "unknown interrupt 7\n");
 637                 admhc_dump(ahcd, 0);
 638         }
 639
 640         if (ints & ADMHC_INTR_FATI) {
 641                 admhc_disable(ahcd);
 642                 admhc_err(ahcd, "Fatal Error, controller disabled\n");
 643                 admhc_usb_reset(ahcd);
 644         }
 645
 646         if (ints & ADMHC_INTR_BABI) {
 647                 admhc_disable(ahcd);
 648                 admhc_err(ahcd, "Babble Detected\n");
 649                 admhc_usb_reset(ahcd);
 650         }
 651
 652         if (ints & ADMHC_INTR_INSM) {
 653                 admhc_vdbg(ahcd, "Root Hub Status Change\n");
 654                 ahcd->next_statechange = jiffies + STATECHANGE_DELAY;
 655                 admhc_intr_ack(ahcd, ADMHC_INTR_RESI | ADMHC_INTR_INSM);
 656
 657                 /* NOTE: Vendors didn't always make the same implementation
 658                  * choices for RHSC.  Many followed the spec; RHSC triggers
 659                  * on an edge, like setting and maybe clearing a port status
 660                  * change bit.  With others it's level-triggered, active
 661                  * until khubd clears all the port status change bits.  We'll
 662                  * always disable it here and rely on polling until khubd
 663                  * re-enables it.
 664                  */
 665                 admhc_intr_disable(ahcd, ADMHC_INTR_INSM);
 666                 usb_hcd_poll_rh_status(hcd);
 667         } else if (ints & ADMHC_INTR_RESI) {
 668                 /* For connect and disconnect events, we expect the controller
 669                  * to turn on RHSC along with RD.  But for remote wakeup events
 670                  * this might not happen.
 671                  */
 672                 admhc_vdbg(ahcd, "Resume Detect\n");
 673                 admhc_intr_ack(ahcd, ADMHC_INTR_RESI);
 674                 hcd->poll_rh = 1;
 675                 if (ahcd->autostop) {
 676                         spin_lock(&ahcd->lock);
 677                         admhc_rh_resume(ahcd);
 678                         spin_unlock(&ahcd->lock);
 679                 } else
 680                         usb_hcd_resume_root_hub(hcd);
 681         }
 682
 683         if (ints & ADMHC_INTR_TDC) {
 684                 admhc_vdbg(ahcd, "Transfer Descriptor Complete\n");
 685                 if (HC_IS_RUNNING(hcd->state))
 686                         admhc_intr_disable(ahcd, ADMHC_INTR_TDC);
 687                 spin_lock(&ahcd->lock);
 688                 admhc_td_complete(ahcd);
 689                 spin_unlock(&ahcd->lock);
 690                 if (HC_IS_RUNNING(hcd->state))
 691                         admhc_intr_enable(ahcd, ADMHC_INTR_TDC);
 692         }
 693
 694         if (ints & ADMHC_INTR_SO) {
 695                 /* could track INTR_SO to reduce available PCI/... bandwidth */
 696                 admhc_err(ahcd, "Schedule Overrun\n");
 697         }
 698
 699         if (ints & ADMHC_INTR_SOFI) {
 700                 spin_lock(&ahcd->lock);
 701                 /* handle any pending ED removes */
 702                 admhc_finish_unlinks(ahcd, admhc_frame_no(ahcd));
 703                 spin_unlock(&ahcd->lock);
 704         }
 705
 706         if (HC_IS_RUNNING(hcd->state)) {
 707                 admhc_intr_ack(ahcd, ints);
 708                 admhc_intr_enable(ahcd, ADMHC_INTR_MIE);
 709         }
 710
 711         return IRQ_HANDLED;
 712 }
 713
 714 /*-------------------------------------------------------------------------*/
 715
 716 static void admhc_stop(struct usb_hcd *hcd)
 717 {
 718         struct admhcd *ahcd = hcd_to_admhcd(hcd);
 719
 720         admhc_dump(ahcd, 1);
 721
 722         flush_scheduled_work();
 723
 724         admhc_usb_reset(ahcd);
 725         admhc_intr_disable(ahcd, ~0);
 726
 727         free_irq(hcd->irq, hcd);
 728         hcd->irq = -1;
 729
 730         remove_debug_files(ahcd);
 731         admhc_eds_cleanup(ahcd);
 732         admhc_mem_cleanup(ahcd);
 733 }
 734
 735 /*-------------------------------------------------------------------------*/
 736
 737 #ifdef CONFIG_MIPS_ADM5120
 738 #include "adm5120-drv.c"
 739 #define PLATFORM_DRIVER         usb_hcd_adm5120_driver
 740 #endif
 741
 742 #if     !defined(PLATFORM_DRIVER)
 743 #error "missing bus glue for admhc-hcd"
 744 #endif
 745
 746 #define DRIVER_INFO DRIVER_DESC " " DRIVER_VERSION
 747
 748 static int __init admhc_hcd_mod_init(void)
 749 {
 750         int ret = 0;
 751
 752         if (usb_disabled())
 753                 return -ENODEV;
 754
 755         pr_info("%s: " DRIVER_INFO "\n", hcd_name);
 756         pr_info("%s: block sizes: ed %Zd td %Zd\n", hcd_name,
 757                 sizeof (struct ed), sizeof (struct td));
 758
 759 #ifdef PLATFORM_DRIVER
 760         ret = platform_driver_register(&PLATFORM_DRIVER);
 761         if (ret < 0)
 762                 goto error_platform;
 763 #endif
 764
 765         return ret;
 766
 767 #ifdef PLATFORM_DRIVER
 768         platform_driver_unregister(&PLATFORM_DRIVER);
 769 error_platform:
 770 #endif
 771         return ret;
 772 }
 773 module_init(admhc_hcd_mod_init);
 774
 775 static void __exit admhc_hcd_mod_exit(void)
 776 {
 777         platform_driver_unregister(&PLATFORM_DRIVER);
 778 }
 779 module_exit(admhc_hcd_mod_exit);
 780
 781 MODULE_AUTHOR(DRIVER_AUTHOR);
 782 MODULE_DESCRIPTION(DRIVER_INFO);
 783 MODULE_LICENSE("GPL");