2 This is a block driver for the direct (mmaped) interface to the CF-slot,
3 found in Routerboard.com's RB532 board
4 See SDK provided from routerboard.com.
6 Module adapted By P.Christeas <p_christeas@yahoo.com>, 2005-6.
7 Cleaned up and adapted to platform_device by Felix Fietkau <nbd@openwrt.org>
9 This work is redistributed under the terms of the GNU General Public License.
12 #include <linux/kernel.h> /* printk() */
13 #include <linux/module.h> /* module to be loadable */
14 #include <linux/delay.h>
15 #include <linux/sched.h>
16 #include <linux/pci.h>
17 #include <linux/ioport.h> /* request_mem_region() */
19 #include <asm/unaligned.h>
24 #include <adm5120_defs.h>
25 #include <adm5120_irq.h>
26 #include <adm5120_switch.h>
27 #include <adm5120_intc.h>
28 #include <adm5120_mpmc.h>
29 #include <adm5120_cf.h>
33 #define REQUEST_MEM_REGION 0
39 #define DEBUGP(format, args...)
42 #define SECS 1000000 /* unit for wait_not_busy() is 1us */
47 unsigned cf_sectors = 0;
48 static unsigned cf_block_size = 1;
50 #define DBUF32 ((volatile u32 *)((unsigned long)dev->baddr | ATA_DBUF_OFFSET))
52 #define INTC_WRITE(reg, val) __raw_writel((val), \
53 (void __iomem *)(KSEG1ADDR(ADM5120_INTC_BASE) + reg))
55 #define INTC_READ(reg) __raw_readl(\
56 (void __iomem *)(KSEG1ADDR(ADM5120_INTC_BASE) + reg))
58 static void cf_do_tasklet(unsigned long dev_l);
61 static inline void wareg(u8 val, unsigned reg, struct cf_mips_dev* dev)
63 writeb(val, dev->baddr + ATA_REG_OFFSET + reg);
66 static inline u8 rareg(unsigned reg, struct cf_mips_dev* dev)
68 return readb(dev->baddr + ATA_REG_OFFSET + reg);
71 static inline int cfrdy(struct cf_mips_dev *dev)
73 return gpio_get_value(12);
76 static inline void prepare_cf_irq(struct cf_mips_dev *dev)
78 /* interrupt on cf ready (not busy) */
79 INTC_WRITE(INTC_REG_INT_LEVEL, INTC_READ(INTC_REG_INT_LEVEL) | ADM5120_CF_IRQ_LEVEL_BIT);
81 /* FIXME: how to clear interrupt status? */
84 static inline int cf_present(struct cf_mips_dev* dev)
86 /* TODO: read and configure CIS into memory mapped mode
87 * TODO: parse CISTPL_CONFIG on CF+ cards to get base address (0x200)
88 * TODO: maybe adjust power saving setting for Hitachi Microdrive
91 /* FIXME: enabling of EXTIO will be done by BIOS in future */
92 unsigned cmd = EXTIO_CS0_INT0_EN;
95 /* on RB100 WAIT is LOW all the time => read will hang */
96 if (gpio_read_value(8))
99 SW_WRITE_REG(GPIO_CONF2, cmd);
100 SW_WRITE_REG(GPIO_CONF0, (SW_READ_REG(GPIO_CONF0) & ~(1 << (16 + ADM5120_CF_GPIO_NUM))));
102 /* FIXME: timings will be set by BIOS in future - remove this */
103 MPMC_WRITE_REG(SC2, 0x88);
104 MPMC_WRITE_REG(WEN2, 0x02);
105 MPMC_WRITE_REG(OEN2, 0x03);
106 MPMC_WRITE_REG(RD2, 0x1a);
107 MPMC_WRITE_REG(PG2, 0x1d);
108 MPMC_WRITE_REG(WR2, 0x14);
109 MPMC_WRITE_REG(TN2, 0x09);
111 for (i = 0; i < 0x10; ++i) {
112 if (rareg(i,dev) != 0xff)
118 static inline int is_busy(struct cf_mips_dev *dev)
123 static int wait_not_busy(int to_us, int wait_for_busy,struct cf_mips_dev *dev)
126 if (wait_for_busy && !is_busy(dev)) {
127 /* busy must appear within 400ns,
128 * but it may dissapear before we see it
129 * => must not wait for busy in a loop
136 udelay(1); /* never reached in async mode */
138 if (us_passed > 1 * SECS) {
139 printk(KERN_WARNING "cf-mips: not busy ok (after %dus)"
140 ", status 0x%02x\n", us_passed, (unsigned) rareg(ATA_REG_ST,dev));
144 if (us_passed == 1 * SECS) {
145 printk(KERN_WARNING "cf-mips: wait not busy %dus..\n", to_us);
147 if (dev->async_mode) {
148 dev->to_timer.expires = jiffies + (to_us * HZ / SECS);
149 dev->irq_enable_time = jiffies;
152 add_timer(&dev->to_timer);
153 enable_irq(dev->irq);
154 return CF_TRANS_IN_PROGRESS;
159 } while (us_passed < to_us);
161 printk(KERN_ERR "cf-mips: wait not busy timeout (%dus)"
162 ", status 0x%02x, state %d\n",
163 to_us, (unsigned) rareg(ATA_REG_ST,dev), dev->tstate);
164 return CF_TRANS_FAILED;
167 static irqreturn_t cf_irq_handler(int irq, void *dev_id)
169 /* While tasklet has not disabled irq, irq will be retried all the time
170 * because of ILEVEL matching GPIO pin status => deadlock.
171 * To avoid this, we change ILEVEL to 0.
174 struct cf_mips_dev *dev=dev_id;
177 return; // false interrupt (only for ADM5120)
179 INTC_WRITE(INTC_REG_INT_LEVEL, (INTC_READ(INTC_REG_INT_LEVEL) & (~ADM5120_CF_IRQ_LEVEL_BIT)));
181 del_timer(&dev->to_timer);
182 tasklet_schedule(&dev->tasklet);
186 static int do_reset(struct cf_mips_dev *dev)
188 printk(KERN_INFO "cf-mips: resetting..\n");
190 wareg(ATA_REG_DC_SRST, ATA_REG_DC,dev);
191 udelay(1); /* FIXME: how long should we wait here? */
192 wareg(0, ATA_REG_DC,dev);
194 return wait_not_busy(30 * SECS, 1,dev);
197 static int set_multiple(struct cf_mips_dev *dev)
199 if (dev->block_size <= 1)
202 wareg(dev->block_size, ATA_REG_SC,dev);
203 wareg(ATA_REG_DH_BASE | ATA_REG_DH_LBA, ATA_REG_DH,dev);
204 wareg(ATA_CMD_SET_MULTIPLE, ATA_REG_CMD,dev);
206 return wait_not_busy(10 * SECS, 1,dev);
209 static int set_cmd(struct cf_mips_dev *dev)
211 //DEBUGP(KERN_INFO "cf-mips: ata cmd 0x%02x\n", dev->tcmd);
212 // sector_count should be <=24 bits..
213 BUG_ON(dev->tsect_start>=0x10000000);
214 // This way, it addresses 2^24 * 512 = 128G
216 if (dev->tsector_count) {
217 wareg(dev->tsector_count & 0xff, ATA_REG_SC,dev);
218 wareg(dev->tsect_start & 0xff, ATA_REG_SN,dev);
219 wareg((dev->tsect_start >> 8) & 0xff, ATA_REG_CL,dev);
220 wareg((dev->tsect_start >> 16) & 0xff, ATA_REG_CH,dev);
222 wareg(((dev->tsect_start >> 24) & 0x0f) | ATA_REG_DH_BASE | ATA_REG_DH_LBA,
223 ATA_REG_DH,dev); /* select drive on all commands */
224 wareg(dev->tcmd, ATA_REG_CMD,dev);
225 return wait_not_busy(10 * SECS, 1,dev);
228 static int do_trans(struct cf_mips_dev *dev)
234 //printk("do_trans: %d sectors left\n",dev->tsectors_left);
235 while (dev->tsectors_left) {
238 st = rareg(ATA_REG_ST,dev);
239 if (!(st & ATA_REG_ST_DRQ)) {
240 printk(KERN_ERR "cf-mips: do_trans without DRQ (status 0x%x)!\n", st);
241 if (st & ATA_REG_ST_ERR) {
242 int errId = rareg(ATA_REG_ERR,dev);
243 printk(KERN_ERR "cf-mips: %s error, status 0x%x, errid 0x%x\n",
244 (dev->tread ? "read" : "write"), st, errId);
246 return CF_TRANS_FAILED;
248 do { /* Fill/read the buffer one block */
250 qbuf = (u32 *)dev->tbuf;
251 qend = qbuf + CF_SECT_SIZE / sizeof(u32);
254 put_unaligned(*DBUF32,qbuf++);
255 //*(qbuf++) = *DBUF32;
259 *DBUF32 = get_unaligned(qbuf++);
262 dev->tsectors_left--;
263 dev->tbuf += CF_SECT_SIZE;
264 dev->tbuf_size -= CF_SECT_SIZE;
266 } while (transfered != dev->block_size && dev->tsectors_left > 0);
268 res = wait_not_busy(10 * SECS, 1,dev);
269 if (res != CF_TRANS_OK)
273 st = rareg(ATA_REG_ST,dev);
274 if (st & (ATA_REG_ST_DRQ | ATA_REG_ST_DWF | ATA_REG_ST_ERR)) {
275 if (st & ATA_REG_ST_DRQ) {
276 printk(KERN_ERR "cf-mips: DRQ after all %d sectors are %s"
277 ", status 0x%x\n", dev->tsector_count, (dev->tread ? "read" : "written"), st);
278 } else if (st & ATA_REG_ST_DWF) {
279 printk(KERN_ERR "cf-mips: write fault, status 0x%x\n", st);
281 int errId = rareg(ATA_REG_ERR,dev);
282 printk(KERN_ERR "cf-mips: %s error, status 0x%x, errid 0x%x\n",
283 (dev->tread ? "read" : "write"), st, errId);
285 return CF_TRANS_FAILED;
290 static int cf_do_state(struct cf_mips_dev *dev)
293 switch (dev->tstate) { /* fall through everywhere */
295 dev->tstate = TS_READY;
297 dev->tstate = TS_AFTER_RESET;
299 if (res != CF_TRANS_OK)
303 if (dev->tstate == TS_AFTER_RESET) {
304 dev->tstate = TS_READY;
305 res = set_multiple(dev);
306 if (res != CF_TRANS_OK)
310 dev->tstate = TS_CMD;
312 if (res != CF_TRANS_OK)
315 dev->tstate = TS_TRANS;
320 printk(KERN_ERR "cf-mips: BUG: unknown tstate %d\n", dev->tstate);
321 return CF_TRANS_FAILED;
323 if (res != CF_TRANS_IN_PROGRESS)
324 dev->tstate = TS_IDLE;
328 static void cf_do_tasklet(unsigned long dev_l)
330 struct cf_mips_dev* dev=(struct cf_mips_dev*) dev_l;
333 disable_irq(dev->irq);
335 if (dev->tstate == TS_IDLE)
336 return; /* can happen when irq is first registered */
339 DEBUGP(KERN_WARNING "cf-mips: not busy ok (tasklet) status 0x%02x\n",
340 (unsigned) rareg(ATA_REG_ST,dev));
343 res = cf_do_state(dev);
344 if (res == CF_TRANS_IN_PROGRESS)
346 cf_async_trans_done(dev,res);
349 static void cf_async_timeout(unsigned long dev_l)
351 struct cf_mips_dev* dev=(struct cf_mips_dev*) dev_l;
352 disable_irq(dev->irq);
353 /* Perhaps send abort to the device? */
354 printk(KERN_ERR "cf-mips: wait not busy timeout (%lus)"
355 ", status 0x%02x, state %d\n",
356 jiffies - dev->irq_enable_time, (unsigned) rareg(ATA_REG_ST,dev), dev->tstate);
357 dev->tstate = TS_IDLE;
358 cf_async_trans_done(dev,CF_TRANS_FAILED);
361 int cf_do_transfer(struct cf_mips_dev* dev,sector_t sector, unsigned long nsect,
362 char* buffer, int is_write)
364 BUG_ON(dev->tstate!=TS_IDLE);
365 if (nsect > ATA_MAX_SECT_PER_CMD) {
366 printk(KERN_WARNING "cf-mips: sector count %lu out of range\n",nsect);
367 return CF_TRANS_FAILED;
369 if (sector + nsect > dev->sectors) {
370 printk(KERN_WARNING "cf-mips: sector %lu out of range\n",sector);
371 return CF_TRANS_FAILED;
374 dev->tbuf_size = nsect*512;
375 dev->tsect_start = sector;
376 dev->tsector_count = nsect;
377 dev->tsectors_left = dev->tsector_count;
378 dev->tread = (is_write)?0:1;
380 dev->tcmd = (dev->block_size == 1 ?
381 (is_write ? ATA_CMD_WRITE_SECTORS : ATA_CMD_READ_SECTORS) :
382 (is_write ? ATA_CMD_WRITE_MULTIPLE : ATA_CMD_READ_MULTIPLE));
384 return cf_do_state(dev);
387 static int do_identify(struct cf_mips_dev *dev)
389 u16 sbuf[CF_SECT_SIZE >> 1];
391 char tstr[17]; //serial
392 BUG_ON(dev->tstate!=TS_IDLE);
393 dev->tbuf = (char *) sbuf;
394 dev->tbuf_size = CF_SECT_SIZE;
395 dev->tsect_start = 0;
396 dev->tsector_count = 0;
397 dev->tsectors_left = 1;
399 dev->tcmd = ATA_CMD_IDENTIFY_DRIVE;
401 DEBUGP(KERN_INFO "cf-mips: identify drive..\n");
402 res = cf_do_state(dev);
403 if (res == CF_TRANS_IN_PROGRESS) {
404 printk(KERN_ERR "cf-mips: BUG: async identify cmd\n");
405 return CF_TRANS_FAILED;
407 if (res != CF_TRANS_OK)
413 dev->sectors = ((unsigned long) sbuf[7] << 16) | sbuf[8];
415 memcpy(tstr,&sbuf[12],16);
417 printk(KERN_INFO "cf-mips: %s detected, C/H/S=%d/%d/%d sectors=%u (%uMB) Serial=%s\n",
418 (sbuf[0] == 0x848A ? "CF card" : "ATA drive"), dev->cyl, dev->head,
419 dev->spt, dev->sectors, dev->sectors >> 11,tstr);
423 static void init_multiple(struct cf_mips_dev * dev)
426 DEBUGP(KERN_INFO "cf-mips: detecting block size\n");
428 dev->block_size = 128; /* max block size = 128 sectors (64KB) */
430 wareg(dev->block_size, ATA_REG_SC,dev);
431 wareg(ATA_REG_DH_BASE | ATA_REG_DH_LBA, ATA_REG_DH,dev);
432 wareg(ATA_CMD_SET_MULTIPLE, ATA_REG_CMD,dev);
434 res = wait_not_busy(10 * SECS, 1,dev);
435 if (res != CF_TRANS_OK) {
436 printk(KERN_ERR "cf-mips: failed to detect block size: busy!\n");
440 if ((rareg(ATA_REG_ST,dev) & ATA_REG_ST_ERR) == 0)
442 dev->block_size /= 2;
443 } while (dev->block_size > 1);
445 printk(KERN_INFO "cf-mips: multiple sectors = %d\n", dev->block_size);
448 int cf_init(struct cf_mips_dev *dev)
450 tasklet_init(&dev->tasklet,cf_do_tasklet,(unsigned long)dev);
451 dev->baddr = ioremap_nocache((unsigned long)dev->base, CFDEV_BUF_SIZE);
453 printk(KERN_ERR "cf-mips: cf_init: ioremap for (%lx,%x) failed\n",
454 (unsigned long) dev->base, CFDEV_BUF_SIZE);
458 if (!cf_present(dev)) {
459 printk(KERN_WARNING "cf-mips: cf card not present\n");
464 if (do_reset(dev) != CF_TRANS_OK) {
465 printk(KERN_ERR "cf-mips: cf reset failed\n");
470 if (!do_identify(dev)) {
471 printk(KERN_ERR "cf-mips: cf identify failed\n");
476 /* set_apm_level(ATA_APM_WITH_STANDBY); */
479 init_timer(&dev->to_timer);
480 dev->to_timer.function = cf_async_timeout;
481 dev->to_timer.data = (unsigned long)dev;
484 if (request_irq(dev->irq, cf_irq_handler, 0, "CF Mips", dev)) {
485 printk(KERN_ERR "cf-mips: failed to get irq\n");
489 /* Disable below would be odd, because request will enable, and the tasklet
490 will disable it itself */
491 //disable_irq(dev->irq);
498 void cf_cleanup(struct cf_mips_dev *dev)
501 free_irq(dev->irq, NULL);
502 #if REQUEST_MEM_REGION
503 release_mem_region((unsigned long)dev->base, CFDEV_BUF_SIZE);