package/rt2x00/src/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 /*
  28  * Set enviroment defines for rt2x00.h
  29  */
  30 #define DRV_NAME "rt73usb"
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/version.h>
  35 #include <linux/init.h>
  36 #include <linux/usb.h>
  37 #include <linux/delay.h>
  38 #include <linux/etherdevice.h>
  39
  40 #include "rt2x00.h"
  41 #include "rt2x00usb.h"
  42 #include "rt73usb.h"
  43
  44 /*
  45  * Register access.
  46  * All access to the CSR registers will go through the methods
  47  * rt73usb_register_read and rt73usb_register_write.
  48  * BBP and RF register require indirect register access,
  49  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  50  * These indirect registers work with busy bits,
  51  * and we will try maximal REGISTER_BUSY_COUNT times to access
  52  * the register while taking a REGISTER_BUSY_DELAY us delay
  53  * between each attampt. When the busy bit is still set at that time,
  54  * the access attempt is considered to have failed,
  55  * and we will print an error.
  56  */
  57 static inline void rt73usb_register_read(
  58         const struct rt2x00_dev *rt2x00dev,
  59         const u16 offset, u32 *value)
  60 {
  61         __le32 reg;
  62         rt2x00usb_vendor_request(
  63                 rt2x00dev, USB_MULTI_READ, USB_VENDOR_REQUEST_IN,
  64                 offset, 0x00, &reg, sizeof(u32), REGISTER_TIMEOUT);
  65         *value = le32_to_cpu(reg);
  66 }
  67
  68 static inline void rt73usb_register_multiread(
  69         const struct rt2x00_dev *rt2x00dev,
  70         const u16 offset, void *value, const u32 length)
  71 {
  72         rt2x00usb_vendor_request(
  73                 rt2x00dev, USB_MULTI_READ, USB_VENDOR_REQUEST_IN,
  74                 offset, 0x00, value, length,
  75                 REGISTER_TIMEOUT * (length / sizeof(u32)));
  76 }
  77
  78 static inline void rt73usb_register_write(
  79         const struct rt2x00_dev *rt2x00dev,
  80         const u16 offset, u32 value)
  81 {
  82         __le32 reg = cpu_to_le32(value);
  83         rt2x00usb_vendor_request(
  84                 rt2x00dev, USB_MULTI_WRITE, USB_VENDOR_REQUEST_OUT,
  85                 offset, 0x00, &reg, sizeof(u32), REGISTER_TIMEOUT);
  86 }
  87
  88 static inline void rt73usb_register_multiwrite(
  89         const struct rt2x00_dev *rt2x00dev,
  90         const u16 offset, void *value, const u32 length)
  91 {
  92         rt2x00usb_vendor_request(
  93                 rt2x00dev, USB_MULTI_WRITE, USB_VENDOR_REQUEST_OUT,
  94                 offset, 0x00, value, length,
  95                 REGISTER_TIMEOUT * (length / sizeof(u32)));
  96 }
  97
  98 static u32 rt73usb_bbp_check(const struct rt2x00_dev *rt2x00dev)
  99 {
 100         u32 reg;
 101         unsigned int i;
 102
 103         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 104                 rt73usb_register_read(rt2x00dev, PHY_CSR3, &reg);
 105                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 106                         break;
 107                 udelay(REGISTER_BUSY_DELAY);
 108         }
 109
 110         return reg;
 111 }
 112
 113 static void rt73usb_bbp_write(const struct rt2x00_dev *rt2x00dev,
 114         const u8 reg_id, const u8 value)
 115 {
 116         u32 reg;
 117
 118         /*
 119          *  Wait until the BBP becomes ready.
 120          */
 121         reg = rt73usb_bbp_check(rt2x00dev);
 122         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 123                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 124                 return;
 125         }
 126
 127         /*
 128          * Write the data into the BBP.
 129          */
 130         reg = 0;
 131         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 132         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, reg_id);
 133         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 134         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 135
 136         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 137 }
 138
 139 static void rt73usb_bbp_read(const struct rt2x00_dev *rt2x00dev,
 140         const u8 reg_id, u8 *value)
 141 {
 142         u32 reg;
 143
 144         /*
 145          *  Wait until the BBP becomes ready.
 146          */
 147         reg = rt73usb_bbp_check(rt2x00dev);
 148         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 149                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 150                 return;
 151         }
 152
 153         /*
 154          * Write the request into the BBP.
 155          */
 156         reg =0;
 157         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, reg_id);
 158         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 159         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 160
 161         rt73usb_register_write(rt2x00dev, PHY_CSR3, reg);
 162
 163         /*
 164          *  Wait until the BBP becomes ready.
 165          */
 166         reg = rt73usb_bbp_check(rt2x00dev);
 167         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 168                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 169                 *value = 0xff;
 170                 return;
 171         }
 172
 173         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 174 }
 175
 176 static void rt73usb_rf_write(const struct rt2x00_dev *rt2x00dev,
 177         const u32 value)
 178 {
 179         u32 reg;
 180         unsigned int i;
 181
 182         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 183                 rt73usb_register_read(rt2x00dev, PHY_CSR4, &reg);
 184                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 185                         goto rf_write;
 186                 udelay(REGISTER_BUSY_DELAY);
 187         }
 188
 189         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 190         return;
 191
 192 rf_write:
 193         reg = 0;
 194         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 195         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS, 20);
 196         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 197         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 198
 199         rt73usb_register_write(rt2x00dev, PHY_CSR4, reg);
 200 }
 201
 202 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 203 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 204
 205 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
 206         const unsigned long word, void *data)
 207 {
 208         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 209 }
 210
 211 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
 212         const unsigned long word, void *data)
 213 {
 214         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), *((u32*)data));
 215 }
 216
 217 static void rt73usb_read_eeprom(struct rt2x00_dev *rt2x00dev,
 218         const unsigned long word, void *data)
 219 {
 220         rt2x00_eeprom_read(rt2x00dev, word, data);
 221 }
 222
 223 static void rt73usb_write_eeprom(struct rt2x00_dev *rt2x00dev,
 224         const unsigned long word, void *data)
 225 {
 226         rt2x00_eeprom_write(rt2x00dev, word, *((u16*)data));
 227 }
 228
 229 static void rt73usb_read_bbp(struct rt2x00_dev *rt2x00dev,
 230         const unsigned long word, void *data)
 231 {
 232         rt73usb_bbp_read(rt2x00dev, word, data);
 233 }
 234
 235 static void rt73usb_write_bbp(struct rt2x00_dev *rt2x00dev,
 236         const unsigned long word, void *data)
 237 {
 238         rt73usb_bbp_write(rt2x00dev, word, *((u8*)data));
 239 }
 240
 241 static const struct rt2x00debug rt73usb_rt2x00debug = {
 242         .owner          = THIS_MODULE,
 243         .reg_csr        = {
 244                 .read           = rt73usb_read_csr,
 245                 .write          = rt73usb_write_csr,
 246                 .word_size      = sizeof(u32),
 247                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 248         },
 249         .reg_eeprom     = {
 250                 .read           = rt73usb_read_eeprom,
 251                 .write          = rt73usb_write_eeprom,
 252                 .word_size      = sizeof(u16),
 253                 .word_count     = EEPROM_SIZE / sizeof(u16),
 254         },
 255         .reg_bbp        = {
 256                 .read           = rt73usb_read_bbp,
 257                 .write          = rt73usb_write_bbp,
 258                 .word_size      = sizeof(u8),
 259                 .word_count     = BBP_SIZE / sizeof(u8),
 260         },
 261 };
 262 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 263
 264 /*
 265  * Configuration handlers.
 266  */
 267 static void rt73usb_config_bssid(struct rt2x00_dev *rt2x00dev, u8 *bssid)
 268 {
 269         u32 reg[2];
 270
 271         memset(&reg, 0, sizeof(reg));
 272         memcpy(&reg, bssid, ETH_ALEN);
 273
 274         rt2x00_set_field32(&reg[1], MAC_CSR5_BSS_ID_MASK, 3);
 275
 276         /*
 277          * The BSSID is passed to us as an array of bytes,
 278          * that array is little endian, so no need for byte ordering.
 279          */
 280         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4, &reg, sizeof(reg));
 281 }
 282
 283 static void rt73usb_config_promisc(struct rt2x00_dev *rt2x00dev,
 284         const int promisc)
 285 {
 286         u32 reg;
 287
 288         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 289         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME, !promisc);
 290         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 291 }
 292
 293 static void rt73usb_config_type(struct rt2x00_dev *rt2x00dev,
 294         const int type)
 295 {
 296         u32 reg;
 297
 298         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
 299
 300         /*
 301          * Apply hardware packet filter.
 302          */
 303         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 304
 305         if (!is_monitor_present(&rt2x00dev->interface) &&
 306             (type == IEEE80211_IF_TYPE_IBSS || type == IEEE80211_IF_TYPE_STA))
 307                 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS, 1);
 308         else
 309                 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS, 0);
 310
 311         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC, 1);
 312         if (is_monitor_present(&rt2x00dev->interface)) {
 313                 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL, 0);
 314                 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL, 0);
 315                 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 0);
 316         } else {
 317                 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL, 1);
 318                 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL, 1);
 319                 rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
 320         }
 321
 322         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST, 0);
 323         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BORADCAST, 0);
 324
 325         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 326
 327         /*
 328          * Enable synchronisation.
 329          */
 330         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 331         if (is_interface_present(&rt2x00dev->interface)) {
 332                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 333                 rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 334         }
 335
 336         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
 337         if (type == IEEE80211_IF_TYPE_IBSS || type == IEEE80211_IF_TYPE_AP)
 338                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, 2);
 339         else if (type == IEEE80211_IF_TYPE_STA)
 340                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, 1);
 341         else if (is_monitor_present(&rt2x00dev->interface) &&
 342                  !is_interface_present(&rt2x00dev->interface))
 343                 rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, 0);
 344
 345         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 346 }
 347
 348 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 349         const int value, const int channel, const int txpower)
 350 {
 351         u8 reg = 0;
 352         u32 rf1 = rt2x00dev->rf1;
 353         u32 rf2 = value;
 354         u32 rf3 = rt2x00dev->rf3;
 355         u32 rf4 = 0;
 356
 357         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 358             rt2x00_rf(&rt2x00dev->chip, RF2527))
 359                 rf2 |= 0x00004000;
 360
 361         if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
 362                 if (channel <= 14)
 363                         rf3 = 0x00068455;
 364                 else if (channel >= 36 && channel <= 48)
 365                         rf3 = 0x0009be55;
 366                 else if (channel >= 52 && channel <= 64)
 367                         rf3 = 0x0009ae55;
 368                 else if (channel >= 100 && channel <= 112)
 369                         rf3 = 0x000bae55;
 370                 else
 371                         rf3 = 0x000bbe55;
 372         }
 373
 374         if (channel < 14) {
 375                 if (channel & 0x01)
 376                         rf4 = 0x000fea0b;
 377                 else
 378                         rf4 = 0x000fea1f;
 379         } else if (channel == 14) {
 380                 rf4 = 0x000fea13;
 381         } else {
 382                 switch (channel) {
 383                         case 36:
 384                         case 56:
 385                         case 116:
 386                         case 136:
 387                                 rf4 = 0x000fea23;
 388                                 break;
 389                         case 40:
 390                         case 60:
 391                         case 100:
 392                         case 120:
 393                         case 140:
 394                                 rf4 = 0x000fea03;
 395                                 break;
 396                         case 44:
 397                         case 64:
 398                         case 104:
 399                         case 124:
 400                                 rf4 = 0x000fea0b;
 401                                 break;
 402                         case 48:
 403                         case 108:
 404                         case 128:
 405                                 rf4 = 0x000fea13;
 406                                 break;
 407                         case 52:
 408                         case 112:
 409                         case 132:
 410                                 rf4 = 0x000fea1b;
 411                                 break;
 412                         case 149:
 413                                 rf4 = 0x000fea1f;
 414                                 break;
 415                         case 153:
 416                                 rf4 = 0x000fea27;
 417                                 break;
 418                         case 157:
 419                                 rf4 = 0x000fea07;
 420                                 break;
 421                         case 161:
 422                                 rf4 = 0x000fea0f;
 423                                 break;
 424                         case 165:
 425                                 rf4 = 0x000fea17;
 426                                 break;
 427                 }
 428         }
 429
 430         if (rt2x00_rf(&rt2x00dev->chip, RF2527) ||
 431             rt2x00_rf(&rt2x00dev->chip, RF5225))
 432                 rf4 |= 0x00010000;
 433
 434         /*
 435          * Set TXpower.
 436          */
 437         rt2x00_set_field32(&rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 438
 439         /*
 440          * Set Frequency offset.
 441          */
 442         rt2x00_set_field32(&rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 443
 444         rt73usb_bbp_read(rt2x00dev, 3, &reg);
 445         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 446             rt2x00_rf(&rt2x00dev->chip, RF2527))
 447                 reg &= ~0x01;
 448         else
 449                 reg |= 0x01;
 450         rt73usb_bbp_write(rt2x00dev, 3, reg);
 451
 452         rt73usb_rf_write(rt2x00dev, rf1);
 453         rt73usb_rf_write(rt2x00dev, rf2);
 454         rt73usb_rf_write(rt2x00dev, rf3 & ~0x00000004);
 455         rt73usb_rf_write(rt2x00dev, rf4);
 456
 457         rt73usb_rf_write(rt2x00dev, rf1);
 458         rt73usb_rf_write(rt2x00dev, rf2);
 459         rt73usb_rf_write(rt2x00dev, rf3 | 0x00000004);
 460         rt73usb_rf_write(rt2x00dev, rf4);
 461
 462         rt73usb_rf_write(rt2x00dev, rf1);
 463         rt73usb_rf_write(rt2x00dev, rf2);
 464         rt73usb_rf_write(rt2x00dev, rf3 & ~0x00000004);
 465         rt73usb_rf_write(rt2x00dev, rf4);
 466
 467         msleep(1);
 468
 469         /*
 470          * Update rf fields
 471          */
 472         rt2x00dev->rf1 = rf1;
 473         rt2x00dev->rf2 = rf2;
 474         rt2x00dev->rf3 = rf3;
 475         rt2x00dev->rf4 = rf4;
 476         rt2x00dev->tx_power = txpower;
 477 }
 478
 479 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 480         const int txpower)
 481 {
 482         rt2x00_set_field32(&rt2x00dev->rf3, RF3_TXPOWER,
 483                 TXPOWER_TO_DEV(txpower));
 484
 485         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf1);
 486         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf2);
 487         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf3 & ~0x00000004);
 488         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf4);
 489
 490         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf1);
 491         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf2);
 492         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf3 | 0x00000004);
 493         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf4);
 494
 495         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf1);
 496         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf2);
 497         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf3 & ~0x00000004);
 498         rt73usb_rf_write(rt2x00dev, rt2x00dev->rf4);
 499 }
 500
 501 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 502         const int antenna_tx, const int antenna_rx)
 503 {
 504         u32 reg;
 505         u8 r3;
 506         u8 r4;
 507         u8 r77;
 508
 509         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 510
 511         if (rt2x00dev->curr_hwmode == HWMODE_A) {
 512                 if (test_bit(CONFIG_EXTERNAL_LNA, &rt2x00dev->flags)) {
 513                         rt73usb_bbp_write(rt2x00dev, 17, 0x38);
 514                         rt73usb_bbp_write(rt2x00dev, 96, 0x78);
 515                         rt73usb_bbp_write(rt2x00dev, 104, 0x48);
 516                         rt73usb_bbp_write(rt2x00dev, 75, 0x80);
 517                         rt73usb_bbp_write(rt2x00dev, 86, 0x80);
 518                         rt73usb_bbp_write(rt2x00dev, 88, 0x80);
 519                 } else {
 520                         rt73usb_bbp_write(rt2x00dev, 17, 0x28);
 521                         rt73usb_bbp_write(rt2x00dev, 96, 0x58);
 522                         rt73usb_bbp_write(rt2x00dev, 104, 0x38);
 523                         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
 524                         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
 525                         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
 526                 }
 527                 rt73usb_bbp_write(rt2x00dev, 35, 0x60);
 528                 rt73usb_bbp_write(rt2x00dev, 97, 0x58);
 529                 rt73usb_bbp_write(rt2x00dev, 98, 0x58);
 530
 531                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG, 0);
 532                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A, 1);
 533         } else {
 534                 if (test_bit(CONFIG_EXTERNAL_LNA, &rt2x00dev->flags)) {
 535                         rt73usb_bbp_write(rt2x00dev, 17, 0x30);
 536                         rt73usb_bbp_write(rt2x00dev, 96, 0x68);
 537                         rt73usb_bbp_write(rt2x00dev, 104, 0x3c);
 538                         rt73usb_bbp_write(rt2x00dev, 75, 0x80);
 539                         rt73usb_bbp_write(rt2x00dev, 86, 0x80);
 540                         rt73usb_bbp_write(rt2x00dev, 88, 0x80);
 541                 } else {
 542                         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 543                         rt73usb_bbp_write(rt2x00dev, 96, 0x48);
 544                         rt73usb_bbp_write(rt2x00dev, 104, 0x2c);
 545                         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
 546                         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
 547                         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
 548                 }
 549                 rt73usb_bbp_write(rt2x00dev, 35, 0x50);
 550                 rt73usb_bbp_write(rt2x00dev, 97, 0x48);
 551                 rt73usb_bbp_write(rt2x00dev, 98, 0x48);
 552
 553                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG, 1);
 554                 rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A, 0);
 555         }
 556
 557         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 558
 559         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 560         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 561         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 562
 563         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 564
 565         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 566             rt2x00_rf(&rt2x00dev->chip, RF5225)) {
 567                 if (antenna_rx == ANTENNA_DIVERSITY) {
 568                         rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 569                         if (rt2x00dev->curr_hwmode != HWMODE_A)
 570                                 rt2x00_set_field8(&r4, BBP_R4_RX_BG_MODE, 1);
 571                         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 572                                 test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 573                 } else if (antenna_rx == ANTENNA_A) {
 574                         rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 575                         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 576                                 test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 577                         if (rt2x00dev->curr_hwmode == HWMODE_A)
 578                                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 579                         else
 580                                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 581                         rt73usb_bbp_write(rt2x00dev, 77, r77);
 582                 } else if (antenna_rx == ANTENNA_B) {
 583                         rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 584                         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 585                                 test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 586                         if (rt2x00dev->curr_hwmode == HWMODE_A)
 587                                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 588                         else
 589                                 rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 590                         rt73usb_bbp_write(rt2x00dev, 77, r77);
 591                 }
 592         } else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 593                    rt2x00_rf(&rt2x00dev->chip, RF2527)) {
 594                 if (antenna_rx == ANTENNA_DIVERSITY) {
 595                         rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 2);
 596                         rt2x00_set_field8(&r4, BBP_R4_RX_BG_MODE, 1);
 597                         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 598                                 test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 599                 } else if (antenna_rx == ANTENNA_A) {
 600                         rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 601                         rt2x00_set_field8(&r4, BBP_R4_RX_BG_MODE, 1);
 602                         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 603                                 test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 604                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 3);
 605                         rt73usb_bbp_write(rt2x00dev, 77, r77);
 606                 } else if (antenna_rx == ANTENNA_B) {
 607                         rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA, 1);
 608                         rt2x00_set_field8(&r4, BBP_R4_RX_BG_MODE, 1);
 609                         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 610                                 test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 611                         rt2x00_set_field8(&r77, BBP_R77_PAIR, 0);
 612                 }
 613         }
 614
 615         rt73usb_bbp_write(rt2x00dev, 3, r3);
 616         rt73usb_bbp_write(rt2x00dev, 4, r4);
 617 }
 618
 619 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 620         const int short_slot_time, const int beacon_int)
 621 {
 622         u32 reg;
 623
 624         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 625         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME,
 626                 short_slot_time ? SHORT_SLOT_TIME : SLOT_TIME);
 627         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 628
 629         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 630         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, SIFS);
 631         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 632         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, EIFS);
 633         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 634
 635         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 636         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 637         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 638
 639         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 640         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 641         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 642
 643         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 644         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL, beacon_int * 16);
 645         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 646 }
 647
 648 static void rt73usb_config_rate(struct rt2x00_dev *rt2x00dev, const int rate)
 649 {
 650         struct ieee80211_conf *conf = &rt2x00dev->hw->conf;
 651         u32 reg;
 652         u32 value;
 653         u32 preamble;
 654
 655         preamble = DEVICE_GET_RATE_FIELD(rate, PREAMBLE)
 656                 ? SHORT_PREAMBLE : PREAMBLE;
 657
 658         reg = DEVICE_GET_RATE_FIELD(rate, RATEMASK) & DEV_BASIC_RATE;
 659
 660         rt73usb_register_write(rt2x00dev, TXRX_CSR5, reg);
 661
 662         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 663         value = ((conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) ?
 664                  SHORT_DIFS :  DIFS) +
 665                 PLCP + preamble + get_duration(ACK_SIZE, 10);
 666         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, value);
 667         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 668
 669         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 670         if (preamble == SHORT_PREAMBLE)
 671                 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 1);
 672         else
 673                 rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE, 0);
 674         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 675 }
 676
 677 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 678         const int phymode)
 679 {
 680         struct ieee80211_hw_mode *mode;
 681         struct ieee80211_rate *rate;
 682
 683         if (phymode == MODE_IEEE80211A)
 684                 rt2x00dev->curr_hwmode = HWMODE_A;
 685         else if (phymode == MODE_IEEE80211B)
 686                 rt2x00dev->curr_hwmode = HWMODE_B;
 687         else
 688                 rt2x00dev->curr_hwmode = HWMODE_G;
 689
 690         mode = &rt2x00dev->hwmodes[rt2x00dev->curr_hwmode];
 691         rate = &mode->rates[mode->num_rates - 1];
 692
 693         rt73usb_config_rate(rt2x00dev, rate->val2);
 694 }
 695
 696 static void rt73usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, u8 *addr)
 697 {
 698         u32 reg[2];
 699
 700         memset(&reg, 0, sizeof(reg));
 701         memcpy(&reg, addr, ETH_ALEN);
 702
 703         rt2x00_set_field32(&reg[1], MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 704
 705         /*
 706          * The MAC address is passed to us as an array of bytes,
 707          * that array is little endian, so no need for byte ordering.
 708          */
 709         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2, &reg, sizeof(reg));
 710 }
 711
 712 /*
 713  * LED functions.
 714  */
 715 static void rt73usb_enable_led(struct rt2x00_dev *rt2x00dev)
 716 {
 717         u32 reg;
 718
 719         rt73usb_register_read(rt2x00dev, MAC_CSR14, &reg);
 720         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, 70);
 721         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, 30);
 722         rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
 723
 724         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1);
 725         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A)
 726                 rt2x00_set_field16(
 727                         &rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 1);
 728         else
 729                 rt2x00_set_field16(
 730                         &rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 1);
 731
 732         rt2x00usb_vendor_request(
 733                 rt2x00dev, USB_LED_CONTROL, USB_VENDOR_REQUEST_OUT,
 734                 0x00, rt2x00dev->led_reg, NULL, 0, REGISTER_TIMEOUT);
 735 }
 736
 737 static void rt73usb_disable_led(struct rt2x00_dev *rt2x00dev)
 738 {
 739         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 0);
 740         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 0);
 741         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 0);
 742
 743         rt2x00usb_vendor_request(
 744                 rt2x00dev, USB_LED_CONTROL, USB_VENDOR_REQUEST_OUT,
 745                 0x00, rt2x00dev->led_reg, NULL, 0, REGISTER_TIMEOUT);
 746 }
 747
 748 static void rt73usb_activity_led(struct rt2x00_dev *rt2x00dev, char rssi)
 749 {
 750         u32 led;
 751
 752         if (rt2x00dev->led_mode != LED_MODE_SIGNAL_STRENGTH)
 753                 return;
 754
 755         if (rssi <= 30)
 756                 led = 0;
 757         else if (rssi <= 39)
 758                 led = 1;
 759         else if (rssi <= 49)
 760                 led = 2;
 761         else if (rssi <= 53)
 762                 led = 3;
 763         else if (rssi <= 63)
 764                 led = 4;
 765         else
 766                 led = 5;
 767
 768         rt2x00usb_vendor_request(
 769                 rt2x00dev, USB_LED_CONTROL, USB_VENDOR_REQUEST_OUT,
 770                 led, rt2x00dev->led_reg, NULL, 0, REGISTER_TIMEOUT);
 771 }
 772
 773 /*
 774  * Link tuning
 775  */
 776 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev, int rssi)
 777 {
 778         u32 reg;
 779         u8 r17;
 780         u8 up_bound;
 781         u8 low_bound;
 782
 783         /*
 784          * Update Led strength
 785          */
 786         rt73usb_activity_led(rt2x00dev, rssi);
 787
 788         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 789
 790         /*
 791          * Determine r17 bounds.
 792          */
 793         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
 794                 low_bound = 0x28;
 795                 up_bound = 0x48;
 796
 797                 if (test_bit(CONFIG_EXTERNAL_LNA, &rt2x00dev->flags)) {
 798                         low_bound += 0x10;
 799                         up_bound += 0x10;
 800                 }
 801         } else {
 802                 if (rssi > -82) {
 803                         low_bound = 0x1c;
 804                         up_bound = 0x40;
 805                 } else if (rssi > -84) {
 806                         low_bound = 0x1c;
 807                         up_bound = 0x20;
 808                 } else {
 809                         low_bound = 0x1c;
 810                         up_bound = 0x1c;
 811                 }
 812
 813                 if (test_bit(CONFIG_EXTERNAL_LNA, &rt2x00dev->flags)) {
 814                         low_bound += 0x14;
 815                         up_bound += 0x10;
 816                 }
 817         }
 818
 819         /*
 820          * Special big-R17 for very short distance
 821          */
 822         if (rssi > -35) {
 823                 if (r17 != 0x60)
 824                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 825                 return;
 826         }
 827
 828         /*
 829          * Special big-R17 for short distance
 830          */
 831         if (rssi >= -58) {
 832                 if (r17 != up_bound)
 833                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 834                 return;
 835         }
 836
 837         /*
 838          * Special big-R17 for middle-short distance
 839          */
 840         if (rssi >= -66) {
 841                 low_bound += 0x10;
 842                 if (r17 != low_bound)
 843                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 844                 return;
 845         }
 846
 847         /*
 848          * Special mid-R17 for middle distance
 849          */
 850         if (rssi >= -74) {
 851                 if (r17 != (low_bound + 0x10))
 852                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 853                 return;
 854         }
 855
 856         /*
 857          * Special case: Change up_bound based on the rssi.
 858          * Lower up_bound when rssi is weaker then -74 dBm.
 859          */
 860         up_bound -= 2 * (-74 - rssi);
 861         if (low_bound > up_bound)
 862                 up_bound = low_bound;
 863
 864         if (r17 > up_bound) {
 865                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 866                 return;
 867         }
 868
 869         /*
 870          * r17 does not yet exceed upper limit, continue and base
 871          * the r17 tuning on the false CCA count.
 872          */
 873         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 874         reg = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 875         rt2x00dev->link.false_cca =
 876                 rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 877
 878         if (rt2x00dev->link.false_cca > 512 && r17 < up_bound) {
 879                 r17 += 4;
 880                 if (r17 > up_bound)
 881                         r17 = up_bound;
 882                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 883         } else if (rt2x00dev->link.false_cca < 100 && r17 > low_bound) {
 884                 r17 -= 4;
 885                 if (r17 < low_bound)
 886                         r17 = low_bound;
 887                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 888         }
 889 }
 890
 891 /*
 892  * Firmware name function.
 893  */
 894 static char *rt73usb_get_fw_name(struct rt2x00_dev *rt2x00dev)
 895 {
 896         return FIRMWARE_RT2571;
 897 }
 898
 899 /*
 900  * Initialization functions.
 901  */
 902 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 903         const size_t len)
 904 {
 905         unsigned int i;
 906         int status;
 907         u32 reg;
 908         char buf[64];
 909         char *ptr = data;
 910         int buflen;
 911
 912         /*
 913          * Wait for stable hardware.
 914          */
 915         for (i = 0; i < 100; i++) {
 916                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 917                 if (reg)
 918                         break;
 919                 msleep(1);
 920         }
 921
 922         if (!reg) {
 923                 ERROR(rt2x00dev, "Unstable hardware.\n");
 924                 return -EBUSY;
 925         }
 926
 927         /*
 928          * Write firmware to device.
 929          */
 930         for (i = 0; i < len; i += sizeof(buf)) {
 931                 buflen = min(len - i, sizeof(buf));
 932                 memcpy(buf, ptr, buflen);
 933                 rt73usb_register_multiwrite(rt2x00dev, FIRMWARE_IMAGE_BASE + i,
 934                         buf, buflen);
 935                 ptr += buflen;
 936         }
 937
 938         /*
 939          * Send firmware request to device to load firmware,
 940          * we need to specify a long timeout time.
 941          */
 942         status = rt2x00usb_vendor_request(rt2x00dev, USB_DEVICE_MODE,
 943                 USB_VENDOR_REQUEST_OUT, 0x00, USB_MODE_FIRMWARE,
 944                 NULL, 0, REGISTER_TIMEOUT_FIRMWARE);
 945         if (status  < 0) {
 946                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 947                 return status;
 948         }
 949
 950         rt73usb_disable_led(rt2x00dev);
 951
 952         return 0;
 953 }
 954
 955 static void rt73usb_init_rxring(struct rt2x00_dev *rt2x00dev)
 956 {
 957         struct usb_device *usb_dev =
 958                 interface_to_usbdev(rt2x00dev_usb(rt2x00dev));
 959         unsigned int i;
 960
 961         for (i = 0; i < rt2x00dev->rx->stats.limit; i++) {
 962                 usb_fill_bulk_urb(
 963                         rt2x00dev->rx->entry[i].priv,
 964                         usb_dev,
 965                         usb_rcvbulkpipe(usb_dev, 1),
 966                         rt2x00dev->rx->entry[i].skb->data,
 967                         rt2x00dev->rx->entry[i].skb->len,
 968                         rt73usb_interrupt_rxdone,
 969                         &rt2x00dev->rx->entry[i]);
 970         }
 971
 972         rt2x00_ring_index_clear(rt2x00dev->rx);
 973 }
 974
 975 static void rt73usb_init_txring(struct rt2x00_dev *rt2x00dev,
 976         const int queue)
 977 {
 978         struct data_ring *ring = rt2x00_get_ring(rt2x00dev, queue);
 979         unsigned int i;
 980
 981         for (i = 0; i < ring->stats.limit; i++)
 982                 ring->entry[i].flags = 0;
 983
 984         rt2x00_ring_index_clear(ring);
 985 }
 986
 987 static int rt73usb_init_rings(struct rt2x00_dev *rt2x00dev)
 988 {
 989         rt73usb_init_rxring(rt2x00dev);
 990         rt73usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_DATA0);
 991         rt73usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_DATA1);
 992         rt73usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_DATA2);
 993         rt73usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_DATA3);
 994         rt73usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_DATA4);
 995         rt73usb_init_txring(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
 996
 997         return 0;
 998 }
 999
1000 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
1001 {
1002         u32 reg;
1003
1004         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
1005                 return -EBUSY;
1006
1007         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
1008
1009         rt73usb_register_write(rt2x00dev, TXRX_CSR0, 0x025eb032);
1010
1011         rt73usb_register_write(rt2x00dev, TXRX_CSR1, 0x9eaa9eaf);
1012         rt73usb_register_write(rt2x00dev, TXRX_CSR2, 0x8a8b8c8d);
1013         rt73usb_register_write(rt2x00dev, TXRX_CSR3, 0x00858687);
1014
1015         rt73usb_register_write(rt2x00dev, TXRX_CSR7, 0x2e31353b);
1016         rt73usb_register_write(rt2x00dev, TXRX_CSR8, 0x2a2a2a2c);
1017
1018         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
1019
1020         rt73usb_register_write(rt2x00dev, MAC_CSR6, 0x00000fff);
1021
1022         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
1023
1024         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1025         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1026         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1027
1028         reg = 0x000023b0;
1029         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1030             rt2x00_rf(&rt2x00dev->chip, RF2527))
1031                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1032         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1033
1034         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1035         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1036         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1037
1038         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1039         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1040         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1041         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1042
1043         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1044         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1045         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1046         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1047
1048         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1049         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1050         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1051
1052         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1053         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
1054         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1055
1056         /*
1057          * We must clear the error counters.
1058          * These registers are cleared on read,
1059          * so we may pass a useless variable to store the value.
1060          */
1061         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1062         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1063         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1064
1065         /*
1066          * Reset MAC and BBP registers.
1067          */
1068         reg = 0;
1069         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1070         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1071         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1072
1073         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1074         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1075         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1076         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1077
1078         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1079         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1080         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1081
1082         return 0;
1083 }
1084
1085 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1086 {
1087         unsigned int i;
1088         u16 eeprom;
1089         u8 reg_id;
1090         u8 value;
1091
1092         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1093                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1094                 if ((value != 0xff) && (value != 0x00))
1095                         goto continue_csr_init;
1096                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1097                 udelay(REGISTER_BUSY_DELAY);
1098         }
1099
1100         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1101         return -EACCES;
1102
1103 continue_csr_init:
1104         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1105         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1106         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
1107         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1108         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1109         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1110         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1111         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1112         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1113         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1114         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1115         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1116         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1117         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1118         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1119         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1120         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1121         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1122         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1123         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1124         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1125         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1126         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1127         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1128         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1129         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1130
1131         DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
1132         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1133                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1134
1135                 if (eeprom != 0xffff && eeprom != 0x0000) {
1136                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1137                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1138                         DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
1139                                 reg_id, value);
1140                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1141                 }
1142         }
1143         DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
1144
1145         return 0;
1146 }
1147
1148 /*
1149  * Device state switch handlers.
1150  */
1151 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1152         enum dev_state state)
1153 {
1154         u32 reg;
1155
1156         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1157         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1158                 state == STATE_RADIO_RX_OFF);
1159         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1160 }
1161
1162 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1163 {
1164         /*
1165          * Initialize all registers.
1166          */
1167         if (rt73usb_init_rings(rt2x00dev) ||
1168             rt73usb_init_registers(rt2x00dev) ||
1169             rt73usb_init_bbp(rt2x00dev)) {
1170                 ERROR(rt2x00dev, "Register initialization failed.\n");
1171                 return -EIO;
1172         }
1173
1174         rt2x00usb_enable_radio(rt2x00dev);
1175
1176         /*
1177          * Enable LED
1178          */
1179         rt73usb_enable_led(rt2x00dev);
1180
1181         return 0;
1182 }
1183
1184 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1185 {
1186         /*
1187          * Disable LED
1188          */
1189         rt73usb_disable_led(rt2x00dev);
1190
1191         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1192
1193         /*
1194          * Disable synchronisation.
1195          */
1196         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1197
1198         rt2x00usb_disable_radio(rt2x00dev);
1199 }
1200
1201 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev,
1202         enum dev_state state)
1203 {
1204         u32 reg;
1205         unsigned int i;
1206         char put_to_sleep;
1207         char current_state;
1208
1209         put_to_sleep = (state != STATE_AWAKE);
1210
1211         if (!put_to_sleep)
1212                 rt2x00usb_vendor_request(rt2x00dev,
1213                         USB_DEVICE_MODE, USB_VENDOR_REQUEST_OUT,
1214                         0x00, USB_MODE_WAKEUP, NULL, 0, REGISTER_TIMEOUT);
1215
1216         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1217         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1218         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1219         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1220
1221         if (put_to_sleep)
1222                 rt2x00usb_vendor_request(rt2x00dev,
1223                         USB_DEVICE_MODE, USB_VENDOR_REQUEST_OUT,
1224                         0x00, USB_MODE_SLEEP, NULL, 0, REGISTER_TIMEOUT);
1225
1226         /*
1227          * Device is not guaranteed to be in the requested state yet.
1228          * We must wait until the register indicates that the
1229          * device has entered the correct state.
1230          */
1231         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1232                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1233                 current_state = rt2x00_get_field32(reg,
1234                         MAC_CSR12_BBP_CURRENT_STATE);
1235                 if (current_state == !put_to_sleep)
1236                         return 0;
1237                 msleep(10);
1238         }
1239
1240         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1241                 "current device state %d.\n", !put_to_sleep, current_state);
1242
1243         return -EBUSY;
1244 }
1245
1246 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1247         enum dev_state state)
1248 {
1249         int retval = 0;
1250
1251         switch (state) {
1252                 case STATE_RADIO_ON:
1253                         retval = rt73usb_enable_radio(rt2x00dev);
1254                 break;
1255                 case STATE_RADIO_OFF:
1256                         rt73usb_disable_radio(rt2x00dev);
1257                 break;
1258                 case STATE_RADIO_RX_ON:
1259                 case STATE_RADIO_RX_OFF:
1260                         rt73usb_toggle_rx(rt2x00dev, state);
1261                 break;
1262                 case STATE_DEEP_SLEEP:
1263                 case STATE_SLEEP:
1264                 case STATE_STANDBY:
1265                 case STATE_AWAKE:
1266                         retval = rt73usb_set_state(rt2x00dev, state);
1267                 break;
1268                 default:
1269                         retval = -ENOTSUPP;
1270                 break;
1271         }
1272
1273         return retval;
1274 }
1275
1276 /*
1277  * TX descriptor initialization
1278  */
1279 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1280         struct data_entry *entry, struct data_desc *txd,
1281         struct data_entry_desc *desc, struct ieee80211_hdr *ieee80211hdr,
1282         unsigned int length, struct ieee80211_tx_control *control)
1283 {
1284         u32 word;
1285
1286         /*
1287          * Start writing the descriptor words.
1288          */
1289         rt2x00_desc_read(txd, 1, &word);
1290         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, desc->queue);
1291         rt2x00_set_field32(&word, TXD_W1_AIFSN, entry->ring->tx_params.aifs);
1292         rt2x00_set_field32(&word, TXD_W1_CWMIN, entry->ring->tx_params.cw_min);
1293         rt2x00_set_field32(&word, TXD_W1_CWMAX, entry->ring->tx_params.cw_max);
1294         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1295         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1296         rt2x00_desc_write(txd, 1, word);
1297
1298         rt2x00_desc_read(txd, 2, &word);
1299         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1300         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1301         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1302         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1303         rt2x00_desc_write(txd, 2, word);
1304
1305         rt2x00_desc_read(txd, 5, &word);
1306         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1307                 TXPOWER_TO_DEV(control->power_level));
1308         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1309         rt2x00_desc_write(txd, 5, word);
1310
1311         rt2x00_desc_read(txd, 0, &word);
1312         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1313         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1314                 test_bit(ENTRY_TXD_MORE_FRAG, &entry->flags));
1315         rt2x00_set_field32(&word, TXD_W0_ACK,
1316                 test_bit(ENTRY_TXD_REQ_ACK, &entry->flags));
1317         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1318                 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &entry->flags));
1319         rt2x00_set_field32(&word, TXD_W0_OFDM,
1320                 test_bit(ENTRY_TXD_OFDM_RATE, &entry->flags));
1321         rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1322         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE, 0);
1323         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1324         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1325         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1326         rt2x00_desc_write(txd, 0, word);
1327 }
1328
1329 /*
1330  * TX data initialization
1331  */
1332 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev, int queue)
1333 {
1334         u32 reg;
1335
1336         if (queue != IEEE80211_TX_QUEUE_BEACON)
1337                 return;
1338
1339         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1340         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1341                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1342                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1343         }
1344 }
1345
1346 /*
1347  * Interrupt functions.
1348  */
1349 static void rt73usb_interrupt_rxdone(struct urb *urb)
1350 {
1351         struct data_entry *entry = (struct data_entry*)urb->context;
1352         struct data_ring *ring = entry->ring;
1353         struct rt2x00_dev *rt2x00dev = ring->rt2x00dev;
1354         struct data_desc *rxd = (struct data_desc*)entry->skb->data;
1355         u32 word0;
1356         u32 word1;
1357         int signal;
1358         int rssi;
1359         int ofdm;
1360         u16 size;
1361
1362         if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags) ||
1363             !__test_and_clear_bit(ENTRY_OWNER_NIC, &entry->flags))
1364                 return;
1365
1366         /*
1367          * Check if the received data is simply too small
1368          * to be actually valid, or if the urb is signaling
1369          * a problem.
1370          */
1371         if (urb->actual_length < entry->ring->desc_size || urb->status)
1372                 goto skip_entry;
1373
1374         rt2x00_desc_read(rxd, 0, &word0);
1375         rt2x00_desc_read(rxd, 1, &word1);
1376
1377         /*
1378          * TODO: Don't we need to keep statistics
1379          * updated about events like CRC and physical errors?
1380          */
1381         if (rt2x00_get_field32(word0, RXD_W0_CRC) ||
1382             rt2x00_get_field32(word0, RXD_W0_CIPHER_ERROR))
1383                 goto skip_entry;
1384
1385         /*
1386          * Obtain the status about this packet.
1387          */
1388         size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1389         signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1390         rssi = rt2x00_get_field32(word1, RXD_W1_RSSI);
1391         ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1392
1393         /*
1394          * Trim the skb_buffer to only contain the valid
1395          * frame data (so ignore the device's descriptor).
1396          */
1397         skb_pull(entry->skb, ring->desc_size);
1398         skb_trim(entry->skb, size);
1399
1400         /*
1401          * Send the packet to upper layer, and update urb.
1402          */
1403         rt2x00lib_rxdone(entry, NULL, ring->data_size + ring->desc_size,
1404                 signal, rssi, ofdm);
1405         urb->transfer_buffer = entry->skb->data;
1406         urb->transfer_buffer_length = entry->skb->len;
1407
1408 skip_entry:
1409         if (test_bit(DEVICE_ENABLED_RADIO, &ring->rt2x00dev->flags)) {
1410                 __set_bit(ENTRY_OWNER_NIC, &entry->flags);
1411                 usb_submit_urb(urb, GFP_ATOMIC);
1412         }
1413
1414         rt2x00_ring_index_inc(ring);
1415 }
1416
1417 /*
1418  * Device initialization functions.
1419  */
1420 static int rt73usb_alloc_eeprom(struct rt2x00_dev *rt2x00dev)
1421 {
1422         u16 word;
1423
1424         /*
1425          * Allocate the eeprom memory, check the eeprom width
1426          * and copy the entire eeprom into this allocated memory.
1427          */
1428         rt2x00dev->eeprom = kzalloc(EEPROM_SIZE, GFP_KERNEL);
1429         if (!rt2x00dev->eeprom)
1430                 return -ENOMEM;
1431
1432         rt2x00usb_vendor_request(
1433                 rt2x00dev, USB_EEPROM_READ, USB_VENDOR_REQUEST_IN,
1434                 EEPROM_BASE, 0x00, rt2x00dev->eeprom, EEPROM_SIZE,
1435                 REGISTER_TIMEOUT * (EEPROM_SIZE / sizeof(u16)));
1436
1437         /*
1438          * Start validation of the data that has been read.
1439          */
1440         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1441         if (word == 0xffff) {
1442                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1443                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT, 2);
1444                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT, 2);
1445                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1446                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1447                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1448                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1449                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1450                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1451         }
1452
1453         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1454         if (word == 0xffff) {
1455                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1456                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1457                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1458         }
1459
1460         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1461         if (word == 0xffff) {
1462                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1463                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1464                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1465                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1466                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1467                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1468                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1469                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1470                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1471                         LED_MODE_DEFAULT);
1472                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1473                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1474         }
1475
1476         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1477         if (word == 0xffff) {
1478                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1479                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1480                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1481                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1482         }
1483
1484         return 0;
1485 }
1486
1487 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1488 {
1489         u32 reg;
1490         u16 value;
1491         u16 eeprom;
1492
1493         /*
1494          * Read EEPROM word for configuration.
1495          */
1496         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1497
1498         /*
1499          * Identify RF chipset.
1500          */
1501         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1502         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1503         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1504
1505         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1506             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1507             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1508             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1509                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1510                 return -ENODEV;
1511         }
1512
1513         /*
1514          * Identify default antenna configuration.
1515          */
1516         rt2x00dev->hw->conf.antenna_sel_tx = rt2x00_get_field16(eeprom,
1517                 EEPROM_ANTENNA_TX_DEFAULT);
1518         rt2x00dev->hw->conf.antenna_sel_rx = rt2x00_get_field16(eeprom,
1519                 EEPROM_ANTENNA_RX_DEFAULT);
1520
1521         /*
1522          * Read the Frame type.
1523          */
1524         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1525                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1526
1527         /*
1528          * Read frequency offset.
1529          */
1530         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1531         rt2x00dev->freq_offset =
1532                 rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1533
1534         /*
1535          * Read external LNA informations.
1536          */
1537         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1538
1539         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA))
1540                 __set_bit(CONFIG_EXTERNAL_LNA, &rt2x00dev->flags);
1541
1542         /*
1543          * Store led settings, for correct led behaviour.
1544          */
1545         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1546
1547         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LED_MODE,
1548                 rt2x00dev->led_mode);
1549         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_0,
1550                 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_GPIO_0));
1551         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_1,
1552                 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_GPIO_1));
1553         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_2,
1554                 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_GPIO_2));
1555         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_3,
1556                 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_GPIO_3));
1557         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_4,
1558                 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_GPIO_4));
1559         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_ACT,
1560                 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1561         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_BG,
1562                 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_RDY_G));
1563         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_A,
1564                 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_RDY_A));
1565
1566         return 0;
1567 }
1568
1569 static const struct {
1570         unsigned int chip;
1571         u32 val[3];
1572 } rf_vals[] = {
1573         { RF5226,       { 0x00002c0c, 0x00068255 } },
1574         { RF2528,       { 0x00002c0c, 0x00068255 } },
1575         { RF5225,       { 0x00002ccc, 0x00000000 } },
1576         { RF2527,       { 0x00002ccc, 0x00068455 } },
1577 };
1578
1579 /*
1580  * RF value list for RF5226, RF2528, RF5225 & RF2527
1581  * Supports: 2.4 GHz
1582  */
1583 static const u32 rf_vals_bg[] = {
1584         0x00000786, 0x00000786, 0x0000078a, 0x0000078a, 0x0000078e,
1585         0x0000078e, 0x00000792, 0x00000792, 0x00000796, 0x00000796,
1586         0x0000079a, 0x0000079a, 0x0000079e, 0x000007a2
1587 };
1588
1589 /*
1590  * RF value list for RF5226 & RF5225 (supplement to vals_bg)
1591  * Supports: 5.2 GHz
1592  */
1593 static const u32 rf_vals_a_5x[] = {
1594         0x0000099a, 0x000009a2, 0x000009a6, 0x000009aa, 0x000009ae,
1595         0x000009b2, 0x000009ba, 0x000009be, 0x00000a2a, 0x00000a2e,
1596         0x00000a32, 0x00000a36, 0x00000a3a, 0x00000a82, 0x00000a86,
1597         0x00000a8a, 0x00000a8e, 0x00000a92, 0x00000a9a, 0x00000aa2,
1598         0x00000aa6, 0x00000aae, 0x00000ab2, 0x00000ab6
1599 };
1600
1601 static void rt73usb_init_hw_mode(struct rt2x00_dev *rt2x00dev)
1602 {
1603         struct hw_mode_spec *spec = &rt2x00dev->spec;
1604         u8 *txpower;
1605         unsigned int i;
1606
1607         /*
1608          * Initialize all hw fields.
1609          */
1610         rt2x00dev->hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1611                 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1612                 IEEE80211_HW_WEP_INCLUDE_IV |
1613                 IEEE80211_HW_DATA_NULLFUNC_ACK |
1614                 IEEE80211_HW_NO_TKIP_WMM_HWACCEL |
1615                 IEEE80211_HW_MONITOR_DURING_OPER;
1616         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1617         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1618         rt2x00dev->hw->max_noise = MAX_RX_NOISE;
1619         rt2x00dev->hw->queues = 5;
1620
1621         /*
1622          * Set device specific, but channel independent RF values.
1623          */
1624         for (i = 0; i < ARRAY_SIZE(rf_vals); i++) {
1625                 if (rt2x00_rf(&rt2x00dev->chip, rf_vals[i].chip)) {
1626                         rt2x00dev->rf1 = rf_vals[i].val[0];
1627                         rt2x00dev->rf3 = rf_vals[i].val[1];
1628                 }
1629         }
1630
1631         /*
1632          * Convert tx_power array in eeprom.
1633          */
1634         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1635         for (i = 0; i < 14; i++)
1636                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1637
1638         /*
1639          * Initialize hw_mode information.
1640          */
1641         spec->mac_addr = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1642         spec->num_modes = 2;
1643         spec->num_rates = 12;
1644         spec->num_channels = 14;
1645         spec->tx_power_a = NULL;
1646         spec->tx_power_bg = txpower;
1647         spec->tx_power_default = DEFAULT_TXPOWER;
1648         spec->chan_val_a = NULL;
1649         spec->chan_val_bg = rf_vals_bg;
1650
1651         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1652             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1653                 spec->num_modes = 3;
1654                 spec->num_channels += 24;
1655
1656                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1657                 for (i = 0; i < 14; i++)
1658                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1659
1660                 spec->tx_power_a = txpower;
1661                 spec->chan_val_a = rf_vals_a_5x;
1662         }
1663 }
1664
1665 static int rt73usb_init_hw(struct rt2x00_dev *rt2x00dev)
1666 {
1667         int retval;
1668
1669         /*
1670          * Allocate eeprom data.
1671          */
1672         retval = rt73usb_alloc_eeprom(rt2x00dev);
1673         if (retval)
1674                 return retval;
1675
1676         retval = rt73usb_init_eeprom(rt2x00dev);
1677         if (retval)
1678                 return retval;
1679
1680         /*
1681          * Initialize hw specifications.
1682          */
1683         rt73usb_init_hw_mode(rt2x00dev);
1684
1685         /*
1686          * rt73usb requires firmware
1687          */
1688         __set_bit(FIRMWARE_REQUIRED, &rt2x00dev->flags);
1689
1690         return 0;
1691 }
1692
1693 /*
1694  * IEEE80211 stack callback functions.
1695  */
1696 static int rt73usb_get_stats(struct ieee80211_hw *hw,
1697         struct ieee80211_low_level_stats *stats)
1698 {
1699         struct rt2x00_dev *rt2x00dev = hw->priv;
1700         u32 reg;
1701
1702         /*
1703          * Update FCS error count from register.
1704          * The dot11ACKFailureCount, dot11RTSFailureCount and
1705          * dot11RTSSuccessCount are updated in interrupt time.
1706          */
1707         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1708         rt2x00dev->low_level_stats.dot11FCSErrorCount +=
1709                 rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
1710
1711         memcpy(stats, &rt2x00dev->low_level_stats, sizeof(*stats));
1712
1713         return 0;
1714 }
1715
1716 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1717         u32 short_retry, u32 long_retry)
1718 {
1719         struct rt2x00_dev *rt2x00dev = hw->priv;
1720         u32 reg;
1721
1722         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1723         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1724         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1725         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1726
1727         return 0;
1728 }
1729
1730 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1731 {
1732         struct rt2x00_dev *rt2x00dev = hw->priv;
1733         u64 tsf;
1734         u32 reg;
1735
1736         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1737         tsf = (u64)rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1738         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1739         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1740
1741         return tsf;
1742 }
1743
1744 static void rt73usb_reset_tsf(struct ieee80211_hw *hw)
1745 {
1746         struct rt2x00_dev *rt2x00dev = hw->priv;
1747
1748         rt73usb_register_write(rt2x00dev, TXRX_CSR12, 0);
1749         rt73usb_register_write(rt2x00dev, TXRX_CSR13, 0);
1750 }
1751
1752 static const struct ieee80211_ops rt73usb_mac80211_ops = {
1753         .tx                     = rt2x00lib_tx,
1754         .reset                  = rt2x00lib_reset,
1755         .open                   = rt2x00lib_open,
1756         .stop                   = rt2x00lib_stop,
1757         .add_interface          = rt2x00lib_add_interface,
1758         .remove_interface       = rt2x00lib_remove_interface,
1759         .config                 = rt2x00lib_config,
1760         .config_interface       = rt2x00lib_config_interface,
1761         .set_multicast_list     = rt2x00lib_set_multicast_list,
1762         .get_stats              = rt73usb_get_stats,
1763         .set_retry_limit        = rt73usb_set_retry_limit,
1764         .conf_tx                = rt2x00lib_conf_tx,
1765         .get_tx_stats           = rt2x00lib_get_tx_stats,
1766         .get_tsf                = rt73usb_get_tsf,
1767         .reset_tsf              = rt73usb_reset_tsf,
1768         .beacon_update          = rt2x00usb_beacon_update,
1769 };
1770
1771 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
1772         .init_hw                = rt73usb_init_hw,
1773         .get_fw_name            = rt73usb_get_fw_name,
1774         .load_firmware          = rt73usb_load_firmware,
1775         .initialize             = rt2x00usb_initialize,
1776         .uninitialize           = rt2x00usb_uninitialize,
1777         .set_device_state       = rt73usb_set_device_state,
1778         .link_tuner             = rt73usb_link_tuner,
1779         .write_tx_desc          = rt73usb_write_tx_desc,
1780         .write_tx_data          = rt2x00usb_write_tx_data,
1781         .kick_tx_queue          = rt73usb_kick_tx_queue,
1782         .config_type            = rt73usb_config_type,
1783         .config_phymode         = rt73usb_config_phymode,
1784         .config_channel         = rt73usb_config_channel,
1785         .config_mac_addr        = rt73usb_config_mac_addr,
1786         .config_bssid           = rt73usb_config_bssid,
1787         .config_promisc         = rt73usb_config_promisc,
1788         .config_txpower         = rt73usb_config_txpower,
1789         .config_antenna         = rt73usb_config_antenna,
1790         .config_duration        = rt73usb_config_duration,
1791 };
1792
1793 static const struct rt2x00_ops rt73usb_ops = {
1794         .name   = DRV_NAME,
1795         .rxd_size = RXD_DESC_SIZE,
1796         .txd_size = TXD_DESC_SIZE,
1797         .lib    = &rt73usb_rt2x00_ops,
1798         .hw     = &rt73usb_mac80211_ops,
1799 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
1800         .debugfs = &rt73usb_rt2x00debug,
1801 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
1802 };
1803
1804 /*
1805  * rt73usb module information.
1806  */
1807 static struct usb_device_id rt73usb_device_table[] = {
1808         /* AboCom */
1809         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
1810         /* Askey */
1811         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
1812         /* ASUS */
1813         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
1814         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
1815         /* Belkin */
1816         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
1817         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
1818         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
1819         /* Billionton */
1820         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
1821         /* CNet */
1822         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
1823         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
1824         /* Conceptronic */
1825         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
1826         /* D-Link */
1827         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
1828         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
1829         /* Gemtek */
1830         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
1831         /* Gigabyte */
1832         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
1833         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
1834         /* Huawei-3Com */
1835         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
1836         /* Hercules */
1837         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
1838         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
1839         /* Linksys */
1840         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
1841         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
1842         /* MSI */
1843         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
1844         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
1845         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
1846         /* Ralink */
1847         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
1848         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
1849         /* Qcom */
1850         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
1851         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
1852         /* Sitecom */
1853         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
1854         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
1855         /* Surecom */
1856         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
1857         /* Planex */
1858         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
1859         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
1860         { 0, }
1861 };
1862
1863 MODULE_AUTHOR(DRV_PROJECT);
1864 MODULE_VERSION(DRV_VERSION);
1865 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
1866 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
1867 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
1868 MODULE_FIRMWARE(FIRMWARE_RT2571);
1869 MODULE_LICENSE("GPL");
1870
1871 static struct usb_driver rt73usb_driver = {
1872         .name           = DRV_NAME,
1873         .id_table       = rt73usb_device_table,
1874         .probe          = rt2x00usb_probe,
1875         .disconnect     = rt2x00usb_disconnect,
1876 #ifdef CONFIG_PM
1877         .suspend        = rt2x00usb_suspend,
1878         .resume         = rt2x00usb_resume,
1879 #endif /* CONFIG_PM */
1880 };
1881
1882 static int __init rt73usb_init(void)
1883 {
1884         printk(KERN_INFO "Loading module: %s - %s by %s.\n",
1885                 DRV_NAME, DRV_VERSION, DRV_PROJECT);
1886         return usb_register(&rt73usb_driver);
1887 }
1888
1889 static void __exit rt73usb_exit(void)
1890 {
1891         printk(KERN_INFO "Unloading module: %s.\n", DRV_NAME);
1892         usb_deregister(&rt73usb_driver);
1893 }
1894
1895 module_init(rt73usb_init);
1896 module_exit(rt73usb_exit);