package/madwifi/patches/354-ifxmips_eeprom.patch

   1 Index: madwifi-trunk-r3314/ath_hal/ah_os.c
   2 ===================================================================
   3 --- madwifi-trunk-r3314.orig/ath_hal/ah_os.c    2008-07-06 02:42:52.000000000 +0200
   4 +++ madwifi-trunk-r3314/ath_hal/ah_os.c 2008-07-06 02:51:53.000000000 +0200
   5 @@ -343,6 +343,46 @@
   6   * NB: see the comments in ah_osdep.h about byte-swapping register
   7   *     reads and writes to understand what's going on below.
   8   */
   9 +
  10 +#ifdef CONFIG_IFXMIPS
  11 +extern int ifxmips_has_brn_block(void);
  12 +static int ifxmips_emulate = 0;
  13 +#define EEPROM_EMULATION 1
  14 +#endif
  15 +
  16 +#ifdef EEPROM_EMULATION
  17 +static int ath_hal_eeprom(struct ath_hal *ah, unsigned long addr, int val, int write)
  18 +{
  19 +       static int addrsel = 0;
  20 +       static int rc = 0;
  21 +
  22 +       if (write) {
  23 +               if(addr == 0x6000) {
  24 +                       addrsel = val * 2;
  25 +                       rc = 0;
  26 +               }
  27 +       } else {
  28 +               switch(addr)
  29 +               {
  30 +               case 0x600c:
  31 +                       if(rc++ < 2)
  32 +                               val = 0x00000000;
  33 +                       else
  34 +                               val = 0x00000002;
  35 +                       break;
  36 +               case 0x6004:
  37 +                       val = cpu_to_le16(__raw_readw((u16 *) KSEG1ADDR(0xb07f0400 + addrsel)));
  38 +                       /* this forces the regdomain to 0x00 (worldwide), as the original setting
  39 +                        * causes issues with the HAL */
  40 +                       if (addrsel == 0x17e)
  41 +                               val = 0;
  42 +                       break;
  43 +               }
  44 +       }
  45 +       return val;
  46 +}
  47 +#endif
  48 +
  49  void __ahdecl
  50  ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val)
  51  {
  52 @@ -351,20 +391,33 @@
  53                 ath_hal_printf(ah, "%s: WRITE 0x%x <= 0x%x\n",
  54                                 (ath_hal_func ?: "unknown"), reg, val);
  55  #endif
  56 -       _OS_REG_WRITE(ah, reg, val);
  57 +#ifdef EEPROM_EMULATION
  58 +       if((reg >= 0x6000) && (reg <= 0x6010) && ifxmips_emulate)
  59 +       {
  60 +               val = ath_hal_eeprom(ah, reg, val, 1);
  61 +       } else
  62 +#endif
  63 +               _OS_REG_WRITE(ah, reg, val);
  64  }
  65  EXPORT_SYMBOL(ath_hal_reg_write);
  66
  67 +
  68  /* This should only be called while holding the lock, sc->sc_hal_lock. */
  69  u_int32_t __ahdecl
  70  ath_hal_reg_read(struct ath_hal *ah, u_int reg)
  71  {
  72 -       u_int32_t val;
  73 +       u_int32_t val;
  74 +#ifdef EEPROM_EMULATION
  75 +       if((reg >= 0x6000) && (reg <= 0x6010) && ifxmips_emulate)
  76 +       {
  77 +               val = ath_hal_eeprom(ah, reg, 0, 0);
  78 +       } else
  79 +#endif
  80 +               val = _OS_REG_READ(ah, reg);
  81
  82 -       val = _OS_REG_READ(ah, reg);
  83  #ifdef AH_DEBUG
  84         if (ath_hal_debug > 1)
  85 -               ath_hal_printf(ah, "%s: READ 0x%x => 0x%x\n",
  86 +               ath_hal_printf(ah, "%s: READ 0x%x => 0x%x\n",
  87                                 (ath_hal_func ?: "unknown"), reg, val);
  88  #endif
  89         return val;
  90 @@ -581,7 +634,9 @@
  91  {
  92         const char *sep;
  93         int i;
  94 -
  95 +#ifdef CONFIG_IFXMIPS
  96 +       ifxmips_emulate = ifxmips_has_brn_block();
  97 +#endif
  98         printk(KERN_INFO "%s: %s (", dev_info, ath_hal_version);
  99         sep = "";
 100         for (i = 0; ath_hal_buildopts[i] != NULL; i++) {