ath9k: remove a lock to fix a deadlock on hw reset
[openwrt.git] / package / mac80211 / patches / 300-pending_work.patch
1 --- a/net/mac80211/agg-rx.c
2 +++ b/net/mac80211/agg-rx.c
3 @@ -203,6 +203,8 @@ static void ieee80211_send_addba_resp(st
4                 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
5         else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
6                 memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
7 +       else if (sdata->vif.type == NL80211_IFTYPE_WDS)
8 +               memcpy(mgmt->bssid, da, ETH_ALEN);
9  
10         mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
11                                           IEEE80211_STYPE_ACTION);
12 --- a/net/mac80211/agg-tx.c
13 +++ b/net/mac80211/agg-tx.c
14 @@ -81,7 +81,8 @@ static void ieee80211_send_addba_request
15         memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
16         if (sdata->vif.type == NL80211_IFTYPE_AP ||
17             sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
18 -           sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
19 +           sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
20 +           sdata->vif.type == NL80211_IFTYPE_WDS)
21                 memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
22         else if (sdata->vif.type == NL80211_IFTYPE_STATION)
23                 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
24 @@ -520,6 +521,7 @@ int ieee80211_start_tx_ba_session(struct
25             sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
26             sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
27             sdata->vif.type != NL80211_IFTYPE_AP &&
28 +           sdata->vif.type != NL80211_IFTYPE_WDS &&
29             sdata->vif.type != NL80211_IFTYPE_ADHOC)
30                 return -EINVAL;
31  
32 --- a/net/mac80211/debugfs_sta.c
33 +++ b/net/mac80211/debugfs_sta.c
34 @@ -65,11 +65,11 @@ static ssize_t sta_flags_read(struct fil
35         test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
36  
37         int res = scnprintf(buf, sizeof(buf),
38 -                           "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
39 +                           "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
40                             TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
41                             TEST(PS_DRIVER), TEST(AUTHORIZED),
42                             TEST(SHORT_PREAMBLE),
43 -                           TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
44 +                           TEST(WME), TEST(CLEAR_PS_FILT),
45                             TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
46                             TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
47                             TEST(TDLS_PEER_AUTH), TEST(4ADDR_EVENT),
48 --- a/net/mac80211/iface.c
49 +++ b/net/mac80211/iface.c
50 @@ -501,7 +501,6 @@ int ieee80211_do_open(struct wireless_de
51         struct ieee80211_sub_if_data *sdata = IEEE80211_WDEV_TO_SUB_IF(wdev);
52         struct net_device *dev = wdev->netdev;
53         struct ieee80211_local *local = sdata->local;
54 -       struct sta_info *sta;
55         u32 changed = 0;
56         int res;
57         u32 hw_reconf_flags = 0;
58 @@ -658,30 +657,8 @@ int ieee80211_do_open(struct wireless_de
59  
60         set_bit(SDATA_STATE_RUNNING, &sdata->state);
61  
62 -       if (sdata->vif.type == NL80211_IFTYPE_WDS) {
63 -               /* Create STA entry for the WDS peer */
64 -               sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
65 -                                    GFP_KERNEL);
66 -               if (!sta) {
67 -                       res = -ENOMEM;
68 -                       goto err_del_interface;
69 -               }
70 -
71 -               sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
72 -               sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
73 -               sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
74 -
75 -               res = sta_info_insert(sta);
76 -               if (res) {
77 -                       /* STA has been freed */
78 -                       goto err_del_interface;
79 -               }
80 -
81 -               rate_control_rate_init(sta);
82 -               netif_carrier_on(dev);
83 -       } else if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE) {
84 +       if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE)
85                 rcu_assign_pointer(local->p2p_sdata, sdata);
86 -       }
87  
88         /*
89          * set_multicast_list will be invoked by the networking core
90 @@ -1066,6 +1043,72 @@ static void ieee80211_if_setup(struct ne
91         dev->destructor = free_netdev;
92  }
93  
94 +static void ieee80211_wds_rx_queued_mgmt(struct ieee80211_sub_if_data *sdata,
95 +                                        struct sk_buff *skb)
96 +{
97 +       struct ieee80211_local *local = sdata->local;
98 +       struct ieee80211_rx_status *rx_status;
99 +       struct ieee802_11_elems elems;
100 +       struct ieee80211_mgmt *mgmt;
101 +       struct sta_info *sta;
102 +       size_t baselen;
103 +       u32 rates = 0;
104 +       u16 stype;
105 +       bool new = false;
106 +       enum ieee80211_band band = local->hw.conf.channel->band;
107 +       struct ieee80211_supported_band *sband = local->hw.wiphy->bands[band];
108 +
109 +       rx_status = IEEE80211_SKB_RXCB(skb);
110 +       mgmt = (struct ieee80211_mgmt *) skb->data;
111 +       stype = le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_STYPE;
112 +
113 +       if (stype != IEEE80211_STYPE_BEACON)
114 +               return;
115 +
116 +       baselen = (u8 *) mgmt->u.probe_resp.variable - (u8 *) mgmt;
117 +       if (baselen > skb->len)
118 +               return;
119 +
120 +       ieee802_11_parse_elems(mgmt->u.probe_resp.variable,
121 +                              skb->len - baselen, &elems);
122 +
123 +       rates = ieee80211_sta_get_rates(local, &elems, band, NULL);
124 +
125 +       rcu_read_lock();
126 +
127 +       sta = sta_info_get(sdata, sdata->u.wds.remote_addr);
128 +
129 +       if (!sta) {
130 +               rcu_read_unlock();
131 +               sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
132 +                                    GFP_KERNEL);
133 +               if (!sta)
134 +                       return;
135 +
136 +               new = true;
137 +       }
138 +
139 +       sta->last_rx = jiffies;
140 +       sta->sta.supp_rates[local->hw.conf.channel->band] = rates;
141 +
142 +       if (elems.ht_cap_elem)
143 +               ieee80211_ht_cap_ie_to_sta_ht_cap(sdata, sband,
144 +                               elems.ht_cap_elem, &sta->sta.ht_cap);
145 +
146 +       if (elems.wmm_param)
147 +               set_sta_flag(sta, WLAN_STA_WME);
148 +
149 +       if (new) {
150 +               sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
151 +               sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
152 +               sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
153 +               rate_control_rate_init(sta);
154 +               sta_info_insert_rcu(sta);
155 +       }
156 +
157 +       rcu_read_unlock();
158 +}
159 +
160  static void ieee80211_iface_work(struct work_struct *work)
161  {
162         struct ieee80211_sub_if_data *sdata =
163 @@ -1170,6 +1213,9 @@ static void ieee80211_iface_work(struct 
164                                 break;
165                         ieee80211_mesh_rx_queued_mgmt(sdata, skb);
166                         break;
167 +               case NL80211_IFTYPE_WDS:
168 +                       ieee80211_wds_rx_queued_mgmt(sdata, skb);
169 +                       break;
170                 default:
171                         WARN(1, "frame for unexpected interface type");
172                         break;
173 --- a/net/mac80211/rx.c
174 +++ b/net/mac80211/rx.c
175 @@ -2350,6 +2350,7 @@ ieee80211_rx_h_action(struct ieee80211_r
176                     sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
177                     sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
178                     sdata->vif.type != NL80211_IFTYPE_AP &&
179 +                   sdata->vif.type != NL80211_IFTYPE_WDS &&
180                     sdata->vif.type != NL80211_IFTYPE_ADHOC)
181                         break;
182  
183 @@ -2655,14 +2656,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
184  
185         if (!ieee80211_vif_is_mesh(&sdata->vif) &&
186             sdata->vif.type != NL80211_IFTYPE_ADHOC &&
187 -           sdata->vif.type != NL80211_IFTYPE_STATION)
188 +           sdata->vif.type != NL80211_IFTYPE_STATION &&
189 +           sdata->vif.type != NL80211_IFTYPE_WDS)
190                 return RX_DROP_MONITOR;
191  
192         switch (stype) {
193         case cpu_to_le16(IEEE80211_STYPE_AUTH):
194         case cpu_to_le16(IEEE80211_STYPE_BEACON):
195         case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
196 -               /* process for all: mesh, mlme, ibss */
197 +               /* process for all: mesh, mlme, ibss, wds */
198                 break;
199         case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
200         case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
201 @@ -2987,10 +2989,16 @@ static int prepare_for_handlers(struct i
202                 }
203                 break;
204         case NL80211_IFTYPE_WDS:
205 -               if (bssid || !ieee80211_is_data(hdr->frame_control))
206 -                       return 0;
207                 if (!ether_addr_equal(sdata->u.wds.remote_addr, hdr->addr2))
208                         return 0;
209 +
210 +               if (ieee80211_is_data(hdr->frame_control) ||
211 +                   ieee80211_is_action(hdr->frame_control)) {
212 +                       if (compare_ether_addr(sdata->vif.addr, hdr->addr1))
213 +                               return 0;
214 +               } else if (!ieee80211_is_beacon(hdr->frame_control))
215 +                       return 0;
216 +
217                 break;
218         case NL80211_IFTYPE_P2P_DEVICE:
219                 if (!ieee80211_is_public_action(hdr, skb->len) &&
220 --- a/net/mac80211/sta_info.h
221 +++ b/net/mac80211/sta_info.h
222 @@ -32,7 +32,6 @@
223   * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
224   *     frames.
225   * @WLAN_STA_WME: Station is a QoS-STA.
226 - * @WLAN_STA_WDS: Station is one of our WDS peers.
227   * @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
228   *     IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
229   *     frame to this station is transmitted.
230 @@ -64,7 +63,6 @@ enum ieee80211_sta_info_flags {
231         WLAN_STA_AUTHORIZED,
232         WLAN_STA_SHORT_PREAMBLE,
233         WLAN_STA_WME,
234 -       WLAN_STA_WDS,
235         WLAN_STA_CLEAR_PS_FILT,
236         WLAN_STA_MFP,
237         WLAN_STA_BLOCK_BA,
238 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
239 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
240 @@ -314,7 +314,6 @@ struct ath_rx {
241         u32 *rxlink;
242         u32 num_pkts;
243         unsigned int rxfilter;
244 -       spinlock_t rxbuflock;
245         struct list_head rxbuf;
246         struct ath_descdma rxdma;
247         struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
248 @@ -324,7 +323,6 @@ struct ath_rx {
249  
250  int ath_startrecv(struct ath_softc *sc);
251  bool ath_stoprecv(struct ath_softc *sc);
252 -void ath_flushrecv(struct ath_softc *sc);
253  u32 ath_calcrxfilter(struct ath_softc *sc);
254  int ath_rx_init(struct ath_softc *sc, int nbufs);
255  void ath_rx_cleanup(struct ath_softc *sc);
256 @@ -641,7 +639,6 @@ void ath_ant_comb_update(struct ath_soft
257  enum sc_op_flags {
258         SC_OP_INVALID,
259         SC_OP_BEACONS,
260 -       SC_OP_RXFLUSH,
261         SC_OP_ANI_RUN,
262         SC_OP_PRIM_STA_VIF,
263         SC_OP_HW_RESET,
264 --- a/drivers/net/wireless/ath/ath9k/beacon.c
265 +++ b/drivers/net/wireless/ath/ath9k/beacon.c
266 @@ -147,6 +147,7 @@ static struct ath_buf *ath9k_beacon_gene
267                                  skb->len, DMA_TO_DEVICE);
268                 dev_kfree_skb_any(skb);
269                 bf->bf_buf_addr = 0;
270 +               bf->bf_mpdu = NULL;
271         }
272  
273         skb = ieee80211_beacon_get(hw, vif);
274 @@ -359,7 +360,6 @@ void ath9k_beacon_tasklet(unsigned long 
275                 return;
276  
277         bf = ath9k_beacon_generate(sc->hw, vif);
278 -       WARN_ON(!bf);
279  
280         if (sc->beacon.bmisscnt != 0) {
281                 ath_dbg(common, BSTUCK, "resume beacon xmit after %u misses\n",
282 --- a/drivers/net/wireless/ath/ath9k/debug.c
283 +++ b/drivers/net/wireless/ath/ath9k/debug.c
284 @@ -861,7 +861,6 @@ static ssize_t read_file_recv(struct fil
285         RXS_ERR("RX-LENGTH-ERR", rx_len_err);
286         RXS_ERR("RX-OOM-ERR", rx_oom_err);
287         RXS_ERR("RX-RATE-ERR", rx_rate_err);
288 -       RXS_ERR("RX-DROP-RXFLUSH", rx_drop_rxflush);
289         RXS_ERR("RX-TOO-MANY-FRAGS", rx_too_many_frags_err);
290  
291         PHY_ERR("UNDERRUN ERR", ATH9K_PHYERR_UNDERRUN);
292 --- a/drivers/net/wireless/ath/ath9k/debug.h
293 +++ b/drivers/net/wireless/ath/ath9k/debug.h
294 @@ -216,7 +216,6 @@ struct ath_tx_stats {
295   * @rx_oom_err:  No. of frames dropped due to OOM issues.
296   * @rx_rate_err:  No. of frames dropped due to rate errors.
297   * @rx_too_many_frags_err:  Frames dropped due to too-many-frags received.
298 - * @rx_drop_rxflush: No. of frames dropped due to RX-FLUSH.
299   * @rx_beacons:  No. of beacons received.
300   * @rx_frags:  No. of rx-fragements received.
301   */
302 @@ -235,7 +234,6 @@ struct ath_rx_stats {
303         u32 rx_oom_err;
304         u32 rx_rate_err;
305         u32 rx_too_many_frags_err;
306 -       u32 rx_drop_rxflush;
307         u32 rx_beacons;
308         u32 rx_frags;
309  };
310 --- a/drivers/net/wireless/ath/ath9k/main.c
311 +++ b/drivers/net/wireless/ath/ath9k/main.c
312 @@ -182,7 +182,7 @@ static void ath_restart_work(struct ath_
313         ath_start_ani(sc);
314  }
315  
316 -static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
317 +static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx)
318  {
319         struct ath_hw *ah = sc->sc_ah;
320         bool ret = true;
321 @@ -196,19 +196,15 @@ static bool ath_prepare_reset(struct ath
322         ath9k_debug_samp_bb_mac(sc);
323         ath9k_hw_disable_interrupts(ah);
324  
325 +       tasklet_disable(&sc->intr_tq);
326 +
327         if (!ath_stoprecv(sc))
328                 ret = false;
329  
330         if (!ath_drain_all_txq(sc, retry_tx))
331                 ret = false;
332  
333 -       if (!flush) {
334 -               if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
335 -                       ath_rx_tasklet(sc, 1, true);
336 -               ath_rx_tasklet(sc, 1, false);
337 -       } else {
338 -               ath_flushrecv(sc);
339 -       }
340 +       tasklet_enable(&sc->intr_tq);
341  
342         return ret;
343  }
344 @@ -262,7 +258,6 @@ static int ath_reset_internal(struct ath
345         struct ath_common *common = ath9k_hw_common(ah);
346         struct ath9k_hw_cal_data *caldata = NULL;
347         bool fastcc = true;
348 -       bool flush = false;
349         int r;
350  
351         __ath_cancel_work(sc);
352 @@ -276,11 +271,10 @@ static int ath_reset_internal(struct ath
353  
354         if (!hchan) {
355                 fastcc = false;
356 -               flush = true;
357                 hchan = ah->curchan;
358         }
359  
360 -       if (!ath_prepare_reset(sc, retry_tx, flush))
361 +       if (!ath_prepare_reset(sc, retry_tx))
362                 fastcc = false;
363  
364         ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
365 @@ -804,7 +798,7 @@ static void ath9k_stop(struct ieee80211_
366                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
367         }
368  
369 -       ath_prepare_reset(sc, false, true);
370 +       ath_prepare_reset(sc, false);
371  
372         if (sc->rx.frag) {
373                 dev_kfree_skb_any(sc->rx.frag);
374 --- a/drivers/net/wireless/ath/ath9k/recv.c
375 +++ b/drivers/net/wireless/ath/ath9k/recv.c
376 @@ -248,8 +248,6 @@ rx_init_fail:
377  
378  static void ath_edma_start_recv(struct ath_softc *sc)
379  {
380 -       spin_lock_bh(&sc->rx.rxbuflock);
381 -
382         ath9k_hw_rxena(sc->sc_ah);
383  
384         ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
385 @@ -261,8 +259,6 @@ static void ath_edma_start_recv(struct a
386         ath_opmode_init(sc);
387  
388         ath9k_hw_startpcureceive(sc->sc_ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
389 -
390 -       spin_unlock_bh(&sc->rx.rxbuflock);
391  }
392  
393  static void ath_edma_stop_recv(struct ath_softc *sc)
394 @@ -279,8 +275,6 @@ int ath_rx_init(struct ath_softc *sc, in
395         int error = 0;
396  
397         spin_lock_init(&sc->sc_pcu_lock);
398 -       spin_lock_init(&sc->rx.rxbuflock);
399 -       clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
400  
401         common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
402                              sc->sc_ah->caps.rx_status_len;
403 @@ -438,7 +432,6 @@ int ath_startrecv(struct ath_softc *sc)
404                 return 0;
405         }
406  
407 -       spin_lock_bh(&sc->rx.rxbuflock);
408         if (list_empty(&sc->rx.rxbuf))
409                 goto start_recv;
410  
411 @@ -459,26 +452,31 @@ start_recv:
412         ath_opmode_init(sc);
413         ath9k_hw_startpcureceive(ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
414  
415 -       spin_unlock_bh(&sc->rx.rxbuflock);
416 -
417         return 0;
418  }
419  
420 +static void ath_flushrecv(struct ath_softc *sc)
421 +{
422 +       if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
423 +               ath_rx_tasklet(sc, 1, true);
424 +       ath_rx_tasklet(sc, 1, false);
425 +}
426 +
427  bool ath_stoprecv(struct ath_softc *sc)
428  {
429         struct ath_hw *ah = sc->sc_ah;
430         bool stopped, reset = false;
431  
432 -       spin_lock_bh(&sc->rx.rxbuflock);
433         ath9k_hw_abortpcurecv(ah);
434         ath9k_hw_setrxfilter(ah, 0);
435         stopped = ath9k_hw_stopdmarecv(ah, &reset);
436  
437 +       ath_flushrecv(sc);
438 +
439         if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
440                 ath_edma_stop_recv(sc);
441         else
442                 sc->rx.rxlink = NULL;
443 -       spin_unlock_bh(&sc->rx.rxbuflock);
444  
445         if (!(ah->ah_flags & AH_UNPLUGGED) &&
446             unlikely(!stopped)) {
447 @@ -490,15 +488,6 @@ bool ath_stoprecv(struct ath_softc *sc)
448         return stopped && !reset;
449  }
450  
451 -void ath_flushrecv(struct ath_softc *sc)
452 -{
453 -       set_bit(SC_OP_RXFLUSH, &sc->sc_flags);
454 -       if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
455 -               ath_rx_tasklet(sc, 1, true);
456 -       ath_rx_tasklet(sc, 1, false);
457 -       clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
458 -}
459 -
460  static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
461  {
462         /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
463 @@ -735,6 +724,7 @@ static struct ath_buf *ath_get_next_rx_b
464                         return NULL;
465         }
466  
467 +       list_del(&bf->list);
468         if (!bf->bf_mpdu)
469                 return bf;
470  
471 @@ -1050,16 +1040,12 @@ int ath_rx_tasklet(struct ath_softc *sc,
472                 dma_type = DMA_FROM_DEVICE;
473  
474         qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
475 -       spin_lock_bh(&sc->rx.rxbuflock);
476  
477         tsf = ath9k_hw_gettsf64(ah);
478         tsf_lower = tsf & 0xffffffff;
479  
480         do {
481                 bool decrypt_error = false;
482 -               /* If handling rx interrupt and flush is in progress => exit */
483 -               if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags) && (flush == 0))
484 -                       break;
485  
486                 memset(&rs, 0, sizeof(rs));
487                 if (edma)
488 @@ -1102,15 +1088,6 @@ int ath_rx_tasklet(struct ath_softc *sc,
489  
490                 ath_debug_stat_rx(sc, &rs);
491  
492 -               /*
493 -                * If we're asked to flush receive queue, directly
494 -                * chain it back at the queue without processing it.
495 -                */
496 -               if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags)) {
497 -                       RX_STAT_INC(rx_drop_rxflush);
498 -                       goto requeue_drop_frag;
499 -               }
500 -
501                 memset(rxs, 0, sizeof(struct ieee80211_rx_status));
502  
503                 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
504 @@ -1245,19 +1222,18 @@ requeue_drop_frag:
505                         sc->rx.frag = NULL;
506                 }
507  requeue:
508 +               list_add_tail(&bf->list, &sc->rx.rxbuf);
509 +               if (flush)
510 +                       continue;
511 +
512                 if (edma) {
513 -                       list_add_tail(&bf->list, &sc->rx.rxbuf);
514                         ath_rx_edma_buf_link(sc, qtype);
515                 } else {
516 -                       list_move_tail(&bf->list, &sc->rx.rxbuf);
517                         ath_rx_buf_link(sc, bf);
518 -                       if (!flush)
519 -                               ath9k_hw_rxena(ah);
520 +                       ath9k_hw_rxena(ah);
521                 }
522         } while (1);
523  
524 -       spin_unlock_bh(&sc->rx.rxbuflock);
525 -
526         if (!(ah->imask & ATH9K_INT_RXEOL)) {
527                 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
528                 ath9k_hw_set_interrupts(ah);
529 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
530 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
531 @@ -4586,14 +4586,14 @@ static int ar9003_hw_cal_pier_get(struct
532         return 0;
533  }
534  
535 -static int ar9003_hw_power_control_override(struct ath_hw *ah,
536 -                                           int frequency,
537 -                                           int *correction,
538 -                                           int *voltage, int *temperature)
539 +static void ar9003_hw_power_control_override(struct ath_hw *ah,
540 +                                            int frequency,
541 +                                            int *correction,
542 +                                            int *voltage, int *temperature)
543  {
544 -       int tempSlope = 0;
545 +       int temp_slope = 0, temp_slope1 = 0, temp_slope2 = 0;
546         struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
547 -       int f[8], t[8], i;
548 +       int f[8], t[8], t1[3], t2[3], i;
549  
550         REG_RMW(ah, AR_PHY_TPC_11_B0,
551                 (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
552 @@ -4624,38 +4624,108 @@ static int ar9003_hw_power_control_overr
553          * enable temperature compensation
554          * Need to use register names
555          */
556 -       if (frequency < 4000)
557 -               tempSlope = eep->modalHeader2G.tempSlope;
558 -       else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
559 -               for (i = 0; i < 8; i++) {
560 -                       t[i] = eep->base_ext1.tempslopextension[i];
561 -                       f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
562 -               }
563 -               tempSlope = ar9003_hw_power_interpolate((s32) frequency,
564 -                                                       f, t, 8);
565 -       } else if (eep->base_ext2.tempSlopeLow != 0) {
566 -               t[0] = eep->base_ext2.tempSlopeLow;
567 -               f[0] = 5180;
568 -               t[1] = eep->modalHeader5G.tempSlope;
569 -               f[1] = 5500;
570 -               t[2] = eep->base_ext2.tempSlopeHigh;
571 -               f[2] = 5785;
572 -               tempSlope = ar9003_hw_power_interpolate((s32) frequency,
573 -                                                       f, t, 3);
574 -       } else
575 -               tempSlope = eep->modalHeader5G.tempSlope;
576 +       if (frequency < 4000) {
577 +               temp_slope = eep->modalHeader2G.tempSlope;
578 +       } else {
579 +               if (AR_SREV_9550(ah)) {
580 +                       t[0] = eep->base_ext1.tempslopextension[2];
581 +                       t1[0] = eep->base_ext1.tempslopextension[3];
582 +                       t2[0] = eep->base_ext1.tempslopextension[4];
583 +                       f[0] = 5180;
584 +
585 +                       t[1] = eep->modalHeader5G.tempSlope;
586 +                       t1[1] = eep->base_ext1.tempslopextension[0];
587 +                       t2[1] = eep->base_ext1.tempslopextension[1];
588 +                       f[1] = 5500;
589 +
590 +                       t[2] = eep->base_ext1.tempslopextension[5];
591 +                       t1[2] = eep->base_ext1.tempslopextension[6];
592 +                       t2[2] = eep->base_ext1.tempslopextension[7];
593 +                       f[2] = 5785;
594 +
595 +                       temp_slope = ar9003_hw_power_interpolate(frequency,
596 +                                                                f, t, 3);
597 +                       temp_slope1 = ar9003_hw_power_interpolate(frequency,
598 +                                                                  f, t1, 3);
599 +                       temp_slope2 = ar9003_hw_power_interpolate(frequency,
600 +                                                                  f, t2, 3);
601 +
602 +                       goto tempslope;
603 +               }
604 +
605 +               if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
606 +                       for (i = 0; i < 8; i++) {
607 +                               t[i] = eep->base_ext1.tempslopextension[i];
608 +                               f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
609 +                       }
610 +                       temp_slope = ar9003_hw_power_interpolate((s32) frequency,
611 +                                                                f, t, 8);
612 +               } else if (eep->base_ext2.tempSlopeLow != 0) {
613 +                       t[0] = eep->base_ext2.tempSlopeLow;
614 +                       f[0] = 5180;
615 +                       t[1] = eep->modalHeader5G.tempSlope;
616 +                       f[1] = 5500;
617 +                       t[2] = eep->base_ext2.tempSlopeHigh;
618 +                       f[2] = 5785;
619 +                       temp_slope = ar9003_hw_power_interpolate((s32) frequency,
620 +                                                                f, t, 3);
621 +               } else {
622 +                       temp_slope = eep->modalHeader5G.tempSlope;
623 +               }
624 +       }
625  
626 -       REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
627 +tempslope:
628 +       if (AR_SREV_9550(ah)) {
629 +               /*
630 +                * AR955x has tempSlope register for each chain.
631 +                * Check whether temp_compensation feature is enabled or not.
632 +                */
633 +               if (eep->baseEepHeader.featureEnable & 0x1) {
634 +                       if (frequency < 4000) {
635 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19,
636 +                                             AR_PHY_TPC_19_ALPHA_THERM,
637 +                                             eep->base_ext2.tempSlopeLow);
638 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
639 +                                             AR_PHY_TPC_19_ALPHA_THERM,
640 +                                             temp_slope);
641 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
642 +                                             AR_PHY_TPC_19_ALPHA_THERM,
643 +                                             eep->base_ext2.tempSlopeHigh);
644 +                       } else {
645 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19,
646 +                                             AR_PHY_TPC_19_ALPHA_THERM,
647 +                                             temp_slope);
648 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
649 +                                             AR_PHY_TPC_19_ALPHA_THERM,
650 +                                             temp_slope1);
651 +                               REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
652 +                                             AR_PHY_TPC_19_ALPHA_THERM,
653 +                                             temp_slope2);
654 +                       }
655 +               } else {
656 +                       /*
657 +                        * If temp compensation is not enabled,
658 +                        * set all registers to 0.
659 +                        */
660 +                       REG_RMW_FIELD(ah, AR_PHY_TPC_19,
661 +                                     AR_PHY_TPC_19_ALPHA_THERM, 0);
662 +                       REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
663 +                                     AR_PHY_TPC_19_ALPHA_THERM, 0);
664 +                       REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
665 +                                     AR_PHY_TPC_19_ALPHA_THERM, 0);
666 +               }
667 +       } else {
668 +               REG_RMW_FIELD(ah, AR_PHY_TPC_19,
669 +                             AR_PHY_TPC_19_ALPHA_THERM, temp_slope);
670 +       }
671  
672         if (AR_SREV_9462_20(ah))
673                 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
674 -                             AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);
675 +                             AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope);
676  
677  
678         REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,
679                       temperature[0]);
680 -
681 -       return 0;
682  }
683  
684  /* Apply the recorded correction values. */
685 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
686 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
687 @@ -68,7 +68,7 @@ static const int m2ThreshExt_off = 127;
688  static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
689  {
690         u16 bMode, fracMode = 0, aModeRefSel = 0;
691 -       u32 freq, channelSel = 0, reg32 = 0;
692 +       u32 freq, chan_frac, div, channelSel = 0, reg32 = 0;
693         struct chan_centers centers;
694         int loadSynthChannel;
695  
696 @@ -77,9 +77,6 @@ static int ar9003_hw_set_channel(struct 
697  
698         if (freq < 4800) {     /* 2 GHz, fractional mode */
699                 if (AR_SREV_9330(ah)) {
700 -                       u32 chan_frac;
701 -                       u32 div;
702 -
703                         if (ah->is_clk_25mhz)
704                                 div = 75;
705                         else
706 @@ -89,34 +86,40 @@ static int ar9003_hw_set_channel(struct 
707                         chan_frac = (((freq * 4) % div) * 0x20000) / div;
708                         channelSel = (channelSel << 17) | chan_frac;
709                 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
710 -                       u32 chan_frac;
711 -
712                         /*
713 -                        * freq_ref = 40 / (refdiva >> amoderefsel); where refdiva=1 and amoderefsel=0
714 +                        * freq_ref = 40 / (refdiva >> amoderefsel);
715 +                        * where refdiva=1 and amoderefsel=0
716                          * ndiv = ((chan_mhz * 4) / 3) / freq_ref;
717                          * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
718                          */
719                         channelSel = (freq * 4) / 120;
720                         chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
721                         channelSel = (channelSel << 17) | chan_frac;
722 -               } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
723 +               } else if (AR_SREV_9340(ah)) {
724                         if (ah->is_clk_25mhz) {
725 -                               u32 chan_frac;
726 -
727                                 channelSel = (freq * 2) / 75;
728                                 chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
729                                 channelSel = (channelSel << 17) | chan_frac;
730 -                       } else
731 +                       } else {
732                                 channelSel = CHANSEL_2G(freq) >> 1;
733 -               } else
734 +                       }
735 +               } else if (AR_SREV_9550(ah)) {
736 +                       if (ah->is_clk_25mhz)
737 +                               div = 75;
738 +                       else
739 +                               div = 120;
740 +
741 +                       channelSel = (freq * 4) / div;
742 +                       chan_frac = (((freq * 4) % div) * 0x20000) / div;
743 +                       channelSel = (channelSel << 17) | chan_frac;
744 +               } else {
745                         channelSel = CHANSEL_2G(freq);
746 +               }
747                 /* Set to 2G mode */
748                 bMode = 1;
749         } else {
750                 if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) &&
751                     ah->is_clk_25mhz) {
752 -                       u32 chan_frac;
753 -
754                         channelSel = freq / 75;
755                         chan_frac = ((freq % 75) * 0x20000) / 75;
756                         channelSel = (channelSel << 17) | chan_frac;
757 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
758 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
759 @@ -1028,7 +1028,7 @@
760  #define AR_PHY_TPC_5_B2          (AR_SM2_BASE + 0x208)
761  #define AR_PHY_TPC_6_B2          (AR_SM2_BASE + 0x20c)
762  #define AR_PHY_TPC_11_B2         (AR_SM2_BASE + 0x220)
763 -#define AR_PHY_PDADC_TAB_2       (AR_SM2_BASE + 0x240)
764 +#define AR_PHY_TPC_19_B2         (AR_SM2_BASE + 0x240)
765  #define AR_PHY_TX_IQCAL_STATUS_B2   (AR_SM2_BASE + 0x48c)
766  #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i)    (AR_SM2_BASE + 0x450 + ((_i) << 2))
767  
768 --- a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
769 +++ b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
770 @@ -23,16 +23,16 @@
771  static const u32 ar955x_1p0_radio_postamble[][5] = {
772         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
773         {0x00016098, 0xd2dd5554, 0xd2dd5554, 0xd28b3330, 0xd28b3330},
774 -       {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x06345f2a, 0x06345f2a},
775 -       {0x000160ac, 0xa4647c00, 0xa4647c00, 0xa4646800, 0xa4646800},
776 -       {0x000160b0, 0x01885f52, 0x01885f52, 0x04accf3a, 0x04accf3a},
777 -       {0x00016104, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
778 +       {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a},
779 +       {0x000160ac, 0xa4647c00, 0xa4647c00, 0x24647c00, 0x24647c00},
780 +       {0x000160b0, 0x01885f52, 0x01885f52, 0x01885f52, 0x01885f52},
781 +       {0x00016104, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
782         {0x0001610c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
783         {0x00016140, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
784 -       {0x00016504, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
785 +       {0x00016504, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
786         {0x0001650c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
787         {0x00016540, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
788 -       {0x00016904, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
789 +       {0x00016904, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
790         {0x0001690c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
791         {0x00016940, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
792  };
793 @@ -69,15 +69,15 @@ static const u32 ar955x_1p0_baseband_pos
794         {0x0000a204, 0x005c0ec0, 0x005c0ec4, 0x005c0ec4, 0x005c0ec0},
795         {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
796         {0x0000a22c, 0x07e26a2f, 0x07e26a2f, 0x01026a2f, 0x01026a2f},
797 -       {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
798 +       {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
799         {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
800         {0x0000a238, 0xffb01018, 0xffb01018, 0xffb01018, 0xffb01018},
801         {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
802         {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
803         {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
804 -       {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
805 +       {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01010e0e, 0x01010e0e},
806         {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
807 -       {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
808 +       {0x0000a264, 0x00000e0e, 0x00000e0e, 0x01000e0e, 0x01000e0e},
809         {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
810         {0x0000a284, 0x00000000, 0x00000000, 0x00000010, 0x00000010},
811         {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
812 @@ -125,7 +125,7 @@ static const u32 ar955x_1p0_radio_core[]
813         {0x00016094, 0x00000000},
814         {0x000160a0, 0x0a108ffe},
815         {0x000160a4, 0x812fc370},
816 -       {0x000160a8, 0x423c8000},
817 +       {0x000160a8, 0x423c8100},
818         {0x000160b4, 0x92480080},
819         {0x000160c0, 0x006db6d0},
820         {0x000160c4, 0x6db6db60},
821 @@ -134,7 +134,7 @@ static const u32 ar955x_1p0_radio_core[]
822         {0x00016100, 0x11999601},
823         {0x00016108, 0x00080010},
824         {0x00016144, 0x02084080},
825 -       {0x00016148, 0x000080c0},
826 +       {0x00016148, 0x00008040},
827         {0x00016280, 0x01800804},
828         {0x00016284, 0x00038dc5},
829         {0x00016288, 0x00000000},
830 @@ -178,7 +178,7 @@ static const u32 ar955x_1p0_radio_core[]
831         {0x00016500, 0x11999601},
832         {0x00016508, 0x00080010},
833         {0x00016544, 0x02084080},
834 -       {0x00016548, 0x000080c0},
835 +       {0x00016548, 0x00008040},
836         {0x00016780, 0x00000000},
837         {0x00016784, 0x00000000},
838         {0x00016788, 0x00400705},
839 @@ -218,7 +218,7 @@ static const u32 ar955x_1p0_radio_core[]
840         {0x00016900, 0x11999601},
841         {0x00016908, 0x00080010},
842         {0x00016944, 0x02084080},
843 -       {0x00016948, 0x000080c0},
844 +       {0x00016948, 0x00008040},
845         {0x00016b80, 0x00000000},
846         {0x00016b84, 0x00000000},
847         {0x00016b88, 0x00400705},
848 @@ -245,9 +245,9 @@ static const u32 ar955x_1p0_radio_core[]
849  
850  static const u32 ar955x_1p0_modes_xpa_tx_gain_table[][9] = {
851         /* Addr      5G_HT20_L   5G_HT40_L   5G_HT20_M   5G_HT40_M   5G_HT20_H   5G_HT40_H   2G_HT40     2G_HT20  */
852 -       {0x0000a2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
853 -       {0x0000a2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
854 -       {0x0000a2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
855 +       {0x0000a2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
856 +       {0x0000a2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
857 +       {0x0000a2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
858         {0x0000a2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
859         {0x0000a410, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050da, 0x000050da},
860         {0x0000a500, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000000, 0x00000000},
861 @@ -256,63 +256,63 @@ static const u32 ar955x_1p0_modes_xpa_tx
862         {0x0000a50c, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c000006, 0x0c000006},
863         {0x0000a510, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x0f00000a, 0x0f00000a},
864         {0x0000a514, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x1300000c, 0x1300000c},
865 -       {0x0000a518, 0x19004008, 0x19004008, 0x19004008, 0x19004008, 0x18004008, 0x18004008, 0x1700000e, 0x1700000e},
866 -       {0x0000a51c, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1c00400a, 0x1c00400a, 0x1b000064, 0x1b000064},
867 -       {0x0000a520, 0x230020a2, 0x230020a2, 0x210020a2, 0x210020a2, 0x200020a2, 0x200020a2, 0x1f000242, 0x1f000242},
868 -       {0x0000a524, 0x2500006e, 0x2500006e, 0x2500006e, 0x2500006e, 0x2400006e, 0x2400006e, 0x23000229, 0x23000229},
869 -       {0x0000a528, 0x29022221, 0x29022221, 0x28022221, 0x28022221, 0x27022221, 0x27022221, 0x270002a2, 0x270002a2},
870 -       {0x0000a52c, 0x2d00062a, 0x2d00062a, 0x2c00062a, 0x2c00062a, 0x2a00062a, 0x2a00062a, 0x2c001203, 0x2c001203},
871 -       {0x0000a530, 0x340220a5, 0x340220a5, 0x320220a5, 0x320220a5, 0x2f0220a5, 0x2f0220a5, 0x30001803, 0x30001803},
872 -       {0x0000a534, 0x380022c5, 0x380022c5, 0x350022c5, 0x350022c5, 0x320022c5, 0x320022c5, 0x33000881, 0x33000881},
873 -       {0x0000a538, 0x3b002486, 0x3b002486, 0x39002486, 0x39002486, 0x36002486, 0x36002486, 0x38001809, 0x38001809},
874 -       {0x0000a53c, 0x3f00248a, 0x3f00248a, 0x3d00248a, 0x3d00248a, 0x3a00248a, 0x3a00248a, 0x3a000814, 0x3a000814},
875 -       {0x0000a540, 0x4202242c, 0x4202242c, 0x4102242c, 0x4102242c, 0x3f02242c, 0x3f02242c, 0x3f001a0c, 0x3f001a0c},
876 -       {0x0000a544, 0x490044c6, 0x490044c6, 0x460044c6, 0x460044c6, 0x420044c6, 0x420044c6, 0x43001a0e, 0x43001a0e},
877 -       {0x0000a548, 0x4d024485, 0x4d024485, 0x4a024485, 0x4a024485, 0x46024485, 0x46024485, 0x46001812, 0x46001812},
878 -       {0x0000a54c, 0x51044483, 0x51044483, 0x4e044483, 0x4e044483, 0x4a044483, 0x4a044483, 0x49001884, 0x49001884},
879 -       {0x0000a550, 0x5404a40c, 0x5404a40c, 0x5204a40c, 0x5204a40c, 0x4d04a40c, 0x4d04a40c, 0x4d001e84, 0x4d001e84},
880 -       {0x0000a554, 0x57024632, 0x57024632, 0x55024632, 0x55024632, 0x52024632, 0x52024632, 0x50001e69, 0x50001e69},
881 -       {0x0000a558, 0x5c00a634, 0x5c00a634, 0x5900a634, 0x5900a634, 0x5600a634, 0x5600a634, 0x550006f4, 0x550006f4},
882 -       {0x0000a55c, 0x5f026832, 0x5f026832, 0x5d026832, 0x5d026832, 0x5a026832, 0x5a026832, 0x59000ad3, 0x59000ad3},
883 -       {0x0000a560, 0x6602b012, 0x6602b012, 0x6202b012, 0x6202b012, 0x5d02b012, 0x5d02b012, 0x5e000ad5, 0x5e000ad5},
884 -       {0x0000a564, 0x6e02d0e1, 0x6e02d0e1, 0x6802d0e1, 0x6802d0e1, 0x6002d0e1, 0x6002d0e1, 0x61001ced, 0x61001ced},
885 -       {0x0000a568, 0x7202b4c4, 0x7202b4c4, 0x6c02b4c4, 0x6c02b4c4, 0x6502b4c4, 0x6502b4c4, 0x660018d4, 0x660018d4},
886 -       {0x0000a56c, 0x75007894, 0x75007894, 0x70007894, 0x70007894, 0x6b007894, 0x6b007894, 0x660018d4, 0x660018d4},
887 -       {0x0000a570, 0x7b025c74, 0x7b025c74, 0x75025c74, 0x75025c74, 0x70025c74, 0x70025c74, 0x660018d4, 0x660018d4},
888 -       {0x0000a574, 0x8300bcb5, 0x8300bcb5, 0x7a00bcb5, 0x7a00bcb5, 0x7600bcb5, 0x7600bcb5, 0x660018d4, 0x660018d4},
889 -       {0x0000a578, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
890 -       {0x0000a57c, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
891 +       {0x0000a518, 0x1700002b, 0x1700002b, 0x1700002b, 0x1700002b, 0x1600002b, 0x1600002b, 0x1700000e, 0x1700000e},
892 +       {0x0000a51c, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1a00002d, 0x1a00002d, 0x1b000064, 0x1b000064},
893 +       {0x0000a520, 0x20000031, 0x20000031, 0x1f000031, 0x1f000031, 0x1e000031, 0x1e000031, 0x1f000242, 0x1f000242},
894 +       {0x0000a524, 0x24000051, 0x24000051, 0x23000051, 0x23000051, 0x23000051, 0x23000051, 0x23000229, 0x23000229},
895 +       {0x0000a528, 0x27000071, 0x27000071, 0x27000071, 0x27000071, 0x26000071, 0x26000071, 0x270002a2, 0x270002a2},
896 +       {0x0000a52c, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2c001203, 0x2c001203},
897 +       {0x0000a530, 0x3000028c, 0x3000028c, 0x2f00028c, 0x2f00028c, 0x2e00028c, 0x2e00028c, 0x30001803, 0x30001803},
898 +       {0x0000a534, 0x34000290, 0x34000290, 0x33000290, 0x33000290, 0x32000290, 0x32000290, 0x33000881, 0x33000881},
899 +       {0x0000a538, 0x37000292, 0x37000292, 0x36000292, 0x36000292, 0x35000292, 0x35000292, 0x38001809, 0x38001809},
900 +       {0x0000a53c, 0x3b02028d, 0x3b02028d, 0x3a02028d, 0x3a02028d, 0x3902028d, 0x3902028d, 0x3a000814, 0x3a000814},
901 +       {0x0000a540, 0x3f020291, 0x3f020291, 0x3e020291, 0x3e020291, 0x3d020291, 0x3d020291, 0x3f001a0c, 0x3f001a0c},
902 +       {0x0000a544, 0x44020490, 0x44020490, 0x43020490, 0x43020490, 0x42020490, 0x42020490, 0x43001a0e, 0x43001a0e},
903 +       {0x0000a548, 0x48020492, 0x48020492, 0x47020492, 0x47020492, 0x46020492, 0x46020492, 0x46001812, 0x46001812},
904 +       {0x0000a54c, 0x4c020692, 0x4c020692, 0x4b020692, 0x4b020692, 0x4a020692, 0x4a020692, 0x49001884, 0x49001884},
905 +       {0x0000a550, 0x50020892, 0x50020892, 0x4f020892, 0x4f020892, 0x4e020892, 0x4e020892, 0x4d001e84, 0x4d001e84},
906 +       {0x0000a554, 0x53040891, 0x53040891, 0x53040891, 0x53040891, 0x52040891, 0x52040891, 0x50001e69, 0x50001e69},
907 +       {0x0000a558, 0x58040893, 0x58040893, 0x57040893, 0x57040893, 0x56040893, 0x56040893, 0x550006f4, 0x550006f4},
908 +       {0x0000a55c, 0x5c0408b4, 0x5c0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x59000ad3, 0x59000ad3},
909 +       {0x0000a560, 0x610408b6, 0x610408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e000ad5, 0x5e000ad5},
910 +       {0x0000a564, 0x670408f6, 0x670408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x61001ced, 0x61001ced},
911 +       {0x0000a568, 0x6a040cf6, 0x6a040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x660018d4, 0x660018d4},
912 +       {0x0000a56c, 0x6d040d76, 0x6d040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x660018d4, 0x660018d4},
913 +       {0x0000a570, 0x70060db6, 0x70060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x660018d4, 0x660018d4},
914 +       {0x0000a574, 0x730a0df6, 0x730a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x660018d4, 0x660018d4},
915 +       {0x0000a578, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
916 +       {0x0000a57c, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
917         {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
918         {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
919         {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
920 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x03804000, 0x03804000},
921 -       {0x0000a610, 0x04c08c01, 0x04c08c01, 0x04808b01, 0x04808b01, 0x04808a01, 0x04808a01, 0x0300ca02, 0x0300ca02},
922 -       {0x0000a614, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00000e04, 0x00000e04},
923 -       {0x0000a618, 0x04010c01, 0x04010c01, 0x03c10b01, 0x03c10b01, 0x03810a01, 0x03810a01, 0x03014000, 0x03014000},
924 -       {0x0000a61c, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x00000000, 0x00000000},
925 -       {0x0000a620, 0x04010303, 0x04010303, 0x03c10303, 0x03c10303, 0x03810303, 0x03810303, 0x00000000, 0x00000000},
926 -       {0x0000a624, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03014000, 0x03014000},
927 -       {0x0000a628, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x03804c05, 0x03804c05},
928 -       {0x0000a62c, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x0701de06, 0x0701de06},
929 -       {0x0000a630, 0x03418000, 0x03418000, 0x03018000, 0x03018000, 0x02c18000, 0x02c18000, 0x07819c07, 0x07819c07},
930 -       {0x0000a634, 0x03815004, 0x03815004, 0x03414f04, 0x03414f04, 0x03414e04, 0x03414e04, 0x0701dc07, 0x0701dc07},
931 -       {0x0000a638, 0x03005302, 0x03005302, 0x02c05202, 0x02c05202, 0x02805202, 0x02805202, 0x0701dc07, 0x0701dc07},
932 -       {0x0000a63c, 0x04c09302, 0x04c09302, 0x04809202, 0x04809202, 0x04809202, 0x04809202, 0x0701dc07, 0x0701dc07},
933 -       {0x0000b2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
934 -       {0x0000b2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
935 -       {0x0000b2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
936 +       {0x0000a60c, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x03804000, 0x03804000},
937 +       {0x0000a610, 0x04008b01, 0x04008b01, 0x04008b01, 0x04008b01, 0x03c08b01, 0x03c08b01, 0x0300ca02, 0x0300ca02},
938 +       {0x0000a614, 0x05811403, 0x05811403, 0x05411303, 0x05411303, 0x05411303, 0x05411303, 0x00000e04, 0x00000e04},
939 +       {0x0000a618, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
940 +       {0x0000a61c, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
941 +       {0x0000a620, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
942 +       {0x0000a624, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
943 +       {0x0000a628, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03804c05, 0x03804c05},
944 +       {0x0000a62c, 0x06815604, 0x06815604, 0x06415504, 0x06415504, 0x06015504, 0x06015504, 0x0701de06, 0x0701de06},
945 +       {0x0000a630, 0x07819a05, 0x07819a05, 0x07419905, 0x07419905, 0x07019805, 0x07019805, 0x07819c07, 0x07819c07},
946 +       {0x0000a634, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
947 +       {0x0000a638, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
948 +       {0x0000a63c, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
949 +       {0x0000b2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
950 +       {0x0000b2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
951 +       {0x0000b2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
952         {0x0000b2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
953 -       {0x0000c2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
954 -       {0x0000c2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
955 -       {0x0000c2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
956 +       {0x0000c2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
957 +       {0x0000c2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
958 +       {0x0000c2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
959         {0x0000c2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
960         {0x00016044, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
961 -       {0x00016048, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
962 +       {0x00016048, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
963         {0x00016280, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01808e84, 0x01808e84},
964         {0x00016444, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
965 -       {0x00016448, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
966 +       {0x00016448, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
967         {0x00016844, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
968 -       {0x00016848, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
969 +       {0x00016848, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
970  };
971  
972  static const u32 ar955x_1p0_mac_core[][2] = {
973 @@ -846,7 +846,7 @@ static const u32 ar955x_1p0_baseband_cor
974         {0x0000a44c, 0x00000001},
975         {0x0000a450, 0x00010000},
976         {0x0000a458, 0x00000000},
977 -       {0x0000a644, 0x3fad9d74},
978 +       {0x0000a644, 0xbfad9d74},
979         {0x0000a648, 0x0048060a},
980         {0x0000a64c, 0x00003c37},
981         {0x0000a670, 0x03020100},
982 @@ -1277,7 +1277,7 @@ static const u32 ar955x_1p0_modes_fast_c
983         {0x0000801c, 0x148ec02b, 0x148ec057},
984         {0x00008318, 0x000044c0, 0x00008980},
985         {0x00009e00, 0x0372131c, 0x0372131c},
986 -       {0x0000a230, 0x0000000b, 0x00000016},
987 +       {0x0000a230, 0x0000400b, 0x00004016},
988         {0x0000a254, 0x00000898, 0x00001130},
989  };
990  
991 --- a/drivers/net/wireless/ath/ath9k/htc_hst.c
992 +++ b/drivers/net/wireless/ath/ath9k/htc_hst.c
993 @@ -347,6 +347,8 @@ void ath9k_htc_txcompletion_cb(struct ht
994                         endpoint->ep_callbacks.tx(endpoint->ep_callbacks.priv,
995                                                   skb, htc_hdr->endpoint_id,
996                                                   txok);
997 +               } else {
998 +                       kfree_skb(skb);
999                 }
1000         }
1001  
1002 --- a/net/wireless/reg.c
1003 +++ b/net/wireless/reg.c
1004 @@ -142,8 +142,8 @@ static void rcu_free_regdom(const struct
1005  
1006  static struct regulatory_request *get_last_request(void)
1007  {
1008 -       return rcu_dereference_protected(last_request,
1009 -                                        lockdep_is_held(&reg_mutex));
1010 +       return rcu_dereference_check(last_request,
1011 +                                    lockdep_is_held(&reg_mutex));
1012  }
1013  
1014  /* Used to queue up regulatory hints */
1015 @@ -1125,7 +1125,9 @@ static bool is_ht40_allowed(struct ieee8
1016         if (chan->flags & IEEE80211_CHAN_DISABLED)
1017                 return false;
1018         /* This would happen when regulatory rules disallow HT40 completely */
1019 -       return !(chan->flags & IEEE80211_CHAN_NO_HT40);
1020 +       if ((chan->flags & IEEE80211_CHAN_NO_HT40) == IEEE80211_CHAN_NO_HT40)
1021 +               return false;
1022 +       return true;
1023  }
1024  
1025  static void reg_process_ht_flags_channel(struct wiphy *wiphy,
1026 @@ -1850,7 +1852,7 @@ static void restore_regulatory_settings(
1027         mutex_lock(&cfg80211_mutex);
1028         mutex_lock(&reg_mutex);
1029  
1030 -       reset_regdomains(true, cfg80211_world_regdom);
1031 +       reset_regdomains(true, &world_regdom);
1032         restore_alpha2(alpha2, reset_user);
1033  
1034         /*
1035 @@ -2251,14 +2253,21 @@ int set_regdom(const struct ieee80211_re
1036  
1037  int reg_device_uevent(struct device *dev, struct kobj_uevent_env *env)
1038  {
1039 -       struct regulatory_request *lr = get_last_request();
1040 +       struct regulatory_request *lr;
1041 +       u8 alpha2[2];
1042 +       bool add = false;
1043  
1044 +       rcu_read_lock();
1045 +       lr = get_last_request();
1046         if (lr && !lr->processed) {
1047 -               if (add_uevent_var(env, "COUNTRY=%c%c",
1048 -                                  lr->alpha2[0], lr->alpha2[1]))
1049 -                       return -ENOMEM;
1050 +               memcpy(alpha2, lr->alpha2, 2);
1051 +               add = true;
1052         }
1053 +       rcu_read_unlock();
1054  
1055 +       if (add)
1056 +               return add_uevent_var(env, "COUNTRY=%c%c",
1057 +                                     alpha2[0], alpha2[1]);
1058         return 0;
1059  }
1060  
1061 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
1062 +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
1063 @@ -967,7 +967,7 @@ static bool ar9003_hw_init_cal(struct at
1064         struct ath9k_hw_cal_data *caldata = ah->caldata;
1065         bool txiqcal_done = false, txclcal_done = false;
1066         bool is_reusable = true, status = true;
1067 -       bool run_rtt_cal = false, run_agc_cal;
1068 +       bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
1069         bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
1070         u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
1071                                           AR_PHY_AGC_CONTROL_FLTR_CAL   |
1072 @@ -1013,7 +1013,8 @@ static bool ar9003_hw_init_cal(struct at
1073                 }
1074         }
1075  
1076 -       if (!(ah->enabled_cals & TX_IQ_CAL))
1077 +       if ((IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) ||
1078 +           !(ah->enabled_cals & TX_IQ_CAL))
1079                 goto skip_tx_iqcal;
1080  
1081         /* Do Tx IQ Calibration */
1082 @@ -1033,21 +1034,22 @@ static bool ar9003_hw_init_cal(struct at
1083                         REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
1084                                     AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
1085                 txiqcal_done = run_agc_cal = true;
1086 -               goto skip_tx_iqcal;
1087 -       } else if (caldata && !caldata->done_txiqcal_once)
1088 +       } else if (caldata && !caldata->done_txiqcal_once) {
1089                 run_agc_cal = true;
1090 +               sep_iq_cal = true;
1091 +       }
1092  
1093 +skip_tx_iqcal:
1094         if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
1095                 ar9003_mci_init_cal_req(ah, &is_reusable);
1096  
1097 -       if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) {
1098 +       if (sep_iq_cal) {
1099                 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
1100                 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
1101                 udelay(5);
1102                 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
1103         }
1104  
1105 -skip_tx_iqcal:
1106         if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
1107                 /* Calibrate the AGC */
1108                 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
1109 --- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
1110 +++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
1111 @@ -744,6 +744,186 @@ static const u32 ar9300Modes_high_ob_db_
1112         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1113  };
1114  
1115 +static const u32 ar9300Modes_mixed_ob_db_tx_gain_table_2p2[][5] = {
1116 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1117 +       {0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
1118 +       {0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
1119 +       {0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
1120 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1121 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1122 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1123 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1124 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1125 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1126 +       {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
1127 +       {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
1128 +       {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402},
1129 +       {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
1130 +       {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000603, 0x1b000603},
1131 +       {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000a02, 0x1f000a02},
1132 +       {0x0000a528, 0x34022225, 0x34022225, 0x23000a04, 0x23000a04},
1133 +       {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x26000a20, 0x26000a20},
1134 +       {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2a000e20, 0x2a000e20},
1135 +       {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22},
1136 +       {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24},
1137 +       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640},
1138 +       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660},
1139 +       {0x0000a544, 0x52022470, 0x52022470, 0x3b001861, 0x3b001861},
1140 +       {0x0000a548, 0x55022490, 0x55022490, 0x3e001a81, 0x3e001a81},
1141 +       {0x0000a54c, 0x59022492, 0x59022492, 0x42001a83, 0x42001a83},
1142 +       {0x0000a550, 0x5d022692, 0x5d022692, 0x44001c84, 0x44001c84},
1143 +       {0x0000a554, 0x61022892, 0x61022892, 0x48001ce3, 0x48001ce3},
1144 +       {0x0000a558, 0x65024890, 0x65024890, 0x4c001ce5, 0x4c001ce5},
1145 +       {0x0000a55c, 0x69024892, 0x69024892, 0x50001ce9, 0x50001ce9},
1146 +       {0x0000a560, 0x6e024c92, 0x6e024c92, 0x54001ceb, 0x54001ceb},
1147 +       {0x0000a564, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1148 +       {0x0000a568, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1149 +       {0x0000a56c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1150 +       {0x0000a570, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1151 +       {0x0000a574, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1152 +       {0x0000a578, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1153 +       {0x0000a57c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1154 +       {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
1155 +       {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
1156 +       {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
1157 +       {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
1158 +       {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
1159 +       {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400},
1160 +       {0x0000a598, 0x21802220, 0x21802220, 0x15800402, 0x15800402},
1161 +       {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404},
1162 +       {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603},
1163 +       {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02},
1164 +       {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04},
1165 +       {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20},
1166 +       {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20},
1167 +       {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22},
1168 +       {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24},
1169 +       {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640},
1170 +       {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660},
1171 +       {0x0000a5c4, 0x52822470, 0x52822470, 0x3b801861, 0x3b801861},
1172 +       {0x0000a5c8, 0x55822490, 0x55822490, 0x3e801a81, 0x3e801a81},
1173 +       {0x0000a5cc, 0x59822492, 0x59822492, 0x42801a83, 0x42801a83},
1174 +       {0x0000a5d0, 0x5d822692, 0x5d822692, 0x44801c84, 0x44801c84},
1175 +       {0x0000a5d4, 0x61822892, 0x61822892, 0x48801ce3, 0x48801ce3},
1176 +       {0x0000a5d8, 0x65824890, 0x65824890, 0x4c801ce5, 0x4c801ce5},
1177 +       {0x0000a5dc, 0x69824892, 0x69824892, 0x50801ce9, 0x50801ce9},
1178 +       {0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x54801ceb, 0x54801ceb},
1179 +       {0x0000a5e4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1180 +       {0x0000a5e8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1181 +       {0x0000a5ec, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1182 +       {0x0000a5f0, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1183 +       {0x0000a5f4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1184 +       {0x0000a5f8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1185 +       {0x0000a5fc, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1186 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1187 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1188 +       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1189 +       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1190 +       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1191 +       {0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000},
1192 +       {0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501},
1193 +       {0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501},
1194 +       {0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03},
1195 +       {0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04},
1196 +       {0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04},
1197 +       {0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1198 +       {0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1199 +       {0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1200 +       {0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1201 +       {0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1202 +       {0x0000b2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
1203 +       {0x0000b2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
1204 +       {0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
1205 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1206 +       {0x0000c2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
1207 +       {0x0000c2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
1208 +       {0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
1209 +       {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1210 +       {0x00016044, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
1211 +       {0x00016048, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
1212 +       {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1213 +       {0x00016444, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
1214 +       {0x00016448, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
1215 +       {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1216 +       {0x00016844, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
1217 +       {0x00016848, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
1218 +       {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1219 +};
1220 +
1221 +static const u32 ar9300Modes_type5_tx_gain_table_2p2[][5] = {
1222 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1223 +       {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1224 +       {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1225 +       {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1226 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1227 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1228 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1229 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1230 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1231 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1232 +       {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
1233 +       {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
1234 +       {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
1235 +       {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
1236 +       {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
1237 +       {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
1238 +       {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
1239 +       {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
1240 +       {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
1241 +       {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
1242 +       {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
1243 +       {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
1244 +       {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
1245 +       {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
1246 +       {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
1247 +       {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
1248 +       {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
1249 +       {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
1250 +       {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
1251 +       {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
1252 +       {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
1253 +       {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1254 +       {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1255 +       {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1256 +       {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1257 +       {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1258 +       {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1259 +       {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1260 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1261 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1262 +       {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1263 +       {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1264 +       {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1265 +       {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
1266 +       {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
1267 +       {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
1268 +       {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
1269 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
1270 +       {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
1271 +       {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1272 +       {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1273 +       {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1274 +       {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1275 +       {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1276 +       {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1277 +       {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1278 +       {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1279 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1280 +       {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1281 +       {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1282 +       {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1283 +       {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1284 +       {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1285 +       {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
1286 +       {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1287 +       {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1288 +       {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
1289 +       {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1290 +       {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1291 +       {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
1292 +       {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1293 +};
1294 +
1295  static const u32 ar9300Common_rx_gain_table_2p2[][2] = {
1296         /* Addr      allmodes  */
1297         {0x0000a000, 0x00010000},
1298 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
1299 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
1300 @@ -507,28 +507,59 @@ static void ar9003_tx_gain_table_mode4(s
1301         else if (AR_SREV_9580(ah))
1302                 INIT_INI_ARRAY(&ah->iniModesTxGain,
1303                         ar9580_1p0_mixed_ob_db_tx_gain_table);
1304 +       else
1305 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1306 +                       ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
1307 +}
1308 +
1309 +static void ar9003_tx_gain_table_mode5(struct ath_hw *ah)
1310 +{
1311 +       if (AR_SREV_9485_11(ah))
1312 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1313 +                       ar9485Modes_green_ob_db_tx_gain_1_1);
1314 +       else if (AR_SREV_9340(ah))
1315 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1316 +                       ar9340Modes_ub124_tx_gain_table_1p0);
1317 +       else if (AR_SREV_9580(ah))
1318 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1319 +                       ar9580_1p0_type5_tx_gain_table);
1320 +       else if (AR_SREV_9300_22(ah))
1321 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1322 +                       ar9300Modes_type5_tx_gain_table_2p2);
1323 +}
1324 +
1325 +static void ar9003_tx_gain_table_mode6(struct ath_hw *ah)
1326 +{
1327 +       if (AR_SREV_9340(ah))
1328 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1329 +                       ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0);
1330 +       else if (AR_SREV_9485_11(ah))
1331 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1332 +                       ar9485Modes_green_spur_ob_db_tx_gain_1_1);
1333 +       else if (AR_SREV_9580(ah))
1334 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
1335 +                       ar9580_1p0_type6_tx_gain_table);
1336  }
1337  
1338 +typedef void (*ath_txgain_tab)(struct ath_hw *ah);
1339 +
1340  static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
1341  {
1342 -       switch (ar9003_hw_get_tx_gain_idx(ah)) {
1343 -       case 0:
1344 -       default:
1345 -               ar9003_tx_gain_table_mode0(ah);
1346 -               break;
1347 -       case 1:
1348 -               ar9003_tx_gain_table_mode1(ah);
1349 -               break;
1350 -       case 2:
1351 -               ar9003_tx_gain_table_mode2(ah);
1352 -               break;
1353 -       case 3:
1354 -               ar9003_tx_gain_table_mode3(ah);
1355 -               break;
1356 -       case 4:
1357 -               ar9003_tx_gain_table_mode4(ah);
1358 -               break;
1359 -       }
1360 +       static const ath_txgain_tab modes[] = {
1361 +               ar9003_tx_gain_table_mode0,
1362 +               ar9003_tx_gain_table_mode1,
1363 +               ar9003_tx_gain_table_mode2,
1364 +               ar9003_tx_gain_table_mode3,
1365 +               ar9003_tx_gain_table_mode4,
1366 +               ar9003_tx_gain_table_mode5,
1367 +               ar9003_tx_gain_table_mode6,
1368 +       };
1369 +       int idx = ar9003_hw_get_tx_gain_idx(ah);
1370 +
1371 +       if (idx >= ARRAY_SIZE(modes))
1372 +               idx = 0;
1373 +
1374 +       modes[idx](ah);
1375  }
1376  
1377  static void ar9003_rx_gain_table_mode0(struct ath_hw *ah)
1378 @@ -673,7 +704,7 @@ void ar9003_hw_attach_ops(struct ath_hw 
1379         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
1380         struct ath_hw_ops *ops = ath9k_hw_ops(ah);
1381  
1382 -       priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;
1383 +       ar9003_hw_init_mode_regs(ah);
1384         priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs;
1385  
1386         ops->config_pci_powersave = ar9003_hw_configpcipowersave;
1387 --- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
1388 +++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
1389 @@ -1172,6 +1172,106 @@ static const u32 ar9340Modes_mixed_ob_db
1390         {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
1391  };
1392  
1393 +static const u32 ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0[][5] = {
1394 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1395 +       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
1396 +       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
1397 +       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
1398 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
1399 +       {0x0000a394, 0x00000444, 0x00000444, 0x00000404, 0x00000404},
1400 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1401 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1402 +       {0x0000a504, 0x06000003, 0x06000003, 0x02000001, 0x02000001},
1403 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x05000003, 0x05000003},
1404 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0a000005, 0x0a000005},
1405 +       {0x0000a510, 0x16000220, 0x16000220, 0x0e000201, 0x0e000201},
1406 +       {0x0000a514, 0x1c000223, 0x1c000223, 0x11000203, 0x11000203},
1407 +       {0x0000a518, 0x21002220, 0x21002220, 0x14000401, 0x14000401},
1408 +       {0x0000a51c, 0x27002223, 0x27002223, 0x18000403, 0x18000403},
1409 +       {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000602, 0x1b000602},
1410 +       {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000802, 0x1f000802},
1411 +       {0x0000a528, 0x34022225, 0x34022225, 0x21000620, 0x21000620},
1412 +       {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x25000820, 0x25000820},
1413 +       {0x0000a530, 0x3e02222c, 0x3e02222c, 0x29000822, 0x29000822},
1414 +       {0x0000a534, 0x4202242a, 0x4202242a, 0x2d000824, 0x2d000824},
1415 +       {0x0000a538, 0x4702244a, 0x4702244a, 0x30000828, 0x30000828},
1416 +       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x3400082a, 0x3400082a},
1417 +       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38000849, 0x38000849},
1418 +       {0x0000a544, 0x5302266c, 0x5302266c, 0x3b000a2c, 0x3b000a2c},
1419 +       {0x0000a548, 0x5702286c, 0x5702286c, 0x3e000e2b, 0x3e000e2b},
1420 +       {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42000e2d, 0x42000e2d},
1421 +       {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4500124a, 0x4500124a},
1422 +       {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4900124c, 0x4900124c},
1423 +       {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c00126c, 0x4c00126c},
1424 +       {0x0000a55c, 0x7002708c, 0x7002708c, 0x4f00128c, 0x4f00128c},
1425 +       {0x0000a560, 0x7302b08a, 0x7302b08a, 0x52001290, 0x52001290},
1426 +       {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1427 +       {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1428 +       {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1429 +       {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1430 +       {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1431 +       {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1432 +       {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1433 +       {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
1434 +       {0x0000a584, 0x06800003, 0x06800003, 0x02800001, 0x02800001},
1435 +       {0x0000a588, 0x0a800020, 0x0a800020, 0x05800003, 0x05800003},
1436 +       {0x0000a58c, 0x10800023, 0x10800023, 0x0a800005, 0x0a800005},
1437 +       {0x0000a590, 0x16800220, 0x16800220, 0x0e800201, 0x0e800201},
1438 +       {0x0000a594, 0x1c800223, 0x1c800223, 0x11800203, 0x11800203},
1439 +       {0x0000a598, 0x21820220, 0x21820220, 0x14800401, 0x14800401},
1440 +       {0x0000a59c, 0x27820223, 0x27820223, 0x18800403, 0x18800403},
1441 +       {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800602, 0x1b800602},
1442 +       {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800802, 0x1f800802},
1443 +       {0x0000a5a8, 0x34822225, 0x34822225, 0x21800620, 0x21800620},
1444 +       {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x25800820, 0x25800820},
1445 +       {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x29800822, 0x29800822},
1446 +       {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2d800824, 0x2d800824},
1447 +       {0x0000a5b8, 0x4782244a, 0x4782244a, 0x30800828, 0x30800828},
1448 +       {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x3480082a, 0x3480082a},
1449 +       {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38800849, 0x38800849},
1450 +       {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b800a2c, 0x3b800a2c},
1451 +       {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e800e2b, 0x3e800e2b},
1452 +       {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x42800e2d, 0x42800e2d},
1453 +       {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4580124a, 0x4580124a},
1454 +       {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4980124c, 0x4980124c},
1455 +       {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x4c80126c, 0x4c80126c},
1456 +       {0x0000a5dc, 0x7086308c, 0x7086308c, 0x4f80128c, 0x4f80128c},
1457 +       {0x0000a5e0, 0x738a308a, 0x738a308a, 0x52801290, 0x52801290},
1458 +       {0x0000a5e4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1459 +       {0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1460 +       {0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1461 +       {0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1462 +       {0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1463 +       {0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1464 +       {0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1465 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1466 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1467 +       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1468 +       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1469 +       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1470 +       {0x0000a614, 0x01404000, 0x01404000, 0x01404501, 0x01404501},
1471 +       {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
1472 +       {0x0000a61c, 0x02008802, 0x02008802, 0x01404501, 0x01404501},
1473 +       {0x0000a620, 0x0300cc03, 0x0300cc03, 0x03c0cf02, 0x03c0cf02},
1474 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03c0cf03, 0x03c0cf03},
1475 +       {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04011004, 0x04011004},
1476 +       {0x0000a62c, 0x03810c03, 0x03810c03, 0x05419405, 0x05419405},
1477 +       {0x0000a630, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1478 +       {0x0000a634, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1479 +       {0x0000a638, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1480 +       {0x0000a63c, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1481 +       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
1482 +       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
1483 +       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
1484 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
1485 +       {0x00016044, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
1486 +       {0x00016048, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
1487 +       {0x00016280, 0x01000015, 0x01000015, 0x01001015, 0x01001015},
1488 +       {0x00016288, 0xf0318000, 0xf0318000, 0xf0318000, 0xf0318000},
1489 +       {0x00016444, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
1490 +       {0x00016448, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
1491 +};
1492 +
1493  static const u32 ar9340_1p0_mac_core[][2] = {
1494         /* Addr      allmodes  */
1495         {0x00000008, 0x00000000},
1496 --- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
1497 +++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
1498 @@ -260,6 +260,79 @@ static const u32 ar9485Modes_high_power_
1499         {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
1500  };
1501  
1502 +static const u32 ar9485Modes_green_ob_db_tx_gain_1_1[][5] = {
1503 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1504 +       {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
1505 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
1506 +       {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
1507 +       {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
1508 +       {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
1509 +       {0x0000a508, 0x0c002e00, 0x0c002e00, 0x06000203, 0x06000203},
1510 +       {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
1511 +       {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
1512 +       {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
1513 +       {0x0000a518, 0x25020ec0, 0x25020ec0, 0x15000604, 0x15000604},
1514 +       {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x18000605, 0x18000605},
1515 +       {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000a04, 0x1c000a04},
1516 +       {0x0000a524, 0x35001fc4, 0x35001fc4, 0x21000a06, 0x21000a06},
1517 +       {0x0000a528, 0x3c022f04, 0x3c022f04, 0x29000a24, 0x29000a24},
1518 +       {0x0000a52c, 0x41023e85, 0x41023e85, 0x2f000e21, 0x2f000e21},
1519 +       {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000e20, 0x31000e20},
1520 +       {0x0000a534, 0x4d023f01, 0x4d023f01, 0x33000e20, 0x33000e20},
1521 +       {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
1522 +       {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
1523 +       {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
1524 +       {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
1525 +       {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
1526 +       {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
1527 +       {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
1528 +       {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
1529 +       {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
1530 +       {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
1531 +       {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
1532 +       {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
1533 +       {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1534 +       {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1535 +       {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1536 +       {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1537 +       {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1538 +       {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1539 +       {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1540 +       {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1541 +       {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1542 +       {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1543 +       {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1544 +       {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1545 +       {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1546 +       {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1547 +       {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1548 +       {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1549 +       {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1550 +       {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
1551 +       {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
1552 +       {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
1553 +       {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1554 +       {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1555 +       {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1556 +       {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1557 +       {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1558 +       {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1559 +       {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1560 +       {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1561 +       {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1562 +       {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1563 +       {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1564 +       {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1565 +       {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1566 +       {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1567 +       {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1568 +       {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1569 +       {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1570 +       {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1571 +       {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
1572 +       {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
1573 +};
1574 +
1575  static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
1576         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1577         {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
1578 @@ -450,6 +523,79 @@ static const u32 ar9485Modes_low_ob_db_t
1579  
1580  #define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
1581  
1582 +static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
1583 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1584 +       {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
1585 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
1586 +       {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
1587 +       {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
1588 +       {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
1589 +       {0x0000a508, 0x0c002e00, 0x0c002e00, 0x07000203, 0x07000203},
1590 +       {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
1591 +       {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
1592 +       {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
1593 +       {0x0000a518, 0x25020ec0, 0x25020ec0, 0x14000406, 0x14000406},
1594 +       {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1800040a, 0x1800040a},
1595 +       {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000460, 0x1c000460},
1596 +       {0x0000a524, 0x35001fc4, 0x35001fc4, 0x22000463, 0x22000463},
1597 +       {0x0000a528, 0x3c022f04, 0x3c022f04, 0x26000465, 0x26000465},
1598 +       {0x0000a52c, 0x41023e85, 0x41023e85, 0x2e0006e0, 0x2e0006e0},
1599 +       {0x0000a530, 0x48023ec6, 0x48023ec6, 0x310006e0, 0x310006e0},
1600 +       {0x0000a534, 0x4d023f01, 0x4d023f01, 0x330006e0, 0x330006e0},
1601 +       {0x0000a538, 0x53023f4b, 0x53023f4b, 0x3e0008e3, 0x3e0008e3},
1602 +       {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x410008e5, 0x410008e5},
1603 +       {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x430008e6, 0x430008e6},
1604 +       {0x0000a544, 0x6502feca, 0x6502feca, 0x4a0008ec, 0x4a0008ec},
1605 +       {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4e0008f1, 0x4e0008f1},
1606 +       {0x0000a54c, 0x7203feca, 0x7203feca, 0x520008f3, 0x520008f3},
1607 +       {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x54000eed, 0x54000eed},
1608 +       {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x58000ef1, 0x58000ef1},
1609 +       {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5c000ef3, 0x5c000ef3},
1610 +       {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x60000ef5, 0x60000ef5},
1611 +       {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62000ef6, 0x62000ef6},
1612 +       {0x0000a564, 0x960fffcb, 0x960fffcb, 0x62000ef6, 0x62000ef6},
1613 +       {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1614 +       {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1615 +       {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1616 +       {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1617 +       {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1618 +       {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1619 +       {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1620 +       {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1621 +       {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1622 +       {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1623 +       {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1624 +       {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1625 +       {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1626 +       {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1627 +       {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1628 +       {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1629 +       {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1630 +       {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
1631 +       {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
1632 +       {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
1633 +       {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1634 +       {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1635 +       {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1636 +       {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1637 +       {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1638 +       {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1639 +       {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1640 +       {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1641 +       {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1642 +       {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1643 +       {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1644 +       {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1645 +       {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1646 +       {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1647 +       {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1648 +       {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1649 +       {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1650 +       {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1651 +       {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
1652 +       {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
1653 +};
1654 +
1655  static const u32 ar9485_1_1[][2] = {
1656         /* Addr      allmodes  */
1657         {0x0000a580, 0x00000000},
1658 --- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
1659 +++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
1660 @@ -685,6 +685,82 @@ static const u32 ar9580_1p0_mixed_ob_db_
1661  
1662  #define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
1663  
1664 +#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
1665 +
1666 +static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
1667 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
1668 +       {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1669 +       {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1670 +       {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1671 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1672 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1673 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1674 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1675 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1676 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1677 +       {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
1678 +       {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
1679 +       {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
1680 +       {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
1681 +       {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
1682 +       {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
1683 +       {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
1684 +       {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
1685 +       {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
1686 +       {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
1687 +       {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
1688 +       {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
1689 +       {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
1690 +       {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
1691 +       {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
1692 +       {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
1693 +       {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
1694 +       {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
1695 +       {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
1696 +       {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
1697 +       {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
1698 +       {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1699 +       {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1700 +       {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1701 +       {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1702 +       {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1703 +       {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1704 +       {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1705 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1706 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1707 +       {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1708 +       {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1709 +       {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1710 +       {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
1711 +       {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
1712 +       {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
1713 +       {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
1714 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
1715 +       {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
1716 +       {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1717 +       {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1718 +       {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1719 +       {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1720 +       {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1721 +       {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1722 +       {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1723 +       {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1724 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1725 +       {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1726 +       {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1727 +       {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1728 +       {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1729 +       {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1730 +       {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
1731 +       {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1732 +       {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1733 +       {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
1734 +       {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1735 +       {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1736 +       {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
1737 +       {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1738 +};
1739 +
1740  static const u32 ar9580_1p0_soc_preamble[][2] = {
1741         /* Addr      allmodes  */
1742         {0x000040a4, 0x00a0c1c9},
1743 --- a/drivers/net/wireless/ath/ath9k/reg.h
1744 +++ b/drivers/net/wireless/ath/ath9k/reg.h
1745 @@ -789,6 +789,7 @@
1746  #define AR_SREV_REVISION_9271_11       1
1747  #define AR_SREV_VERSION_9300           0x1c0
1748  #define AR_SREV_REVISION_9300_20       2 /* 2.0 and 2.1 */
1749 +#define AR_SREV_REVISION_9300_22       3
1750  #define AR_SREV_VERSION_9330           0x200
1751  #define AR_SREV_REVISION_9330_10       0
1752  #define AR_SREV_REVISION_9330_11       1
1753 @@ -869,6 +870,9 @@
1754         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300))
1755  #define AR_SREV_9300_20_OR_LATER(_ah) \
1756         ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9300)
1757 +#define AR_SREV_9300_22(_ah) \
1758 +       (AR_SREV_9300(ah) && \
1759 +        ((_ah)->hw_version.macRev == AR_SREV_REVISION_9300_22))
1760  
1761  #define AR_SREV_9330(_ah) \
1762         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9330))
1763 --- a/net/mac80211/mlme.c
1764 +++ b/net/mac80211/mlme.c
1765 @@ -199,11 +199,11 @@ static u32 ieee80211_config_ht_tx(struct
1766         case NL80211_CHAN_WIDTH_40:
1767                 if (sdata->vif.bss_conf.chandef.chan->center_freq >
1768                                 sdata->vif.bss_conf.chandef.center_freq1 &&
1769 -                   chan->flags & IEEE80211_CHAN_NO_HT40PLUS)
1770 +                   chan->flags & IEEE80211_CHAN_NO_HT40MINUS)
1771                         disable_40 = true;
1772                 if (sdata->vif.bss_conf.chandef.chan->center_freq <
1773                                 sdata->vif.bss_conf.chandef.center_freq1 &&
1774 -                   chan->flags & IEEE80211_CHAN_NO_HT40MINUS)
1775 +                   chan->flags & IEEE80211_CHAN_NO_HT40PLUS)
1776                         disable_40 = true;
1777                 break;
1778         default:
1779 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
1780 +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
1781 @@ -485,9 +485,7 @@ static int ar5008_hw_rf_alloc_ext_banks(
1782         ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
1783         ATH_ALLOC_BANK(ah->analogBank3Data, ah->iniBank3.ia_rows);
1784         ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
1785 -       ATH_ALLOC_BANK(ah->analogBank6TPCData, ah->iniBank6TPC.ia_rows);
1786         ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
1787 -       ATH_ALLOC_BANK(ah->bank6Temp, ah->iniBank6.ia_rows);
1788  
1789         return 0;
1790  #undef ATH_ALLOC_BANK
1791 @@ -517,6 +515,7 @@ static bool ar5008_hw_set_rf_regs(struct
1792         u32 ob5GHz = 0, db5GHz = 0;
1793         u32 ob2GHz = 0, db2GHz = 0;
1794         int regWrites = 0;
1795 +       int i;
1796  
1797         /*
1798          * Software does not need to program bank data
1799 @@ -541,13 +540,9 @@ static bool ar5008_hw_set_rf_regs(struct
1800         /* Setup Bank 6 Write */
1801         ar5008_rf_bank_setup(ah->analogBank3Data, &ah->iniBank3,
1802                       modesIndex);
1803 -       {
1804 -               int i;
1805 -               for (i = 0; i < ah->iniBank6TPC.ia_rows; i++) {
1806 -                       ah->analogBank6Data[i] =
1807 -                           INI_RA(&ah->iniBank6TPC, i, modesIndex);
1808 -               }
1809 -       }
1810 +
1811 +       for (i = 0; i < ah->iniBank6.ia_rows; i++)
1812 +               ah->analogBank6Data[i] = INI_RA(&ah->iniBank6, i, modesIndex);
1813  
1814         /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
1815         if (eepMinorRev >= 2) {
1816 @@ -572,18 +567,12 @@ static bool ar5008_hw_set_rf_regs(struct
1817         ar5008_rf_bank_setup(ah->analogBank7Data, &ah->iniBank7, 1);
1818  
1819         /* Write Analog registers */
1820 -       REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
1821 -                          regWrites);
1822 -       REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data,
1823 -                          regWrites);
1824 -       REG_WRITE_RF_ARRAY(&ah->iniBank2, ah->analogBank2Data,
1825 -                          regWrites);
1826 -       REG_WRITE_RF_ARRAY(&ah->iniBank3, ah->analogBank3Data,
1827 -                          regWrites);
1828 -       REG_WRITE_RF_ARRAY(&ah->iniBank6TPC, ah->analogBank6Data,
1829 -                          regWrites);
1830 -       REG_WRITE_RF_ARRAY(&ah->iniBank7, ah->analogBank7Data,
1831 -                          regWrites);
1832 +       REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data, regWrites);
1833 +       REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data, regWrites);
1834 +       REG_WRITE_RF_ARRAY(&ah->iniBank2, ah->analogBank2Data, regWrites);
1835 +       REG_WRITE_RF_ARRAY(&ah->iniBank3, ah->analogBank3Data, regWrites);
1836 +       REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, regWrites);
1837 +       REG_WRITE_RF_ARRAY(&ah->iniBank7, ah->analogBank7Data, regWrites);
1838  
1839         return true;
1840  }
1841 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
1842 +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
1843 @@ -23,13 +23,13 @@
1844  
1845  /* General hardware code for the A5008/AR9001/AR9002 hadware families */
1846  
1847 -static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
1848 +static int ar9002_hw_init_mode_regs(struct ath_hw *ah)
1849  {
1850         if (AR_SREV_9271(ah)) {
1851                 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
1852                 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
1853                 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
1854 -               return;
1855 +               return 0;
1856         }
1857  
1858         if (ah->config.pcie_clock_req)
1859 @@ -67,12 +67,10 @@ static void ar9002_hw_init_mode_regs(str
1860         } else if (AR_SREV_9100_OR_LATER(ah)) {
1861                 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
1862                 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
1863 -               INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
1864                 INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
1865         } else {
1866                 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
1867                 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
1868 -               INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
1869                 INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
1870         }
1871  
1872 @@ -86,14 +84,11 @@ static void ar9002_hw_init_mode_regs(str
1873                 INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
1874                 INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
1875  
1876 -               /* Common for AR5416, AR9160 */
1877 -               if (!AR_SREV_9100(ah))
1878 -                       INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
1879 -
1880                 /* Common for AR913x, AR9160 */
1881                 if (!AR_SREV_5416(ah))
1882 -                       INIT_INI_ARRAY(&ah->iniBank6TPC,
1883 -                                     ar5416Bank6TPC_9100);
1884 +                       INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC_9100);
1885 +               else
1886 +                       INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC);
1887         }
1888  
1889         /* iniAddac needs to be modified for these chips */
1890 @@ -104,7 +99,7 @@ static void ar9002_hw_init_mode_regs(str
1891  
1892                 data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
1893                 if (!data)
1894 -                       return;
1895 +                       return -ENOMEM;
1896  
1897                 memcpy(data, addac->ia_array, size);
1898                 addac->ia_array = data;
1899 @@ -120,6 +115,7 @@ static void ar9002_hw_init_mode_regs(str
1900                 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
1901                        ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
1902         }
1903 +       return 0;
1904  }
1905  
1906  static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
1907 @@ -415,7 +411,10 @@ int ar9002_hw_attach_ops(struct ath_hw *
1908         struct ath_hw_ops *ops = ath9k_hw_ops(ah);
1909         int ret;
1910  
1911 -       priv_ops->init_mode_regs = ar9002_hw_init_mode_regs;
1912 +       ret = ar9002_hw_init_mode_regs(ah);
1913 +       if (ret)
1914 +               return ret;
1915 +
1916         priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs;
1917  
1918         ops->config_pci_powersave = ar9002_hw_configpcipowersave;
1919 --- a/drivers/net/wireless/ath/ath9k/hw.c
1920 +++ b/drivers/net/wireless/ath/ath9k/hw.c
1921 @@ -54,11 +54,6 @@ static void ath9k_hw_init_cal_settings(s
1922         ath9k_hw_private_ops(ah)->init_cal_settings(ah);
1923  }
1924  
1925 -static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
1926 -{
1927 -       ath9k_hw_private_ops(ah)->init_mode_regs(ah);
1928 -}
1929 -
1930  static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
1931                                         struct ath9k_channel *chan)
1932  {
1933 @@ -670,8 +665,6 @@ static int __ath9k_hw_init(struct ath_hw
1934         if (!AR_SREV_9300_20_OR_LATER(ah))
1935                 ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
1936  
1937 -       ath9k_hw_init_mode_regs(ah);
1938 -
1939         if (!ah->is_pciexpress)
1940                 ath9k_hw_disablepcie(ah);
1941  
1942 --- a/drivers/net/wireless/ath/ath9k/hw.h
1943 +++ b/drivers/net/wireless/ath/ath9k/hw.h
1944 @@ -599,7 +599,6 @@ struct ath_hw_radar_conf {
1945   * @init_cal_settings: setup types of calibrations supported
1946   * @init_cal: starts actual calibration
1947   *
1948 - * @init_mode_regs: Initializes mode registers
1949   * @init_mode_gain_regs: Initialize TX/RX gain registers
1950   *
1951   * @rf_set_freq: change frequency
1952 @@ -618,7 +617,6 @@ struct ath_hw_private_ops {
1953         void (*init_cal_settings)(struct ath_hw *ah);
1954         bool (*init_cal)(struct ath_hw *ah, struct ath9k_channel *chan);
1955  
1956 -       void (*init_mode_regs)(struct ath_hw *ah);
1957         void (*init_mode_gain_regs)(struct ath_hw *ah);
1958         void (*setup_calibration)(struct ath_hw *ah,
1959                                   struct ath9k_cal_list *currCal);
1960 @@ -815,9 +813,7 @@ struct ath_hw {
1961         u32 *analogBank2Data;
1962         u32 *analogBank3Data;
1963         u32 *analogBank6Data;
1964 -       u32 *analogBank6TPCData;
1965         u32 *analogBank7Data;
1966 -       u32 *bank6Temp;
1967  
1968         int coverage_class;
1969         u32 slottime;
1970 @@ -858,7 +854,6 @@ struct ath_hw {
1971         struct ar5416IniArray iniBank2;
1972         struct ar5416IniArray iniBank3;
1973         struct ar5416IniArray iniBank6;
1974 -       struct ar5416IniArray iniBank6TPC;
1975         struct ar5416IniArray iniBank7;
1976         struct ar5416IniArray iniAddac;
1977         struct ar5416IniArray iniPcieSerdes;
1978 --- a/net/mac80211/tx.c
1979 +++ b/net/mac80211/tx.c
1980 @@ -1677,10 +1677,10 @@ netdev_tx_t ieee80211_monitor_start_xmit
1981                         chanctx_conf =
1982                                 rcu_dereference(tmp_sdata->vif.chanctx_conf);
1983         }
1984 -       if (!chanctx_conf)
1985 -               goto fail_rcu;
1986 -
1987 -       chan = chanctx_conf->def.chan;
1988 +       if (chanctx_conf)
1989 +               chan = chanctx_conf->def.chan;
1990 +       else
1991 +               chan = local->_oper_channel;
1992  
1993         /*
1994          * Frame injection is not allowed if beaconing is not allowed