mac80211: rt2x00: fix default register settings for rt5350
[openwrt.git] / package / kernel / mac80211 / patches / 616-rt2x00-support-rt5350.patch
1 Index: compat-wireless-2013-06-27/drivers/net/wireless/rt2x00/rt2800.h
2 ===================================================================
3 --- compat-wireless-2013-06-27.orig/drivers/net/wireless/rt2x00/rt2800.h        2013-07-27 18:03:04.837450150 +0200
4 +++ compat-wireless-2013-06-27/drivers/net/wireless/rt2x00/rt2800.h     2013-07-27 18:03:04.973450152 +0200
5 @@ -71,6 +71,7 @@
6  #define RF3053                         0x000d
7  #define RF5592                         0x000f
8  #define RF3290                         0x3290
9 +#define RF5350                         0x5350
10  #define RF5360                         0x5360
11  #define RF5370                         0x5370
12  #define RF5372                         0x5372
13 Index: compat-wireless-2013-06-27/drivers/net/wireless/rt2x00/rt2800lib.c
14 ===================================================================
15 --- compat-wireless-2013-06-27.orig/drivers/net/wireless/rt2x00/rt2800lib.c     2013-07-27 18:03:04.949450152 +0200
16 +++ compat-wireless-2013-06-27/drivers/net/wireless/rt2x00/rt2800lib.c  2013-07-27 18:20:44.749475406 +0200
17 @@ -2141,6 +2141,15 @@
18         if (rf->channel <= 14) {
19                 int idx = rf->channel-1;
20  
21 +               if (rt2x00_rt(rt2x00dev, RT5350)) {
22 +                       static const char r59_non_bt[] = {0x0b, 0x0b,
23 +                               0x0b, 0x0b, 0x0b, 0x0b, 0x0b, 0x0a,
24 +                               0x0a, 0x09, 0x08, 0x07, 0x07, 0x06};
25 +
26 +                       rt2800_rfcsr_write(rt2x00dev, 59,
27 +                                          r59_non_bt[idx]);
28 +               }
29 +
30                 if (test_bit(CAPABILITY_BT_COEXIST, &rt2x00dev->cap_flags)) {
31                         if (rt2x00_rt_rev_gte(rt2x00dev, RT5390, REV_RT5390F)) {
32                                 /* r55/r59 value array of channel 1~14 */
33 @@ -2598,6 +2607,7 @@
34         case RF3322:
35                 rt2800_config_channel_rf3322(rt2x00dev, conf, rf, info);
36                 break;
37 +       case RF5350:
38         case RF5360:
39         case RF5370:
40         case RF5372:
41 @@ -2614,6 +2624,7 @@
42  
43         if (rt2x00_rf(rt2x00dev, RF3290) ||
44             rt2x00_rf(rt2x00dev, RF3322) ||
45 +           rt2x00_rf(rt2x00dev, RF5350) ||
46             rt2x00_rf(rt2x00dev, RF5360) ||
47             rt2x00_rf(rt2x00dev, RF5370) ||
48             rt2x00_rf(rt2x00dev, RF5372) ||
49 @@ -2778,7 +2789,8 @@
50         /*
51          * Clear update flag
52          */
53 -       if (rt2x00_rt(rt2x00dev, RT3352)) {
54 +       if (rt2x00_rt(rt2x00dev, RT3352) ||
55 +           rt2x00_rt(rt2x00dev, RT5350)) {
56                 rt2800_bbp_read(rt2x00dev, 49, &bbp);
57                 rt2x00_set_field8(&bbp, BBP49_UPDATE_FLAG, 0);
58                 rt2800_bbp_write(rt2x00dev, 49, bbp);
59 @@ -3224,6 +3236,7 @@
60                 rt2800_rfcsr_write(rt2x00dev, 7, rfcsr);
61                 break;
62         case RF3290:
63 +       case RF5350:
64         case RF5360:
65         case RF5370:
66         case RF5372:
67 @@ -3569,6 +3582,8 @@
68                 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
69                 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
70                 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
71 +       } else if (rt2x00_rt(rt2x00dev, RT5350)) {
72 +               rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
73         } else {
74                 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000000);
75                 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
76 @@ -4216,9 +4231,13 @@
77  
78         rt2800_bbp_write(rt2x00dev, 82, 0x62);
79  
80 -       rt2800_bbp_write(rt2x00dev, 83, 0x6a);
81 -
82 -       rt2800_bbp_write(rt2x00dev, 84, 0x99);
83 +       if (rt2x00_rt(rt2x00dev, RT5350)) {
84 +               rt2800_bbp_write(rt2x00dev, 83, 0x7a);
85 +               rt2800_bbp_write(rt2x00dev, 84, 0x9a);
86 +       } else {
87 +               rt2800_bbp_write(rt2x00dev, 83, 0x6a);
88 +               rt2800_bbp_write(rt2x00dev, 84, 0x99);
89 +       }
90  
91         rt2800_bbp_write(rt2x00dev, 86, 0x38);
92  
93 @@ -4232,9 +4251,13 @@
94  
95         rt2800_bbp_write(rt2x00dev, 104, 0x92);
96  
97 -       rt2800_bbp_write(rt2x00dev, 105, 0x34);
98 -
99 -       rt2800_bbp_write(rt2x00dev, 106, 0x05);
100 +       if (rt2x00_rt(rt2x00dev, RT5350)) {
101 +               rt2800_bbp_write(rt2x00dev, 105, 0x3c);
102 +               rt2800_bbp_write(rt2x00dev, 106, 0x03);
103 +       } else {
104 +               rt2800_bbp_write(rt2x00dev, 105, 0x34);
105 +               rt2800_bbp_write(rt2x00dev, 106, 0x05);
106 +       }
107  
108         rt2800_bbp_write(rt2x00dev, 120, 0x50);
109  
110 @@ -4259,6 +4282,13 @@
111         rt2800_bbp_write(rt2x00dev, 143, 0xa2);
112  
113         rt2800_bbp_write(rt2x00dev, 148, 0xc8);
114 +
115 +       if (rt2x00_rt(rt2x00dev, RT5350)) {
116 +               rt2800_bbp_write(rt2x00dev, 150, 0x40); /* Antenna Software OFDM */
117 +               rt2800_bbp_write(rt2x00dev, 151, 0x30); /* Antenna Software CCK */
118 +               rt2800_bbp_write(rt2x00dev, 152, 0xa3);
119 +               rt2800_bbp_write(rt2x00dev, 154, 0); /* Clear previously selected antenna */
120 +       }
121  }
122  
123  static void rt2800_init_bbp_3390(struct rt2x00_dev *rt2x00dev)
124 @@ -4543,6 +4573,7 @@
125                 rt2800_init_bbp_3290(rt2x00dev);
126                 break;
127         case RT3352:
128 +       case RT5350:
129                 rt2800_init_bbp_3352(rt2x00dev);
130                 break;
131         case RT3390:
132 @@ -5182,6 +5213,76 @@
133         rt2800_normal_mode_setup_3xxx(rt2x00dev);
134  }
135  
136 +static void rt2800_init_rfcsr_5350(struct rt2x00_dev *rt2x00dev)
137 +{
138 +       rt2800_rfcsr_write(rt2x00dev, 0, 0xf0);
139 +       rt2800_rfcsr_write(rt2x00dev, 1, 0x23);
140 +       rt2800_rfcsr_write(rt2x00dev, 2, 0x50);
141 +       rt2800_rfcsr_write(rt2x00dev, 3, 0x08);
142 +       rt2800_rfcsr_write(rt2x00dev, 4, 0x49);
143 +       rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
144 +       rt2800_rfcsr_write(rt2x00dev, 6, 0xe0);
145 +       rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
146 +       rt2800_rfcsr_write(rt2x00dev, 8, 0xf1);
147 +       rt2800_rfcsr_write(rt2x00dev, 9, 0x02);
148 +       rt2800_rfcsr_write(rt2x00dev, 10, 0x53);
149 +       rt2800_rfcsr_write(rt2x00dev, 11, 0x4a);
150 +       rt2800_rfcsr_write(rt2x00dev, 12, 0x46);
151 +       if(rt2x00dev->spec.clk_is_20mhz)
152 +               rt2800_rfcsr_write(rt2x00dev, 13, 0x1f);
153 +       else
154 +               rt2800_rfcsr_write(rt2x00dev, 13, 0x9f);
155 +       rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
156 +       rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
157 +       rt2800_rfcsr_write(rt2x00dev, 16, 0xc0);
158 +       rt2800_rfcsr_write(rt2x00dev, 18, 0x03);
159 +       rt2800_rfcsr_write(rt2x00dev, 19, 0x00);
160 +       rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
161 +       rt2800_rfcsr_write(rt2x00dev, 21, 0x00);
162 +       rt2800_rfcsr_write(rt2x00dev, 22, 0x20);
163 +       rt2800_rfcsr_write(rt2x00dev, 23, 0x00);
164 +       rt2800_rfcsr_write(rt2x00dev, 24, 0x00);
165 +       rt2800_rfcsr_write(rt2x00dev, 25, 0x80);
166 +       rt2800_rfcsr_write(rt2x00dev, 26, 0x00);
167 +       rt2800_rfcsr_write(rt2x00dev, 27, 0x03);
168 +       rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
169 +       rt2800_rfcsr_write(rt2x00dev, 29, 0xd0);
170 +       rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
171 +       rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
172 +       rt2800_rfcsr_write(rt2x00dev, 32, 0x80);
173 +       rt2800_rfcsr_write(rt2x00dev, 33, 0x00);
174 +       rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
175 +       rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
176 +       rt2800_rfcsr_write(rt2x00dev, 36, 0x00);
177 +       rt2800_rfcsr_write(rt2x00dev, 37, 0x08);
178 +       rt2800_rfcsr_write(rt2x00dev, 38, 0x85);
179 +       rt2800_rfcsr_write(rt2x00dev, 39, 0x1b);
180 +       rt2800_rfcsr_write(rt2x00dev, 40, 0x0b);
181 +       rt2800_rfcsr_write(rt2x00dev, 41, 0xbb);
182 +       rt2800_rfcsr_write(rt2x00dev, 42, 0xd5);
183 +       rt2800_rfcsr_write(rt2x00dev, 43, 0x9b);
184 +       rt2800_rfcsr_write(rt2x00dev, 44, 0x0c);
185 +       rt2800_rfcsr_write(rt2x00dev, 45, 0xa6);
186 +       rt2800_rfcsr_write(rt2x00dev, 46, 0x73);
187 +       rt2800_rfcsr_write(rt2x00dev, 47, 0x00);
188 +       rt2800_rfcsr_write(rt2x00dev, 48, 0x10);
189 +       rt2800_rfcsr_write(rt2x00dev, 49, 0x80);
190 +       rt2800_rfcsr_write(rt2x00dev, 50, 0x00);
191 +       rt2800_rfcsr_write(rt2x00dev, 51, 0x00);
192 +       rt2800_rfcsr_write(rt2x00dev, 52, 0x38);
193 +       rt2800_rfcsr_write(rt2x00dev, 53, 0x00);
194 +       rt2800_rfcsr_write(rt2x00dev, 54, 0x38);
195 +       rt2800_rfcsr_write(rt2x00dev, 55, 0x43);
196 +       rt2800_rfcsr_write(rt2x00dev, 56, 0x82);
197 +       rt2800_rfcsr_write(rt2x00dev, 57, 0x00);
198 +       rt2800_rfcsr_write(rt2x00dev, 58, 0x39);
199 +       rt2800_rfcsr_write(rt2x00dev, 59, 0x0b);
200 +       rt2800_rfcsr_write(rt2x00dev, 60, 0x45);
201 +       rt2800_rfcsr_write(rt2x00dev, 61, 0xd1);
202 +       rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
203 +       rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
204 +}
205 +
206  static void rt2800_init_rfcsr_5390(struct rt2x00_dev *rt2x00dev)
207  {
208         rt2800_rf_init_calibration(rt2x00dev, 2);
209 @@ -5410,6 +5511,9 @@
210         case RT3572:
211                 rt2800_init_rfcsr_3572(rt2x00dev);
212                 break;
213 +       case RT5350:
214 +               rt2800_init_rfcsr_5350(rt2x00dev);
215 +               break;
216         case RT5390:
217                 rt2800_init_rfcsr_5390(rt2x00dev);
218                 break;
219 @@ -5621,6 +5725,12 @@
220                 rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF2820);
221                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
222                 rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
223 +       } else if (rt2x00_rt(rt2x00dev, RT5350)) {
224 +               rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RXPATH, 1);
225 +               rt2x00_set_field16(&word, EEPROM_NIC_CONF0_TXPATH, 1);
226 +               rt2x00_set_field16(&word, EEPROM_NIC_CONF0_RF_TYPE, RF3320);
227 +               rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC_CONF0, word);
228 +               rt2x00_eeprom_dbg(rt2x00dev, "Antenna: 0x%04x\n", word);
229         } else if (rt2x00_rt(rt2x00dev, RT2860) ||
230                    rt2x00_rt(rt2x00dev, RT2872)) {
231                 /*
232 @@ -5749,6 +5859,8 @@
233             rt2x00_rt(rt2x00dev, RT5390) ||
234             rt2x00_rt(rt2x00dev, RT5392))
235                 rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &rf);
236 +       else if (rt2x00_rt(rt2x00dev, RT5350))
237 +               rf = RF5350;
238         else
239                 rf = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);
240  
241 @@ -5765,6 +5877,7 @@
242         case RF3290:
243         case RF3320:
244         case RF3322:
245 +       case RF5350:
246         case RF5360:
247         case RF5370:
248         case RF5372:
249 @@ -6263,7 +6376,8 @@
250                    rt2x00_rf(rt2x00dev, RF5392)) {
251                 spec->num_channels = 14;
252                 spec->channels = rf_vals_3x;
253 -       } else if (rt2x00_rf(rt2x00dev, RF3322)) {
254 +       } else if (rt2x00_rf(rt2x00dev, RF3322) ||
255 +                  rt2x00_rf(rt2x00dev, RF5350)) {
256                 spec->num_channels = 14;
257                 if (spec->clk_is_20mhz)
258                         spec->channels = rf_vals_xtal20mhz_3x;
259 @@ -6364,6 +6478,7 @@
260         case RF3320:
261         case RF3052:
262         case RF3290:
263 +       case RF5350:
264         case RF5360:
265         case RF5370:
266         case RF5372:
267 @@ -6401,6 +6516,7 @@
268         case RT3352:
269         case RT3390:
270         case RT3572:
271 +       case RT5350:
272         case RT5390:
273         case RT5392:
274         case RT5592:
275 Index: compat-wireless-2013-06-27/drivers/net/wireless/rt2x00/rt2x00.h
276 ===================================================================
277 --- compat-wireless-2013-06-27.orig/drivers/net/wireless/rt2x00/rt2x00.h        2013-07-27 18:03:04.865450150 +0200
278 +++ compat-wireless-2013-06-27/drivers/net/wireless/rt2x00/rt2x00.h     2013-07-27 18:03:04.977450152 +0200
279 @@ -181,6 +181,7 @@
280  #define RT3572         0x3572
281  #define RT3593         0x3593
282  #define RT3883         0x3883  /* WSOC */
283 +#define RT5350         0x5350  /* WSOC 2.4GHz */
284  #define RT5390         0x5390  /* 2.4GHz */
285  #define RT5392         0x5392  /* 2.4GHz */
286  #define RT5592         0x5592