package/kernel/mac80211/patches/300-pending_work.patch

   1 --- a/drivers/net/wireless/ath/ath10k/mac.c
   2 +++ b/drivers/net/wireless/ath/ath10k/mac.c
   3 @@ -1351,12 +1351,12 @@ static int ath10k_update_channel_list(st
   4                         ch->allow_vht = true;
   5
   6                         ch->allow_ibss =
   7 -                               !(channel->flags & IEEE80211_CHAN_NO_IBSS);
   8 +                               !(channel->flags & IEEE80211_CHAN_NO_IR);
   9
  10                         ch->ht40plus =
  11                                 !(channel->flags & IEEE80211_CHAN_NO_HT40PLUS);
  12
  13 -                       passive = channel->flags & IEEE80211_CHAN_PASSIVE_SCAN;
  14 +                       passive = channel->flags & IEEE80211_CHAN_NO_IR;
  15                         ch->passive = passive;
  16
  17                         ch->freq = channel->center_freq;
  18 --- a/drivers/net/wireless/ath/ath9k/Kconfig
  19 +++ b/drivers/net/wireless/ath/ath9k/Kconfig
  20 @@ -90,7 +90,7 @@ config ATH9K_DFS_CERTIFIED
  21
  22  config ATH9K_TX99
  23         bool "Atheros ath9k TX99 testing support"
  24 -       depends on CFG80211_CERTIFICATION_ONUS
  25 +       depends on ATH9K_DEBUGFS && CFG80211_CERTIFICATION_ONUS
  26         default n
  27         ---help---
  28           Say N. This should only be enabled on systems undergoing
  29 @@ -108,6 +108,14 @@ config ATH9K_TX99
  30           be evaluated to meet the RF exposure limits set forth in the
  31           governmental SAR regulations.
  32
  33 +config ATH9K_WOW
  34 +       bool "Wake on Wireless LAN support (EXPERIMENTAL)"
  35 +       depends on ATH9K && PM
  36 +       default n
  37 +       ---help---
  38 +         This option enables Wake on Wireless LAN support for certain cards.
  39 +         Currently, AR9462 is supported.
  40 +
  41  config ATH9K_LEGACY_RATE_CONTROL
  42         bool "Atheros ath9k rate control"
  43         depends on ATH9K
  44 --- a/drivers/net/wireless/ath/ath9k/Makefile
  45 +++ b/drivers/net/wireless/ath/ath9k/Makefile
  46 @@ -13,9 +13,9 @@ ath9k-$(CPTCFG_ATH9K_PCI) += pci.o
  47  ath9k-$(CPTCFG_ATH9K_AHB) += ahb.o
  48  ath9k-$(CPTCFG_ATH9K_DEBUGFS) += debug.o
  49  ath9k-$(CPTCFG_ATH9K_DFS_DEBUGFS) += dfs_debug.o
  50 -ath9k-$(CPTCFG_ATH9K_DFS_CERTIFIED) += \
  51 -               dfs.o
  52 -ath9k-$(CONFIG_PM_SLEEP) += wow.o
  53 +ath9k-$(CPTCFG_ATH9K_DFS_CERTIFIED) += dfs.o
  54 +ath9k-$(CPTCFG_ATH9K_TX99) += tx99.o
  55 +ath9k-$(CPTCFG_ATH9K_WOW) += wow.o
  56
  57  obj-$(CPTCFG_ATH9K) += ath9k.o
  58
  59 @@ -41,6 +41,8 @@ ath9k_hw-y:=  \
  60                 ar9003_eeprom.o \
  61                 ar9003_paprd.o
  62
  63 +ath9k_hw-$(CPTCFG_ATH9K_WOW) += ar9003_wow.o
  64 +
  65  ath9k_hw-$(CPTCFG_ATH9K_BTCOEX_SUPPORT) += btcoex.o \
  66                                            ar9003_mci.o
  67  obj-$(CPTCFG_ATH9K_HW) += ath9k_hw.o
  68 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
  69 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
  70 @@ -17,6 +17,7 @@
  71  #include "hw.h"
  72  #include "ar9003_mac.h"
  73  #include "ar9003_2p2_initvals.h"
  74 +#include "ar9003_buffalo_initvals.h"
  75  #include "ar9485_initvals.h"
  76  #include "ar9340_initvals.h"
  77  #include "ar9330_1p1_initvals.h"
  78 @@ -26,6 +27,7 @@
  79  #include "ar9462_2p0_initvals.h"
  80  #include "ar9462_2p1_initvals.h"
  81  #include "ar9565_1p0_initvals.h"
  82 +#include "ar9565_1p1_initvals.h"
  83
  84  /* General hardware code for the AR9003 hadware family */
  85
  86 @@ -148,7 +150,11 @@ static void ar9003_hw_init_mode_regs(str
  87                                 ar9340Modes_high_ob_db_tx_gain_table_1p0);
  88
  89                 INIT_INI_ARRAY(&ah->iniModesFastClock,
  90 -                               ar9340Modes_fast_clock_1p0);
  91 +                              ar9340Modes_fast_clock_1p0);
  92 +               INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
  93 +                              ar9340_1p0_baseband_core_txfir_coeff_japan_2484);
  94 +               INIT_INI_ARRAY(&ah->ini_dfs,
  95 +                              ar9340_1p0_baseband_postamble_dfs_channel);
  96
  97                 if (!ah->is_clk_25mhz)
  98                         INIT_INI_ARRAY(&ah->iniAdditional,
  99 @@ -187,17 +193,17 @@ static void ar9003_hw_init_mode_regs(str
 100                 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
 101                                ar9485_1_1_baseband_core_txfir_coeff_japan_2484);
 102
 103 -               /* Load PCIE SERDES settings from INI */
 104 -
 105 -               /* Awake Setting */
 106 -
 107 -               INIT_INI_ARRAY(&ah->iniPcieSerdes,
 108 -                               ar9485_1_1_pcie_phy_clkreq_disable_L1);
 109 -
 110 -               /* Sleep Setting */
 111 -
 112 -               INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 113 -                               ar9485_1_1_pcie_phy_clkreq_disable_L1);
 114 +               if (ah->config.no_pll_pwrsave) {
 115 +                       INIT_INI_ARRAY(&ah->iniPcieSerdes,
 116 +                                      ar9485_1_1_pcie_phy_clkreq_disable_L1);
 117 +                       INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 118 +                                      ar9485_1_1_pcie_phy_clkreq_disable_L1);
 119 +               } else {
 120 +                       INIT_INI_ARRAY(&ah->iniPcieSerdes,
 121 +                                      ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1);
 122 +                       INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 123 +                                      ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1);
 124 +               }
 125         } else if (AR_SREV_9462_21(ah)) {
 126                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
 127                                ar9462_2p1_mac_core);
 128 @@ -223,6 +229,10 @@ static void ar9003_hw_init_mode_regs(str
 129                                ar9462_2p1_modes_fast_clock);
 130                 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
 131                                ar9462_2p1_baseband_core_txfir_coeff_japan_2484);
 132 +               INIT_INI_ARRAY(&ah->iniPcieSerdes,
 133 +                              ar9462_2p1_pciephy_clkreq_disable_L1);
 134 +               INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 135 +                              ar9462_2p1_pciephy_clkreq_disable_L1);
 136         } else if (AR_SREV_9462_20(ah)) {
 137
 138                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ar9462_2p0_mac_core);
 139 @@ -247,18 +257,18 @@ static void ar9003_hw_init_mode_regs(str
 140                                 ar9462_2p0_soc_postamble);
 141
 142                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 143 -                               ar9462_common_rx_gain_table_2p0);
 144 +                               ar9462_2p0_common_rx_gain);
 145
 146                 /* Awake -> Sleep Setting */
 147                 INIT_INI_ARRAY(&ah->iniPcieSerdes,
 148 -                              ar9462_pciephy_clkreq_disable_L1_2p0);
 149 +                              ar9462_2p0_pciephy_clkreq_disable_L1);
 150                 /* Sleep -> Awake Setting */
 151                 INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 152 -                              ar9462_pciephy_clkreq_disable_L1_2p0);
 153 +                              ar9462_2p0_pciephy_clkreq_disable_L1);
 154
 155                 /* Fast clock modal settings */
 156                 INIT_INI_ARRAY(&ah->iniModesFastClock,
 157 -                               ar9462_modes_fast_clock_2p0);
 158 +                               ar9462_2p0_modes_fast_clock);
 159
 160                 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
 161                                ar9462_2p0_baseband_core_txfir_coeff_japan_2484);
 162 @@ -330,7 +340,46 @@ static void ar9003_hw_init_mode_regs(str
 163                                 ar9580_1p0_low_ob_db_tx_gain_table);
 164
 165                 INIT_INI_ARRAY(&ah->iniModesFastClock,
 166 -                               ar9580_1p0_modes_fast_clock);
 167 +                              ar9580_1p0_modes_fast_clock);
 168 +               INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
 169 +                              ar9580_1p0_baseband_core_txfir_coeff_japan_2484);
 170 +               INIT_INI_ARRAY(&ah->ini_dfs,
 171 +                              ar9580_1p0_baseband_postamble_dfs_channel);
 172 +       } else if (AR_SREV_9565_11_OR_LATER(ah)) {
 173 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
 174 +                              ar9565_1p1_mac_core);
 175 +               INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
 176 +                              ar9565_1p1_mac_postamble);
 177 +
 178 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
 179 +                              ar9565_1p1_baseband_core);
 180 +               INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
 181 +                              ar9565_1p1_baseband_postamble);
 182 +
 183 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
 184 +                              ar9565_1p1_radio_core);
 185 +               INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
 186 +                              ar9565_1p1_radio_postamble);
 187 +
 188 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
 189 +                              ar9565_1p1_soc_preamble);
 190 +               INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
 191 +                              ar9565_1p1_soc_postamble);
 192 +
 193 +               INIT_INI_ARRAY(&ah->iniModesRxGain,
 194 +                              ar9565_1p1_Common_rx_gain_table);
 195 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 196 +                              ar9565_1p1_Modes_lowest_ob_db_tx_gain_table);
 197 +
 198 +               INIT_INI_ARRAY(&ah->iniPcieSerdes,
 199 +                              ar9565_1p1_pciephy_clkreq_disable_L1);
 200 +               INIT_INI_ARRAY(&ah->iniPcieSerdesLowPower,
 201 +                              ar9565_1p1_pciephy_clkreq_disable_L1);
 202 +
 203 +               INIT_INI_ARRAY(&ah->iniModesFastClock,
 204 +                               ar9565_1p1_modes_fast_clock);
 205 +               INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
 206 +                              ar9565_1p1_baseband_core_txfir_coeff_japan_2484);
 207         } else if (AR_SREV_9565(ah)) {
 208                 INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
 209                                ar9565_1p0_mac_core);
 210 @@ -411,7 +460,11 @@ static void ar9003_hw_init_mode_regs(str
 211
 212                 /* Fast clock modal settings */
 213                 INIT_INI_ARRAY(&ah->iniModesFastClock,
 214 -                               ar9300Modes_fast_clock_2p2);
 215 +                              ar9300Modes_fast_clock_2p2);
 216 +               INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
 217 +                              ar9300_2p2_baseband_core_txfir_coeff_japan_2484);
 218 +               INIT_INI_ARRAY(&ah->ini_dfs,
 219 +                              ar9300_2p2_baseband_postamble_dfs_channel);
 220         }
 221  }
 222
 223 @@ -440,7 +493,10 @@ static void ar9003_tx_gain_table_mode0(s
 224                         ar9462_2p1_modes_low_ob_db_tx_gain);
 225         else if (AR_SREV_9462_20(ah))
 226                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 227 -                       ar9462_modes_low_ob_db_tx_gain_table_2p0);
 228 +                       ar9462_2p0_modes_low_ob_db_tx_gain);
 229 +       else if (AR_SREV_9565_11(ah))
 230 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 231 +                              ar9565_1p1_modes_low_ob_db_tx_gain_table);
 232         else if (AR_SREV_9565(ah))
 233                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 234                                ar9565_1p0_modes_low_ob_db_tx_gain_table);
 235 @@ -474,7 +530,10 @@ static void ar9003_tx_gain_table_mode1(s
 236                         ar9462_2p1_modes_high_ob_db_tx_gain);
 237         else if (AR_SREV_9462_20(ah))
 238                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 239 -                       ar9462_modes_high_ob_db_tx_gain_table_2p0);
 240 +                       ar9462_2p0_modes_high_ob_db_tx_gain);
 241 +       else if (AR_SREV_9565_11(ah))
 242 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 243 +                              ar9565_1p1_modes_high_ob_db_tx_gain_table);
 244         else if (AR_SREV_9565(ah))
 245                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 246                                ar9565_1p0_modes_high_ob_db_tx_gain_table);
 247 @@ -500,6 +559,9 @@ static void ar9003_tx_gain_table_mode2(s
 248         else if (AR_SREV_9580(ah))
 249                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 250                         ar9580_1p0_low_ob_db_tx_gain_table);
 251 +       else if (AR_SREV_9565_11(ah))
 252 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 253 +                              ar9565_1p1_modes_low_ob_db_tx_gain_table);
 254         else if (AR_SREV_9565(ah))
 255                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 256                                ar9565_1p0_modes_low_ob_db_tx_gain_table);
 257 @@ -525,12 +587,20 @@ static void ar9003_tx_gain_table_mode3(s
 258         else if (AR_SREV_9580(ah))
 259                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 260                         ar9580_1p0_high_power_tx_gain_table);
 261 +       else if (AR_SREV_9565_11(ah))
 262 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 263 +                              ar9565_1p1_modes_high_power_tx_gain_table);
 264         else if (AR_SREV_9565(ah))
 265                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 266                                ar9565_1p0_modes_high_power_tx_gain_table);
 267 -       else
 268 -               INIT_INI_ARRAY(&ah->iniModesTxGain,
 269 -                       ar9300Modes_high_power_tx_gain_table_2p2);
 270 +       else {
 271 +               if (ah->config.tx_gain_buffalo)
 272 +                       INIT_INI_ARRAY(&ah->iniModesTxGain,
 273 +                                      ar9300Modes_high_power_tx_gain_table_buffalo);
 274 +               else
 275 +                       INIT_INI_ARRAY(&ah->iniModesTxGain,
 276 +                                      ar9300Modes_high_power_tx_gain_table_2p2);
 277 +       }
 278  }
 279
 280  static void ar9003_tx_gain_table_mode4(struct ath_hw *ah)
 281 @@ -546,7 +616,7 @@ static void ar9003_tx_gain_table_mode4(s
 282                        ar9462_2p1_modes_mix_ob_db_tx_gain);
 283         else if (AR_SREV_9462_20(ah))
 284                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 285 -                      ar9462_modes_mix_ob_db_tx_gain_table_2p0);
 286 +                      ar9462_2p0_modes_mix_ob_db_tx_gain);
 287         else
 288                 INIT_INI_ARRAY(&ah->iniModesTxGain,
 289                         ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
 290 @@ -581,6 +651,13 @@ static void ar9003_tx_gain_table_mode6(s
 291                         ar9580_1p0_type6_tx_gain_table);
 292  }
 293
 294 +static void ar9003_tx_gain_table_mode7(struct ath_hw *ah)
 295 +{
 296 +       if (AR_SREV_9340(ah))
 297 +               INIT_INI_ARRAY(&ah->iniModesTxGain,
 298 +                              ar9340_cus227_tx_gain_table_1p0);
 299 +}
 300 +
 301  typedef void (*ath_txgain_tab)(struct ath_hw *ah);
 302
 303  static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
 304 @@ -593,6 +670,7 @@ static void ar9003_tx_gain_table_apply(s
 305                 ar9003_tx_gain_table_mode4,
 306                 ar9003_tx_gain_table_mode5,
 307                 ar9003_tx_gain_table_mode6,
 308 +               ar9003_tx_gain_table_mode7,
 309         };
 310         int idx = ar9003_hw_get_tx_gain_idx(ah);
 311
 312 @@ -629,7 +707,10 @@ static void ar9003_rx_gain_table_mode0(s
 313                                 ar9462_2p1_common_rx_gain);
 314         else if (AR_SREV_9462_20(ah))
 315                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 316 -                               ar9462_common_rx_gain_table_2p0);
 317 +                               ar9462_2p0_common_rx_gain);
 318 +       else if (AR_SREV_9565_11(ah))
 319 +               INIT_INI_ARRAY(&ah->iniModesRxGain,
 320 +                              ar9565_1p1_Common_rx_gain_table);
 321         else if (AR_SREV_9565(ah))
 322                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 323                                ar9565_1p0_Common_rx_gain_table);
 324 @@ -657,7 +738,7 @@ static void ar9003_rx_gain_table_mode1(s
 325                         ar9462_2p1_common_wo_xlna_rx_gain);
 326         else if (AR_SREV_9462_20(ah))
 327                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 328 -                       ar9462_common_wo_xlna_rx_gain_table_2p0);
 329 +                       ar9462_2p0_common_wo_xlna_rx_gain);
 330         else if (AR_SREV_9550(ah)) {
 331                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 332                         ar955x_1p0_common_wo_xlna_rx_gain_table);
 333 @@ -666,6 +747,9 @@ static void ar9003_rx_gain_table_mode1(s
 334         } else if (AR_SREV_9580(ah))
 335                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 336                         ar9580_1p0_wo_xlna_rx_gain_table);
 337 +       else if (AR_SREV_9565_11(ah))
 338 +               INIT_INI_ARRAY(&ah->iniModesRxGain,
 339 +                              ar9565_1p1_common_wo_xlna_rx_gain_table);
 340         else if (AR_SREV_9565(ah))
 341                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 342                                ar9565_1p0_common_wo_xlna_rx_gain_table);
 343 @@ -687,7 +771,7 @@ static void ar9003_rx_gain_table_mode2(s
 344                                ar9462_2p1_baseband_postamble_5g_xlna);
 345         } else if (AR_SREV_9462_20(ah)) {
 346                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 347 -                              ar9462_common_mixed_rx_gain_table_2p0);
 348 +                              ar9462_2p0_common_mixed_rx_gain);
 349                 INIT_INI_ARRAY(&ah->ini_modes_rxgain_bb_core,
 350                                ar9462_2p0_baseband_core_mix_rxgain);
 351                 INIT_INI_ARRAY(&ah->ini_modes_rxgain_bb_postamble,
 352 @@ -701,12 +785,12 @@ static void ar9003_rx_gain_table_mode3(s
 353  {
 354         if (AR_SREV_9462_21(ah)) {
 355                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 356 -                              ar9462_2p1_common_5g_xlna_only_rx_gain);
 357 +                              ar9462_2p1_common_5g_xlna_only_rxgain);
 358                 INIT_INI_ARRAY(&ah->ini_modes_rxgain_5g_xlna,
 359                                ar9462_2p1_baseband_postamble_5g_xlna);
 360         } else if (AR_SREV_9462_20(ah)) {
 361                 INIT_INI_ARRAY(&ah->iniModesRxGain,
 362 -                              ar9462_2p0_5g_xlna_only_rxgain);
 363 +                              ar9462_2p0_common_5g_xlna_only_rxgain);
 364                 INIT_INI_ARRAY(&ah->ini_modes_rxgain_5g_xlna,
 365                                ar9462_2p0_baseband_postamble_5g_xlna);
 366         }
 367 @@ -750,6 +834,9 @@ static void ar9003_hw_init_mode_gain_reg
 368  static void ar9003_hw_configpcipowersave(struct ath_hw *ah,
 369                                          bool power_off)
 370  {
 371 +       unsigned int i;
 372 +       struct ar5416IniArray *array;
 373 +
 374         /*
 375          * Increase L1 Entry Latency. Some WB222 boards don't have
 376          * this change in eeprom/OTP.
 377 @@ -775,18 +862,13 @@ static void ar9003_hw_configpcipowersave
 378          * Configire PCIE after Ini init. SERDES values now come from ini file
 379          * This enables PCIe low power mode.
 380          */
 381 -       if (ah->config.pcieSerDesWrite) {
 382 -               unsigned int i;
 383 -               struct ar5416IniArray *array;
 384 -
 385 -               array = power_off ? &ah->iniPcieSerdes :
 386 -                                   &ah->iniPcieSerdesLowPower;
 387 -
 388 -               for (i = 0; i < array->ia_rows; i++) {
 389 -                       REG_WRITE(ah,
 390 -                                 INI_RA(array, i, 0),
 391 -                                 INI_RA(array, i, 1));
 392 -               }
 393 +       array = power_off ? &ah->iniPcieSerdes :
 394 +               &ah->iniPcieSerdesLowPower;
 395 +
 396 +       for (i = 0; i < array->ia_rows; i++) {
 397 +               REG_WRITE(ah,
 398 +                         INI_RA(array, i, 0),
 399 +                         INI_RA(array, i, 1));
 400         }
 401  }
 402
 403 --- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
 404 +++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
 405 @@ -18,6 +18,20 @@
 406  #ifndef INITVALS_9340_H
 407  #define INITVALS_9340_H
 408
 409 +#define ar9340_1p0_mac_postamble ar9300_2p2_mac_postamble
 410 +
 411 +#define ar9340_1p0_soc_postamble ar9300_2p2_soc_postamble
 412 +
 413 +#define ar9340Modes_fast_clock_1p0 ar9300Modes_fast_clock_2p2
 414 +
 415 +#define ar9340Common_rx_gain_table_1p0 ar9300Common_rx_gain_table_2p2
 416 +
 417 +#define ar9340Common_wo_xlna_rx_gain_table_1p0 ar9300Common_wo_xlna_rx_gain_table_2p2
 418 +
 419 +#define ar9340_1p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
 420 +
 421 +#define ar9340_1p0_baseband_postamble_dfs_channel ar9300_2p2_baseband_postamble_dfs_channel
 422 +
 423  static const u32 ar9340_1p0_radio_postamble[][5] = {
 424         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 425         {0x000160ac, 0xa4646800, 0xa4646800, 0xa4646800, 0xa4646800},
 426 @@ -100,8 +114,6 @@ static const u32 ar9340Modes_lowest_ob_d
 427         {0x00016448, 0x24925266, 0x24925266, 0x24925266, 0x24925266},
 428  };
 429
 430 -#define ar9340Modes_fast_clock_1p0 ar9300Modes_fast_clock_2p2
 431 -
 432  static const u32 ar9340_1p0_radio_core[][2] = {
 433         /* Addr      allmodes  */
 434         {0x00016000, 0x36db6db6},
 435 @@ -215,16 +227,12 @@ static const u32 ar9340_1p0_radio_core_4
 436         {0x0000824c, 0x0001e800},
 437  };
 438
 439 -#define ar9340_1p0_mac_postamble ar9300_2p2_mac_postamble
 440 -
 441 -#define ar9340_1p0_soc_postamble ar9300_2p2_soc_postamble
 442 -
 443  static const u32 ar9340_1p0_baseband_postamble[][5] = {
 444         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 445         {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
 446         {0x00009820, 0x206a022e, 0x206a022e, 0x206a022e, 0x206a022e},
 447         {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
 448 -       {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
 449 +       {0x00009828, 0x06903081, 0x06903081, 0x09103881, 0x09103881},
 450         {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
 451         {0x00009830, 0x0000059c, 0x0000059c, 0x0000119c, 0x0000119c},
 452         {0x00009c00, 0x000000c4, 0x000000c4, 0x000000c4, 0x000000c4},
 453 @@ -340,9 +348,9 @@ static const u32 ar9340_1p0_baseband_cor
 454         {0x0000a370, 0x00000000},
 455         {0x0000a390, 0x00000001},
 456         {0x0000a394, 0x00000444},
 457 -       {0x0000a398, 0x001f0e0f},
 458 -       {0x0000a39c, 0x0075393f},
 459 -       {0x0000a3a0, 0xb79f6427},
 460 +       {0x0000a398, 0x00000000},
 461 +       {0x0000a39c, 0x210d0401},
 462 +       {0x0000a3a0, 0xab9a7144},
 463         {0x0000a3a4, 0x00000000},
 464         {0x0000a3a8, 0xaaaaaaaa},
 465         {0x0000a3ac, 0x3c466478},
 466 @@ -714,266 +722,6 @@ static const u32 ar9340Modes_ub124_tx_ga
 467         {0x0000b2e8, 0xfffe0000, 0xfffe0000, 0xfffc0000, 0xfffc0000},
 468  };
 469
 470 -static const u32 ar9340Common_rx_gain_table_1p0[][2] = {
 471 -       /* Addr      allmodes  */
 472 -       {0x0000a000, 0x00010000},
 473 -       {0x0000a004, 0x00030002},
 474 -       {0x0000a008, 0x00050004},
 475 -       {0x0000a00c, 0x00810080},
 476 -       {0x0000a010, 0x00830082},
 477 -       {0x0000a014, 0x01810180},
 478 -       {0x0000a018, 0x01830182},
 479 -       {0x0000a01c, 0x01850184},
 480 -       {0x0000a020, 0x01890188},
 481 -       {0x0000a024, 0x018b018a},
 482 -       {0x0000a028, 0x018d018c},
 483 -       {0x0000a02c, 0x01910190},
 484 -       {0x0000a030, 0x01930192},
 485 -       {0x0000a034, 0x01950194},
 486 -       {0x0000a038, 0x038a0196},
 487 -       {0x0000a03c, 0x038c038b},
 488 -       {0x0000a040, 0x0390038d},
 489 -       {0x0000a044, 0x03920391},
 490 -       {0x0000a048, 0x03940393},
 491 -       {0x0000a04c, 0x03960395},
 492 -       {0x0000a050, 0x00000000},
 493 -       {0x0000a054, 0x00000000},
 494 -       {0x0000a058, 0x00000000},
 495 -       {0x0000a05c, 0x00000000},
 496 -       {0x0000a060, 0x00000000},
 497 -       {0x0000a064, 0x00000000},
 498 -       {0x0000a068, 0x00000000},
 499 -       {0x0000a06c, 0x00000000},
 500 -       {0x0000a070, 0x00000000},
 501 -       {0x0000a074, 0x00000000},
 502 -       {0x0000a078, 0x00000000},
 503 -       {0x0000a07c, 0x00000000},
 504 -       {0x0000a080, 0x22222229},
 505 -       {0x0000a084, 0x1d1d1d1d},
 506 -       {0x0000a088, 0x1d1d1d1d},
 507 -       {0x0000a08c, 0x1d1d1d1d},
 508 -       {0x0000a090, 0x171d1d1d},
 509 -       {0x0000a094, 0x11111717},
 510 -       {0x0000a098, 0x00030311},
 511 -       {0x0000a09c, 0x00000000},
 512 -       {0x0000a0a0, 0x00000000},
 513 -       {0x0000a0a4, 0x00000000},
 514 -       {0x0000a0a8, 0x00000000},
 515 -       {0x0000a0ac, 0x00000000},
 516 -       {0x0000a0b0, 0x00000000},
 517 -       {0x0000a0b4, 0x00000000},
 518 -       {0x0000a0b8, 0x00000000},
 519 -       {0x0000a0bc, 0x00000000},
 520 -       {0x0000a0c0, 0x001f0000},
 521 -       {0x0000a0c4, 0x01000101},
 522 -       {0x0000a0c8, 0x011e011f},
 523 -       {0x0000a0cc, 0x011c011d},
 524 -       {0x0000a0d0, 0x02030204},
 525 -       {0x0000a0d4, 0x02010202},
 526 -       {0x0000a0d8, 0x021f0200},
 527 -       {0x0000a0dc, 0x0302021e},
 528 -       {0x0000a0e0, 0x03000301},
 529 -       {0x0000a0e4, 0x031e031f},
 530 -       {0x0000a0e8, 0x0402031d},
 531 -       {0x0000a0ec, 0x04000401},
 532 -       {0x0000a0f0, 0x041e041f},
 533 -       {0x0000a0f4, 0x0502041d},
 534 -       {0x0000a0f8, 0x05000501},
 535 -       {0x0000a0fc, 0x051e051f},
 536 -       {0x0000a100, 0x06010602},
 537 -       {0x0000a104, 0x061f0600},
 538 -       {0x0000a108, 0x061d061e},
 539 -       {0x0000a10c, 0x07020703},
 540 -       {0x0000a110, 0x07000701},
 541 -       {0x0000a114, 0x00000000},
 542 -       {0x0000a118, 0x00000000},
 543 -       {0x0000a11c, 0x00000000},
 544 -       {0x0000a120, 0x00000000},
 545 -       {0x0000a124, 0x00000000},
 546 -       {0x0000a128, 0x00000000},
 547 -       {0x0000a12c, 0x00000000},
 548 -       {0x0000a130, 0x00000000},
 549 -       {0x0000a134, 0x00000000},
 550 -       {0x0000a138, 0x00000000},
 551 -       {0x0000a13c, 0x00000000},
 552 -       {0x0000a140, 0x001f0000},
 553 -       {0x0000a144, 0x01000101},
 554 -       {0x0000a148, 0x011e011f},
 555 -       {0x0000a14c, 0x011c011d},
 556 -       {0x0000a150, 0x02030204},
 557 -       {0x0000a154, 0x02010202},
 558 -       {0x0000a158, 0x021f0200},
 559 -       {0x0000a15c, 0x0302021e},
 560 -       {0x0000a160, 0x03000301},
 561 -       {0x0000a164, 0x031e031f},
 562 -       {0x0000a168, 0x0402031d},
 563 -       {0x0000a16c, 0x04000401},
 564 -       {0x0000a170, 0x041e041f},
 565 -       {0x0000a174, 0x0502041d},
 566 -       {0x0000a178, 0x05000501},
 567 -       {0x0000a17c, 0x051e051f},
 568 -       {0x0000a180, 0x06010602},
 569 -       {0x0000a184, 0x061f0600},
 570 -       {0x0000a188, 0x061d061e},
 571 -       {0x0000a18c, 0x07020703},
 572 -       {0x0000a190, 0x07000701},
 573 -       {0x0000a194, 0x00000000},
 574 -       {0x0000a198, 0x00000000},
 575 -       {0x0000a19c, 0x00000000},
 576 -       {0x0000a1a0, 0x00000000},
 577 -       {0x0000a1a4, 0x00000000},
 578 -       {0x0000a1a8, 0x00000000},
 579 -       {0x0000a1ac, 0x00000000},
 580 -       {0x0000a1b0, 0x00000000},
 581 -       {0x0000a1b4, 0x00000000},
 582 -       {0x0000a1b8, 0x00000000},
 583 -       {0x0000a1bc, 0x00000000},
 584 -       {0x0000a1c0, 0x00000000},
 585 -       {0x0000a1c4, 0x00000000},
 586 -       {0x0000a1c8, 0x00000000},
 587 -       {0x0000a1cc, 0x00000000},
 588 -       {0x0000a1d0, 0x00000000},
 589 -       {0x0000a1d4, 0x00000000},
 590 -       {0x0000a1d8, 0x00000000},
 591 -       {0x0000a1dc, 0x00000000},
 592 -       {0x0000a1e0, 0x00000000},
 593 -       {0x0000a1e4, 0x00000000},
 594 -       {0x0000a1e8, 0x00000000},
 595 -       {0x0000a1ec, 0x00000000},
 596 -       {0x0000a1f0, 0x00000396},
 597 -       {0x0000a1f4, 0x00000396},
 598 -       {0x0000a1f8, 0x00000396},
 599 -       {0x0000a1fc, 0x00000196},
 600 -       {0x0000b000, 0x00010000},
 601 -       {0x0000b004, 0x00030002},
 602 -       {0x0000b008, 0x00050004},
 603 -       {0x0000b00c, 0x00810080},
 604 -       {0x0000b010, 0x00830082},
 605 -       {0x0000b014, 0x01810180},
 606 -       {0x0000b018, 0x01830182},
 607 -       {0x0000b01c, 0x01850184},
 608 -       {0x0000b020, 0x02810280},
 609 -       {0x0000b024, 0x02830282},
 610 -       {0x0000b028, 0x02850284},
 611 -       {0x0000b02c, 0x02890288},
 612 -       {0x0000b030, 0x028b028a},
 613 -       {0x0000b034, 0x0388028c},
 614 -       {0x0000b038, 0x038a0389},
 615 -       {0x0000b03c, 0x038c038b},
 616 -       {0x0000b040, 0x0390038d},
 617 -       {0x0000b044, 0x03920391},
 618 -       {0x0000b048, 0x03940393},
 619 -       {0x0000b04c, 0x03960395},
 620 -       {0x0000b050, 0x00000000},
 621 -       {0x0000b054, 0x00000000},
 622 -       {0x0000b058, 0x00000000},
 623 -       {0x0000b05c, 0x00000000},
 624 -       {0x0000b060, 0x00000000},
 625 -       {0x0000b064, 0x00000000},
 626 -       {0x0000b068, 0x00000000},
 627 -       {0x0000b06c, 0x00000000},
 628 -       {0x0000b070, 0x00000000},
 629 -       {0x0000b074, 0x00000000},
 630 -       {0x0000b078, 0x00000000},
 631 -       {0x0000b07c, 0x00000000},
 632 -       {0x0000b080, 0x23232323},
 633 -       {0x0000b084, 0x21232323},
 634 -       {0x0000b088, 0x19191c1e},
 635 -       {0x0000b08c, 0x12141417},
 636 -       {0x0000b090, 0x07070e0e},
 637 -       {0x0000b094, 0x03030305},
 638 -       {0x0000b098, 0x00000003},
 639 -       {0x0000b09c, 0x00000000},
 640 -       {0x0000b0a0, 0x00000000},
 641 -       {0x0000b0a4, 0x00000000},
 642 -       {0x0000b0a8, 0x00000000},
 643 -       {0x0000b0ac, 0x00000000},
 644 -       {0x0000b0b0, 0x00000000},
 645 -       {0x0000b0b4, 0x00000000},
 646 -       {0x0000b0b8, 0x00000000},
 647 -       {0x0000b0bc, 0x00000000},
 648 -       {0x0000b0c0, 0x003f0020},
 649 -       {0x0000b0c4, 0x00400041},
 650 -       {0x0000b0c8, 0x0140005f},
 651 -       {0x0000b0cc, 0x0160015f},
 652 -       {0x0000b0d0, 0x017e017f},
 653 -       {0x0000b0d4, 0x02410242},
 654 -       {0x0000b0d8, 0x025f0240},
 655 -       {0x0000b0dc, 0x027f0260},
 656 -       {0x0000b0e0, 0x0341027e},
 657 -       {0x0000b0e4, 0x035f0340},
 658 -       {0x0000b0e8, 0x037f0360},
 659 -       {0x0000b0ec, 0x04400441},
 660 -       {0x0000b0f0, 0x0460045f},
 661 -       {0x0000b0f4, 0x0541047f},
 662 -       {0x0000b0f8, 0x055f0540},
 663 -       {0x0000b0fc, 0x057f0560},
 664 -       {0x0000b100, 0x06400641},
 665 -       {0x0000b104, 0x0660065f},
 666 -       {0x0000b108, 0x067e067f},
 667 -       {0x0000b10c, 0x07410742},
 668 -       {0x0000b110, 0x075f0740},
 669 -       {0x0000b114, 0x077f0760},
 670 -       {0x0000b118, 0x07800781},
 671 -       {0x0000b11c, 0x07a0079f},
 672 -       {0x0000b120, 0x07c107bf},
 673 -       {0x0000b124, 0x000007c0},
 674 -       {0x0000b128, 0x00000000},
 675 -       {0x0000b12c, 0x00000000},
 676 -       {0x0000b130, 0x00000000},
 677 -       {0x0000b134, 0x00000000},
 678 -       {0x0000b138, 0x00000000},
 679 -       {0x0000b13c, 0x00000000},
 680 -       {0x0000b140, 0x003f0020},
 681 -       {0x0000b144, 0x00400041},
 682 -       {0x0000b148, 0x0140005f},
 683 -       {0x0000b14c, 0x0160015f},
 684 -       {0x0000b150, 0x017e017f},
 685 -       {0x0000b154, 0x02410242},
 686 -       {0x0000b158, 0x025f0240},
 687 -       {0x0000b15c, 0x027f0260},
 688 -       {0x0000b160, 0x0341027e},
 689 -       {0x0000b164, 0x035f0340},
 690 -       {0x0000b168, 0x037f0360},
 691 -       {0x0000b16c, 0x04400441},
 692 -       {0x0000b170, 0x0460045f},
 693 -       {0x0000b174, 0x0541047f},
 694 -       {0x0000b178, 0x055f0540},
 695 -       {0x0000b17c, 0x057f0560},
 696 -       {0x0000b180, 0x06400641},
 697 -       {0x0000b184, 0x0660065f},
 698 -       {0x0000b188, 0x067e067f},
 699 -       {0x0000b18c, 0x07410742},
 700 -       {0x0000b190, 0x075f0740},
 701 -       {0x0000b194, 0x077f0760},
 702 -       {0x0000b198, 0x07800781},
 703 -       {0x0000b19c, 0x07a0079f},
 704 -       {0x0000b1a0, 0x07c107bf},
 705 -       {0x0000b1a4, 0x000007c0},
 706 -       {0x0000b1a8, 0x00000000},
 707 -       {0x0000b1ac, 0x00000000},
 708 -       {0x0000b1b0, 0x00000000},
 709 -       {0x0000b1b4, 0x00000000},
 710 -       {0x0000b1b8, 0x00000000},
 711 -       {0x0000b1bc, 0x00000000},
 712 -       {0x0000b1c0, 0x00000000},
 713 -       {0x0000b1c4, 0x00000000},
 714 -       {0x0000b1c8, 0x00000000},
 715 -       {0x0000b1cc, 0x00000000},
 716 -       {0x0000b1d0, 0x00000000},
 717 -       {0x0000b1d4, 0x00000000},
 718 -       {0x0000b1d8, 0x00000000},
 719 -       {0x0000b1dc, 0x00000000},
 720 -       {0x0000b1e0, 0x00000000},
 721 -       {0x0000b1e4, 0x00000000},
 722 -       {0x0000b1e8, 0x00000000},
 723 -       {0x0000b1ec, 0x00000000},
 724 -       {0x0000b1f0, 0x00000396},
 725 -       {0x0000b1f4, 0x00000396},
 726 -       {0x0000b1f8, 0x00000396},
 727 -       {0x0000b1fc, 0x00000196},
 728 -};
 729 -
 730  static const u32 ar9340Modes_low_ob_db_tx_gain_table_1p0[][5] = {
 731         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 732         {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
 733 @@ -1437,8 +1185,6 @@ static const u32 ar9340_1p0_mac_core[][2
 734         {0x000083d0, 0x000101ff},
 735  };
 736
 737 -#define ar9340Common_wo_xlna_rx_gain_table_1p0 ar9300Common_wo_xlna_rx_gain_table_2p2
 738 -
 739  static const u32 ar9340_1p0_soc_preamble[][2] = {
 740         /* Addr      allmodes  */
 741         {0x00007008, 0x00000000},
 742 @@ -1447,4 +1193,106 @@ static const u32 ar9340_1p0_soc_preamble
 743         {0x00007038, 0x000004c2},
 744  };
 745
 746 +static const u32 ar9340_cus227_tx_gain_table_1p0[][5] = {
 747 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
 748 +       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
 749 +       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
 750 +       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
 751 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 752 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
 753 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 754 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
 755 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
 756 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
 757 +       {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
 758 +       {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
 759 +       {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402},
 760 +       {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
 761 +       {0x0000a520, 0x2c022220, 0x2c022220, 0x1b000603, 0x1b000603},
 762 +       {0x0000a524, 0x30022222, 0x30022222, 0x1f000a02, 0x1f000a02},
 763 +       {0x0000a528, 0x35022225, 0x35022225, 0x23000a04, 0x23000a04},
 764 +       {0x0000a52c, 0x3b02222a, 0x3b02222a, 0x26000a20, 0x26000a20},
 765 +       {0x0000a530, 0x3f02222c, 0x3f02222c, 0x2a000e20, 0x2a000e20},
 766 +       {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22},
 767 +       {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24},
 768 +       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640},
 769 +       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660},
 770 +       {0x0000a544, 0x5302266c, 0x5302266c, 0x3b001861, 0x3b001861},
 771 +       {0x0000a548, 0x5702286c, 0x5702286c, 0x3e001a81, 0x3e001a81},
 772 +       {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42001a83, 0x42001a83},
 773 +       {0x0000a550, 0x61024a6c, 0x61024a6c, 0x44001c84, 0x44001c84},
 774 +       {0x0000a554, 0x66026a6c, 0x66026a6c, 0x48001ce3, 0x48001ce3},
 775 +       {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c001ce5, 0x4c001ce5},
 776 +       {0x0000a55c, 0x7002708c, 0x7002708c, 0x50001ce9, 0x50001ce9},
 777 +       {0x0000a560, 0x7302b08a, 0x7302b08a, 0x54001ceb, 0x54001ceb},
 778 +       {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 779 +       {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 780 +       {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 781 +       {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 782 +       {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 783 +       {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 784 +       {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001eec, 0x56001eec},
 785 +       {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
 786 +       {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
 787 +       {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
 788 +       {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
 789 +       {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
 790 +       {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400},
 791 +       {0x0000a598, 0x21820220, 0x21820220, 0x15800402, 0x15800402},
 792 +       {0x0000a59c, 0x27820223, 0x27820223, 0x19800404, 0x19800404},
 793 +       {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603},
 794 +       {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02},
 795 +       {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04},
 796 +       {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20},
 797 +       {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20},
 798 +       {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22},
 799 +       {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24},
 800 +       {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640},
 801 +       {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660},
 802 +       {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b801861, 0x3b801861},
 803 +       {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e801a81, 0x3e801a81},
 804 +       {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x42801a83, 0x42801a83},
 805 +       {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x44801c84, 0x44801c84},
 806 +       {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x48801ce3, 0x48801ce3},
 807 +       {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x4c801ce5, 0x4c801ce5},
 808 +       {0x0000a5dc, 0x7086308c, 0x7086308c, 0x50801ce9, 0x50801ce9},
 809 +       {0x0000a5e0, 0x738a308a, 0x738a308a, 0x54801ceb, 0x54801ceb},
 810 +       {0x0000a5e4, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 811 +       {0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 812 +       {0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 813 +       {0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 814 +       {0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 815 +       {0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 816 +       {0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801eec, 0x56801eec},
 817 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 818 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 819 +       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 820 +       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 821 +       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
 822 +       {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
 823 +       {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
 824 +       {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
 825 +       {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
 826 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
 827 +       {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
 828 +       {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
 829 +       {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
 830 +       {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
 831 +       {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
 832 +       {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
 833 +       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
 834 +       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
 835 +       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
 836 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
 837 +       {0x00016044, 0x056db2db, 0x056db2db, 0x03b6d2e4, 0x03b6d2e4},
 838 +       {0x00016048, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
 839 +       {0x00016280, 0x01000015, 0x01000015, 0x01001015, 0x01001015},
 840 +       {0x00016288, 0x30318000, 0x30318000, 0x00318000, 0x00318000},
 841 +       {0x00016444, 0x056db2db, 0x056db2db, 0x03b6d2e4, 0x03b6d2e4},
 842 +       {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
 843 +       {0x0000a3a4, 0x00000011, 0x00000011, 0x00000011, 0x00000011},
 844 +       {0x0000a3a8, 0x3c3c3c3c, 0x3c3c3c3c, 0x3c3c3c3c, 0x3c3c3c3c},
 845 +       {0x0000a3ac, 0x30303030, 0x30303030, 0x30303030, 0x30303030},
 846 +};
 847 +
 848  #endif /* INITVALS_9340_H */
 849 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
 850 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
 851 @@ -459,6 +459,7 @@ void ath_check_ani(struct ath_softc *sc)
 852  int ath_update_survey_stats(struct ath_softc *sc);
 853  void ath_update_survey_nf(struct ath_softc *sc, int channel);
 854  void ath9k_queue_reset(struct ath_softc *sc, enum ath_reset_type type);
 855 +void ath_ps_full_sleep(unsigned long data);
 856
 857  /**********/
 858  /* BTCOEX */
 859 @@ -570,6 +571,34 @@ static inline void ath_fill_led_pin(stru
 860  }
 861  #endif
 862
 863 +/************************/
 864 +/* Wake on Wireless LAN */
 865 +/************************/
 866 +
 867 +#ifdef CONFIG_ATH9K_WOW
 868 +void ath9k_init_wow(struct ieee80211_hw *hw);
 869 +int ath9k_suspend(struct ieee80211_hw *hw,
 870 +                 struct cfg80211_wowlan *wowlan);
 871 +int ath9k_resume(struct ieee80211_hw *hw);
 872 +void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled);
 873 +#else
 874 +static inline void ath9k_init_wow(struct ieee80211_hw *hw)
 875 +{
 876 +}
 877 +static inline int ath9k_suspend(struct ieee80211_hw *hw,
 878 +                               struct cfg80211_wowlan *wowlan)
 879 +{
 880 +       return 0;
 881 +}
 882 +static inline int ath9k_resume(struct ieee80211_hw *hw)
 883 +{
 884 +       return 0;
 885 +}
 886 +static inline void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
 887 +{
 888 +}
 889 +#endif /* CONFIG_ATH9K_WOW */
 890 +
 891  /*******************************/
 892  /* Antenna diversity/combining */
 893  /*******************************/
 894 @@ -632,15 +661,16 @@ void ath_ant_comb_scan(struct ath_softc
 895  /* Main driver core */
 896  /********************/
 897
 898 -#define ATH9K_PCI_CUS198      0x0001
 899 -#define ATH9K_PCI_CUS230      0x0002
 900 -#define ATH9K_PCI_CUS217      0x0004
 901 -#define ATH9K_PCI_CUS252      0x0008
 902 -#define ATH9K_PCI_WOW         0x0010
 903 -#define ATH9K_PCI_BT_ANT_DIV  0x0020
 904 -#define ATH9K_PCI_D3_L1_WAR   0x0040
 905 -#define ATH9K_PCI_AR9565_1ANT 0x0080
 906 -#define ATH9K_PCI_AR9565_2ANT 0x0100
 907 +#define ATH9K_PCI_CUS198          0x0001
 908 +#define ATH9K_PCI_CUS230          0x0002
 909 +#define ATH9K_PCI_CUS217          0x0004
 910 +#define ATH9K_PCI_CUS252          0x0008
 911 +#define ATH9K_PCI_WOW             0x0010
 912 +#define ATH9K_PCI_BT_ANT_DIV      0x0020
 913 +#define ATH9K_PCI_D3_L1_WAR       0x0040
 914 +#define ATH9K_PCI_AR9565_1ANT     0x0080
 915 +#define ATH9K_PCI_AR9565_2ANT     0x0100
 916 +#define ATH9K_PCI_NO_PLL_PWRSAVE  0x0200
 917
 918  /*
 919   * Default cache line size, in bytes.
 920 @@ -723,6 +753,7 @@ struct ath_softc {
 921         struct work_struct hw_check_work;
 922         struct work_struct hw_reset_work;
 923         struct completion paprd_complete;
 924 +       wait_queue_head_t tx_wait;
 925
 926         unsigned int hw_busy_count;
 927         unsigned long sc_flags;
 928 @@ -759,6 +790,7 @@ struct ath_softc {
 929         struct delayed_work tx_complete_work;
 930         struct delayed_work hw_pll_work;
 931         struct timer_list rx_poll_timer;
 932 +       struct timer_list sleep_timer;
 933
 934  #ifdef CPTCFG_ATH9K_BTCOEX_SUPPORT
 935         struct ath_btcoex btcoex;
 936 @@ -783,7 +815,7 @@ struct ath_softc {
 937         bool tx99_state;
 938         s16 tx99_power;
 939
 940 -#ifdef CONFIG_PM_SLEEP
 941 +#ifdef CONFIG_ATH9K_WOW
 942         atomic_t wow_got_bmiss_intr;
 943         atomic_t wow_sleep_proc_intr; /* in the middle of WoW sleep ? */
 944         u32 wow_intr_before_sleep;
 945 @@ -946,10 +978,25 @@ struct fft_sample_ht20_40 {
 946         u8 data[SPECTRAL_HT20_40_NUM_BINS];
 947  } __packed;
 948
 949 -int ath9k_tx99_init(struct ath_softc *sc);
 950 -void ath9k_tx99_deinit(struct ath_softc *sc);
 951 +/********/
 952 +/* TX99 */
 953 +/********/
 954 +
 955 +#ifdef CONFIG_ATH9K_TX99
 956 +void ath9k_tx99_init_debug(struct ath_softc *sc);
 957  int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
 958                     struct ath_tx_control *txctl);
 959 +#else
 960 +static inline void ath9k_tx99_init_debug(struct ath_softc *sc)
 961 +{
 962 +}
 963 +static inline int ath9k_tx99_send(struct ath_softc *sc,
 964 +                                 struct sk_buff *skb,
 965 +                                 struct ath_tx_control *txctl)
 966 +{
 967 +       return 0;
 968 +}
 969 +#endif /* CONFIG_ATH9K_TX99 */
 970
 971  void ath9k_tasklet(unsigned long data);
 972  int ath_cabq_update(struct ath_softc *);
 973 @@ -966,6 +1013,9 @@ extern bool is_ath9k_unloaded;
 974
 975  u8 ath9k_parse_mpdudensity(u8 mpdudensity);
 976  irqreturn_t ath_isr(int irq, void *dev);
 977 +int ath_reset(struct ath_softc *sc);
 978 +void ath_cancel_work(struct ath_softc *sc);
 979 +void ath_restart_work(struct ath_softc *sc);
 980  int ath9k_init_device(u16 devid, struct ath_softc *sc,
 981                     const struct ath_bus_ops *bus_ops);
 982  void ath9k_deinit_device(struct ath_softc *sc);
 983 --- a/drivers/net/wireless/ath/ath9k/debug.c
 984 +++ b/drivers/net/wireless/ath/ath9k/debug.c
 985 @@ -1782,111 +1782,6 @@ void ath9k_deinit_debug(struct ath_softc
 986         }
 987  }
 988
 989 -static ssize_t read_file_tx99(struct file *file, char __user *user_buf,
 990 -                             size_t count, loff_t *ppos)
 991 -{
 992 -       struct ath_softc *sc = file->private_data;
 993 -       char buf[3];
 994 -       unsigned int len;
 995 -
 996 -       len = sprintf(buf, "%d\n", sc->tx99_state);
 997 -       return simple_read_from_buffer(user_buf, count, ppos, buf, len);
 998 -}
 999 -
1000 -static ssize_t write_file_tx99(struct file *file, const char __user *user_buf,
1001 -                              size_t count, loff_t *ppos)
1002 -{
1003 -       struct ath_softc *sc = file->private_data;
1004 -       struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1005 -       char buf[32];
1006 -       bool start;
1007 -       ssize_t len;
1008 -       int r;
1009 -
1010 -       if (sc->nvifs > 1)
1011 -               return -EOPNOTSUPP;
1012 -
1013 -       len = min(count, sizeof(buf) - 1);
1014 -       if (copy_from_user(buf, user_buf, len))
1015 -               return -EFAULT;
1016 -
1017 -       if (strtobool(buf, &start))
1018 -               return -EINVAL;
1019 -
1020 -       if (start == sc->tx99_state) {
1021 -               if (!start)
1022 -                       return count;
1023 -               ath_dbg(common, XMIT, "Resetting TX99\n");
1024 -               ath9k_tx99_deinit(sc);
1025 -       }
1026 -
1027 -       if (!start) {
1028 -               ath9k_tx99_deinit(sc);
1029 -               return count;
1030 -       }
1031 -
1032 -       r = ath9k_tx99_init(sc);
1033 -       if (r)
1034 -               return r;
1035 -
1036 -       return count;
1037 -}
1038 -
1039 -static const struct file_operations fops_tx99 = {
1040 -       .read = read_file_tx99,
1041 -       .write = write_file_tx99,
1042 -       .open = simple_open,
1043 -       .owner = THIS_MODULE,
1044 -       .llseek = default_llseek,
1045 -};
1046 -
1047 -static ssize_t read_file_tx99_power(struct file *file,
1048 -                                   char __user *user_buf,
1049 -                                   size_t count, loff_t *ppos)
1050 -{
1051 -       struct ath_softc *sc = file->private_data;
1052 -       char buf[32];
1053 -       unsigned int len;
1054 -
1055 -       len = sprintf(buf, "%d (%d dBm)\n",
1056 -                     sc->tx99_power,
1057 -                     sc->tx99_power / 2);
1058 -
1059 -       return simple_read_from_buffer(user_buf, count, ppos, buf, len);
1060 -}
1061 -
1062 -static ssize_t write_file_tx99_power(struct file *file,
1063 -                                    const char __user *user_buf,
1064 -                                    size_t count, loff_t *ppos)
1065 -{
1066 -       struct ath_softc *sc = file->private_data;
1067 -       int r;
1068 -       u8 tx_power;
1069 -
1070 -       r = kstrtou8_from_user(user_buf, count, 0, &tx_power);
1071 -       if (r)
1072 -               return r;
1073 -
1074 -       if (tx_power > MAX_RATE_POWER)
1075 -               return -EINVAL;
1076 -
1077 -       sc->tx99_power = tx_power;
1078 -
1079 -       ath9k_ps_wakeup(sc);
1080 -       ath9k_hw_tx99_set_txpower(sc->sc_ah, sc->tx99_power);
1081 -       ath9k_ps_restore(sc);
1082 -
1083 -       return count;
1084 -}
1085 -
1086 -static const struct file_operations fops_tx99_power = {
1087 -       .read = read_file_tx99_power,
1088 -       .write = write_file_tx99_power,
1089 -       .open = simple_open,
1090 -       .owner = THIS_MODULE,
1091 -       .llseek = default_llseek,
1092 -};
1093 -
1094  int ath9k_init_debug(struct ath_hw *ah)
1095  {
1096         struct ath_common *common = ath9k_hw_common(ah);
1097 @@ -1903,6 +1798,7 @@ int ath9k_init_debug(struct ath_hw *ah)
1098  #endif
1099
1100         ath9k_dfs_init_debug(sc);
1101 +       ath9k_tx99_init_debug(sc);
1102
1103         debugfs_create_file("dma", S_IRUSR, sc->debug.debugfs_phy, sc,
1104                             &fops_dma);
1105 @@ -1978,15 +1874,6 @@ int ath9k_init_debug(struct ath_hw *ah)
1106         debugfs_create_file("btcoex", S_IRUSR, sc->debug.debugfs_phy, sc,
1107                             &fops_btcoex);
1108  #endif
1109 -       if (config_enabled(CPTCFG_ATH9K_TX99) &&
1110 -           AR_SREV_9300_20_OR_LATER(ah)) {
1111 -               debugfs_create_file("tx99", S_IRUSR | S_IWUSR,
1112 -                                   sc->debug.debugfs_phy, sc,
1113 -                                   &fops_tx99);
1114 -               debugfs_create_file("tx99_power", S_IRUSR | S_IWUSR,
1115 -                                   sc->debug.debugfs_phy, sc,
1116 -                                   &fops_tx99_power);
1117 -       }
1118
1119         return 0;
1120  }
1121 --- a/drivers/net/wireless/ath/ath9k/hw.c
1122 +++ b/drivers/net/wireless/ath/ath9k/hw.c
1123 @@ -17,6 +17,7 @@
1124  #include <linux/io.h>
1125  #include <linux/slab.h>
1126  #include <linux/module.h>
1127 +#include <linux/time.h>
1128  #include <asm/unaligned.h>
1129
1130  #include "hw.h"
1131 @@ -454,7 +455,6 @@ static void ath9k_hw_init_config(struct
1132         }
1133
1134         ah->config.rx_intr_mitigation = true;
1135 -       ah->config.pcieSerDesWrite = true;
1136
1137         /*
1138          * We need this for PCI devices only (Cardbus, PCI, miniPCI)
1139 @@ -549,11 +549,11 @@ static int ath9k_hw_post_init(struct ath
1140          * EEPROM needs to be initialized before we do this.
1141          * This is required for regulatory compliance.
1142          */
1143 -       if (AR_SREV_9462(ah) || AR_SREV_9565(ah)) {
1144 +       if (AR_SREV_9300_20_OR_LATER(ah)) {
1145                 u16 regdmn = ah->eep_ops->get_eeprom(ah, EEP_REG_0);
1146                 if ((regdmn & 0xF0) == CTL_FCC) {
1147 -                       ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_2GHZ;
1148 -                       ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_5GHZ;
1149 +                       ah->nf_2g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_2GHZ;
1150 +                       ah->nf_5g.max = AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_5GHZ;
1151                 }
1152         }
1153
1154 @@ -1502,8 +1502,9 @@ static bool ath9k_hw_channel_change(stru
1155         int r;
1156
1157         if (pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) {
1158 -               band_switch = IS_CHAN_5GHZ(ah->curchan) != IS_CHAN_5GHZ(chan);
1159 -               mode_diff = (chan->channelFlags != ah->curchan->channelFlags);
1160 +               u32 flags_diff = chan->channelFlags ^ ah->curchan->channelFlags;
1161 +               band_switch = !!(flags_diff & CHANNEL_5GHZ);
1162 +               mode_diff = !!(flags_diff & ~CHANNEL_HT);
1163         }
1164
1165         for (qnum = 0; qnum < AR_NUM_QCU; qnum++) {
1166 @@ -1815,7 +1816,7 @@ static int ath9k_hw_do_fastcc(struct ath
1167          * If cross-band fcc is not supoprted, bail out if channelFlags differ.
1168          */
1169         if (!(pCap->hw_caps & ATH9K_HW_CAP_FCC_BAND_SWITCH) &&
1170 -           chan->channelFlags != ah->curchan->channelFlags)
1171 +           ((chan->channelFlags ^ ah->curchan->channelFlags) & ~CHANNEL_HT))
1172                 goto fail;
1173
1174         if (!ath9k_hw_check_alive(ah))
1175 @@ -1856,10 +1857,12 @@ int ath9k_hw_reset(struct ath_hw *ah, st
1176                    struct ath9k_hw_cal_data *caldata, bool fastcc)
1177  {
1178         struct ath_common *common = ath9k_hw_common(ah);
1179 +       struct timespec ts;
1180         u32 saveLedState;
1181         u32 saveDefAntenna;
1182         u32 macStaId1;
1183         u64 tsf = 0;
1184 +       s64 usec = 0;
1185         int r;
1186         bool start_mci_reset = false;
1187         bool save_fullsleep = ah->chip_fullsleep;
1188 @@ -1902,10 +1905,10 @@ int ath9k_hw_reset(struct ath_hw *ah, st
1189
1190         macStaId1 = REG_READ(ah, AR_STA_ID1) & AR_STA_ID1_BASE_RATE_11B;
1191
1192 -       /* For chips on which RTC reset is done, save TSF before it gets cleared */
1193 -       if (AR_SREV_9100(ah) ||
1194 -           (AR_SREV_9280(ah) && ah->eep_ops->get_eeprom(ah, EEP_OL_PWRCTRL)))
1195 -               tsf = ath9k_hw_gettsf64(ah);
1196 +       /* Save TSF before chip reset, a cold reset clears it */
1197 +       tsf = ath9k_hw_gettsf64(ah);
1198 +       getrawmonotonic(&ts);
1199 +       usec = ts.tv_sec * 1000 + ts.tv_nsec / 1000;
1200
1201         saveLedState = REG_READ(ah, AR_CFG_LED) &
1202                 (AR_CFG_LED_ASSOC_CTL | AR_CFG_LED_MODE_SEL |
1203 @@ -1938,8 +1941,9 @@ int ath9k_hw_reset(struct ath_hw *ah, st
1204         }
1205
1206         /* Restore TSF */
1207 -       if (tsf)
1208 -               ath9k_hw_settsf64(ah, tsf);
1209 +       getrawmonotonic(&ts);
1210 +       usec = ts.tv_sec * 1000 + ts.tv_nsec / 1000 - usec;
1211 +       ath9k_hw_settsf64(ah, tsf + usec);
1212
1213         if (AR_SREV_9280_20_OR_LATER(ah))
1214                 REG_SET_BIT(ah, AR_GPIO_INPUT_EN_VAL, AR_GPIO_JTAG_DISABLE);
1215 --- a/drivers/net/wireless/ath/ath9k/hw.h
1216 +++ b/drivers/net/wireless/ath/ath9k/hw.h
1217 @@ -283,7 +283,6 @@ struct ath9k_ops_config {
1218         int additional_swba_backoff;
1219         int ack_6mb;
1220         u32 cwm_ignore_extcca;
1221 -       bool pcieSerDesWrite;
1222         u8 pcie_clock_req;
1223         u32 pcie_waen;
1224         u8 analog_shiftreg;
1225 @@ -316,6 +315,8 @@ struct ath9k_ops_config {
1226         u32 ant_ctrl_comm2g_switch_enable;
1227         bool xatten_margin_cfg;
1228         bool alt_mingainidx;
1229 +       bool no_pll_pwrsave;
1230 +       bool tx_gain_buffalo;
1231  };
1232
1233  enum ath9k_int {
1234 @@ -864,6 +865,7 @@ struct ath_hw {
1235         u32 gpio_mask;
1236         u32 gpio_val;
1237
1238 +       struct ar5416IniArray ini_dfs;
1239         struct ar5416IniArray iniModes;
1240         struct ar5416IniArray iniCommon;
1241         struct ar5416IniArray iniBB_RfGain;
1242 @@ -920,7 +922,7 @@ struct ath_hw {
1243         /* Enterprise mode cap */
1244         u32 ent_mode;
1245
1246 -#ifdef CONFIG_PM_SLEEP
1247 +#ifdef CONFIG_ATH9K_WOW
1248         u32 wow_event_mask;
1249  #endif
1250         bool is_clk_25mhz;
1251 @@ -1126,7 +1128,7 @@ ath9k_hw_get_btcoex_scheme(struct ath_hw
1252  #endif /* CPTCFG_ATH9K_BTCOEX_SUPPORT */
1253
1254
1255 -#ifdef CONFIG_PM_SLEEP
1256 +#ifdef CONFIG_ATH9K_WOW
1257  const char *ath9k_hw_wow_event_to_string(u32 wow_event);
1258  void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
1259                                 u8 *user_mask, int pattern_count,
1260 --- a/drivers/net/wireless/ath/ath9k/init.c
1261 +++ b/drivers/net/wireless/ath/ath9k/init.c
1262 @@ -554,7 +554,7 @@ static void ath9k_init_misc(struct ath_s
1263         sc->spec_config.fft_period = 0xF;
1264  }
1265
1266 -static void ath9k_init_platform(struct ath_softc *sc)
1267 +static void ath9k_init_pcoem_platform(struct ath_softc *sc)
1268  {
1269         struct ath_hw *ah = sc->sc_ah;
1270         struct ath9k_hw_capabilities *pCap = &ah->caps;
1271 @@ -609,6 +609,11 @@ static void ath9k_init_platform(struct a
1272                 ah->config.pcie_waen = 0x0040473b;
1273                 ath_info(common, "Enable WAR for ASPM D3/L1\n");
1274         }
1275 +
1276 +       if (sc->driver_data & ATH9K_PCI_NO_PLL_PWRSAVE) {
1277 +               ah->config.no_pll_pwrsave = true;
1278 +               ath_info(common, "Disable PLL PowerSave\n");
1279 +       }
1280  }
1281
1282  static void ath9k_eeprom_request_cb(const struct firmware *eeprom_blob,
1283 @@ -656,6 +661,27 @@ static void ath9k_eeprom_release(struct
1284         release_firmware(sc->sc_ah->eeprom_blob);
1285  }
1286
1287 +static int ath9k_init_soc_platform(struct ath_softc *sc)
1288 +{
1289 +       struct ath9k_platform_data *pdata = sc->dev->platform_data;
1290 +       struct ath_hw *ah = sc->sc_ah;
1291 +       int ret = 0;
1292 +
1293 +       if (!pdata)
1294 +               return 0;
1295 +
1296 +       if (pdata->eeprom_name) {
1297 +               ret = ath9k_eeprom_request(sc, pdata->eeprom_name);
1298 +               if (ret)
1299 +                       return ret;
1300 +       }
1301 +
1302 +       if (pdata->tx_gain_buffalo)
1303 +               ah->config.tx_gain_buffalo = true;
1304 +
1305 +       return ret;
1306 +}
1307 +
1308  static int ath9k_init_softc(u16 devid, struct ath_softc *sc,
1309                             const struct ath_bus_ops *bus_ops)
1310  {
1311 @@ -683,6 +709,7 @@ static int ath9k_init_softc(u16 devid, s
1312         common = ath9k_hw_common(ah);
1313         sc->dfs_detector = dfs_pattern_detector_init(common, NL80211_DFS_UNSET);
1314         sc->tx99_power = MAX_RATE_POWER + 1;
1315 +       init_waitqueue_head(&sc->tx_wait);
1316
1317         if (!pdata) {
1318                 ah->ah_flags |= AH_USE_EEPROM;
1319 @@ -708,7 +735,11 @@ static int ath9k_init_softc(u16 devid, s
1320         /*
1321          * Platform quirks.
1322          */
1323 -       ath9k_init_platform(sc);
1324 +       ath9k_init_pcoem_platform(sc);
1325 +
1326 +       ret = ath9k_init_soc_platform(sc);
1327 +       if (ret)
1328 +               return ret;
1329
1330         /*
1331          * Enable WLAN/BT RX Antenna diversity only when:
1332 @@ -722,7 +753,6 @@ static int ath9k_init_softc(u16 devid, s
1333                 common->bt_ant_diversity = 1;
1334
1335         spin_lock_init(&common->cc_lock);
1336 -
1337         spin_lock_init(&sc->sc_serial_rw);
1338         spin_lock_init(&sc->sc_pm_lock);
1339         mutex_init(&sc->mutex);
1340 @@ -730,6 +760,7 @@ static int ath9k_init_softc(u16 devid, s
1341         tasklet_init(&sc->bcon_tasklet, ath9k_beacon_tasklet,
1342                      (unsigned long)sc);
1343
1344 +       setup_timer(&sc->sleep_timer, ath_ps_full_sleep, (unsigned long)sc);
1345         INIT_WORK(&sc->hw_reset_work, ath_reset_work);
1346         INIT_WORK(&sc->hw_check_work, ath_hw_check);
1347         INIT_WORK(&sc->paprd_work, ath_paprd_calibrate);
1348 @@ -743,12 +774,6 @@ static int ath9k_init_softc(u16 devid, s
1349         ath_read_cachesize(common, &csz);
1350         common->cachelsz = csz << 2; /* convert to bytes */
1351
1352 -       if (pdata && pdata->eeprom_name) {
1353 -               ret = ath9k_eeprom_request(sc, pdata->eeprom_name);
1354 -               if (ret)
1355 -                       return ret;
1356 -       }
1357 -
1358         /* Initializes the hardware for all supported chipsets */
1359         ret = ath9k_hw_init(ah);
1360         if (ret)
1361 @@ -845,7 +870,8 @@ static const struct ieee80211_iface_limi
1362  };
1363
1364  static const struct ieee80211_iface_limit if_dfs_limits[] = {
1365 -       { .max = 1,     .types = BIT(NL80211_IFTYPE_AP) },
1366 +       { .max = 1,     .types = BIT(NL80211_IFTYPE_AP) |
1367 +                                BIT(NL80211_IFTYPE_ADHOC) },
1368  };
1369
1370  static const struct ieee80211_iface_combination if_comb[] = {
1371 @@ -862,20 +888,11 @@ static const struct ieee80211_iface_comb
1372                 .max_interfaces = 1,
1373                 .num_different_channels = 1,
1374                 .beacon_int_infra_match = true,
1375 -               .radar_detect_widths =  BIT(NL80211_CHAN_NO_HT) |
1376 -                                       BIT(NL80211_CHAN_HT20),
1377 +               .radar_detect_widths =  BIT(NL80211_CHAN_WIDTH_20_NOHT) |
1378 +                                       BIT(NL80211_CHAN_WIDTH_20),
1379         }
1380  };
1381
1382 -#ifdef CONFIG_PM
1383 -static const struct wiphy_wowlan_support ath9k_wowlan_support = {
1384 -       .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT,
1385 -       .n_patterns = MAX_NUM_USER_PATTERN,
1386 -       .pattern_min_len = 1,
1387 -       .pattern_max_len = MAX_PATTERN_SIZE,
1388 -};
1389 -#endif
1390 -
1391  void ath9k_set_hw_capab(struct ath_softc *sc, struct ieee80211_hw *hw)
1392  {
1393         struct ath_hw *ah = sc->sc_ah;
1394 @@ -925,16 +942,6 @@ void ath9k_set_hw_capab(struct ath_softc
1395         hw->wiphy->flags |= WIPHY_FLAG_SUPPORTS_5_10_MHZ;
1396         hw->wiphy->flags |= WIPHY_FLAG_HAS_CHANNEL_SWITCH;
1397
1398 -#ifdef CONFIG_PM_SLEEP
1399 -       if ((ah->caps.hw_caps & ATH9K_HW_WOW_DEVICE_CAPABLE) &&
1400 -           (sc->driver_data & ATH9K_PCI_WOW) &&
1401 -           device_can_wakeup(sc->dev))
1402 -               hw->wiphy->wowlan = &ath9k_wowlan_support;
1403 -
1404 -       atomic_set(&sc->wow_sleep_proc_intr, -1);
1405 -       atomic_set(&sc->wow_got_bmiss_intr, -1);
1406 -#endif
1407 -
1408         hw->queues = 4;
1409         hw->max_rates = 4;
1410         hw->channel_change_time = 5000;
1411 @@ -960,6 +967,7 @@ void ath9k_set_hw_capab(struct ath_softc
1412                 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
1413                         &sc->sbands[IEEE80211_BAND_5GHZ];
1414
1415 +       ath9k_init_wow(hw);
1416         ath9k_reload_chainmask_settings(sc);
1417
1418         SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
1419 @@ -1058,6 +1066,7 @@ static void ath9k_deinit_softc(struct at
1420                 if (ATH_TXQ_SETUP(sc, i))
1421                         ath_tx_cleanupq(sc, &sc->tx.txq[i]);
1422
1423 +       del_timer_sync(&sc->sleep_timer);
1424         ath9k_hw_deinit(sc->sc_ah);
1425         if (sc->dfs_detector != NULL)
1426                 sc->dfs_detector->exit(sc->dfs_detector);
1427 --- a/drivers/net/wireless/ath/ath9k/main.c
1428 +++ b/drivers/net/wireless/ath/ath9k/main.c
1429 @@ -82,6 +82,22 @@ static bool ath9k_setpower(struct ath_so
1430         return ret;
1431  }
1432
1433 +void ath_ps_full_sleep(unsigned long data)
1434 +{
1435 +       struct ath_softc *sc = (struct ath_softc *) data;
1436 +       struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1437 +       bool reset;
1438 +
1439 +       spin_lock(&common->cc_lock);
1440 +       ath_hw_cycle_counters_update(common);
1441 +       spin_unlock(&common->cc_lock);
1442 +
1443 +       ath9k_hw_setrxabort(sc->sc_ah, 1);
1444 +       ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
1445 +
1446 +       ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
1447 +}
1448 +
1449  void ath9k_ps_wakeup(struct ath_softc *sc)
1450  {
1451         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1452 @@ -92,6 +108,7 @@ void ath9k_ps_wakeup(struct ath_softc *s
1453         if (++sc->ps_usecount != 1)
1454                 goto unlock;
1455
1456 +       del_timer_sync(&sc->sleep_timer);
1457         power_mode = sc->sc_ah->power_mode;
1458         ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
1459
1460 @@ -117,17 +134,17 @@ void ath9k_ps_restore(struct ath_softc *
1461         struct ath_common *common = ath9k_hw_common(sc->sc_ah);
1462         enum ath9k_power_mode mode;
1463         unsigned long flags;
1464 -       bool reset;
1465
1466         spin_lock_irqsave(&sc->sc_pm_lock, flags);
1467         if (--sc->ps_usecount != 0)
1468                 goto unlock;
1469
1470         if (sc->ps_idle) {
1471 -               ath9k_hw_setrxabort(sc->sc_ah, 1);
1472 -               ath9k_hw_stopdmarecv(sc->sc_ah, &reset);
1473 -               mode = ATH9K_PM_FULL_SLEEP;
1474 -       } else if (sc->ps_enabled &&
1475 +               mod_timer(&sc->sleep_timer, jiffies + HZ / 10);
1476 +               goto unlock;
1477 +       }
1478 +
1479 +       if (sc->ps_enabled &&
1480                    !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
1481                                      PS_WAIT_FOR_CAB |
1482                                      PS_WAIT_FOR_PSPOLL_DATA |
1483 @@ -163,13 +180,13 @@ static void __ath_cancel_work(struct ath
1484  #endif
1485  }
1486
1487 -static void ath_cancel_work(struct ath_softc *sc)
1488 +void ath_cancel_work(struct ath_softc *sc)
1489  {
1490         __ath_cancel_work(sc);
1491         cancel_work_sync(&sc->hw_reset_work);
1492  }
1493
1494 -static void ath_restart_work(struct ath_softc *sc)
1495 +void ath_restart_work(struct ath_softc *sc)
1496  {
1497         ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
1498
1499 @@ -487,6 +504,8 @@ void ath9k_tasklet(unsigned long data)
1500                         ath_tx_edma_tasklet(sc);
1501                 else
1502                         ath_tx_tasklet(sc);
1503 +
1504 +               wake_up(&sc->tx_wait);
1505         }
1506
1507         ath9k_btcoex_handle_interrupt(sc, status);
1508 @@ -579,7 +598,8 @@ irqreturn_t ath_isr(int irq, void *dev)
1509
1510                 goto chip_reset;
1511         }
1512 -#ifdef CONFIG_PM_SLEEP
1513 +
1514 +#ifdef CONFIG_ATH9K_WOW
1515         if (status & ATH9K_INT_BMISS) {
1516                 if (atomic_read(&sc->wow_sleep_proc_intr) == 0) {
1517                         ath_dbg(common, ANY, "during WoW we got a BMISS\n");
1518 @@ -588,6 +608,8 @@ irqreturn_t ath_isr(int irq, void *dev)
1519                 }
1520         }
1521  #endif
1522 +
1523 +
1524         if (status & ATH9K_INT_SWBA)
1525                 tasklet_schedule(&sc->bcon_tasklet);
1526
1527 @@ -627,7 +649,7 @@ chip_reset:
1528  #undef SCHED_INTR
1529  }
1530
1531 -static int ath_reset(struct ath_softc *sc)
1532 +int ath_reset(struct ath_softc *sc)
1533  {
1534         int r;
1535
1536 @@ -1817,13 +1839,31 @@ static void ath9k_set_coverage_class(str
1537         mutex_unlock(&sc->mutex);
1538  }
1539
1540 +static bool ath9k_has_tx_pending(struct ath_softc *sc)
1541 +{
1542 +       int i, npend;
1543 +
1544 +       for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1545 +               if (!ATH_TXQ_SETUP(sc, i))
1546 +                       continue;
1547 +
1548 +               if (!sc->tx.txq[i].axq_depth)
1549 +                       continue;
1550 +
1551 +               npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1552 +               if (npend)
1553 +                       break;
1554 +       }
1555 +
1556 +       return !!npend;
1557 +}
1558 +
1559  static void ath9k_flush(struct ieee80211_hw *hw, u32 queues, bool drop)
1560  {
1561         struct ath_softc *sc = hw->priv;
1562         struct ath_hw *ah = sc->sc_ah;
1563         struct ath_common *common = ath9k_hw_common(ah);
1564 -       int timeout = 200; /* ms */
1565 -       int i, j;
1566 +       int timeout = HZ / 5; /* 200 ms */
1567         bool drain_txq;
1568
1569         mutex_lock(&sc->mutex);
1570 @@ -1841,25 +1881,9 @@ static void ath9k_flush(struct ieee80211
1571                 return;
1572         }
1573
1574 -       for (j = 0; j < timeout; j++) {
1575 -               bool npend = false;
1576 -
1577 -               if (j)
1578 -                       usleep_range(1000, 2000);
1579 -
1580 -               for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
1581 -                       if (!ATH_TXQ_SETUP(sc, i))
1582 -                               continue;
1583 -
1584 -                       npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
1585 -
1586 -                       if (npend)
1587 -                               break;
1588 -               }
1589 -
1590 -               if (!npend)
1591 -                   break;
1592 -       }
1593 +       if (wait_event_timeout(sc->tx_wait, !ath9k_has_tx_pending(sc),
1594 +                              timeout) > 0)
1595 +               drop = false;
1596
1597         if (drop) {
1598                 ath9k_ps_wakeup(sc);
1599 @@ -2021,333 +2045,6 @@ static int ath9k_get_antenna(struct ieee
1600         return 0;
1601  }
1602
1603 -#ifdef CONFIG_PM_SLEEP
1604 -
1605 -static void ath9k_wow_map_triggers(struct ath_softc *sc,
1606 -                                  struct cfg80211_wowlan *wowlan,
1607 -                                  u32 *wow_triggers)
1608 -{
1609 -       if (wowlan->disconnect)
1610 -               *wow_triggers |= AH_WOW_LINK_CHANGE |
1611 -                                AH_WOW_BEACON_MISS;
1612 -       if (wowlan->magic_pkt)
1613 -               *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
1614 -
1615 -       if (wowlan->n_patterns)
1616 -               *wow_triggers |= AH_WOW_USER_PATTERN_EN;
1617 -
1618 -       sc->wow_enabled = *wow_triggers;
1619 -
1620 -}
1621 -
1622 -static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
1623 -{
1624 -       struct ath_hw *ah = sc->sc_ah;
1625 -       struct ath_common *common = ath9k_hw_common(ah);
1626 -       int pattern_count = 0;
1627 -       int i, byte_cnt;
1628 -       u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
1629 -       u8 dis_deauth_mask[MAX_PATTERN_SIZE];
1630 -
1631 -       memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
1632 -       memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
1633 -
1634 -       /*
1635 -        * Create Dissassociate / Deauthenticate packet filter
1636 -        *
1637 -        *     2 bytes        2 byte    6 bytes   6 bytes  6 bytes
1638 -        *  +--------------+----------+---------+--------+--------+----
1639 -        *  + Frame Control+ Duration +   DA    +  SA    +  BSSID +
1640 -        *  +--------------+----------+---------+--------+--------+----
1641 -        *
1642 -        * The above is the management frame format for disassociate/
1643 -        * deauthenticate pattern, from this we need to match the first byte
1644 -        * of 'Frame Control' and DA, SA, and BSSID fields
1645 -        * (skipping 2nd byte of FC and Duration feild.
1646 -        *
1647 -        * Disassociate pattern
1648 -        * --------------------
1649 -        * Frame control = 00 00 1010
1650 -        * DA, SA, BSSID = x:x:x:x:x:x
1651 -        * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
1652 -        *                          | x:x:x:x:x:x  -- 22 bytes
1653 -        *
1654 -        * Deauthenticate pattern
1655 -        * ----------------------
1656 -        * Frame control = 00 00 1100
1657 -        * DA, SA, BSSID = x:x:x:x:x:x
1658 -        * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
1659 -        *                          | x:x:x:x:x:x  -- 22 bytes
1660 -        */
1661 -
1662 -       /* Create Disassociate Pattern first */
1663 -
1664 -       byte_cnt = 0;
1665 -
1666 -       /* Fill out the mask with all FF's */
1667 -
1668 -       for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
1669 -               dis_deauth_mask[i] = 0xff;
1670 -
1671 -       /* copy the first byte of frame control field */
1672 -       dis_deauth_pattern[byte_cnt] = 0xa0;
1673 -       byte_cnt++;
1674 -
1675 -       /* skip 2nd byte of frame control and Duration field */
1676 -       byte_cnt += 3;
1677 -
1678 -       /*
1679 -        * need not match the destination mac address, it can be a broadcast
1680 -        * mac address or an unicast to this station
1681 -        */
1682 -       byte_cnt += 6;
1683 -
1684 -       /* copy the source mac address */
1685 -       memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
1686 -
1687 -       byte_cnt += 6;
1688 -
1689 -       /* copy the bssid, its same as the source mac address */
1690 -
1691 -       memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
1692 -
1693 -       /* Create Disassociate pattern mask */
1694 -
1695 -       dis_deauth_mask[0] = 0xfe;
1696 -       dis_deauth_mask[1] = 0x03;
1697 -       dis_deauth_mask[2] = 0xc0;
1698 -
1699 -       ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
1700 -
1701 -       ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
1702 -                                  pattern_count, byte_cnt);
1703 -
1704 -       pattern_count++;
1705 -       /*
1706 -        * for de-authenticate pattern, only the first byte of the frame
1707 -        * control field gets changed from 0xA0 to 0xC0
1708 -        */
1709 -       dis_deauth_pattern[0] = 0xC0;
1710 -
1711 -       ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
1712 -                                  pattern_count, byte_cnt);
1713 -
1714 -}
1715 -
1716 -static void ath9k_wow_add_pattern(struct ath_softc *sc,
1717 -                                 struct cfg80211_wowlan *wowlan)
1718 -{
1719 -       struct ath_hw *ah = sc->sc_ah;
1720 -       struct ath9k_wow_pattern *wow_pattern = NULL;
1721 -       struct cfg80211_pkt_pattern *patterns = wowlan->patterns;
1722 -       int mask_len;
1723 -       s8 i = 0;
1724 -
1725 -       if (!wowlan->n_patterns)
1726 -               return;
1727 -
1728 -       /*
1729 -        * Add the new user configured patterns
1730 -        */
1731 -       for (i = 0; i < wowlan->n_patterns; i++) {
1732 -
1733 -               wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
1734 -
1735 -               if (!wow_pattern)
1736 -                       return;
1737 -
1738 -               /*
1739 -                * TODO: convert the generic user space pattern to
1740 -                * appropriate chip specific/802.11 pattern.
1741 -                */
1742 -
1743 -               mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
1744 -               memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
1745 -               memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
1746 -               memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
1747 -                      patterns[i].pattern_len);
1748 -               memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
1749 -               wow_pattern->pattern_len = patterns[i].pattern_len;
1750 -
1751 -               /*
1752 -                * just need to take care of deauth and disssoc pattern,
1753 -                * make sure we don't overwrite them.
1754 -                */
1755 -
1756 -               ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
1757 -                                          wow_pattern->mask_bytes,
1758 -                                          i + 2,
1759 -                                          wow_pattern->pattern_len);
1760 -               kfree(wow_pattern);
1761 -
1762 -       }
1763 -
1764 -}
1765 -
1766 -static int ath9k_suspend(struct ieee80211_hw *hw,
1767 -                        struct cfg80211_wowlan *wowlan)
1768 -{
1769 -       struct ath_softc *sc = hw->priv;
1770 -       struct ath_hw *ah = sc->sc_ah;
1771 -       struct ath_common *common = ath9k_hw_common(ah);
1772 -       u32 wow_triggers_enabled = 0;
1773 -       int ret = 0;
1774 -
1775 -       mutex_lock(&sc->mutex);
1776 -
1777 -       ath_cancel_work(sc);
1778 -       ath_stop_ani(sc);
1779 -       del_timer_sync(&sc->rx_poll_timer);
1780 -
1781 -       if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
1782 -               ath_dbg(common, ANY, "Device not present\n");
1783 -               ret = -EINVAL;
1784 -               goto fail_wow;
1785 -       }
1786 -
1787 -       if (WARN_ON(!wowlan)) {
1788 -               ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
1789 -               ret = -EINVAL;
1790 -               goto fail_wow;
1791 -       }
1792 -
1793 -       if (!device_can_wakeup(sc->dev)) {
1794 -               ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
1795 -               ret = 1;
1796 -               goto fail_wow;
1797 -       }
1798 -
1799 -       /*
1800 -        * none of the sta vifs are associated
1801 -        * and we are not currently handling multivif
1802 -        * cases, for instance we have to seperately
1803 -        * configure 'keep alive frame' for each
1804 -        * STA.
1805 -        */
1806 -
1807 -       if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
1808 -               ath_dbg(common, WOW, "None of the STA vifs are associated\n");
1809 -               ret = 1;
1810 -               goto fail_wow;
1811 -       }
1812 -
1813 -       if (sc->nvifs > 1) {
1814 -               ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
1815 -               ret = 1;
1816 -               goto fail_wow;
1817 -       }
1818 -
1819 -       ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
1820 -
1821 -       ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
1822 -               wow_triggers_enabled);
1823 -
1824 -       ath9k_ps_wakeup(sc);
1825 -
1826 -       ath9k_stop_btcoex(sc);
1827 -
1828 -       /*
1829 -        * Enable wake up on recieving disassoc/deauth
1830 -        * frame by default.
1831 -        */
1832 -       ath9k_wow_add_disassoc_deauth_pattern(sc);
1833 -
1834 -       if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
1835 -               ath9k_wow_add_pattern(sc, wowlan);
1836 -
1837 -       spin_lock_bh(&sc->sc_pcu_lock);
1838 -       /*
1839 -        * To avoid false wake, we enable beacon miss interrupt only
1840 -        * when we go to sleep. We save the current interrupt mask
1841 -        * so we can restore it after the system wakes up
1842 -        */
1843 -       sc->wow_intr_before_sleep = ah->imask;
1844 -       ah->imask &= ~ATH9K_INT_GLOBAL;
1845 -       ath9k_hw_disable_interrupts(ah);
1846 -       ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
1847 -       ath9k_hw_set_interrupts(ah);
1848 -       ath9k_hw_enable_interrupts(ah);
1849 -
1850 -       spin_unlock_bh(&sc->sc_pcu_lock);
1851 -
1852 -       /*
1853 -        * we can now sync irq and kill any running tasklets, since we already
1854 -        * disabled interrupts and not holding a spin lock
1855 -        */
1856 -       synchronize_irq(sc->irq);
1857 -       tasklet_kill(&sc->intr_tq);
1858 -
1859 -       ath9k_hw_wow_enable(ah, wow_triggers_enabled);
1860 -
1861 -       ath9k_ps_restore(sc);
1862 -       ath_dbg(common, ANY, "WoW enabled in ath9k\n");
1863 -       atomic_inc(&sc->wow_sleep_proc_intr);
1864 -
1865 -fail_wow:
1866 -       mutex_unlock(&sc->mutex);
1867 -       return ret;
1868 -}
1869 -
1870 -static int ath9k_resume(struct ieee80211_hw *hw)
1871 -{
1872 -       struct ath_softc *sc = hw->priv;
1873 -       struct ath_hw *ah = sc->sc_ah;
1874 -       struct ath_common *common = ath9k_hw_common(ah);
1875 -       u32 wow_status;
1876 -
1877 -       mutex_lock(&sc->mutex);
1878 -
1879 -       ath9k_ps_wakeup(sc);
1880 -
1881 -       spin_lock_bh(&sc->sc_pcu_lock);
1882 -
1883 -       ath9k_hw_disable_interrupts(ah);
1884 -       ah->imask = sc->wow_intr_before_sleep;
1885 -       ath9k_hw_set_interrupts(ah);
1886 -       ath9k_hw_enable_interrupts(ah);
1887 -
1888 -       spin_unlock_bh(&sc->sc_pcu_lock);
1889 -
1890 -       wow_status = ath9k_hw_wow_wakeup(ah);
1891 -
1892 -       if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
1893 -               /*
1894 -                * some devices may not pick beacon miss
1895 -                * as the reason they woke up so we add
1896 -                * that here for that shortcoming.
1897 -                */
1898 -               wow_status |= AH_WOW_BEACON_MISS;
1899 -               atomic_dec(&sc->wow_got_bmiss_intr);
1900 -               ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
1901 -       }
1902 -
1903 -       atomic_dec(&sc->wow_sleep_proc_intr);
1904 -
1905 -       if (wow_status) {
1906 -               ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
1907 -                       ath9k_hw_wow_event_to_string(wow_status), wow_status);
1908 -       }
1909 -
1910 -       ath_restart_work(sc);
1911 -       ath9k_start_btcoex(sc);
1912 -
1913 -       ath9k_ps_restore(sc);
1914 -       mutex_unlock(&sc->mutex);
1915 -
1916 -       return 0;
1917 -}
1918 -
1919 -static void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
1920 -{
1921 -       struct ath_softc *sc = hw->priv;
1922 -
1923 -       mutex_lock(&sc->mutex);
1924 -       device_init_wakeup(sc->dev, 1);
1925 -       device_set_wakeup_enable(sc->dev, enabled);
1926 -       mutex_unlock(&sc->mutex);
1927 -}
1928 -
1929 -#endif
1930  static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
1931  {
1932         struct ath_softc *sc = hw->priv;
1933 @@ -2373,134 +2070,6 @@ static void ath9k_channel_switch_beacon(
1934         sc->csa_vif = vif;
1935  }
1936
1937 -static void ath9k_tx99_stop(struct ath_softc *sc)
1938 -{
1939 -       struct ath_hw *ah = sc->sc_ah;
1940 -       struct ath_common *common = ath9k_hw_common(ah);
1941 -
1942 -       ath_drain_all_txq(sc);
1943 -       ath_startrecv(sc);
1944 -
1945 -       ath9k_hw_set_interrupts(ah);
1946 -       ath9k_hw_enable_interrupts(ah);
1947 -
1948 -       ieee80211_wake_queues(sc->hw);
1949 -
1950 -       kfree_skb(sc->tx99_skb);
1951 -       sc->tx99_skb = NULL;
1952 -       sc->tx99_state = false;
1953 -
1954 -       ath9k_hw_tx99_stop(sc->sc_ah);
1955 -       ath_dbg(common, XMIT, "TX99 stopped\n");
1956 -}
1957 -
1958 -static struct sk_buff *ath9k_build_tx99_skb(struct ath_softc *sc)
1959 -{
1960 -       static u8 PN9Data[] = {0xff, 0x87, 0xb8, 0x59, 0xb7, 0xa1, 0xcc, 0x24,
1961 -                              0x57, 0x5e, 0x4b, 0x9c, 0x0e, 0xe9, 0xea, 0x50,
1962 -                              0x2a, 0xbe, 0xb4, 0x1b, 0xb6, 0xb0, 0x5d, 0xf1,
1963 -                              0xe6, 0x9a, 0xe3, 0x45, 0xfd, 0x2c, 0x53, 0x18,
1964 -                              0x0c, 0xca, 0xc9, 0xfb, 0x49, 0x37, 0xe5, 0xa8,
1965 -                              0x51, 0x3b, 0x2f, 0x61, 0xaa, 0x72, 0x18, 0x84,
1966 -                              0x02, 0x23, 0x23, 0xab, 0x63, 0x89, 0x51, 0xb3,
1967 -                              0xe7, 0x8b, 0x72, 0x90, 0x4c, 0xe8, 0xfb, 0xc0};
1968 -       u32 len = 1200;
1969 -       struct ieee80211_hw *hw = sc->hw;
1970 -       struct ieee80211_hdr *hdr;
1971 -       struct ieee80211_tx_info *tx_info;
1972 -       struct sk_buff *skb;
1973 -
1974 -       skb = alloc_skb(len, GFP_KERNEL);
1975 -       if (!skb)
1976 -               return NULL;
1977 -
1978 -       skb_put(skb, len);
1979 -
1980 -       memset(skb->data, 0, len);
1981 -
1982 -       hdr = (struct ieee80211_hdr *)skb->data;
1983 -       hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA);
1984 -       hdr->duration_id = 0;
1985 -
1986 -       memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
1987 -       memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
1988 -       memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
1989 -
1990 -       hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
1991 -
1992 -       tx_info = IEEE80211_SKB_CB(skb);
1993 -       memset(tx_info, 0, sizeof(*tx_info));
1994 -       tx_info->band = hw->conf.chandef.chan->band;
1995 -       tx_info->flags = IEEE80211_TX_CTL_NO_ACK;
1996 -       tx_info->control.vif = sc->tx99_vif;
1997 -
1998 -       memcpy(skb->data + sizeof(*hdr), PN9Data, sizeof(PN9Data));
1999 -
2000 -       return skb;
2001 -}
2002 -
2003 -void ath9k_tx99_deinit(struct ath_softc *sc)
2004 -{
2005 -       ath_reset(sc);
2006 -
2007 -       ath9k_ps_wakeup(sc);
2008 -       ath9k_tx99_stop(sc);
2009 -       ath9k_ps_restore(sc);
2010 -}
2011 -
2012 -int ath9k_tx99_init(struct ath_softc *sc)
2013 -{
2014 -       struct ieee80211_hw *hw = sc->hw;
2015 -       struct ath_hw *ah = sc->sc_ah;
2016 -       struct ath_common *common = ath9k_hw_common(ah);
2017 -       struct ath_tx_control txctl;
2018 -       int r;
2019 -
2020 -       if (sc->sc_flags & SC_OP_INVALID) {
2021 -               ath_err(common,
2022 -                       "driver is in invalid state unable to use TX99");
2023 -               return -EINVAL;
2024 -       }
2025 -
2026 -       sc->tx99_skb = ath9k_build_tx99_skb(sc);
2027 -       if (!sc->tx99_skb)
2028 -               return -ENOMEM;
2029 -
2030 -       memset(&txctl, 0, sizeof(txctl));
2031 -       txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO];
2032 -
2033 -       ath_reset(sc);
2034 -
2035 -       ath9k_ps_wakeup(sc);
2036 -
2037 -       ath9k_hw_disable_interrupts(ah);
2038 -       atomic_set(&ah->intr_ref_cnt, -1);
2039 -       ath_drain_all_txq(sc);
2040 -       ath_stoprecv(sc);
2041 -
2042 -       sc->tx99_state = true;
2043 -
2044 -       ieee80211_stop_queues(hw);
2045 -
2046 -       if (sc->tx99_power == MAX_RATE_POWER + 1)
2047 -               sc->tx99_power = MAX_RATE_POWER;
2048 -
2049 -       ath9k_hw_tx99_set_txpower(ah, sc->tx99_power);
2050 -       r = ath9k_tx99_send(sc, sc->tx99_skb, &txctl);
2051 -       if (r) {
2052 -               ath_dbg(common, XMIT, "Failed to xmit TX99 skb\n");
2053 -               return r;
2054 -       }
2055 -
2056 -       ath_dbg(common, XMIT, "TX99 xmit started using %d ( %ddBm)\n",
2057 -               sc->tx99_power,
2058 -               sc->tx99_power / 2);
2059 -
2060 -       /* We leave the harware awake as it will be chugging on */
2061 -
2062 -       return 0;
2063 -}
2064 -
2065  struct ieee80211_ops ath9k_ops = {
2066         .tx                 = ath9k_tx,
2067         .start              = ath9k_start,
2068 @@ -2531,7 +2100,7 @@ struct ieee80211_ops ath9k_ops = {
2069         .set_antenna        = ath9k_set_antenna,
2070         .get_antenna        = ath9k_get_antenna,
2071
2072 -#ifdef CONFIG_PM_SLEEP
2073 +#ifdef CONFIG_ATH9K_WOW
2074         .suspend            = ath9k_suspend,
2075         .resume             = ath9k_resume,
2076         .set_wakeup         = ath9k_set_wakeup,
2077 --- a/drivers/net/wireless/ath/ath9k/wow.c
2078 +++ b/drivers/net/wireless/ath/ath9k/wow.c
2079 @@ -1,5 +1,5 @@
2080  /*
2081 - * Copyright (c) 2012 Qualcomm Atheros, Inc.
2082 + * Copyright (c) 2013 Qualcomm Atheros, Inc.
2083   *
2084   * Permission to use, copy, modify, and/or distribute this software for any
2085   * purpose with or without fee is hereby granted, provided that the above
2086 @@ -14,409 +14,348 @@
2087   * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
2088   */
2089
2090 -#include <linux/export.h>
2091  #include "ath9k.h"
2092 -#include "reg.h"
2093 -#include "hw-ops.h"
2094
2095 -const char *ath9k_hw_wow_event_to_string(u32 wow_event)
2096 +static const struct wiphy_wowlan_support ath9k_wowlan_support = {
2097 +       .flags = WIPHY_WOWLAN_MAGIC_PKT | WIPHY_WOWLAN_DISCONNECT,
2098 +       .n_patterns = MAX_NUM_USER_PATTERN,
2099 +       .pattern_min_len = 1,
2100 +       .pattern_max_len = MAX_PATTERN_SIZE,
2101 +};
2102 +
2103 +static void ath9k_wow_map_triggers(struct ath_softc *sc,
2104 +                                  struct cfg80211_wowlan *wowlan,
2105 +                                  u32 *wow_triggers)
2106  {
2107 -       if (wow_event & AH_WOW_MAGIC_PATTERN_EN)
2108 -               return "Magic pattern";
2109 -       if (wow_event & AH_WOW_USER_PATTERN_EN)
2110 -               return "User pattern";
2111 -       if (wow_event & AH_WOW_LINK_CHANGE)
2112 -               return "Link change";
2113 -       if (wow_event & AH_WOW_BEACON_MISS)
2114 -               return "Beacon miss";
2115 +       if (wowlan->disconnect)
2116 +               *wow_triggers |= AH_WOW_LINK_CHANGE |
2117 +                                AH_WOW_BEACON_MISS;
2118 +       if (wowlan->magic_pkt)
2119 +               *wow_triggers |= AH_WOW_MAGIC_PATTERN_EN;
2120 +
2121 +       if (wowlan->n_patterns)
2122 +               *wow_triggers |= AH_WOW_USER_PATTERN_EN;
2123 +
2124 +       sc->wow_enabled = *wow_triggers;
2125
2126 -       return  "unknown reason";
2127  }
2128 -EXPORT_SYMBOL(ath9k_hw_wow_event_to_string);
2129
2130 -static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah)
2131 +static void ath9k_wow_add_disassoc_deauth_pattern(struct ath_softc *sc)
2132  {
2133 +       struct ath_hw *ah = sc->sc_ah;
2134         struct ath_common *common = ath9k_hw_common(ah);
2135 +       int pattern_count = 0;
2136 +       int i, byte_cnt;
2137 +       u8 dis_deauth_pattern[MAX_PATTERN_SIZE];
2138 +       u8 dis_deauth_mask[MAX_PATTERN_SIZE];
2139
2140 -       REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
2141 +       memset(dis_deauth_pattern, 0, MAX_PATTERN_SIZE);
2142 +       memset(dis_deauth_mask, 0, MAX_PATTERN_SIZE);
2143
2144 -       /* set rx disable bit */
2145 -       REG_WRITE(ah, AR_CR, AR_CR_RXD);
2146 +       /*
2147 +        * Create Dissassociate / Deauthenticate packet filter
2148 +        *
2149 +        *     2 bytes        2 byte    6 bytes   6 bytes  6 bytes
2150 +        *  +--------------+----------+---------+--------+--------+----
2151 +        *  + Frame Control+ Duration +   DA    +  SA    +  BSSID +
2152 +        *  +--------------+----------+---------+--------+--------+----
2153 +        *
2154 +        * The above is the management frame format for disassociate/
2155 +        * deauthenticate pattern, from this we need to match the first byte
2156 +        * of 'Frame Control' and DA, SA, and BSSID fields
2157 +        * (skipping 2nd byte of FC and Duration feild.
2158 +        *
2159 +        * Disassociate pattern
2160 +        * --------------------
2161 +        * Frame control = 00 00 1010
2162 +        * DA, SA, BSSID = x:x:x:x:x:x
2163 +        * Pattern will be A0000000 | x:x:x:x:x:x | x:x:x:x:x:x
2164 +        *                          | x:x:x:x:x:x  -- 22 bytes
2165 +        *
2166 +        * Deauthenticate pattern
2167 +        * ----------------------
2168 +        * Frame control = 00 00 1100
2169 +        * DA, SA, BSSID = x:x:x:x:x:x
2170 +        * Pattern will be C0000000 | x:x:x:x:x:x | x:x:x:x:x:x
2171 +        *                          | x:x:x:x:x:x  -- 22 bytes
2172 +        */
2173
2174 -       if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0, AH_WAIT_TIMEOUT)) {
2175 -               ath_err(common, "Failed to stop Rx DMA in 10ms AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
2176 -                       REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
2177 -               return;
2178 -       }
2179 +       /* Create Disassociate Pattern first */
2180
2181 -       REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT);
2182 -}
2183 +       byte_cnt = 0;
2184
2185 -static void ath9k_wow_create_keep_alive_pattern(struct ath_hw *ah)
2186 -{
2187 -       struct ath_common *common = ath9k_hw_common(ah);
2188 -       u8 sta_mac_addr[ETH_ALEN], ap_mac_addr[ETH_ALEN];
2189 -       u32 ctl[13] = {0};
2190 -       u32 data_word[KAL_NUM_DATA_WORDS];
2191 -       u8 i;
2192 -       u32 wow_ka_data_word0;
2193 -
2194 -       memcpy(sta_mac_addr, common->macaddr, ETH_ALEN);
2195 -       memcpy(ap_mac_addr, common->curbssid, ETH_ALEN);
2196 -
2197 -       /* set the transmit buffer */
2198 -       ctl[0] = (KAL_FRAME_LEN | (MAX_RATE_POWER << 16));
2199 -       ctl[1] = 0;
2200 -       ctl[3] = 0xb;   /* OFDM_6M hardware value for this rate */
2201 -       ctl[4] = 0;
2202 -       ctl[7] = (ah->txchainmask) << 2;
2203 -       ctl[2] = 0xf << 16; /* tx_tries 0 */
2204 -
2205 -       for (i = 0; i < KAL_NUM_DESC_WORDS; i++)
2206 -               REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
2207 -
2208 -       REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
2209 -
2210 -       data_word[0] = (KAL_FRAME_TYPE << 2) | (KAL_FRAME_SUB_TYPE << 4) |
2211 -                      (KAL_TO_DS << 8) | (KAL_DURATION_ID << 16);
2212 -       data_word[1] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
2213 -                      (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
2214 -       data_word[2] = (sta_mac_addr[1] << 24) | (sta_mac_addr[0] << 16) |
2215 -                      (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
2216 -       data_word[3] = (sta_mac_addr[5] << 24) | (sta_mac_addr[4] << 16) |
2217 -                      (sta_mac_addr[3] << 8) | (sta_mac_addr[2]);
2218 -       data_word[4] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
2219 -                      (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
2220 -       data_word[5] = (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
2221 -
2222 -       if (AR_SREV_9462_20(ah)) {
2223 -               /* AR9462 2.0 has an extra descriptor word (time based
2224 -                * discard) compared to other chips */
2225 -               REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + (12 * 4)), 0);
2226 -               wow_ka_data_word0 = AR_WOW_TXBUF(13);
2227 -       } else {
2228 -               wow_ka_data_word0 = AR_WOW_TXBUF(12);
2229 -       }
2230 +       /* Fill out the mask with all FF's */
2231
2232 -       for (i = 0; i < KAL_NUM_DATA_WORDS; i++)
2233 -               REG_WRITE(ah, (wow_ka_data_word0 + i*4), data_word[i]);
2234 +       for (i = 0; i < MAX_PATTERN_MASK_SIZE; i++)
2235 +               dis_deauth_mask[i] = 0xff;
2236
2237 -}
2238 +       /* copy the first byte of frame control field */
2239 +       dis_deauth_pattern[byte_cnt] = 0xa0;
2240 +       byte_cnt++;
2241
2242 -void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
2243 -                               u8 *user_mask, int pattern_count,
2244 -                               int pattern_len)
2245 -{
2246 -       int i;
2247 -       u32 pattern_val, mask_val;
2248 -       u32 set, clr;
2249 +       /* skip 2nd byte of frame control and Duration field */
2250 +       byte_cnt += 3;
2251
2252 -       /* FIXME: should check count by querying the hardware capability */
2253 -       if (pattern_count >= MAX_NUM_PATTERN)
2254 -               return;
2255 +       /*
2256 +        * need not match the destination mac address, it can be a broadcast
2257 +        * mac address or an unicast to this station
2258 +        */
2259 +       byte_cnt += 6;
2260
2261 -       REG_SET_BIT(ah, AR_WOW_PATTERN, BIT(pattern_count));
2262 +       /* copy the source mac address */
2263 +       memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2264
2265 -       /* set the registers for pattern */
2266 -       for (i = 0; i < MAX_PATTERN_SIZE; i += 4) {
2267 -               memcpy(&pattern_val, user_pattern, 4);
2268 -               REG_WRITE(ah, (AR_WOW_TB_PATTERN(pattern_count) + i),
2269 -                         pattern_val);
2270 -               user_pattern += 4;
2271 -       }
2272 +       byte_cnt += 6;
2273
2274 -       /* set the registers for mask */
2275 -       for (i = 0; i < MAX_PATTERN_MASK_SIZE; i += 4) {
2276 -               memcpy(&mask_val, user_mask, 4);
2277 -               REG_WRITE(ah, (AR_WOW_TB_MASK(pattern_count) + i), mask_val);
2278 -               user_mask += 4;
2279 -       }
2280 +       /* copy the bssid, its same as the source mac address */
2281
2282 -       /* set the pattern length to be matched
2283 -        *
2284 -        * AR_WOW_LENGTH1_REG1
2285 -        * bit 31:24 pattern 0 length
2286 -        * bit 23:16 pattern 1 length
2287 -        * bit 15:8 pattern 2 length
2288 -        * bit 7:0 pattern 3 length
2289 -        *
2290 -        * AR_WOW_LENGTH1_REG2
2291 -        * bit 31:24 pattern 4 length
2292 -        * bit 23:16 pattern 5 length
2293 -        * bit 15:8 pattern 6 length
2294 -        * bit 7:0 pattern 7 length
2295 -        *
2296 -        * the below logic writes out the new
2297 -        * pattern length for the corresponding
2298 -        * pattern_count, while masking out the
2299 -        * other fields
2300 -        */
2301 +       memcpy((dis_deauth_pattern + byte_cnt), common->curbssid, ETH_ALEN);
2302
2303 -       ah->wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT);
2304 +       /* Create Disassociate pattern mask */
2305
2306 -       if (pattern_count < 4) {
2307 -               /* Pattern 0-3 uses AR_WOW_LENGTH1 register */
2308 -               set = (pattern_len & AR_WOW_LENGTH_MAX) <<
2309 -                      AR_WOW_LEN1_SHIFT(pattern_count);
2310 -               clr = AR_WOW_LENGTH1_MASK(pattern_count);
2311 -               REG_RMW(ah, AR_WOW_LENGTH1, set, clr);
2312 -       } else {
2313 -               /* Pattern 4-7 uses AR_WOW_LENGTH2 register */
2314 -               set = (pattern_len & AR_WOW_LENGTH_MAX) <<
2315 -                      AR_WOW_LEN2_SHIFT(pattern_count);
2316 -               clr = AR_WOW_LENGTH2_MASK(pattern_count);
2317 -               REG_RMW(ah, AR_WOW_LENGTH2, set, clr);
2318 -       }
2319 +       dis_deauth_mask[0] = 0xfe;
2320 +       dis_deauth_mask[1] = 0x03;
2321 +       dis_deauth_mask[2] = 0xc0;
2322
2323 -}
2324 -EXPORT_SYMBOL(ath9k_hw_wow_apply_pattern);
2325 +       ath_dbg(common, WOW, "Adding disassoc/deauth patterns for WoW\n");
2326
2327 -u32 ath9k_hw_wow_wakeup(struct ath_hw *ah)
2328 -{
2329 -       u32 wow_status = 0;
2330 -       u32 val = 0, rval;
2331 +       ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2332 +                                  pattern_count, byte_cnt);
2333
2334 +       pattern_count++;
2335         /*
2336 -        * read the WoW status register to know
2337 -        * the wakeup reason
2338 +        * for de-authenticate pattern, only the first byte of the frame
2339 +        * control field gets changed from 0xA0 to 0xC0
2340          */
2341 -       rval = REG_READ(ah, AR_WOW_PATTERN);
2342 -       val = AR_WOW_STATUS(rval);
2343 +       dis_deauth_pattern[0] = 0xC0;
2344
2345 -       /*
2346 -        * mask only the WoW events that we have enabled. Sometimes
2347 -        * we have spurious WoW events from the AR_WOW_PATTERN
2348 -        * register. This mask will clean it up.
2349 -        */
2350 +       ath9k_hw_wow_apply_pattern(ah, dis_deauth_pattern, dis_deauth_mask,
2351 +                                  pattern_count, byte_cnt);
2352
2353 -       val &= ah->wow_event_mask;
2354 +}
2355
2356 -       if (val) {
2357 -               if (val & AR_WOW_MAGIC_PAT_FOUND)
2358 -                       wow_status |= AH_WOW_MAGIC_PATTERN_EN;
2359 -               if (AR_WOW_PATTERN_FOUND(val))
2360 -                       wow_status |= AH_WOW_USER_PATTERN_EN;
2361 -               if (val & AR_WOW_KEEP_ALIVE_FAIL)
2362 -                       wow_status |= AH_WOW_LINK_CHANGE;
2363 -               if (val & AR_WOW_BEACON_FAIL)
2364 -                       wow_status |= AH_WOW_BEACON_MISS;
2365 -       }
2366 +static void ath9k_wow_add_pattern(struct ath_softc *sc,
2367 +                                 struct cfg80211_wowlan *wowlan)
2368 +{
2369 +       struct ath_hw *ah = sc->sc_ah;
2370 +       struct ath9k_wow_pattern *wow_pattern = NULL;
2371 +       struct cfg80211_pkt_pattern *patterns = wowlan->patterns;
2372 +       int mask_len;
2373 +       s8 i = 0;
2374 +
2375 +       if (!wowlan->n_patterns)
2376 +               return;
2377
2378         /*
2379 -        * set and clear WOW_PME_CLEAR registers for the chip to
2380 -        * generate next wow signal.
2381 -        * disable D3 before accessing other registers ?
2382 +        * Add the new user configured patterns
2383          */
2384 +       for (i = 0; i < wowlan->n_patterns; i++) {
2385
2386 -       /* do we need to check the bit value 0x01000000 (7-10) ?? */
2387 -       REG_RMW(ah, AR_PCIE_PM_CTRL, AR_PMCTRL_WOW_PME_CLR,
2388 -               AR_PMCTRL_PWR_STATE_D1D3);
2389 +               wow_pattern = kzalloc(sizeof(*wow_pattern), GFP_KERNEL);
2390
2391 -       /*
2392 -        * clear all events
2393 -        */
2394 -       REG_WRITE(ah, AR_WOW_PATTERN,
2395 -                 AR_WOW_CLEAR_EVENTS(REG_READ(ah, AR_WOW_PATTERN)));
2396 +               if (!wow_pattern)
2397 +                       return;
2398
2399 -       /*
2400 -        * restore the beacon threshold to init value
2401 -        */
2402 -       REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
2403 +               /*
2404 +                * TODO: convert the generic user space pattern to
2405 +                * appropriate chip specific/802.11 pattern.
2406 +                */
2407
2408 -       /*
2409 -        * Restore the way the PCI-E reset, Power-On-Reset, external
2410 -        * PCIE_POR_SHORT pins are tied to its original value.
2411 -        * Previously just before WoW sleep, we untie the PCI-E
2412 -        * reset to our Chip's Power On Reset so that any PCI-E
2413 -        * reset from the bus will not reset our chip
2414 -        */
2415 -       if (ah->is_pciexpress)
2416 -               ath9k_hw_configpcipowersave(ah, false);
2417 +               mask_len = DIV_ROUND_UP(wowlan->patterns[i].pattern_len, 8);
2418 +               memset(wow_pattern->pattern_bytes, 0, MAX_PATTERN_SIZE);
2419 +               memset(wow_pattern->mask_bytes, 0, MAX_PATTERN_SIZE);
2420 +               memcpy(wow_pattern->pattern_bytes, patterns[i].pattern,
2421 +                      patterns[i].pattern_len);
2422 +               memcpy(wow_pattern->mask_bytes, patterns[i].mask, mask_len);
2423 +               wow_pattern->pattern_len = patterns[i].pattern_len;
2424 +
2425 +               /*
2426 +                * just need to take care of deauth and disssoc pattern,
2427 +                * make sure we don't overwrite them.
2428 +                */
2429 +
2430 +               ath9k_hw_wow_apply_pattern(ah, wow_pattern->pattern_bytes,
2431 +                                          wow_pattern->mask_bytes,
2432 +                                          i + 2,
2433 +                                          wow_pattern->pattern_len);
2434 +               kfree(wow_pattern);
2435
2436 -       ah->wow_event_mask = 0;
2437 +       }
2438
2439 -       return wow_status;
2440  }
2441 -EXPORT_SYMBOL(ath9k_hw_wow_wakeup);
2442
2443 -void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable)
2444 +int ath9k_suspend(struct ieee80211_hw *hw,
2445 +                 struct cfg80211_wowlan *wowlan)
2446  {
2447 -       u32 wow_event_mask;
2448 -       u32 set, clr;
2449 +       struct ath_softc *sc = hw->priv;
2450 +       struct ath_hw *ah = sc->sc_ah;
2451 +       struct ath_common *common = ath9k_hw_common(ah);
2452 +       u32 wow_triggers_enabled = 0;
2453 +       int ret = 0;
2454
2455 -       /*
2456 -        * wow_event_mask is a mask to the AR_WOW_PATTERN register to
2457 -        * indicate which WoW events we have enabled. The WoW events
2458 -        * are from the 'pattern_enable' in this function and
2459 -        * 'pattern_count' of ath9k_hw_wow_apply_pattern()
2460 -        */
2461 -       wow_event_mask = ah->wow_event_mask;
2462 +       mutex_lock(&sc->mutex);
2463
2464 -       /*
2465 -        * Untie Power-on-Reset from the PCI-E-Reset. When we are in
2466 -        * WOW sleep, we do want the Reset from the PCI-E to disturb
2467 -        * our hw state
2468 -        */
2469 -       if (ah->is_pciexpress) {
2470 -               /*
2471 -                * we need to untie the internal POR (power-on-reset)
2472 -                * to the external PCI-E reset. We also need to tie
2473 -                * the PCI-E Phy reset to the PCI-E reset.
2474 -                */
2475 -               set = AR_WA_RESET_EN | AR_WA_POR_SHORT;
2476 -               clr = AR_WA_UNTIE_RESET_EN | AR_WA_D3_L1_DISABLE;
2477 -               REG_RMW(ah, AR_WA, set, clr);
2478 +       ath_cancel_work(sc);
2479 +       ath_stop_ani(sc);
2480 +       del_timer_sync(&sc->rx_poll_timer);
2481 +
2482 +       if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
2483 +               ath_dbg(common, ANY, "Device not present\n");
2484 +               ret = -EINVAL;
2485 +               goto fail_wow;
2486         }
2487
2488 -       /*
2489 -        * set the power states appropriately and enable PME
2490 -        */
2491 -       set = AR_PMCTRL_HOST_PME_EN | AR_PMCTRL_PWR_PM_CTRL_ENA |
2492 -             AR_PMCTRL_AUX_PWR_DET | AR_PMCTRL_WOW_PME_CLR;
2493 +       if (WARN_ON(!wowlan)) {
2494 +               ath_dbg(common, WOW, "None of the WoW triggers enabled\n");
2495 +               ret = -EINVAL;
2496 +               goto fail_wow;
2497 +       }
2498
2499 -       /*
2500 -        * set and clear WOW_PME_CLEAR registers for the chip
2501 -        * to generate next wow signal.
2502 -        */
2503 -       REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
2504 -       clr = AR_PMCTRL_WOW_PME_CLR;
2505 -       REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
2506 +       if (!device_can_wakeup(sc->dev)) {
2507 +               ath_dbg(common, WOW, "device_can_wakeup failed, WoW is not enabled\n");
2508 +               ret = 1;
2509 +               goto fail_wow;
2510 +       }
2511
2512         /*
2513 -        * Setup for:
2514 -        *      - beacon misses
2515 -        *      - magic pattern
2516 -        *      - keep alive timeout
2517 -        *      - pattern matching
2518 +        * none of the sta vifs are associated
2519 +        * and we are not currently handling multivif
2520 +        * cases, for instance we have to seperately
2521 +        * configure 'keep alive frame' for each
2522 +        * STA.
2523          */
2524
2525 -       /*
2526 -        * Program default values for pattern backoff, aifs/slot/KAL count,
2527 -        * beacon miss timeout, KAL timeout, etc.
2528 -        */
2529 -       set = AR_WOW_BACK_OFF_SHIFT(AR_WOW_PAT_BACKOFF);
2530 -       REG_SET_BIT(ah, AR_WOW_PATTERN, set);
2531 +       if (!test_bit(SC_OP_PRIM_STA_VIF, &sc->sc_flags)) {
2532 +               ath_dbg(common, WOW, "None of the STA vifs are associated\n");
2533 +               ret = 1;
2534 +               goto fail_wow;
2535 +       }
2536 +
2537 +       if (sc->nvifs > 1) {
2538 +               ath_dbg(common, WOW, "WoW for multivif is not yet supported\n");
2539 +               ret = 1;
2540 +               goto fail_wow;
2541 +       }
2542
2543 -       set = AR_WOW_AIFS_CNT(AR_WOW_CNT_AIFS_CNT) |
2544 -             AR_WOW_SLOT_CNT(AR_WOW_CNT_SLOT_CNT) |
2545 -             AR_WOW_KEEP_ALIVE_CNT(AR_WOW_CNT_KA_CNT);
2546 -       REG_SET_BIT(ah, AR_WOW_COUNT, set);
2547 -
2548 -       if (pattern_enable & AH_WOW_BEACON_MISS)
2549 -               set = AR_WOW_BEACON_TIMO;
2550 -       /* We are not using beacon miss, program a large value */
2551 -       else
2552 -               set = AR_WOW_BEACON_TIMO_MAX;
2553 +       ath9k_wow_map_triggers(sc, wowlan, &wow_triggers_enabled);
2554
2555 -       REG_WRITE(ah, AR_WOW_BCN_TIMO, set);
2556 +       ath_dbg(common, WOW, "WoW triggers enabled 0x%x\n",
2557 +               wow_triggers_enabled);
2558
2559 -       /*
2560 -        * Keep alive timo in ms except AR9280
2561 -        */
2562 -       if (!pattern_enable)
2563 -               set = AR_WOW_KEEP_ALIVE_NEVER;
2564 -       else
2565 -               set = KAL_TIMEOUT * 32;
2566 +       ath9k_ps_wakeup(sc);
2567
2568 -       REG_WRITE(ah, AR_WOW_KEEP_ALIVE_TIMO, set);
2569 +       ath9k_stop_btcoex(sc);
2570
2571         /*
2572 -        * Keep alive delay in us. based on 'power on clock',
2573 -        * therefore in usec
2574 +        * Enable wake up on recieving disassoc/deauth
2575 +        * frame by default.
2576          */
2577 -       set = KAL_DELAY * 1000;
2578 -       REG_WRITE(ah, AR_WOW_KEEP_ALIVE_DELAY, set);
2579 +       ath9k_wow_add_disassoc_deauth_pattern(sc);
2580
2581 -       /*
2582 -        * Create keep alive pattern to respond to beacons
2583 -        */
2584 -       ath9k_wow_create_keep_alive_pattern(ah);
2585 +       if (wow_triggers_enabled & AH_WOW_USER_PATTERN_EN)
2586 +               ath9k_wow_add_pattern(sc, wowlan);
2587
2588 +       spin_lock_bh(&sc->sc_pcu_lock);
2589         /*
2590 -        * Configure MAC WoW Registers
2591 +        * To avoid false wake, we enable beacon miss interrupt only
2592 +        * when we go to sleep. We save the current interrupt mask
2593 +        * so we can restore it after the system wakes up
2594          */
2595 -       set = 0;
2596 -       /* Send keep alive timeouts anyway */
2597 -       clr = AR_WOW_KEEP_ALIVE_AUTO_DIS;
2598 -
2599 -       if (pattern_enable & AH_WOW_LINK_CHANGE)
2600 -               wow_event_mask |= AR_WOW_KEEP_ALIVE_FAIL;
2601 -       else
2602 -               set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
2603 +       sc->wow_intr_before_sleep = ah->imask;
2604 +       ah->imask &= ~ATH9K_INT_GLOBAL;
2605 +       ath9k_hw_disable_interrupts(ah);
2606 +       ah->imask = ATH9K_INT_BMISS | ATH9K_INT_GLOBAL;
2607 +       ath9k_hw_set_interrupts(ah);
2608 +       ath9k_hw_enable_interrupts(ah);
2609
2610 -       set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
2611 -       REG_RMW(ah, AR_WOW_KEEP_ALIVE, set, clr);
2612 +       spin_unlock_bh(&sc->sc_pcu_lock);
2613
2614         /*
2615 -        * we are relying on a bmiss failure. ensure we have
2616 -        * enough threshold to prevent false positives
2617 +        * we can now sync irq and kill any running tasklets, since we already
2618 +        * disabled interrupts and not holding a spin lock
2619          */
2620 -       REG_RMW_FIELD(ah, AR_RSSI_THR, AR_RSSI_THR_BM_THR,
2621 -                     AR_WOW_BMISSTHRESHOLD);
2622 +       synchronize_irq(sc->irq);
2623 +       tasklet_kill(&sc->intr_tq);
2624 +
2625 +       ath9k_hw_wow_enable(ah, wow_triggers_enabled);
2626
2627 -       set = 0;
2628 -       clr = 0;
2629 +       ath9k_ps_restore(sc);
2630 +       ath_dbg(common, ANY, "WoW enabled in ath9k\n");
2631 +       atomic_inc(&sc->wow_sleep_proc_intr);
2632
2633 -       if (pattern_enable & AH_WOW_BEACON_MISS) {
2634 -               set = AR_WOW_BEACON_FAIL_EN;
2635 -               wow_event_mask |= AR_WOW_BEACON_FAIL;
2636 -       } else {
2637 -               clr = AR_WOW_BEACON_FAIL_EN;
2638 +fail_wow:
2639 +       mutex_unlock(&sc->mutex);
2640 +       return ret;
2641 +}
2642 +
2643 +int ath9k_resume(struct ieee80211_hw *hw)
2644 +{
2645 +       struct ath_softc *sc = hw->priv;
2646 +       struct ath_hw *ah = sc->sc_ah;
2647 +       struct ath_common *common = ath9k_hw_common(ah);
2648 +       u32 wow_status;
2649 +
2650 +       mutex_lock(&sc->mutex);
2651 +
2652 +       ath9k_ps_wakeup(sc);
2653 +
2654 +       spin_lock_bh(&sc->sc_pcu_lock);
2655 +
2656 +       ath9k_hw_disable_interrupts(ah);
2657 +       ah->imask = sc->wow_intr_before_sleep;
2658 +       ath9k_hw_set_interrupts(ah);
2659 +       ath9k_hw_enable_interrupts(ah);
2660 +
2661 +       spin_unlock_bh(&sc->sc_pcu_lock);
2662 +
2663 +       wow_status = ath9k_hw_wow_wakeup(ah);
2664 +
2665 +       if (atomic_read(&sc->wow_got_bmiss_intr) == 0) {
2666 +               /*
2667 +                * some devices may not pick beacon miss
2668 +                * as the reason they woke up so we add
2669 +                * that here for that shortcoming.
2670 +                */
2671 +               wow_status |= AH_WOW_BEACON_MISS;
2672 +               atomic_dec(&sc->wow_got_bmiss_intr);
2673 +               ath_dbg(common, ANY, "Beacon miss interrupt picked up during WoW sleep\n");
2674         }
2675
2676 -       REG_RMW(ah, AR_WOW_BCN_EN, set, clr);
2677 +       atomic_dec(&sc->wow_sleep_proc_intr);
2678
2679 -       set = 0;
2680 -       clr = 0;
2681 -       /*
2682 -        * Enable the magic packet registers
2683 -        */
2684 -       if (pattern_enable & AH_WOW_MAGIC_PATTERN_EN) {
2685 -               set = AR_WOW_MAGIC_EN;
2686 -               wow_event_mask |= AR_WOW_MAGIC_PAT_FOUND;
2687 -       } else {
2688 -               clr = AR_WOW_MAGIC_EN;
2689 +       if (wow_status) {
2690 +               ath_dbg(common, ANY, "Waking up due to WoW triggers %s with WoW status = %x\n",
2691 +                       ath9k_hw_wow_event_to_string(wow_status), wow_status);
2692         }
2693 -       set |= AR_WOW_MAC_INTR_EN;
2694 -       REG_RMW(ah, AR_WOW_PATTERN, set, clr);
2695
2696 -       REG_WRITE(ah, AR_WOW_PATTERN_MATCH_LT_256B,
2697 -                 AR_WOW_PATTERN_SUPPORTED);
2698 +       ath_restart_work(sc);
2699 +       ath9k_start_btcoex(sc);
2700
2701 -       /*
2702 -        * Set the power states appropriately and enable PME
2703 -        */
2704 -       clr = 0;
2705 -       set = AR_PMCTRL_PWR_STATE_D1D3 | AR_PMCTRL_HOST_PME_EN |
2706 -             AR_PMCTRL_PWR_PM_CTRL_ENA;
2707 +       ath9k_ps_restore(sc);
2708 +       mutex_unlock(&sc->mutex);
2709
2710 -       clr = AR_PCIE_PM_CTRL_ENA;
2711 -       REG_RMW(ah, AR_PCIE_PM_CTRL, set, clr);
2712 +       return 0;
2713 +}
2714
2715 -       /*
2716 -        * this is needed to prevent the chip waking up
2717 -        * the host within 3-4 seconds with certain
2718 -        * platform/BIOS. The fix is to enable
2719 -        * D1 & D3 to match original definition and
2720 -        * also match the OTP value. Anyway this
2721 -        * is more related to SW WOW.
2722 -        */
2723 -       clr = AR_PMCTRL_PWR_STATE_D1D3;
2724 -       REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
2725 +void ath9k_set_wakeup(struct ieee80211_hw *hw, bool enabled)
2726 +{
2727 +       struct ath_softc *sc = hw->priv;
2728
2729 -       set = AR_PMCTRL_PWR_STATE_D1D3_REAL;
2730 -       REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
2731 +       mutex_lock(&sc->mutex);
2732 +       device_init_wakeup(sc->dev, 1);
2733 +       device_set_wakeup_enable(sc->dev, enabled);
2734 +       mutex_unlock(&sc->mutex);
2735 +}
2736
2737 -       REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);
2738 +void ath9k_init_wow(struct ieee80211_hw *hw)
2739 +{
2740 +       struct ath_softc *sc = hw->priv;
2741
2742 -       /* to bring down WOW power low margin */
2743 -       set = BIT(13);
2744 -       REG_SET_BIT(ah, AR_PCIE_PHY_REG3, set);
2745 -       /* HW WoW */
2746 -       clr = BIT(5);
2747 -       REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, clr);
2748 +       if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_WOW_DEVICE_CAPABLE) &&
2749 +           (sc->driver_data & ATH9K_PCI_WOW) &&
2750 +           device_can_wakeup(sc->dev))
2751 +               hw->wiphy->wowlan = &ath9k_wowlan_support;
2752
2753 -       ath9k_hw_set_powermode_wow_sleep(ah);
2754 -       ah->wow_event_mask = wow_event_mask;
2755 +       atomic_set(&sc->wow_sleep_proc_intr, -1);
2756 +       atomic_set(&sc->wow_got_bmiss_intr, -1);
2757  }
2758 -EXPORT_SYMBOL(ath9k_hw_wow_enable);
2759 --- a/drivers/net/wireless/ath/ath9k/xmit.c
2760 +++ b/drivers/net/wireless/ath/ath9k/xmit.c
2761 @@ -1276,6 +1276,10 @@ static void ath_tx_fill_desc(struct ath_
2762                                 if (!rts_thresh || (len > rts_thresh))
2763                                         rts = true;
2764                         }
2765 +
2766 +                       if (!aggr)
2767 +                               len = fi->framelen;
2768 +
2769                         ath_buf_set_rate(sc, bf, &info, len, rts);
2770                 }
2771
2772 @@ -1786,6 +1790,9 @@ bool ath_drain_all_txq(struct ath_softc
2773                 if (!ATH_TXQ_SETUP(sc, i))
2774                         continue;
2775
2776 +               if (!sc->tx.txq[i].axq_depth)
2777 +                       continue;
2778 +
2779                 if (ath9k_hw_numtxpending(ah, sc->tx.txq[i].axq_qnum))
2780                         npend |= BIT(i);
2781         }
2782 @@ -2749,6 +2756,8 @@ void ath_tx_node_cleanup(struct ath_soft
2783         }
2784  }
2785
2786 +#ifdef CONFIG_ATH9K_TX99
2787 +
2788  int ath9k_tx99_send(struct ath_softc *sc, struct sk_buff *skb,
2789                     struct ath_tx_control *txctl)
2790  {
2791 @@ -2791,3 +2800,5 @@ int ath9k_tx99_send(struct ath_softc *sc
2792
2793         return 0;
2794  }
2795 +
2796 +#endif /* CONFIG_ATH9K_TX99 */
2797 --- a/drivers/net/wireless/ath/regd.c
2798 +++ b/drivers/net/wireless/ath/regd.c
2799 @@ -37,17 +37,17 @@ static int __ath_regd_init(struct ath_re
2800
2801  /* We enable active scan on these a case by case basis by regulatory domain */
2802  #define ATH9K_2GHZ_CH12_13     REG_RULE(2467-10, 2472+10, 40, 0, 20,\
2803 -                                       NL80211_RRF_PASSIVE_SCAN)
2804 +                                       NL80211_RRF_NO_IR)
2805  #define ATH9K_2GHZ_CH14                REG_RULE(2484-10, 2484+10, 40, 0, 20,\
2806 -                               NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_OFDM)
2807 +                               NL80211_RRF_NO_IR | NL80211_RRF_NO_OFDM)
2808
2809  /* We allow IBSS on these on a case by case basis by regulatory domain */
2810  #define ATH9K_5GHZ_5150_5350   REG_RULE(5150-10, 5350+10, 80, 0, 30,\
2811 -                               NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
2812 +                               NL80211_RRF_NO_IR)
2813  #define ATH9K_5GHZ_5470_5850   REG_RULE(5470-10, 5850+10, 80, 0, 30,\
2814 -                               NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
2815 +                               NL80211_RRF_NO_IR)
2816  #define ATH9K_5GHZ_5725_5850   REG_RULE(5725-10, 5850+10, 80, 0, 30,\
2817 -                               NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS)
2818 +                               NL80211_RRF_NO_IR)
2819
2820  #define ATH9K_2GHZ_ALL         ATH9K_2GHZ_CH01_11, \
2821                                 ATH9K_2GHZ_CH12_13, \
2822 @@ -224,17 +224,16 @@ ath_reg_apply_beaconing_flags(struct wip
2823                                  * regulatory_hint().
2824                                  */
2825                                 if (!(reg_rule->flags &
2826 -                                   NL80211_RRF_NO_IBSS))
2827 +                                   NL80211_RRF_NO_IR))
2828                                         ch->flags &=
2829 -                                         ~IEEE80211_CHAN_NO_IBSS;
2830 +                                         ~IEEE80211_CHAN_NO_IR;
2831                                 if (!(reg_rule->flags &
2832 -                                   NL80211_RRF_PASSIVE_SCAN))
2833 +                                   NL80211_RRF_NO_IR))
2834                                         ch->flags &=
2835 -                                         ~IEEE80211_CHAN_PASSIVE_SCAN;
2836 +                                         ~IEEE80211_CHAN_NO_IR;
2837                         } else {
2838                                 if (ch->beacon_found)
2839 -                                       ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
2840 -                                         IEEE80211_CHAN_PASSIVE_SCAN);
2841 +                                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
2842                         }
2843                 }
2844         }
2845 @@ -260,11 +259,11 @@ ath_reg_apply_active_scan_flags(struct w
2846          */
2847         if (initiator != NL80211_REGDOM_SET_BY_COUNTRY_IE) {
2848                 ch = &sband->channels[11]; /* CH 12 */
2849 -               if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2850 -                       ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
2851 +               if (ch->flags & IEEE80211_CHAN_NO_IR)
2852 +                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
2853                 ch = &sband->channels[12]; /* CH 13 */
2854 -               if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2855 -                       ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
2856 +               if (ch->flags & IEEE80211_CHAN_NO_IR)
2857 +                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
2858                 return;
2859         }
2860
2861 @@ -278,17 +277,17 @@ ath_reg_apply_active_scan_flags(struct w
2862         ch = &sband->channels[11]; /* CH 12 */
2863         reg_rule = freq_reg_info(wiphy, ch->center_freq);
2864         if (!IS_ERR(reg_rule)) {
2865 -               if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
2866 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2867 -                               ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
2868 +               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
2869 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
2870 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
2871         }
2872
2873         ch = &sband->channels[12]; /* CH 13 */
2874         reg_rule = freq_reg_info(wiphy, ch->center_freq);
2875         if (!IS_ERR(reg_rule)) {
2876 -               if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
2877 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
2878 -                               ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
2879 +               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
2880 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
2881 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
2882         }
2883  }
2884
2885 @@ -320,8 +319,8 @@ static void ath_reg_apply_radar_flags(st
2886                  */
2887                 if (!(ch->flags & IEEE80211_CHAN_DISABLED))
2888                         ch->flags |= IEEE80211_CHAN_RADAR |
2889 -                                    IEEE80211_CHAN_NO_IBSS |
2890 -                                    IEEE80211_CHAN_PASSIVE_SCAN;
2891 +                                    IEEE80211_CHAN_NO_IR |
2892 +                                    IEEE80211_CHAN_NO_IR;
2893         }
2894  }
2895
2896 --- a/drivers/net/wireless/brcm80211/brcmfmac/p2p.c
2897 +++ b/drivers/net/wireless/brcm80211/brcmfmac/p2p.c
2898 @@ -812,7 +812,7 @@ static s32 brcmf_p2p_run_escan(struct br
2899                         struct ieee80211_channel *chan = request->channels[i];
2900
2901                         if (chan->flags & (IEEE80211_CHAN_RADAR |
2902 -                                          IEEE80211_CHAN_PASSIVE_SCAN))
2903 +                                          IEEE80211_CHAN_NO_IR))
2904                                 continue;
2905
2906                         chanspecs[i] = channel_to_chanspec(&p2p->cfg->d11inf,
2907 --- a/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
2908 +++ b/drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
2909 @@ -202,9 +202,9 @@ static struct ieee80211_supported_band _
2910
2911  /* This is to override regulatory domains defined in cfg80211 module (reg.c)
2912   * By default world regulatory domain defined in reg.c puts the flags
2913 - * NL80211_RRF_PASSIVE_SCAN and NL80211_RRF_NO_IBSS for 5GHz channels (for
2914 - * 36..48 and 149..165). With respect to these flags, wpa_supplicant doesn't
2915 - * start p2p operations on 5GHz channels. All the changes in world regulatory
2916 + * NL80211_RRF_NO_IR for 5GHz channels (for * 36..48 and 149..165).
2917 + * With respect to these flags, wpa_supplicant doesn't * start p2p
2918 + * operations on 5GHz channels. All the changes in world regulatory
2919   * domain are to be done here.
2920   */
2921  static const struct ieee80211_regdomain brcmf_regdom = {
2922 @@ -5197,10 +5197,10 @@ static s32 brcmf_construct_reginfo(struc
2923                                         if (channel & WL_CHAN_RADAR)
2924                                                 band_chan_arr[index].flags |=
2925                                                         (IEEE80211_CHAN_RADAR |
2926 -                                                       IEEE80211_CHAN_NO_IBSS);
2927 +                                                       IEEE80211_CHAN_NO_IR);
2928                                         if (channel & WL_CHAN_PASSIVE)
2929                                                 band_chan_arr[index].flags |=
2930 -                                                   IEEE80211_CHAN_PASSIVE_SCAN;
2931 +                                                   IEEE80211_CHAN_NO_IR;
2932                                 }
2933                         }
2934                         if (!update)
2935 --- a/drivers/net/wireless/brcm80211/brcmsmac/channel.c
2936 +++ b/drivers/net/wireless/brcm80211/brcmsmac/channel.c
2937 @@ -59,23 +59,20 @@
2938
2939  #define BRCM_2GHZ_2412_2462    REG_RULE(2412-10, 2462+10, 40, 0, 19, 0)
2940  #define BRCM_2GHZ_2467_2472    REG_RULE(2467-10, 2472+10, 20, 0, 19, \
2941 -                                        NL80211_RRF_PASSIVE_SCAN | \
2942 -                                        NL80211_RRF_NO_IBSS)
2943 +                                        NL80211_RRF_NO_IR)
2944
2945  #define BRCM_5GHZ_5180_5240    REG_RULE(5180-10, 5240+10, 40, 0, 21, \
2946 -                                        NL80211_RRF_PASSIVE_SCAN | \
2947 -                                        NL80211_RRF_NO_IBSS)
2948 +                                        NL80211_RRF_NO_IR)
2949  #define BRCM_5GHZ_5260_5320    REG_RULE(5260-10, 5320+10, 40, 0, 21, \
2950 -                                        NL80211_RRF_PASSIVE_SCAN | \
2951 +                                        NL80211_RRF_NO_IR | \
2952                                          NL80211_RRF_DFS | \
2953 -                                        NL80211_RRF_NO_IBSS)
2954 +                                        NL80211_RRF_NO_IR)
2955  #define BRCM_5GHZ_5500_5700    REG_RULE(5500-10, 5700+10, 40, 0, 21, \
2956 -                                        NL80211_RRF_PASSIVE_SCAN | \
2957 +                                        NL80211_RRF_NO_IR | \
2958                                          NL80211_RRF_DFS | \
2959 -                                        NL80211_RRF_NO_IBSS)
2960 +                                        NL80211_RRF_NO_IR)
2961  #define BRCM_5GHZ_5745_5825    REG_RULE(5745-10, 5825+10, 40, 0, 21, \
2962 -                                        NL80211_RRF_PASSIVE_SCAN | \
2963 -                                        NL80211_RRF_NO_IBSS)
2964 +                                        NL80211_RRF_NO_IR)
2965
2966  static const struct ieee80211_regdomain brcms_regdom_x2 = {
2967         .n_reg_rules = 6,
2968 @@ -395,7 +392,7 @@ brcms_c_channel_set_chanspec(struct brcm
2969                 brcms_c_set_gmode(wlc, wlc->protection->gmode_user, false);
2970
2971         brcms_b_set_chanspec(wlc->hw, chanspec,
2972 -                             !!(ch->flags & IEEE80211_CHAN_PASSIVE_SCAN),
2973 +                             !!(ch->flags & IEEE80211_CHAN_NO_IR),
2974                               &txpwr);
2975  }
2976
2977 @@ -657,8 +654,8 @@ static void brcms_reg_apply_radar_flags(
2978                  */
2979                 if (!(ch->flags & IEEE80211_CHAN_DISABLED))
2980                         ch->flags |= IEEE80211_CHAN_RADAR |
2981 -                                    IEEE80211_CHAN_NO_IBSS |
2982 -                                    IEEE80211_CHAN_PASSIVE_SCAN;
2983 +                                    IEEE80211_CHAN_NO_IR |
2984 +                                    IEEE80211_CHAN_NO_IR;
2985         }
2986  }
2987
2988 @@ -688,14 +685,13 @@ brcms_reg_apply_beaconing_flags(struct w
2989                                 if (IS_ERR(rule))
2990                                         continue;
2991
2992 -                               if (!(rule->flags & NL80211_RRF_NO_IBSS))
2993 -                                       ch->flags &= ~IEEE80211_CHAN_NO_IBSS;
2994 -                               if (!(rule->flags & NL80211_RRF_PASSIVE_SCAN))
2995 +                               if (!(rule->flags & NL80211_RRF_NO_IR))
2996 +                                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
2997 +                               if (!(rule->flags & NL80211_RRF_NO_IR))
2998                                         ch->flags &=
2999 -                                               ~IEEE80211_CHAN_PASSIVE_SCAN;
3000 +                                               ~IEEE80211_CHAN_NO_IR;
3001                         } else if (ch->beacon_found) {
3002 -                               ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
3003 -                                              IEEE80211_CHAN_PASSIVE_SCAN);
3004 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
3005                         }
3006                 }
3007         }
3008 --- a/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
3009 +++ b/drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
3010 @@ -125,13 +125,13 @@ static struct ieee80211_channel brcms_2g
3011         CHAN2GHZ(10, 2457, IEEE80211_CHAN_NO_HT40PLUS),
3012         CHAN2GHZ(11, 2462, IEEE80211_CHAN_NO_HT40PLUS),
3013         CHAN2GHZ(12, 2467,
3014 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS |
3015 +                IEEE80211_CHAN_NO_IR |
3016                  IEEE80211_CHAN_NO_HT40PLUS),
3017         CHAN2GHZ(13, 2472,
3018 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS |
3019 +                IEEE80211_CHAN_NO_IR |
3020                  IEEE80211_CHAN_NO_HT40PLUS),
3021         CHAN2GHZ(14, 2484,
3022 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_IBSS |
3023 +                IEEE80211_CHAN_NO_IR |
3024                  IEEE80211_CHAN_NO_HT40PLUS | IEEE80211_CHAN_NO_HT40MINUS |
3025                  IEEE80211_CHAN_NO_OFDM)
3026  };
3027 @@ -144,51 +144,51 @@ static struct ieee80211_channel brcms_5g
3028         CHAN5GHZ(48, IEEE80211_CHAN_NO_HT40PLUS),
3029         /* UNII-2 */
3030         CHAN5GHZ(52,
3031 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3032 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
3033 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3034 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
3035         CHAN5GHZ(56,
3036 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3037 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
3038 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3039 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
3040         CHAN5GHZ(60,
3041 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3042 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
3043 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3044 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
3045         CHAN5GHZ(64,
3046 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3047 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
3048 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3049 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
3050         /* MID */
3051         CHAN5GHZ(100,
3052 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3053 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
3054 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3055 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
3056         CHAN5GHZ(104,
3057 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3058 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
3059 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3060 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
3061         CHAN5GHZ(108,
3062 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3063 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
3064 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3065 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
3066         CHAN5GHZ(112,
3067 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3068 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
3069 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3070 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
3071         CHAN5GHZ(116,
3072 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3073 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
3074 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3075 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
3076         CHAN5GHZ(120,
3077 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3078 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
3079 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3080 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
3081         CHAN5GHZ(124,
3082 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3083 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
3084 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3085 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
3086         CHAN5GHZ(128,
3087 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3088 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
3089 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3090 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
3091         CHAN5GHZ(132,
3092 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3093 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40MINUS),
3094 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3095 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40MINUS),
3096         CHAN5GHZ(136,
3097 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3098 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS),
3099 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3100 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS),
3101         CHAN5GHZ(140,
3102 -                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IBSS |
3103 -                IEEE80211_CHAN_PASSIVE_SCAN | IEEE80211_CHAN_NO_HT40PLUS |
3104 +                IEEE80211_CHAN_RADAR | IEEE80211_CHAN_NO_IR |
3105 +                IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_NO_HT40PLUS |
3106                  IEEE80211_CHAN_NO_HT40MINUS),
3107         /* UNII-3 */
3108         CHAN5GHZ(149, IEEE80211_CHAN_NO_HT40MINUS),
3109 --- a/drivers/net/wireless/cw1200/scan.c
3110 +++ b/drivers/net/wireless/cw1200/scan.c
3111 @@ -197,9 +197,9 @@ void cw1200_scan_work(struct work_struct
3112                         if ((*it)->band != first->band)
3113                                 break;
3114                         if (((*it)->flags ^ first->flags) &
3115 -                                       IEEE80211_CHAN_PASSIVE_SCAN)
3116 +                                       IEEE80211_CHAN_NO_IR)
3117                                 break;
3118 -                       if (!(first->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
3119 +                       if (!(first->flags & IEEE80211_CHAN_NO_IR) &&
3120                             (*it)->max_power != first->max_power)
3121                                 break;
3122                 }
3123 @@ -210,7 +210,7 @@ void cw1200_scan_work(struct work_struct
3124                 else
3125                         scan.max_tx_rate = WSM_TRANSMIT_RATE_1;
3126                 scan.num_probes =
3127 -                       (first->flags & IEEE80211_CHAN_PASSIVE_SCAN) ? 0 : 2;
3128 +                       (first->flags & IEEE80211_CHAN_NO_IR) ? 0 : 2;
3129                 scan.num_ssids = priv->scan.n_ssids;
3130                 scan.ssids = &priv->scan.ssids[0];
3131                 scan.num_channels = it - priv->scan.curr;
3132 @@ -233,7 +233,7 @@ void cw1200_scan_work(struct work_struct
3133                 }
3134                 for (i = 0; i < scan.num_channels; ++i) {
3135                         scan.ch[i].number = priv->scan.curr[i]->hw_value;
3136 -                       if (priv->scan.curr[i]->flags & IEEE80211_CHAN_PASSIVE_SCAN) {
3137 +                       if (priv->scan.curr[i]->flags & IEEE80211_CHAN_NO_IR) {
3138                                 scan.ch[i].min_chan_time = 50;
3139                                 scan.ch[i].max_chan_time = 100;
3140                         } else {
3141 @@ -241,7 +241,7 @@ void cw1200_scan_work(struct work_struct
3142                                 scan.ch[i].max_chan_time = 25;
3143                         }
3144                 }
3145 -               if (!(first->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
3146 +               if (!(first->flags & IEEE80211_CHAN_NO_IR) &&
3147                     priv->scan.output_power != first->max_power) {
3148                         priv->scan.output_power = first->max_power;
3149                         wsm_set_output_power(priv,
3150 --- a/drivers/net/wireless/ipw2x00/ipw2100.c
3151 +++ b/drivers/net/wireless/ipw2x00/ipw2100.c
3152 @@ -1934,10 +1934,10 @@ static int ipw2100_wdev_init(struct net_
3153                         bg_band->channels[i].max_power = geo->bg[i].max_power;
3154                         if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
3155                                 bg_band->channels[i].flags |=
3156 -                                       IEEE80211_CHAN_PASSIVE_SCAN;
3157 +                                       IEEE80211_CHAN_NO_IR;
3158                         if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
3159                                 bg_band->channels[i].flags |=
3160 -                                       IEEE80211_CHAN_NO_IBSS;
3161 +                                       IEEE80211_CHAN_NO_IR;
3162                         if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
3163                                 bg_band->channels[i].flags |=
3164                                         IEEE80211_CHAN_RADAR;
3165 --- a/drivers/net/wireless/ipw2x00/ipw2200.c
3166 +++ b/drivers/net/wireless/ipw2x00/ipw2200.c
3167 @@ -11472,10 +11472,10 @@ static int ipw_wdev_init(struct net_devi
3168                         bg_band->channels[i].max_power = geo->bg[i].max_power;
3169                         if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
3170                                 bg_band->channels[i].flags |=
3171 -                                       IEEE80211_CHAN_PASSIVE_SCAN;
3172 +                                       IEEE80211_CHAN_NO_IR;
3173                         if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
3174                                 bg_band->channels[i].flags |=
3175 -                                       IEEE80211_CHAN_NO_IBSS;
3176 +                                       IEEE80211_CHAN_NO_IR;
3177                         if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
3178                                 bg_band->channels[i].flags |=
3179                                         IEEE80211_CHAN_RADAR;
3180 @@ -11511,10 +11511,10 @@ static int ipw_wdev_init(struct net_devi
3181                         a_band->channels[i].max_power = geo->a[i].max_power;
3182                         if (geo->a[i].flags & LIBIPW_CH_PASSIVE_ONLY)
3183                                 a_band->channels[i].flags |=
3184 -                                       IEEE80211_CHAN_PASSIVE_SCAN;
3185 +                                       IEEE80211_CHAN_NO_IR;
3186                         if (geo->a[i].flags & LIBIPW_CH_NO_IBSS)
3187                                 a_band->channels[i].flags |=
3188 -                                       IEEE80211_CHAN_NO_IBSS;
3189 +                                       IEEE80211_CHAN_NO_IR;
3190                         if (geo->a[i].flags & LIBIPW_CH_RADAR_DETECT)
3191                                 a_band->channels[i].flags |=
3192                                         IEEE80211_CHAN_RADAR;
3193 --- a/drivers/net/wireless/iwlegacy/3945-mac.c
3194 +++ b/drivers/net/wireless/iwlegacy/3945-mac.c
3195 @@ -1595,7 +1595,7 @@ il3945_get_channels_for_scan(struct il_p
3196                  *  and use long active_dwell time.
3197                  */
3198                 if (!is_active || il_is_channel_passive(ch_info) ||
3199 -                   (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
3200 +                   (chan->flags & IEEE80211_CHAN_NO_IR)) {
3201                         scan_ch->type = 0;      /* passive */
3202                         if (IL_UCODE_API(il->ucode_ver) == 1)
3203                                 scan_ch->active_dwell =
3204 --- a/drivers/net/wireless/iwlegacy/4965-mac.c
3205 +++ b/drivers/net/wireless/iwlegacy/4965-mac.c
3206 @@ -805,7 +805,7 @@ il4965_get_channels_for_scan(struct il_p
3207                 }
3208
3209                 if (!is_active || il_is_channel_passive(ch_info) ||
3210 -                   (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
3211 +                   (chan->flags & IEEE80211_CHAN_NO_IR))
3212                         scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
3213                 else
3214                         scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
3215 --- a/drivers/net/wireless/iwlegacy/common.c
3216 +++ b/drivers/net/wireless/iwlegacy/common.c
3217 @@ -3447,10 +3447,10 @@ il_init_geos(struct il_priv *il)
3218
3219                 if (il_is_channel_valid(ch)) {
3220                         if (!(ch->flags & EEPROM_CHANNEL_IBSS))
3221 -                               geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
3222 +                               geo_ch->flags |= IEEE80211_CHAN_NO_IR;
3223
3224                         if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
3225 -                               geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
3226 +                               geo_ch->flags |= IEEE80211_CHAN_NO_IR;
3227
3228                         if (ch->flags & EEPROM_CHANNEL_RADAR)
3229                                 geo_ch->flags |= IEEE80211_CHAN_RADAR;
3230 --- a/drivers/net/wireless/iwlegacy/debug.c
3231 +++ b/drivers/net/wireless/iwlegacy/debug.c
3232 @@ -567,12 +567,12 @@ il_dbgfs_channels_read(struct file *file
3233                                       flags & IEEE80211_CHAN_RADAR ?
3234                                       " (IEEE 802.11h required)" : "",
3235                                       ((channels[i].
3236 -                                       flags & IEEE80211_CHAN_NO_IBSS) ||
3237 +                                       flags & IEEE80211_CHAN_NO_IR) ||
3238                                        (channels[i].
3239                                         flags & IEEE80211_CHAN_RADAR)) ? "" :
3240                                       ", IBSS",
3241                                       channels[i].
3242 -                                     flags & IEEE80211_CHAN_PASSIVE_SCAN ?
3243 +                                     flags & IEEE80211_CHAN_NO_IR ?
3244                                       "passive only" : "active/passive");
3245         }
3246         supp_band = il_get_hw_mode(il, IEEE80211_BAND_5GHZ);
3247 @@ -594,12 +594,12 @@ il_dbgfs_channels_read(struct file *file
3248                                       flags & IEEE80211_CHAN_RADAR ?
3249                                       " (IEEE 802.11h required)" : "",
3250                                       ((channels[i].
3251 -                                       flags & IEEE80211_CHAN_NO_IBSS) ||
3252 +                                       flags & IEEE80211_CHAN_NO_IR) ||
3253                                        (channels[i].
3254                                         flags & IEEE80211_CHAN_RADAR)) ? "" :
3255                                       ", IBSS",
3256                                       channels[i].
3257 -                                     flags & IEEE80211_CHAN_PASSIVE_SCAN ?
3258 +                                     flags & IEEE80211_CHAN_NO_IR ?
3259                                       "passive only" : "active/passive");
3260         }
3261         ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
3262 --- a/drivers/net/wireless/iwlwifi/dvm/debugfs.c
3263 +++ b/drivers/net/wireless/iwlwifi/dvm/debugfs.c
3264 @@ -352,12 +352,12 @@ static ssize_t iwl_dbgfs_channels_read(s
3265                                         channels[i].max_power,
3266                                         channels[i].flags & IEEE80211_CHAN_RADAR ?
3267                                         " (IEEE 802.11h required)" : "",
3268 -                                       ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3269 +                                       ((channels[i].flags & IEEE80211_CHAN_NO_IR)
3270                                         || (channels[i].flags &
3271                                         IEEE80211_CHAN_RADAR)) ? "" :
3272                                         ", IBSS",
3273                                         channels[i].flags &
3274 -                                       IEEE80211_CHAN_PASSIVE_SCAN ?
3275 +                                       IEEE80211_CHAN_NO_IR ?
3276                                         "passive only" : "active/passive");
3277         }
3278         supp_band = iwl_get_hw_mode(priv, IEEE80211_BAND_5GHZ);
3279 @@ -375,12 +375,12 @@ static ssize_t iwl_dbgfs_channels_read(s
3280                                         channels[i].max_power,
3281                                         channels[i].flags & IEEE80211_CHAN_RADAR ?
3282                                         " (IEEE 802.11h required)" : "",
3283 -                                       ((channels[i].flags & IEEE80211_CHAN_NO_IBSS)
3284 +                                       ((channels[i].flags & IEEE80211_CHAN_NO_IR)
3285                                         || (channels[i].flags &
3286                                         IEEE80211_CHAN_RADAR)) ? "" :
3287                                         ", IBSS",
3288                                         channels[i].flags &
3289 -                                       IEEE80211_CHAN_PASSIVE_SCAN ?
3290 +                                       IEEE80211_CHAN_NO_IR ?
3291                                         "passive only" : "active/passive");
3292         }
3293         ret = simple_read_from_buffer(user_buf, count, ppos, buf, pos);
3294 --- a/drivers/net/wireless/iwlwifi/dvm/scan.c
3295 +++ b/drivers/net/wireless/iwlwifi/dvm/scan.c
3296 @@ -544,7 +544,7 @@ static int iwl_get_channels_for_scan(str
3297                 channel = chan->hw_value;
3298                 scan_ch->channel = cpu_to_le16(channel);
3299
3300 -               if (!is_active || (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN))
3301 +               if (!is_active || (chan->flags & IEEE80211_CHAN_NO_IR))
3302                         scan_ch->type = SCAN_CHANNEL_TYPE_PASSIVE;
3303                 else
3304                         scan_ch->type = SCAN_CHANNEL_TYPE_ACTIVE;
3305 --- a/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c
3306 +++ b/drivers/net/wireless/iwlwifi/iwl-eeprom-parse.c
3307 @@ -614,10 +614,10 @@ static int iwl_init_channel_map(struct d
3308                         channel->flags = IEEE80211_CHAN_NO_HT40;
3309
3310                         if (!(eeprom_ch->flags & EEPROM_CHANNEL_IBSS))
3311 -                               channel->flags |= IEEE80211_CHAN_NO_IBSS;
3312 +                               channel->flags |= IEEE80211_CHAN_NO_IR;
3313
3314                         if (!(eeprom_ch->flags & EEPROM_CHANNEL_ACTIVE))
3315 -                               channel->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
3316 +                               channel->flags |= IEEE80211_CHAN_NO_IR;
3317
3318                         if (eeprom_ch->flags & EEPROM_CHANNEL_RADAR)
3319                                 channel->flags |= IEEE80211_CHAN_RADAR;
3320 --- a/drivers/net/wireless/iwlwifi/iwl-nvm-parse.c
3321 +++ b/drivers/net/wireless/iwlwifi/iwl-nvm-parse.c
3322 @@ -223,10 +223,10 @@ static int iwl_init_channel_map(struct d
3323                         channel->flags |= IEEE80211_CHAN_NO_160MHZ;
3324
3325                 if (!(ch_flags & NVM_CHANNEL_IBSS))
3326 -                       channel->flags |= IEEE80211_CHAN_NO_IBSS;
3327 +                       channel->flags |= IEEE80211_CHAN_NO_IR;
3328
3329                 if (!(ch_flags & NVM_CHANNEL_ACTIVE))
3330 -                       channel->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
3331 +                       channel->flags |= IEEE80211_CHAN_NO_IR;
3332
3333                 if (ch_flags & NVM_CHANNEL_RADAR)
3334                         channel->flags |= IEEE80211_CHAN_RADAR;
3335 --- a/drivers/net/wireless/iwlwifi/mvm/scan.c
3336 +++ b/drivers/net/wireless/iwlwifi/mvm/scan.c
3337 @@ -192,7 +192,7 @@ static void iwl_mvm_scan_fill_channels(s
3338         for (i = 0; i < cmd->channel_count; i++) {
3339                 chan->channel = cpu_to_le16(req->channels[i]->hw_value);
3340                 chan->type = cpu_to_le32(type);
3341 -               if (req->channels[i]->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3342 +               if (req->channels[i]->flags & IEEE80211_CHAN_NO_IR)
3343                         chan->type &= cpu_to_le32(~SCAN_CHANNEL_TYPE_ACTIVE);
3344                 chan->active_dwell = cpu_to_le16(active_dwell);
3345                 chan->passive_dwell = cpu_to_le16(passive_dwell);
3346 @@ -642,7 +642,7 @@ static void iwl_build_channel_cfg(struct
3347                 channels->iter_count[index] = cpu_to_le16(1);
3348                 channels->iter_interval[index] = 0;
3349
3350 -               if (!(s_band->channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
3351 +               if (!(s_band->channels[i].flags & IEEE80211_CHAN_NO_IR))
3352                         channels->type[index] |=
3353                                 cpu_to_le32(IWL_SCAN_OFFLOAD_CHANNEL_ACTIVE);
3354
3355 --- a/drivers/net/wireless/mac80211_hwsim.c
3356 +++ b/drivers/net/wireless/mac80211_hwsim.c
3357 @@ -159,7 +159,7 @@ static const struct ieee80211_regdomain
3358         .reg_rules = {
3359                 REG_RULE(2412-10, 2462+10, 40, 0, 20, 0),
3360                 REG_RULE(5725-10, 5850+10, 40, 0, 30,
3361 -                       NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
3362 +                        NL80211_RRF_NO_IR),
3363         }
3364  };
3365
3366 @@ -1485,7 +1485,7 @@ static void hw_scan_work(struct work_str
3367                     req->channels[hwsim->scan_chan_idx]->center_freq);
3368
3369         hwsim->tmp_chan = req->channels[hwsim->scan_chan_idx];
3370 -       if (hwsim->tmp_chan->flags & IEEE80211_CHAN_PASSIVE_SCAN ||
3371 +       if (hwsim->tmp_chan->flags & IEEE80211_CHAN_NO_IR ||
3372             !req->n_ssids) {
3373                 dwell = 120;
3374         } else {
3375 --- a/drivers/net/wireless/mwifiex/cfg80211.c
3376 +++ b/drivers/net/wireless/mwifiex/cfg80211.c
3377 @@ -50,24 +50,24 @@ static const struct ieee80211_regdomain
3378                 REG_RULE(2412-10, 2462+10, 40, 3, 20, 0),
3379                 /* Channel 12 - 13 */
3380                 REG_RULE(2467-10, 2472+10, 20, 3, 20,
3381 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
3382 +                        NL80211_RRF_NO_IR),
3383                 /* Channel 14 */
3384                 REG_RULE(2484-10, 2484+10, 20, 3, 20,
3385 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS |
3386 +                        NL80211_RRF_NO_IR |
3387                          NL80211_RRF_NO_OFDM),
3388                 /* Channel 36 - 48 */
3389                 REG_RULE(5180-10, 5240+10, 40, 3, 20,
3390 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
3391 +                        NL80211_RRF_NO_IR),
3392                 /* Channel 149 - 165 */
3393                 REG_RULE(5745-10, 5825+10, 40, 3, 20,
3394 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS),
3395 +                        NL80211_RRF_NO_IR),
3396                 /* Channel 52 - 64 */
3397                 REG_RULE(5260-10, 5320+10, 40, 3, 30,
3398 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS |
3399 +                        NL80211_RRF_NO_IR |
3400                          NL80211_RRF_DFS),
3401                 /* Channel 100 - 140 */
3402                 REG_RULE(5500-10, 5700+10, 40, 3, 30,
3403 -                        NL80211_RRF_PASSIVE_SCAN | NL80211_RRF_NO_IBSS |
3404 +                        NL80211_RRF_NO_IR |
3405                          NL80211_RRF_DFS),
3406         }
3407  };
3408 @@ -1968,7 +1968,7 @@ mwifiex_cfg80211_scan(struct wiphy *wiph
3409                 user_scan_cfg->chan_list[i].chan_number = chan->hw_value;
3410                 user_scan_cfg->chan_list[i].radio_type = chan->band;
3411
3412 -               if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3413 +               if (chan->flags & IEEE80211_CHAN_NO_IR)
3414                         user_scan_cfg->chan_list[i].scan_type =
3415                                                 MWIFIEX_SCAN_TYPE_PASSIVE;
3416                 else
3417 --- a/drivers/net/wireless/mwifiex/scan.c
3418 +++ b/drivers/net/wireless/mwifiex/scan.c
3419 @@ -515,14 +515,14 @@ mwifiex_scan_create_channel_list(struct
3420                                 scan_chan_list[chan_idx].max_scan_time =
3421                                         cpu_to_le16((u16) user_scan_in->
3422                                         chan_list[0].scan_time);
3423 -                       else if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3424 +                       else if (ch->flags & IEEE80211_CHAN_NO_IR)
3425                                 scan_chan_list[chan_idx].max_scan_time =
3426                                         cpu_to_le16(adapter->passive_scan_time);
3427                         else
3428                                 scan_chan_list[chan_idx].max_scan_time =
3429                                         cpu_to_le16(adapter->active_scan_time);
3430
3431 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3432 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
3433                                 scan_chan_list[chan_idx].chan_scan_mode_bitmap
3434                                         |= MWIFIEX_PASSIVE_SCAN;
3435                         else
3436 --- a/drivers/net/wireless/rt2x00/rt2x00lib.h
3437 +++ b/drivers/net/wireless/rt2x00/rt2x00lib.h
3438 @@ -146,7 +146,7 @@ void rt2x00queue_remove_l2pad(struct sk_
3439   * @local: frame is not from mac80211
3440   */
3441  int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
3442 -                              bool local);
3443 +                              struct ieee80211_sta *sta, bool local);
3444
3445  /**
3446   * rt2x00queue_update_beacon - Send new beacon from mac80211
3447 --- a/drivers/net/wireless/rt2x00/rt2x00mac.c
3448 +++ b/drivers/net/wireless/rt2x00/rt2x00mac.c
3449 @@ -90,7 +90,7 @@ static int rt2x00mac_tx_rts_cts(struct r
3450                                   frag_skb->data, data_length, tx_info,
3451                                   (struct ieee80211_rts *)(skb->data));
3452
3453 -       retval = rt2x00queue_write_tx_frame(queue, skb, true);
3454 +       retval = rt2x00queue_write_tx_frame(queue, skb, NULL, true);
3455         if (retval) {
3456                 dev_kfree_skb_any(skb);
3457                 rt2x00_warn(rt2x00dev, "Failed to send RTS/CTS frame\n");
3458 @@ -151,7 +151,7 @@ void rt2x00mac_tx(struct ieee80211_hw *h
3459                         goto exit_fail;
3460         }
3461
3462 -       if (unlikely(rt2x00queue_write_tx_frame(queue, skb, false)))
3463 +       if (unlikely(rt2x00queue_write_tx_frame(queue, skb, control->sta, false)))
3464                 goto exit_fail;
3465
3466         /*
3467 --- a/drivers/net/wireless/rt2x00/rt2x00queue.c
3468 +++ b/drivers/net/wireless/rt2x00/rt2x00queue.c
3469 @@ -635,7 +635,7 @@ static void rt2x00queue_bar_check(struct
3470  }
3471
3472  int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
3473 -                              bool local)
3474 +                              struct ieee80211_sta *sta, bool local)
3475  {
3476         struct ieee80211_tx_info *tx_info;
3477         struct queue_entry *entry;
3478 @@ -649,7 +649,7 @@ int rt2x00queue_write_tx_frame(struct da
3479          * after that we are free to use the skb->cb array
3480          * for our information.
3481          */
3482 -       rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, NULL);
3483 +       rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
3484
3485         /*
3486          * All information is retrieved from the skb->cb array,
3487 --- a/drivers/net/wireless/rtl818x/rtl8187/dev.c
3488 +++ b/drivers/net/wireless/rtl818x/rtl8187/dev.c
3489 @@ -416,7 +416,7 @@ static int rtl8187_init_urbs(struct ieee
3490         struct rtl8187_rx_info *info;
3491         int ret = 0;
3492
3493 -       while (skb_queue_len(&priv->rx_queue) < 16) {
3494 +       while (skb_queue_len(&priv->rx_queue) < 32) {
3495                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
3496                 if (!skb) {
3497                         ret = -ENOMEM;
3498 --- a/drivers/net/wireless/rtlwifi/base.c
3499 +++ b/drivers/net/wireless/rtlwifi/base.c
3500 @@ -1078,8 +1078,8 @@ u8 rtl_is_special_data(struct ieee80211_
3501
3502         ip = (struct iphdr *)((u8 *) skb->data + mac_hdr_len +
3503                               SNAP_SIZE + PROTOC_TYPE_SIZE);
3504 -       ether_type = *(u16 *) ((u8 *) skb->data + mac_hdr_len + SNAP_SIZE);
3505 -       /*      ether_type = ntohs(ether_type); */
3506 +       ether_type = be16_to_cpu(*(__be16 *)((u8 *)skb->data + mac_hdr_len +
3507 +                                            SNAP_SIZE));
3508
3509         if (ETH_P_IP == ether_type) {
3510                 if (IPPROTO_UDP == ip->protocol) {
3511 --- a/drivers/net/wireless/rtlwifi/regd.c
3512 +++ b/drivers/net/wireless/rtlwifi/regd.c
3513 @@ -59,30 +59,27 @@ static struct country_code_to_enum_rd al
3514   */
3515  #define RTL819x_2GHZ_CH12_13   \
3516         REG_RULE(2467-10, 2472+10, 40, 0, 20,\
3517 -       NL80211_RRF_PASSIVE_SCAN)
3518 +       NL80211_RRF_NO_IR)
3519
3520  #define RTL819x_2GHZ_CH14      \
3521         REG_RULE(2484-10, 2484+10, 40, 0, 20, \
3522 -       NL80211_RRF_PASSIVE_SCAN | \
3523 +       NL80211_RRF_NO_IR | \
3524         NL80211_RRF_NO_OFDM)
3525
3526  /* 5G chan 36 - chan 64*/
3527  #define RTL819x_5GHZ_5150_5350 \
3528         REG_RULE(5150-10, 5350+10, 40, 0, 30, \
3529 -       NL80211_RRF_PASSIVE_SCAN | \
3530 -       NL80211_RRF_NO_IBSS)
3531 +       NL80211_RRF_NO_IR)
3532
3533  /* 5G chan 100 - chan 165*/
3534  #define RTL819x_5GHZ_5470_5850 \
3535         REG_RULE(5470-10, 5850+10, 40, 0, 30, \
3536 -       NL80211_RRF_PASSIVE_SCAN | \
3537 -       NL80211_RRF_NO_IBSS)
3538 +       NL80211_RRF_NO_IR)
3539
3540  /* 5G chan 149 - chan 165*/
3541  #define RTL819x_5GHZ_5725_5850 \
3542         REG_RULE(5725-10, 5850+10, 40, 0, 30, \
3543 -       NL80211_RRF_PASSIVE_SCAN | \
3544 -       NL80211_RRF_NO_IBSS)
3545 +       NL80211_RRF_NO_IR)
3546
3547  #define RTL819x_5GHZ_ALL       \
3548         (RTL819x_5GHZ_5150_5350, RTL819x_5GHZ_5470_5850)
3549 @@ -185,16 +182,15 @@ static void _rtl_reg_apply_beaconing_fla
3550                                  *regulatory_hint().
3551                                  */
3552
3553 -                               if (!(reg_rule->flags & NL80211_RRF_NO_IBSS))
3554 -                                       ch->flags &= ~IEEE80211_CHAN_NO_IBSS;
3555 +                               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
3556 +                                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
3557                                 if (!(reg_rule->
3558 -                                    flags & NL80211_RRF_PASSIVE_SCAN))
3559 +                                    flags & NL80211_RRF_NO_IR))
3560                                         ch->flags &=
3561 -                                           ~IEEE80211_CHAN_PASSIVE_SCAN;
3562 +                                           ~IEEE80211_CHAN_NO_IR;
3563                         } else {
3564                                 if (ch->beacon_found)
3565 -                                       ch->flags &= ~(IEEE80211_CHAN_NO_IBSS |
3566 -                                                 IEEE80211_CHAN_PASSIVE_SCAN);
3567 +                                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
3568                         }
3569                 }
3570         }
3571 @@ -219,11 +215,11 @@ static void _rtl_reg_apply_active_scan_f
3572          */
3573         if (initiator != NL80211_REGDOM_SET_BY_COUNTRY_IE) {
3574                 ch = &sband->channels[11];      /* CH 12 */
3575 -               if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3576 -                       ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
3577 +               if (ch->flags & IEEE80211_CHAN_NO_IR)
3578 +                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
3579                 ch = &sband->channels[12];      /* CH 13 */
3580 -               if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3581 -                       ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
3582 +               if (ch->flags & IEEE80211_CHAN_NO_IR)
3583 +                       ch->flags &= ~IEEE80211_CHAN_NO_IR;
3584                 return;
3585         }
3586
3587 @@ -237,17 +233,17 @@ static void _rtl_reg_apply_active_scan_f
3588         ch = &sband->channels[11];      /* CH 12 */
3589         reg_rule = freq_reg_info(wiphy, ch->center_freq);
3590         if (!IS_ERR(reg_rule)) {
3591 -               if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
3592 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3593 -                               ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
3594 +               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
3595 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
3596 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
3597         }
3598
3599         ch = &sband->channels[12];      /* CH 13 */
3600         reg_rule = freq_reg_info(wiphy, ch->center_freq);
3601         if (!IS_ERR(reg_rule)) {
3602 -               if (!(reg_rule->flags & NL80211_RRF_PASSIVE_SCAN))
3603 -                       if (ch->flags & IEEE80211_CHAN_PASSIVE_SCAN)
3604 -                               ch->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
3605 +               if (!(reg_rule->flags & NL80211_RRF_NO_IR))
3606 +                       if (ch->flags & IEEE80211_CHAN_NO_IR)
3607 +                               ch->flags &= ~IEEE80211_CHAN_NO_IR;
3608         }
3609  }
3610
3611 @@ -284,8 +280,8 @@ static void _rtl_reg_apply_radar_flags(s
3612                  */
3613                 if (!(ch->flags & IEEE80211_CHAN_DISABLED))
3614                         ch->flags |= IEEE80211_CHAN_RADAR |
3615 -                           IEEE80211_CHAN_NO_IBSS |
3616 -                           IEEE80211_CHAN_PASSIVE_SCAN;
3617 +                           IEEE80211_CHAN_NO_IR |
3618 +                           IEEE80211_CHAN_NO_IR;
3619         }
3620  }
3621
3622 --- a/drivers/net/wireless/ti/wl12xx/scan.c
3623 +++ b/drivers/net/wireless/ti/wl12xx/scan.c
3624 @@ -47,7 +47,7 @@ static int wl1271_get_scan_channels(stru
3625                      * In active scans, we only scan channels not
3626                      * marked as passive.
3627                      */
3628 -                   (passive || !(flags & IEEE80211_CHAN_PASSIVE_SCAN))) {
3629 +                   (passive || !(flags & IEEE80211_CHAN_NO_IR))) {
3630                         wl1271_debug(DEBUG_SCAN, "band %d, center_freq %d ",
3631                                      req->channels[i]->band,
3632                                      req->channels[i]->center_freq);
3633 --- a/drivers/net/wireless/ti/wlcore/cmd.c
3634 +++ b/drivers/net/wireless/ti/wlcore/cmd.c
3635 @@ -1688,7 +1688,7 @@ int wlcore_cmd_regdomain_config_locked(s
3636
3637                         if (channel->flags & (IEEE80211_CHAN_DISABLED |
3638                                               IEEE80211_CHAN_RADAR |
3639 -                                             IEEE80211_CHAN_PASSIVE_SCAN))
3640 +                                             IEEE80211_CHAN_NO_IR))
3641                                 continue;
3642
3643                         ch_bit_idx = wlcore_get_reg_conf_ch_idx(b, ch);
3644 --- a/drivers/net/wireless/ti/wlcore/main.c
3645 +++ b/drivers/net/wireless/ti/wlcore/main.c
3646 @@ -91,8 +91,7 @@ static void wl1271_reg_notify(struct wip
3647                         continue;
3648
3649                 if (ch->flags & IEEE80211_CHAN_RADAR)
3650 -                       ch->flags |= IEEE80211_CHAN_NO_IBSS |
3651 -                                    IEEE80211_CHAN_PASSIVE_SCAN;
3652 +                       ch->flags |= IEEE80211_CHAN_NO_IR;
3653
3654         }
3655
3656 --- a/drivers/net/wireless/ti/wlcore/scan.c
3657 +++ b/drivers/net/wireless/ti/wlcore/scan.c
3658 @@ -189,14 +189,14 @@ wlcore_scan_get_channels(struct wl1271 *
3659                 flags = req_channels[i]->flags;
3660
3661                 if (force_passive)
3662 -                       flags |= IEEE80211_CHAN_PASSIVE_SCAN;
3663 +                       flags |= IEEE80211_CHAN_NO_IR;
3664
3665                 if ((req_channels[i]->band == band) &&
3666                     !(flags & IEEE80211_CHAN_DISABLED) &&
3667                     (!!(flags & IEEE80211_CHAN_RADAR) == radar) &&
3668                     /* if radar is set, we ignore the passive flag */
3669                     (radar ||
3670 -                    !!(flags & IEEE80211_CHAN_PASSIVE_SCAN) == passive)) {
3671 +                    !!(flags & IEEE80211_CHAN_NO_IR) == passive)) {
3672
3673
3674                         if (flags & IEEE80211_CHAN_RADAR) {
3675 @@ -221,7 +221,7 @@ wlcore_scan_get_channels(struct wl1271 *
3676                             (band == IEEE80211_BAND_2GHZ) &&
3677                             (channels[j].channel >= 12) &&
3678                             (channels[j].channel <= 14) &&
3679 -                           (flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
3680 +                           (flags & IEEE80211_CHAN_NO_IR) &&
3681                             !force_passive) {
3682                                 /* pactive channels treated as DFS */
3683                                 channels[j].flags = SCAN_CHANNEL_FLAGS_DFS;
3684 @@ -244,7 +244,7 @@ wlcore_scan_get_channels(struct wl1271 *
3685                                      max_dwell_time_active,
3686                                      flags & IEEE80211_CHAN_RADAR ?
3687                                         ", DFS" : "",
3688 -                                    flags & IEEE80211_CHAN_PASSIVE_SCAN ?
3689 +                                    flags & IEEE80211_CHAN_NO_IR ?
3690                                         ", PASSIVE" : "");
3691                         j++;
3692                 }
3693 --- a/include/net/cfg80211.h
3694 +++ b/include/net/cfg80211.h
3695 @@ -91,9 +91,8 @@ enum ieee80211_band {
3696   * Channel flags set by the regulatory control code.
3697   *
3698   * @IEEE80211_CHAN_DISABLED: This channel is disabled.
3699 - * @IEEE80211_CHAN_PASSIVE_SCAN: Only passive scanning is permitted
3700 - *     on this channel.
3701 - * @IEEE80211_CHAN_NO_IBSS: IBSS is not allowed on this channel.
3702 + * @IEEE80211_CHAN_NO_IR: do not initiate radiation, this includes
3703 + *     sending probe requests or beaconing.
3704   * @IEEE80211_CHAN_RADAR: Radar detection is required on this channel.
3705   * @IEEE80211_CHAN_NO_HT40PLUS: extension channel above this channel
3706   *     is not permitted.
3707 @@ -113,8 +112,8 @@ enum ieee80211_band {
3708   */
3709  enum ieee80211_channel_flags {
3710         IEEE80211_CHAN_DISABLED         = 1<<0,
3711 -       IEEE80211_CHAN_PASSIVE_SCAN     = 1<<1,
3712 -       IEEE80211_CHAN_NO_IBSS          = 1<<2,
3713 +       IEEE80211_CHAN_NO_IR            = 1<<1,
3714 +       /* hole at 1<<2 */
3715         IEEE80211_CHAN_RADAR            = 1<<3,
3716         IEEE80211_CHAN_NO_HT40PLUS      = 1<<4,
3717         IEEE80211_CHAN_NO_HT40MINUS     = 1<<5,
3718 @@ -4149,6 +4148,7 @@ void cfg80211_radar_event(struct wiphy *
3719  /**
3720   * cfg80211_cac_event - Channel availability check (CAC) event
3721   * @netdev: network device
3722 + * @chandef: chandef for the current channel
3723   * @event: type of event
3724   * @gfp: context flags
3725   *
3726 @@ -4157,6 +4157,7 @@ void cfg80211_radar_event(struct wiphy *
3727   * also by full-MAC drivers.
3728   */
3729  void cfg80211_cac_event(struct net_device *netdev,
3730 +                       const struct cfg80211_chan_def *chandef,
3731                         enum nl80211_radar_event event, gfp_t gfp);
3732
3733
3734 @@ -4282,7 +4283,8 @@ bool cfg80211_reg_can_beacon(struct wiph
3735   * @dev: the device which switched channels
3736   * @chandef: the new channel definition
3737   *
3738 - * Acquires wdev_lock, so must only be called from sleepable driver context!
3739 + * Caller must acquire wdev_lock, therefore must only be called from sleepable
3740 + * driver context!
3741   */
3742  void cfg80211_ch_switch_notify(struct net_device *dev,
3743                                struct cfg80211_chan_def *chandef);
3744 --- a/include/uapi/linux/nl80211.h
3745 +++ b/include/uapi/linux/nl80211.h
3746 @@ -1508,6 +1508,12 @@ enum nl80211_commands {
3747   *     to react to radar events, e.g. initiate a channel switch or leave the
3748   *     IBSS network.
3749   *
3750 + * @NL80211_ATTR_SUPPORT_5_MHZ: A flag indicating that the device supports
3751 + *     5 MHz channel bandwidth.
3752 + *
3753 + * @NL80211_ATTR_SUPPORT_10_MHZ: A flag indicating that the device supports
3754 + *     10 MHz channel bandwidth.
3755 + *
3756   * @NL80211_ATTR_MAX: highest attribute number currently defined
3757   * @__NL80211_ATTR_AFTER_LAST: internal use
3758   */
3759 @@ -1824,6 +1830,9 @@ enum nl80211_attrs {
3760
3761         NL80211_ATTR_HANDLE_DFS,
3762
3763 +       NL80211_ATTR_SUPPORT_5_MHZ,
3764 +       NL80211_ATTR_SUPPORT_10_MHZ,
3765 +
3766         /* add attributes here, update the policy in nl80211.c */
3767
3768         __NL80211_ATTR_AFTER_LAST,
3769 @@ -2224,10 +2233,9 @@ enum nl80211_band_attr {
3770   * @NL80211_FREQUENCY_ATTR_FREQ: Frequency in MHz
3771   * @NL80211_FREQUENCY_ATTR_DISABLED: Channel is disabled in current
3772   *     regulatory domain.
3773 - * @NL80211_FREQUENCY_ATTR_PASSIVE_SCAN: Only passive scanning is
3774 - *     permitted on this channel in current regulatory domain.
3775 - * @NL80211_FREQUENCY_ATTR_NO_IBSS: IBSS networks are not permitted
3776 - *     on this channel in current regulatory domain.
3777 + * @NL80211_FREQUENCY_ATTR_NO_IR: no mechanisms that initiate radiation
3778 + *     are permitted on this channel, this includes sending probe
3779 + *     requests, or modes of operation that require beaconing.
3780   * @NL80211_FREQUENCY_ATTR_RADAR: Radar detection is mandatory
3781   *     on this channel in current regulatory domain.
3782   * @NL80211_FREQUENCY_ATTR_MAX_TX_POWER: Maximum transmission power in mBm
3783 @@ -2254,8 +2262,8 @@ enum nl80211_frequency_attr {
3784         __NL80211_FREQUENCY_ATTR_INVALID,
3785         NL80211_FREQUENCY_ATTR_FREQ,
3786         NL80211_FREQUENCY_ATTR_DISABLED,
3787 -       NL80211_FREQUENCY_ATTR_PASSIVE_SCAN,
3788 -       NL80211_FREQUENCY_ATTR_NO_IBSS,
3789 +       NL80211_FREQUENCY_ATTR_NO_IR,
3790 +       __NL80211_FREQUENCY_ATTR_NO_IBSS,
3791         NL80211_FREQUENCY_ATTR_RADAR,
3792         NL80211_FREQUENCY_ATTR_MAX_TX_POWER,
3793         NL80211_FREQUENCY_ATTR_DFS_STATE,
3794 @@ -2271,6 +2279,9 @@ enum nl80211_frequency_attr {
3795  };
3796
3797  #define NL80211_FREQUENCY_ATTR_MAX_TX_POWER NL80211_FREQUENCY_ATTR_MAX_TX_POWER
3798 +#define NL80211_FREQUENCY_ATTR_PASSIVE_SCAN    NL80211_FREQUENCY_ATTR_NO_IR
3799 +#define NL80211_FREQUENCY_ATTR_NO_IBSS         NL80211_FREQUENCY_ATTR_NO_IR
3800 +#define NL80211_FREQUENCY_ATTR_NO_IR           NL80211_FREQUENCY_ATTR_NO_IR
3801
3802  /**
3803   * enum nl80211_bitrate_attr - bitrate attributes
3804 @@ -2413,8 +2424,9 @@ enum nl80211_sched_scan_match_attr {
3805   * @NL80211_RRF_DFS: DFS support is required to be used
3806   * @NL80211_RRF_PTP_ONLY: this is only for Point To Point links
3807   * @NL80211_RRF_PTMP_ONLY: this is only for Point To Multi Point links
3808 - * @NL80211_RRF_PASSIVE_SCAN: passive scan is required
3809 - * @NL80211_RRF_NO_IBSS: no IBSS is allowed
3810 + * @NL80211_RRF_NO_IR: no mechanisms that initiate radiation are allowed,
3811 + *     this includes probe requests or modes of operation that require
3812 + *     beaconing.
3813   */
3814  enum nl80211_reg_rule_flags {
3815         NL80211_RRF_NO_OFDM             = 1<<0,
3816 @@ -2424,10 +2436,17 @@ enum nl80211_reg_rule_flags {
3817         NL80211_RRF_DFS                 = 1<<4,
3818         NL80211_RRF_PTP_ONLY            = 1<<5,
3819         NL80211_RRF_PTMP_ONLY           = 1<<6,
3820 -       NL80211_RRF_PASSIVE_SCAN        = 1<<7,
3821 -       NL80211_RRF_NO_IBSS             = 1<<8,
3822 +       NL80211_RRF_NO_IR               = 1<<7,
3823 +       __NL80211_RRF_NO_IBSS           = 1<<8,
3824  };
3825
3826 +#define NL80211_RRF_PASSIVE_SCAN       NL80211_RRF_NO_IR
3827 +#define NL80211_RRF_NO_IBSS            NL80211_RRF_NO_IR
3828 +#define NL80211_RRF_NO_IR              NL80211_RRF_NO_IR
3829 +
3830 +/* For backport compatibility with older userspace */
3831 +#define NL80211_RRF_NO_IR_ALL          (NL80211_RRF_NO_IR | __NL80211_RRF_NO_IBSS)
3832 +
3833  /**
3834   * enum nl80211_dfs_regions - regulatory DFS regions
3835   *
3836 --- a/net/mac80211/cfg.c
3837 +++ b/net/mac80211/cfg.c
3838 @@ -846,7 +846,7 @@ static int ieee80211_set_probe_resp(stru
3839         if (!resp || !resp_len)
3840                 return 1;
3841
3842 -       old = rtnl_dereference(sdata->u.ap.probe_resp);
3843 +       old = sdata_dereference(sdata->u.ap.probe_resp, sdata);
3844
3845         new = kzalloc(sizeof(struct probe_resp) + resp_len, GFP_KERNEL);
3846         if (!new)
3847 @@ -870,7 +870,8 @@ int ieee80211_assign_beacon(struct ieee8
3848         int size, err;
3849         u32 changed = BSS_CHANGED_BEACON;
3850
3851 -       old = rtnl_dereference(sdata->u.ap.beacon);
3852 +       old = sdata_dereference(sdata->u.ap.beacon, sdata);
3853 +
3854
3855         /* Need to have a beacon head if we don't have one yet */
3856         if (!params->head && !old)
3857 @@ -947,7 +948,7 @@ static int ieee80211_start_ap(struct wip
3858                       BSS_CHANGED_P2P_PS;
3859         int err;
3860
3861 -       old = rtnl_dereference(sdata->u.ap.beacon);
3862 +       old = sdata_dereference(sdata->u.ap.beacon, sdata);
3863         if (old)
3864                 return -EALREADY;
3865
3866 @@ -1001,7 +1002,8 @@ static int ieee80211_start_ap(struct wip
3867
3868         err = drv_start_ap(sdata->local, sdata);
3869         if (err) {
3870 -               old = rtnl_dereference(sdata->u.ap.beacon);
3871 +               old = sdata_dereference(sdata->u.ap.beacon, sdata);
3872 +
3873                 if (old)
3874                         kfree_rcu(old, rcu_head);
3875                 RCU_INIT_POINTER(sdata->u.ap.beacon, NULL);
3876 @@ -1032,7 +1034,7 @@ static int ieee80211_change_beacon(struc
3877         if (sdata->vif.csa_active)
3878                 return -EBUSY;
3879
3880 -       old = rtnl_dereference(sdata->u.ap.beacon);
3881 +       old = sdata_dereference(sdata->u.ap.beacon, sdata);
3882         if (!old)
3883                 return -ENOENT;
3884
3885 @@ -1050,15 +1052,18 @@ static int ieee80211_stop_ap(struct wiph
3886         struct ieee80211_local *local = sdata->local;
3887         struct beacon_data *old_beacon;
3888         struct probe_resp *old_probe_resp;
3889 +       struct cfg80211_chan_def chandef;
3890
3891 -       old_beacon = rtnl_dereference(sdata->u.ap.beacon);
3892 +       old_beacon = sdata_dereference(sdata->u.ap.beacon, sdata);
3893         if (!old_beacon)
3894                 return -ENOENT;
3895 -       old_probe_resp = rtnl_dereference(sdata->u.ap.probe_resp);
3896 +       old_probe_resp = sdata_dereference(sdata->u.ap.probe_resp, sdata);
3897
3898         /* abort any running channel switch */
3899         sdata->vif.csa_active = false;
3900 -       cancel_work_sync(&sdata->csa_finalize_work);
3901 +       kfree(sdata->u.ap.next_beacon);
3902 +       sdata->u.ap.next_beacon = NULL;
3903 +
3904         cancel_work_sync(&sdata->u.ap.request_smps_work);
3905
3906         /* turn off carrier for this interface and dependent VLANs */
3907 @@ -1091,8 +1096,10 @@ static int ieee80211_stop_ap(struct wiph
3908         ieee80211_bss_info_change_notify(sdata, BSS_CHANGED_BEACON_ENABLED);
3909
3910         if (sdata->wdev.cac_started) {
3911 +               chandef = sdata->vif.bss_conf.chandef;
3912                 cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
3913 -               cfg80211_cac_event(sdata->dev, NL80211_RADAR_CAC_ABORTED,
3914 +               cfg80211_cac_event(sdata->dev, &chandef,
3915 +                                  NL80211_RADAR_CAC_ABORTED,
3916                                    GFP_KERNEL);
3917         }
3918
3919 @@ -1368,7 +1375,7 @@ static int sta_apply_parameters(struct i
3920                         changed |=
3921                               ieee80211_mps_set_sta_local_pm(sta,
3922                                                              params->local_pm);
3923 -               ieee80211_bss_info_change_notify(sdata, changed);
3924 +               ieee80211_mbss_info_change_notify(sdata, changed);
3925  #endif
3926         }
3927
3928 @@ -1953,7 +1960,7 @@ static int ieee80211_change_bss(struct w
3929         enum ieee80211_band band;
3930         u32 changed = 0;
3931
3932 -       if (!rtnl_dereference(sdata->u.ap.beacon))
3933 +       if (!sdata_dereference(sdata->u.ap.beacon, sdata))
3934                 return -ENOENT;
3935
3936         band = ieee80211_get_sdata_band(sdata);
3937 @@ -2964,27 +2971,33 @@ void ieee80211_csa_finalize_work(struct
3938         struct ieee80211_local *local = sdata->local;
3939         int err, changed = 0;
3940
3941 +       sdata_lock(sdata);
3942 +       /* AP might have been stopped while waiting for the lock. */
3943 +       if (!sdata->vif.csa_active)
3944 +               goto unlock;
3945 +
3946         if (!ieee80211_sdata_running(sdata))
3947 -               return;
3948 +               goto unlock;
3949
3950         sdata->radar_required = sdata->csa_radar_required;
3951 -       err = ieee80211_vif_change_channel(sdata, &local->csa_chandef,
3952 -                                          &changed);
3953 +       err = ieee80211_vif_change_channel(sdata, &changed);
3954         if (WARN_ON(err < 0))
3955 -               return;
3956 +               goto unlock;
3957
3958         if (!local->use_chanctx) {
3959 -               local->_oper_chandef = local->csa_chandef;
3960 +               local->_oper_chandef = sdata->csa_chandef;
3961                 ieee80211_hw_config(local, 0);
3962         }
3963
3964         ieee80211_bss_info_change_notify(sdata, changed);
3965
3966 +       sdata->vif.csa_active = false;
3967         switch (sdata->vif.type) {
3968         case NL80211_IFTYPE_AP:
3969                 err = ieee80211_assign_beacon(sdata, sdata->u.ap.next_beacon);
3970                 if (err < 0)
3971 -                       return;
3972 +                       goto unlock;
3973 +
3974                 changed |= err;
3975                 kfree(sdata->u.ap.next_beacon);
3976                 sdata->u.ap.next_beacon = NULL;
3977 @@ -2998,20 +3011,22 @@ void ieee80211_csa_finalize_work(struct
3978         case NL80211_IFTYPE_MESH_POINT:
3979                 err = ieee80211_mesh_finish_csa(sdata);
3980                 if (err < 0)
3981 -                       return;
3982 +                       goto unlock;
3983                 break;
3984  #endif
3985         default:
3986                 WARN_ON(1);
3987 -               return;
3988 +               goto unlock;
3989         }
3990 -       sdata->vif.csa_active = false;
3991
3992         ieee80211_wake_queues_by_reason(&sdata->local->hw,
3993                                         IEEE80211_MAX_QUEUE_MAP,
3994                                         IEEE80211_QUEUE_STOP_REASON_CSA);
3995
3996 -       cfg80211_ch_switch_notify(sdata->dev, &local->csa_chandef);
3997 +       cfg80211_ch_switch_notify(sdata->dev, &sdata->csa_chandef);
3998 +
3999 +unlock:
4000 +       sdata_unlock(sdata);
4001  }
4002
4003  static int ieee80211_channel_switch(struct wiphy *wiphy, struct net_device *dev,
4004 @@ -3024,6 +3039,8 @@ static int ieee80211_channel_switch(stru
4005         struct ieee80211_if_mesh __maybe_unused *ifmsh;
4006         int err, num_chanctx;
4007
4008 +       lockdep_assert_held(&sdata->wdev.mtx);
4009 +
4010         if (!list_empty(&local->roc_list) || local->scanning)
4011                 return -EBUSY;
4012
4013 @@ -3120,9 +3137,17 @@ static int ieee80211_channel_switch(stru
4014                     params->chandef.chan->band)
4015                         return -EINVAL;
4016
4017 +               ifmsh->chsw_init = true;
4018 +               if (!ifmsh->pre_value)
4019 +                       ifmsh->pre_value = 1;
4020 +               else
4021 +                       ifmsh->pre_value++;
4022 +
4023                 err = ieee80211_mesh_csa_beacon(sdata, params, true);
4024 -               if (err < 0)
4025 +               if (err < 0) {
4026 +                       ifmsh->chsw_init = false;
4027                         return err;
4028 +               }
4029                 break;
4030  #endif
4031         default:
4032 @@ -3136,7 +3161,7 @@ static int ieee80211_channel_switch(stru
4033                                 IEEE80211_MAX_QUEUE_MAP,
4034                                 IEEE80211_QUEUE_STOP_REASON_CSA);
4035
4036 -       local->csa_chandef = params->chandef;
4037 +       sdata->csa_chandef = params->chandef;
4038         sdata->vif.csa_active = true;
4039
4040         ieee80211_bss_info_change_notify(sdata, err);
4041 --- a/net/mac80211/iface.c
4042 +++ b/net/mac80211/iface.c
4043 @@ -749,6 +749,7 @@ static void ieee80211_do_stop(struct iee
4044         u32 hw_reconf_flags = 0;
4045         int i, flushed;
4046         struct ps_data *ps;
4047 +       struct cfg80211_chan_def chandef;
4048
4049         clear_bit(SDATA_STATE_RUNNING, &sdata->state);
4050
4051 @@ -828,11 +829,13 @@ static void ieee80211_do_stop(struct iee
4052         cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
4053
4054         if (sdata->wdev.cac_started) {
4055 +               chandef = sdata->vif.bss_conf.chandef;
4056                 WARN_ON(local->suspended);
4057                 mutex_lock(&local->iflist_mtx);
4058                 ieee80211_vif_release_channel(sdata);
4059                 mutex_unlock(&local->iflist_mtx);
4060 -               cfg80211_cac_event(sdata->dev, NL80211_RADAR_CAC_ABORTED,
4061 +               cfg80211_cac_event(sdata->dev, &chandef,
4062 +                                  NL80211_RADAR_CAC_ABORTED,
4063                                    GFP_KERNEL);
4064         }
4065
4066 @@ -1340,7 +1343,6 @@ static void ieee80211_setup_sdata(struct
4067                 sdata->vif.bss_conf.bssid = NULL;
4068                 break;
4069         case NL80211_IFTYPE_AP_VLAN:
4070 -               break;
4071         case NL80211_IFTYPE_P2P_DEVICE:
4072                 sdata->vif.bss_conf.bssid = sdata->vif.addr;
4073                 break;
4074 --- a/net/mac80211/mlme.c
4075 +++ b/net/mac80211/mlme.c
4076 @@ -886,8 +886,7 @@ static void ieee80211_chswitch_work(stru
4077         if (!ifmgd->associated)
4078                 goto out;
4079
4080 -       ret = ieee80211_vif_change_channel(sdata, &local->csa_chandef,
4081 -                                          &changed);
4082 +       ret = ieee80211_vif_change_channel(sdata, &changed);
4083         if (ret) {
4084                 sdata_info(sdata,
4085                            "vif channel switch failed, disconnecting\n");
4086 @@ -897,7 +896,7 @@ static void ieee80211_chswitch_work(stru
4087         }
4088
4089         if (!local->use_chanctx) {
4090 -               local->_oper_chandef = local->csa_chandef;
4091 +               local->_oper_chandef = sdata->csa_chandef;
4092                 /* Call "hw_config" only if doing sw channel switch.
4093                  * Otherwise update the channel directly
4094                  */
4095 @@ -908,7 +907,7 @@ static void ieee80211_chswitch_work(stru
4096         }
4097
4098         /* XXX: shouldn't really modify cfg80211-owned data! */
4099 -       ifmgd->associated->channel = local->csa_chandef.chan;
4100 +       ifmgd->associated->channel = sdata->csa_chandef.chan;
4101
4102         /* XXX: wait for a beacon first? */
4103         ieee80211_wake_queues_by_reason(&local->hw,
4104 @@ -1035,7 +1034,7 @@ ieee80211_sta_process_chanswitch(struct
4105         }
4106         mutex_unlock(&local->chanctx_mtx);
4107
4108 -       local->csa_chandef = csa_ie.chandef;
4109 +       sdata->csa_chandef = csa_ie.chandef;
4110
4111         if (csa_ie.mode)
4112                 ieee80211_stop_queues_by_reason(&local->hw,
4113 @@ -1398,10 +1397,12 @@ void ieee80211_dfs_cac_timer_work(struct
4114         struct ieee80211_sub_if_data *sdata =
4115                 container_of(delayed_work, struct ieee80211_sub_if_data,
4116                              dfs_cac_timer_work);
4117 +       struct cfg80211_chan_def chandef = sdata->vif.bss_conf.chandef;
4118
4119         ieee80211_vif_release_channel(sdata);
4120 -
4121 -       cfg80211_cac_event(sdata->dev, NL80211_RADAR_CAC_FINISHED, GFP_KERNEL);
4122 +       cfg80211_cac_event(sdata->dev, &chandef,
4123 +                          NL80211_RADAR_CAC_FINISHED,
4124 +                          GFP_KERNEL);
4125  }
4126
4127  /* MLME */
4128 --- a/net/mac80211/rx.c
4129 +++ b/net/mac80211/rx.c
4130 @@ -729,9 +729,7 @@ static void ieee80211_release_reorder_fr
4131         lockdep_assert_held(&tid_agg_rx->reorder_lock);
4132
4133         while (ieee80211_sn_less(tid_agg_rx->head_seq_num, head_seq_num)) {
4134 -               index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
4135 -                                        tid_agg_rx->ssn) %
4136 -                                                       tid_agg_rx->buf_size;
4137 +               index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
4138                 ieee80211_release_reorder_frame(sdata, tid_agg_rx, index,
4139                                                 frames);
4140         }
4141 @@ -757,8 +755,7 @@ static void ieee80211_sta_reorder_releas
4142         lockdep_assert_held(&tid_agg_rx->reorder_lock);
4143
4144         /* release the buffer until next missing frame */
4145 -       index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
4146 -                                tid_agg_rx->ssn) % tid_agg_rx->buf_size;
4147 +       index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
4148         if (!tid_agg_rx->reorder_buf[index] &&
4149             tid_agg_rx->stored_mpdu_num) {
4150                 /*
4151 @@ -793,15 +790,11 @@ static void ieee80211_sta_reorder_releas
4152         } else while (tid_agg_rx->reorder_buf[index]) {
4153                 ieee80211_release_reorder_frame(sdata, tid_agg_rx, index,
4154                                                 frames);
4155 -               index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
4156 -                                        tid_agg_rx->ssn) %
4157 -                                                       tid_agg_rx->buf_size;
4158 +               index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
4159         }
4160
4161         if (tid_agg_rx->stored_mpdu_num) {
4162 -               j = index = ieee80211_sn_sub(tid_agg_rx->head_seq_num,
4163 -                                            tid_agg_rx->ssn) %
4164 -                                                       tid_agg_rx->buf_size;
4165 +               j = index = tid_agg_rx->head_seq_num % tid_agg_rx->buf_size;
4166
4167                 for (; j != (index - 1) % tid_agg_rx->buf_size;
4168                      j = (j + 1) % tid_agg_rx->buf_size) {
4169 @@ -861,8 +854,7 @@ static bool ieee80211_sta_manage_reorder
4170
4171         /* Now the new frame is always in the range of the reordering buffer */
4172
4173 -       index = ieee80211_sn_sub(mpdu_seq_num,
4174 -                                tid_agg_rx->ssn) % tid_agg_rx->buf_size;
4175 +       index = mpdu_seq_num % tid_agg_rx->buf_size;
4176
4177         /* check if we already stored this frame */
4178         if (tid_agg_rx->reorder_buf[index]) {
4179 @@ -911,7 +903,8 @@ static void ieee80211_rx_reorder_ampdu(s
4180         u16 sc;
4181         u8 tid, ack_policy;
4182
4183 -       if (!ieee80211_is_data_qos(hdr->frame_control))
4184 +       if (!ieee80211_is_data_qos(hdr->frame_control) ||
4185 +           is_multicast_ether_addr(hdr->addr1))
4186                 goto dont_reorder;
4187
4188         /*
4189 --- a/net/mac80211/scan.c
4190 +++ b/net/mac80211/scan.c
4191 @@ -526,7 +526,7 @@ static int __ieee80211_start_scan(struct
4192                 ieee80211_hw_config(local, 0);
4193
4194                 if ((req->channels[0]->flags &
4195 -                    IEEE80211_CHAN_PASSIVE_SCAN) ||
4196 +                    IEEE80211_CHAN_NO_IR) ||
4197                     !local->scan_req->n_ssids) {
4198                         next_delay = IEEE80211_PASSIVE_CHANNEL_TIME;
4199                 } else {
4200 @@ -572,7 +572,7 @@ ieee80211_scan_get_channel_time(struct i
4201          * TODO: channel switching also consumes quite some time,
4202          * add that delay as well to get a better estimation
4203          */
4204 -       if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)
4205 +       if (chan->flags & IEEE80211_CHAN_NO_IR)
4206                 return IEEE80211_PASSIVE_CHANNEL_TIME;
4207         return IEEE80211_PROBE_DELAY + IEEE80211_CHANNEL_TIME;
4208  }
4209 @@ -696,7 +696,7 @@ static void ieee80211_scan_state_set_cha
4210          *
4211          * In any case, it is not necessary for a passive scan.
4212          */
4213 -       if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN ||
4214 +       if (chan->flags & IEEE80211_CHAN_NO_IR ||
4215             !local->scan_req->n_ssids) {
4216                 *next_delay = IEEE80211_PASSIVE_CHANNEL_TIME;
4217                 local->next_scan_state = SCAN_DECISION;
4218 @@ -881,7 +881,7 @@ int ieee80211_request_ibss_scan(struct i
4219                                 struct ieee80211_channel *tmp_ch =
4220                                     &local->hw.wiphy->bands[band]->channels[i];
4221
4222 -                               if (tmp_ch->flags & (IEEE80211_CHAN_NO_IBSS |
4223 +                               if (tmp_ch->flags & (IEEE80211_CHAN_NO_IR |
4224                                                      IEEE80211_CHAN_DISABLED))
4225                                         continue;
4226
4227 @@ -895,7 +895,7 @@ int ieee80211_request_ibss_scan(struct i
4228
4229                 local->int_scan_req->n_channels = n_ch;
4230         } else {
4231 -               if (WARN_ON_ONCE(chan->flags & (IEEE80211_CHAN_NO_IBSS |
4232 +               if (WARN_ON_ONCE(chan->flags & (IEEE80211_CHAN_NO_IR |
4233                                                 IEEE80211_CHAN_DISABLED)))
4234                         goto unlock;
4235
4236 --- a/net/mac80211/tx.c
4237 +++ b/net/mac80211/tx.c
4238 @@ -1728,8 +1728,7 @@ netdev_tx_t ieee80211_monitor_start_xmit
4239          * radar detection by itself. We can do that later by adding a
4240          * monitor flag interfaces used for AP support.
4241          */
4242 -       if ((chan->flags & (IEEE80211_CHAN_NO_IBSS | IEEE80211_CHAN_RADAR |
4243 -                           IEEE80211_CHAN_PASSIVE_SCAN)))
4244 +       if ((chan->flags & (IEEE80211_CHAN_NO_IR | IEEE80211_CHAN_RADAR)))
4245                 goto fail_rcu;
4246
4247         ieee80211_xmit(sdata, skb, chan->band);
4248 --- a/net/mac80211/util.c
4249 +++ b/net/mac80211/util.c
4250 @@ -2259,14 +2259,17 @@ u64 ieee80211_calculate_rx_timestamp(str
4251  void ieee80211_dfs_cac_cancel(struct ieee80211_local *local)
4252  {
4253         struct ieee80211_sub_if_data *sdata;
4254 +       struct cfg80211_chan_def chandef;
4255
4256         mutex_lock(&local->iflist_mtx);
4257         list_for_each_entry(sdata, &local->interfaces, list) {
4258                 cancel_delayed_work_sync(&sdata->dfs_cac_timer_work);
4259
4260                 if (sdata->wdev.cac_started) {
4261 +                       chandef = sdata->vif.bss_conf.chandef;
4262                         ieee80211_vif_release_channel(sdata);
4263                         cfg80211_cac_event(sdata->dev,
4264 +                                          &chandef,
4265                                            NL80211_RADAR_CAC_ABORTED,
4266                                            GFP_KERNEL);
4267                 }
4268 @@ -2459,14 +2462,9 @@ int ieee80211_send_action_csa(struct iee
4269                           WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT : 0x00;
4270                 put_unaligned_le16(WLAN_REASON_MESH_CHAN, pos); /* Reason Cd */
4271                 pos += 2;
4272 -               if (!ifmsh->pre_value)
4273 -                       ifmsh->pre_value = 1;
4274 -               else
4275 -                       ifmsh->pre_value++;
4276                 pre_value = cpu_to_le16(ifmsh->pre_value);
4277                 memcpy(pos, &pre_value, 2);             /* Precedence Value */
4278                 pos += 2;
4279 -               ifmsh->chsw_init = true;
4280         }
4281
4282         ieee80211_tx_skb(sdata, skb);
4283 --- a/net/wireless/chan.c
4284 +++ b/net/wireless/chan.c
4285 @@ -277,6 +277,32 @@ void cfg80211_set_dfs_state(struct wiphy
4286                                      width, dfs_state);
4287  }
4288
4289 +static u32 cfg80211_get_start_freq(u32 center_freq,
4290 +                                  u32 bandwidth)
4291 +{
4292 +       u32 start_freq;
4293 +
4294 +       if (bandwidth <= 20)
4295 +               start_freq = center_freq;
4296 +       else
4297 +               start_freq = center_freq - bandwidth/2 + 10;
4298 +
4299 +       return start_freq;
4300 +}
4301 +
4302 +static u32 cfg80211_get_end_freq(u32 center_freq,
4303 +                                u32 bandwidth)
4304 +{
4305 +       u32 end_freq;
4306 +
4307 +       if (bandwidth <= 20)
4308 +               end_freq = center_freq;
4309 +       else
4310 +               end_freq = center_freq + bandwidth/2 - 10;
4311 +
4312 +       return end_freq;
4313 +}
4314 +
4315  static int cfg80211_get_chans_dfs_required(struct wiphy *wiphy,
4316                                             u32 center_freq,
4317                                             u32 bandwidth)
4318 @@ -284,13 +310,8 @@ static int cfg80211_get_chans_dfs_requir
4319         struct ieee80211_channel *c;
4320         u32 freq, start_freq, end_freq;
4321
4322 -       if (bandwidth <= 20) {
4323 -               start_freq = center_freq;
4324 -               end_freq = center_freq;
4325 -       } else {
4326 -               start_freq = center_freq - bandwidth/2 + 10;
4327 -               end_freq = center_freq + bandwidth/2 - 10;
4328 -       }
4329 +       start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
4330 +       end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
4331
4332         for (freq = start_freq; freq <= end_freq; freq += 20) {
4333                 c = ieee80211_get_channel(wiphy, freq);
4334 @@ -330,33 +351,159 @@ int cfg80211_chandef_dfs_required(struct
4335  }
4336  EXPORT_SYMBOL(cfg80211_chandef_dfs_required);
4337
4338 -static bool cfg80211_secondary_chans_ok(struct wiphy *wiphy,
4339 -                                       u32 center_freq, u32 bandwidth,
4340 -                                       u32 prohibited_flags)
4341 +static int cfg80211_get_chans_dfs_usable(struct wiphy *wiphy,
4342 +                                        u32 center_freq,
4343 +                                        u32 bandwidth)
4344  {
4345         struct ieee80211_channel *c;
4346         u32 freq, start_freq, end_freq;
4347 +       int count = 0;
4348
4349 -       if (bandwidth <= 20) {
4350 -               start_freq = center_freq;
4351 -               end_freq = center_freq;
4352 -       } else {
4353 -               start_freq = center_freq - bandwidth/2 + 10;
4354 -               end_freq = center_freq + bandwidth/2 - 10;
4355 +       start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
4356 +       end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
4357 +
4358 +       /*
4359 +        * Check entire range of channels for the bandwidth.
4360 +        * Check all channels are DFS channels (DFS_USABLE or
4361 +        * DFS_AVAILABLE). Return number of usable channels
4362 +        * (require CAC). Allow DFS and non-DFS channel mix.
4363 +        */
4364 +       for (freq = start_freq; freq <= end_freq; freq += 20) {
4365 +               c = ieee80211_get_channel(wiphy, freq);
4366 +               if (!c)
4367 +                       return -EINVAL;
4368 +
4369 +               if (c->flags & IEEE80211_CHAN_DISABLED)
4370 +                       return -EINVAL;
4371 +
4372 +               if (c->flags & IEEE80211_CHAN_RADAR) {
4373 +                       if (c->dfs_state == NL80211_DFS_UNAVAILABLE)
4374 +                               return -EINVAL;
4375 +
4376 +                       if (c->dfs_state == NL80211_DFS_USABLE)
4377 +                               count++;
4378 +               }
4379 +       }
4380 +
4381 +       return count;
4382 +}
4383 +
4384 +bool cfg80211_chandef_dfs_usable(struct wiphy *wiphy,
4385 +                                const struct cfg80211_chan_def *chandef)
4386 +{
4387 +       int width;
4388 +       int r1, r2 = 0;
4389 +
4390 +       if (WARN_ON(!cfg80211_chandef_valid(chandef)))
4391 +               return false;
4392 +
4393 +       width = cfg80211_chandef_get_width(chandef);
4394 +       if (width < 0)
4395 +               return false;
4396 +
4397 +       r1 = cfg80211_get_chans_dfs_usable(wiphy, chandef->center_freq1,
4398 +                                         width);
4399 +
4400 +       if (r1 < 0)
4401 +               return false;
4402 +
4403 +       switch (chandef->width) {
4404 +       case NL80211_CHAN_WIDTH_80P80:
4405 +               WARN_ON(!chandef->center_freq2);
4406 +               r2 = cfg80211_get_chans_dfs_usable(wiphy,
4407 +                                                  chandef->center_freq2,
4408 +                                                  width);
4409 +               if (r2 < 0)
4410 +                       return false;
4411 +               break;
4412 +       default:
4413 +               WARN_ON(chandef->center_freq2);
4414 +               break;
4415         }
4416
4417 +       return (r1 + r2 > 0);
4418 +}
4419 +
4420 +
4421 +static bool cfg80211_get_chans_dfs_available(struct wiphy *wiphy,
4422 +                                            u32 center_freq,
4423 +                                            u32 bandwidth)
4424 +{
4425 +       struct ieee80211_channel *c;
4426 +       u32 freq, start_freq, end_freq;
4427 +
4428 +       start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
4429 +       end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
4430 +
4431 +       /*
4432 +        * Check entire range of channels for the bandwidth.
4433 +        * If any channel in between is disabled or has not
4434 +        * had gone through CAC return false
4435 +        */
4436         for (freq = start_freq; freq <= end_freq; freq += 20) {
4437                 c = ieee80211_get_channel(wiphy, freq);
4438                 if (!c)
4439                         return false;
4440
4441 -               /* check for radar flags */
4442 -               if ((prohibited_flags & c->flags & IEEE80211_CHAN_RADAR) &&
4443 +               if (c->flags & IEEE80211_CHAN_DISABLED)
4444 +                       return false;
4445 +
4446 +               if ((c->flags & IEEE80211_CHAN_RADAR)  &&
4447                     (c->dfs_state != NL80211_DFS_AVAILABLE))
4448                         return false;
4449 +       }
4450 +
4451 +       return true;
4452 +}
4453 +
4454 +static bool cfg80211_chandef_dfs_available(struct wiphy *wiphy,
4455 +                               const struct cfg80211_chan_def *chandef)
4456 +{
4457 +       int width;
4458 +       int r;
4459 +
4460 +       if (WARN_ON(!cfg80211_chandef_valid(chandef)))
4461 +               return false;
4462
4463 -               /* check for the other flags */
4464 -               if (c->flags & prohibited_flags & ~IEEE80211_CHAN_RADAR)
4465 +       width = cfg80211_chandef_get_width(chandef);
4466 +       if (width < 0)
4467 +               return false;
4468 +
4469 +       r = cfg80211_get_chans_dfs_available(wiphy, chandef->center_freq1,
4470 +                                            width);
4471 +
4472 +       /* If any of channels unavailable for cf1 just return */
4473 +       if (!r)
4474 +               return r;
4475 +
4476 +       switch (chandef->width) {
4477 +       case NL80211_CHAN_WIDTH_80P80:
4478 +               WARN_ON(!chandef->center_freq2);
4479 +               r = cfg80211_get_chans_dfs_available(wiphy,
4480 +                                                    chandef->center_freq2,
4481 +                                                    width);
4482 +       default:
4483 +               WARN_ON(chandef->center_freq2);
4484 +               break;
4485 +       }
4486 +
4487 +       return r;
4488 +}
4489 +
4490 +
4491 +static bool cfg80211_secondary_chans_ok(struct wiphy *wiphy,
4492 +                                       u32 center_freq, u32 bandwidth,
4493 +                                       u32 prohibited_flags)
4494 +{
4495 +       struct ieee80211_channel *c;
4496 +       u32 freq, start_freq, end_freq;
4497 +
4498 +       start_freq = cfg80211_get_start_freq(center_freq, bandwidth);
4499 +       end_freq = cfg80211_get_end_freq(center_freq, bandwidth);
4500 +
4501 +       for (freq = start_freq; freq <= end_freq; freq += 20) {
4502 +               c = ieee80211_get_channel(wiphy, freq);
4503 +               if (!c || c->flags & prohibited_flags)
4504                         return false;
4505         }
4506
4507 @@ -462,14 +609,19 @@ bool cfg80211_reg_can_beacon(struct wiph
4508                              struct cfg80211_chan_def *chandef)
4509  {
4510         bool res;
4511 +       u32 prohibited_flags = IEEE80211_CHAN_DISABLED |
4512 +                              IEEE80211_CHAN_NO_IR |
4513 +                              IEEE80211_CHAN_RADAR;
4514
4515         trace_cfg80211_reg_can_beacon(wiphy, chandef);
4516
4517 -       res = cfg80211_chandef_usable(wiphy, chandef,
4518 -                                     IEEE80211_CHAN_DISABLED |
4519 -                                     IEEE80211_CHAN_PASSIVE_SCAN |
4520 -                                     IEEE80211_CHAN_NO_IBSS |
4521 -                                     IEEE80211_CHAN_RADAR);
4522 +       if (cfg80211_chandef_dfs_required(wiphy, chandef) > 0 &&
4523 +           cfg80211_chandef_dfs_available(wiphy, chandef)) {
4524 +               /* We can skip IEEE80211_CHAN_NO_IR if chandef dfs available */
4525 +               prohibited_flags = IEEE80211_CHAN_DISABLED;
4526 +       }
4527 +
4528 +       res = cfg80211_chandef_usable(wiphy, chandef, prohibited_flags);
4529
4530         trace_cfg80211_return_bool(res);
4531         return res;
4532 --- a/net/wireless/core.h
4533 +++ b/net/wireless/core.h
4534 @@ -382,6 +382,19 @@ int cfg80211_can_use_iftype_chan(struct
4535                                  enum cfg80211_chan_mode chanmode,
4536                                  u8 radar_detect);
4537
4538 +/**
4539 + * cfg80211_chandef_dfs_usable - checks if chandef is DFS usable
4540 + * @wiphy: the wiphy to validate against
4541 + * @chandef: the channel definition to check
4542 + *
4543 + * Checks if chandef is usable and we can/need start CAC on such channel.
4544 + *
4545 + * Return: Return true if all channels available and at least
4546 + *        one channel require CAC (NL80211_DFS_USABLE)
4547 + */
4548 +bool cfg80211_chandef_dfs_usable(struct wiphy *wiphy,
4549 +                                const struct cfg80211_chan_def *chandef);
4550 +
4551  void cfg80211_set_dfs_state(struct wiphy *wiphy,
4552                             const struct cfg80211_chan_def *chandef,
4553                             enum nl80211_dfs_state dfs_state);
4554 --- a/net/wireless/genregdb.awk
4555 +++ b/net/wireless/genregdb.awk
4556 @@ -107,10 +107,13 @@ active && /^[ \t]*\(/ {
4557                 } else if (flagarray[arg] == "PTMP-ONLY") {
4558                         flags = flags "\n\t\t\tNL80211_RRF_PTMP_ONLY | "
4559                 } else if (flagarray[arg] == "PASSIVE-SCAN") {
4560 -                       flags = flags "\n\t\t\tNL80211_RRF_PASSIVE_SCAN | "
4561 +                       flags = flags "\n\t\t\tNL80211_RRF_NO_IR | "
4562                 } else if (flagarray[arg] == "NO-IBSS") {
4563 -                       flags = flags "\n\t\t\tNL80211_RRF_NO_IBSS | "
4564 +                       flags = flags "\n\t\t\tNL80211_RRF_NO_IR | "
4565 +               } else if (flagarray[arg] == "NO-IR") {
4566 +                       flags = flags "\n\t\t\tNL80211_RRF_NO_IR | "
4567                 }
4568 +
4569         }
4570         flags = flags "0"
4571         printf "\t\tREG_RULE(%d, %d, %d, %d, %d, %s),\n", start, end, bw, gain, power, flags
4572 --- a/net/wireless/ibss.c
4573 +++ b/net/wireless/ibss.c
4574 @@ -274,7 +274,7 @@ int cfg80211_ibss_wext_join(struct cfg80
4575
4576                         for (i = 0; i < sband->n_channels; i++) {
4577                                 chan = &sband->channels[i];
4578 -                               if (chan->flags & IEEE80211_CHAN_NO_IBSS)
4579 +                               if (chan->flags & IEEE80211_CHAN_NO_IR)
4580                                         continue;
4581                                 if (chan->flags & IEEE80211_CHAN_DISABLED)
4582                                         continue;
4583 @@ -345,7 +345,7 @@ int cfg80211_ibss_wext_siwfreq(struct ne
4584                 chan = ieee80211_get_channel(wdev->wiphy, freq);
4585                 if (!chan)
4586                         return -EINVAL;
4587 -               if (chan->flags & IEEE80211_CHAN_NO_IBSS ||
4588 +               if (chan->flags & IEEE80211_CHAN_NO_IR ||
4589                     chan->flags & IEEE80211_CHAN_DISABLED)
4590                         return -EINVAL;
4591         }
4592 --- a/net/wireless/mesh.c
4593 +++ b/net/wireless/mesh.c
4594 @@ -141,8 +141,7 @@ int __cfg80211_join_mesh(struct cfg80211
4595
4596                         for (i = 0; i < sband->n_channels; i++) {
4597                                 chan = &sband->channels[i];
4598 -                               if (chan->flags & (IEEE80211_CHAN_NO_IBSS |
4599 -                                                  IEEE80211_CHAN_PASSIVE_SCAN |
4600 +                               if (chan->flags & (IEEE80211_CHAN_NO_IR |
4601                                                    IEEE80211_CHAN_DISABLED |
4602                                                    IEEE80211_CHAN_RADAR))
4603                                         continue;
4604 --- a/net/wireless/mlme.c
4605 +++ b/net/wireless/mlme.c
4606 @@ -763,12 +763,12 @@ void cfg80211_radar_event(struct wiphy *
4607  EXPORT_SYMBOL(cfg80211_radar_event);
4608
4609  void cfg80211_cac_event(struct net_device *netdev,
4610 +                       const struct cfg80211_chan_def *chandef,
4611                         enum nl80211_radar_event event, gfp_t gfp)
4612  {
4613         struct wireless_dev *wdev = netdev->ieee80211_ptr;
4614         struct wiphy *wiphy = wdev->wiphy;
4615         struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
4616 -       struct cfg80211_chan_def chandef;
4617         unsigned long timeout;
4618
4619         trace_cfg80211_cac_event(netdev, event);
4620 @@ -779,14 +779,12 @@ void cfg80211_cac_event(struct net_devic
4621         if (WARN_ON(!wdev->channel))
4622                 return;
4623
4624 -       cfg80211_chandef_create(&chandef, wdev->channel, NL80211_CHAN_NO_HT);
4625 -
4626         switch (event) {
4627         case NL80211_RADAR_CAC_FINISHED:
4628                 timeout = wdev->cac_start_time +
4629                           msecs_to_jiffies(IEEE80211_DFS_MIN_CAC_TIME_MS);
4630                 WARN_ON(!time_after_eq(jiffies, timeout));
4631 -               cfg80211_set_dfs_state(wiphy, &chandef, NL80211_DFS_AVAILABLE);
4632 +               cfg80211_set_dfs_state(wiphy, chandef, NL80211_DFS_AVAILABLE);
4633                 break;
4634         case NL80211_RADAR_CAC_ABORTED:
4635                 break;
4636 @@ -796,6 +794,6 @@ void cfg80211_cac_event(struct net_devic
4637         }
4638         wdev->cac_started = false;
4639
4640 -       nl80211_radar_notify(rdev, &chandef, event, netdev, gfp);
4641 +       nl80211_radar_notify(rdev, chandef, event, netdev, gfp);
4642  }
4643  EXPORT_SYMBOL(cfg80211_cac_event);
4644 --- a/net/wireless/nl80211.c
4645 +++ b/net/wireless/nl80211.c
4646 @@ -545,12 +545,12 @@ static int nl80211_msg_put_channel(struc
4647         if ((chan->flags & IEEE80211_CHAN_DISABLED) &&
4648             nla_put_flag(msg, NL80211_FREQUENCY_ATTR_DISABLED))
4649                 goto nla_put_failure;
4650 -       if ((chan->flags & IEEE80211_CHAN_PASSIVE_SCAN) &&
4651 -           nla_put_flag(msg, NL80211_FREQUENCY_ATTR_PASSIVE_SCAN))
4652 -               goto nla_put_failure;
4653 -       if ((chan->flags & IEEE80211_CHAN_NO_IBSS) &&
4654 -           nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_IBSS))
4655 -               goto nla_put_failure;
4656 +       if (chan->flags & IEEE80211_CHAN_NO_IR) {
4657 +               if (nla_put_flag(msg, NL80211_FREQUENCY_ATTR_NO_IR))
4658 +                       goto nla_put_failure;
4659 +               if (nla_put_flag(msg, __NL80211_FREQUENCY_ATTR_NO_IBSS))
4660 +                       goto nla_put_failure;
4661 +       }
4662         if (chan->flags & IEEE80211_CHAN_RADAR) {
4663                 if (nla_put_flag(msg, NL80211_FREQUENCY_ATTR_RADAR))
4664                         goto nla_put_failure;
4665 @@ -1229,7 +1229,8 @@ static int nl80211_send_wiphy(struct cfg
4666                     nla_put_flag(msg, NL80211_ATTR_TDLS_EXTERNAL_SETUP))
4667                         goto nla_put_failure;
4668                 if ((dev->wiphy.flags & WIPHY_FLAG_SUPPORTS_5_10_MHZ) &&
4669 -                   nla_put_flag(msg, WIPHY_FLAG_SUPPORTS_5_10_MHZ))
4670 +                   (nla_put_flag(msg, NL80211_ATTR_SUPPORT_5_MHZ) ||
4671 +                    nla_put_flag(msg, NL80211_ATTR_SUPPORT_10_MHZ)))
4672                         goto nla_put_failure;
4673
4674                 state->split_start++;
4675 @@ -2170,7 +2171,7 @@ static inline u64 wdev_id(struct wireles
4676  }
4677
4678  static int nl80211_send_chandef(struct sk_buff *msg,
4679 -                                struct cfg80211_chan_def *chandef)
4680 +                               const struct cfg80211_chan_def *chandef)
4681  {
4682         WARN_ON(!cfg80211_chandef_valid(chandef));
4683
4684 @@ -3219,6 +3220,7 @@ static int nl80211_start_ap(struct sk_bu
4685                         return PTR_ERR(params.acl);
4686         }
4687
4688 +       wdev_lock(wdev);
4689         err = rdev_start_ap(rdev, dev, &params);
4690         if (!err) {
4691                 wdev->preset_chandef = params.chandef;
4692 @@ -3227,6 +3229,7 @@ static int nl80211_start_ap(struct sk_bu
4693                 wdev->ssid_len = params.ssid_len;
4694                 memcpy(wdev->ssid, params.ssid, wdev->ssid_len);
4695         }
4696 +       wdev_unlock(wdev);
4697
4698         kfree(params.acl);
4699
4700 @@ -3255,7 +3258,11 @@ static int nl80211_set_beacon(struct sk_
4701         if (err)
4702                 return err;
4703
4704 -       return rdev_change_beacon(rdev, dev, &params);
4705 +       wdev_lock(wdev);
4706 +       err = rdev_change_beacon(rdev, dev, &params);
4707 +       wdev_unlock(wdev);
4708 +
4709 +       return err;
4710  }
4711
4712  static int nl80211_stop_ap(struct sk_buff *skb, struct genl_info *info)
4713 @@ -4461,7 +4468,9 @@ static int nl80211_set_bss(struct sk_buf
4714  {
4715         struct cfg80211_registered_device *rdev = info->user_ptr[0];
4716         struct net_device *dev = info->user_ptr[1];
4717 +       struct wireless_dev *wdev = dev->ieee80211_ptr;
4718         struct bss_parameters params;
4719 +       int err;
4720
4721         memset(&params, 0, sizeof(params));
4722         /* default to not changing parameters */
4723 @@ -4527,7 +4536,11 @@ static int nl80211_set_bss(struct sk_buf
4724             dev->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_GO)
4725                 return -EOPNOTSUPP;
4726
4727 -       return rdev_change_bss(rdev, dev, &params);
4728 +       wdev_lock(wdev);
4729 +       err = rdev_change_bss(rdev, dev, &params);
4730 +       wdev_unlock(wdev);
4731 +
4732 +       return err;
4733  }
4734
4735  static const struct nla_policy reg_rule_policy[NL80211_REG_RULE_ATTR_MAX + 1] = {
4736 @@ -5653,7 +5666,7 @@ static int nl80211_start_radar_detection
4737         if (err == 0)
4738                 return -EINVAL;
4739
4740 -       if (chandef.chan->dfs_state != NL80211_DFS_USABLE)
4741 +       if (!cfg80211_chandef_dfs_usable(wdev->wiphy, &chandef))
4742                 return -EINVAL;
4743
4744         if (!rdev->ops->start_radar_detection)
4745 @@ -5793,7 +5806,11 @@ skip_beacons:
4746         if (info->attrs[NL80211_ATTR_CH_SWITCH_BLOCK_TX])
4747                 params.block_tx = true;
4748
4749 -       return rdev_channel_switch(rdev, dev, &params);
4750 +       wdev_lock(wdev);
4751 +       err = rdev_channel_switch(rdev, dev, &params);
4752 +       wdev_unlock(wdev);
4753 +
4754 +       return err;
4755  }
4756
4757  static int nl80211_send_bss(struct sk_buff *msg, struct netlink_callback *cb,
4758 @@ -10809,21 +10826,18 @@ void cfg80211_ch_switch_notify(struct ne
4759         struct wiphy *wiphy = wdev->wiphy;
4760         struct cfg80211_registered_device *rdev = wiphy_to_dev(wiphy);
4761
4762 -       trace_cfg80211_ch_switch_notify(dev, chandef);
4763 +       ASSERT_WDEV_LOCK(wdev);
4764
4765 -       wdev_lock(wdev);
4766 +       trace_cfg80211_ch_switch_notify(dev, chandef);
4767
4768         if (WARN_ON(wdev->iftype != NL80211_IFTYPE_AP &&
4769                     wdev->iftype != NL80211_IFTYPE_P2P_GO &&
4770                     wdev->iftype != NL80211_IFTYPE_ADHOC &&
4771                     wdev->iftype != NL80211_IFTYPE_MESH_POINT))
4772 -               goto out;
4773 +               return;
4774
4775         wdev->channel = chandef->chan;
4776         nl80211_ch_switch_notify(rdev, dev, chandef, GFP_KERNEL);
4777 -out:
4778 -       wdev_unlock(wdev);
4779 -       return;
4780  }
4781  EXPORT_SYMBOL(cfg80211_ch_switch_notify);
4782
4783 @@ -10882,7 +10896,7 @@ EXPORT_SYMBOL(cfg80211_cqm_txe_notify);
4784
4785  void
4786  nl80211_radar_notify(struct cfg80211_registered_device *rdev,
4787 -                    struct cfg80211_chan_def *chandef,
4788 +                    const struct cfg80211_chan_def *chandef,
4789                      enum nl80211_radar_event event,
4790                      struct net_device *netdev, gfp_t gfp)
4791  {
4792 --- a/net/wireless/nl80211.h
4793 +++ b/net/wireless/nl80211.h
4794 @@ -70,7 +70,7 @@ int nl80211_send_mgmt(struct cfg80211_re
4795
4796  void
4797  nl80211_radar_notify(struct cfg80211_registered_device *rdev,
4798 -                    struct cfg80211_chan_def *chandef,
4799 +                    const struct cfg80211_chan_def *chandef,
4800                      enum nl80211_radar_event event,
4801                      struct net_device *netdev, gfp_t gfp);
4802
4803 --- a/net/wireless/reg.c
4804 +++ b/net/wireless/reg.c
4805 @@ -163,35 +163,29 @@ static const struct ieee80211_regdomain
4806                 REG_RULE(2412-10, 2462+10, 40, 6, 20, 0),
4807                 /* IEEE 802.11b/g, channels 12..13. */
4808                 REG_RULE(2467-10, 2472+10, 40, 6, 20,
4809 -                       NL80211_RRF_PASSIVE_SCAN |
4810 -                       NL80211_RRF_NO_IBSS),
4811 +                       NL80211_RRF_NO_IR),
4812                 /* IEEE 802.11 channel 14 - Only JP enables
4813                  * this and for 802.11b only */
4814                 REG_RULE(2484-10, 2484+10, 20, 6, 20,
4815 -                       NL80211_RRF_PASSIVE_SCAN |
4816 -                       NL80211_RRF_NO_IBSS |
4817 +                       NL80211_RRF_NO_IR |
4818                         NL80211_RRF_NO_OFDM),
4819                 /* IEEE 802.11a, channel 36..48 */
4820                 REG_RULE(5180-10, 5240+10, 160, 6, 20,
4821 -                        NL80211_RRF_PASSIVE_SCAN |
4822 -                        NL80211_RRF_NO_IBSS),
4823 +                        NL80211_RRF_NO_IR),
4824
4825                 /* IEEE 802.11a, channel 52..64 - DFS required */
4826                 REG_RULE(5260-10, 5320+10, 160, 6, 20,
4827 -                       NL80211_RRF_PASSIVE_SCAN |
4828 -                       NL80211_RRF_NO_IBSS |
4829 +                       NL80211_RRF_NO_IR |
4830                         NL80211_RRF_DFS),
4831
4832                 /* IEEE 802.11a, channel 100..144 - DFS required */
4833                 REG_RULE(5500-10, 5720+10, 160, 6, 20,
4834 -                       NL80211_RRF_PASSIVE_SCAN |
4835 -                       NL80211_RRF_NO_IBSS |
4836 +                       NL80211_RRF_NO_IR |
4837                         NL80211_RRF_DFS),
4838
4839                 /* IEEE 802.11a, channel 149..165 */
4840                 REG_RULE(5745-10, 5825+10, 80, 6, 20,
4841 -                       NL80211_RRF_PASSIVE_SCAN |
4842 -                       NL80211_RRF_NO_IBSS),
4843 +                       NL80211_RRF_NO_IR),
4844
4845                 /* IEEE 802.11ad (60gHz), channels 1..3 */
4846                 REG_RULE(56160+2160*1-1080, 56160+2160*3+1080, 2160, 0, 0, 0),
4847 @@ -698,10 +692,8 @@ regdom_intersect(const struct ieee80211_
4848  static u32 map_regdom_flags(u32 rd_flags)
4849  {
4850         u32 channel_flags = 0;
4851 -       if (rd_flags & NL80211_RRF_PASSIVE_SCAN)
4852 -               channel_flags |= IEEE80211_CHAN_PASSIVE_SCAN;
4853 -       if (rd_flags & NL80211_RRF_NO_IBSS)
4854 -               channel_flags |= IEEE80211_CHAN_NO_IBSS;
4855 +       if (rd_flags & NL80211_RRF_NO_IR_ALL)
4856 +               channel_flags |= IEEE80211_CHAN_NO_IR;
4857         if (rd_flags & NL80211_RRF_DFS)
4858                 channel_flags |= IEEE80211_CHAN_RADAR;
4859         if (rd_flags & NL80211_RRF_NO_OFDM)
4860 @@ -1066,13 +1058,8 @@ static void handle_reg_beacon(struct wip
4861         chan_before.center_freq = chan->center_freq;
4862         chan_before.flags = chan->flags;
4863
4864 -       if (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN) {
4865 -               chan->flags &= ~IEEE80211_CHAN_PASSIVE_SCAN;
4866 -               channel_changed = true;
4867 -       }
4868 -
4869 -       if (chan->flags & IEEE80211_CHAN_NO_IBSS) {
4870 -               chan->flags &= ~IEEE80211_CHAN_NO_IBSS;
4871 +       if (chan->flags & IEEE80211_CHAN_NO_IR) {
4872 +               chan->flags &= ~IEEE80211_CHAN_NO_IR;
4873                 channel_changed = true;
4874         }
4875
4876 --- /dev/null
4877 +++ b/drivers/net/wireless/ath/ath9k/ar9003_wow.c
4878 @@ -0,0 +1,422 @@
4879 +/*
4880 + * Copyright (c) 2012 Qualcomm Atheros, Inc.
4881 + *
4882 + * Permission to use, copy, modify, and/or distribute this software for any
4883 + * purpose with or without fee is hereby granted, provided that the above
4884 + * copyright notice and this permission notice appear in all copies.
4885 + *
4886 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
4887 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
4888 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
4889 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
4890 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
4891 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
4892 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
4893 + */
4894 +
4895 +#include <linux/export.h>
4896 +#include "ath9k.h"
4897 +#include "reg.h"
4898 +#include "hw-ops.h"
4899 +
4900 +const char *ath9k_hw_wow_event_to_string(u32 wow_event)
4901 +{
4902 +       if (wow_event & AH_WOW_MAGIC_PATTERN_EN)
4903 +               return "Magic pattern";
4904 +       if (wow_event & AH_WOW_USER_PATTERN_EN)
4905 +               return "User pattern";
4906 +       if (wow_event & AH_WOW_LINK_CHANGE)
4907 +               return "Link change";
4908 +       if (wow_event & AH_WOW_BEACON_MISS)
4909 +               return "Beacon miss";
4910 +
4911 +       return  "unknown reason";
4912 +}
4913 +EXPORT_SYMBOL(ath9k_hw_wow_event_to_string);
4914 +
4915 +static void ath9k_hw_set_powermode_wow_sleep(struct ath_hw *ah)
4916 +{
4917 +       struct ath_common *common = ath9k_hw_common(ah);
4918 +
4919 +       REG_SET_BIT(ah, AR_STA_ID1, AR_STA_ID1_PWR_SAV);
4920 +
4921 +       /* set rx disable bit */
4922 +       REG_WRITE(ah, AR_CR, AR_CR_RXD);
4923 +
4924 +       if (!ath9k_hw_wait(ah, AR_CR, AR_CR_RXE, 0, AH_WAIT_TIMEOUT)) {
4925 +               ath_err(common, "Failed to stop Rx DMA in 10ms AR_CR=0x%08x AR_DIAG_SW=0x%08x\n",
4926 +                       REG_READ(ah, AR_CR), REG_READ(ah, AR_DIAG_SW));
4927 +               return;
4928 +       }
4929 +
4930 +       REG_WRITE(ah, AR_RTC_FORCE_WAKE, AR_RTC_FORCE_WAKE_ON_INT);
4931 +}
4932 +
4933 +static void ath9k_wow_create_keep_alive_pattern(struct ath_hw *ah)
4934 +{
4935 +       struct ath_common *common = ath9k_hw_common(ah);
4936 +       u8 sta_mac_addr[ETH_ALEN], ap_mac_addr[ETH_ALEN];
4937 +       u32 ctl[13] = {0};
4938 +       u32 data_word[KAL_NUM_DATA_WORDS];
4939 +       u8 i;
4940 +       u32 wow_ka_data_word0;
4941 +
4942 +       memcpy(sta_mac_addr, common->macaddr, ETH_ALEN);
4943 +       memcpy(ap_mac_addr, common->curbssid, ETH_ALEN);
4944 +
4945 +       /* set the transmit buffer */
4946 +       ctl[0] = (KAL_FRAME_LEN | (MAX_RATE_POWER << 16));
4947 +       ctl[1] = 0;
4948 +       ctl[3] = 0xb;   /* OFDM_6M hardware value for this rate */
4949 +       ctl[4] = 0;
4950 +       ctl[7] = (ah->txchainmask) << 2;
4951 +       ctl[2] = 0xf << 16; /* tx_tries 0 */
4952 +
4953 +       for (i = 0; i < KAL_NUM_DESC_WORDS; i++)
4954 +               REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
4955 +
4956 +       REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + i * 4), ctl[i]);
4957 +
4958 +       data_word[0] = (KAL_FRAME_TYPE << 2) | (KAL_FRAME_SUB_TYPE << 4) |
4959 +                      (KAL_TO_DS << 8) | (KAL_DURATION_ID << 16);
4960 +       data_word[1] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
4961 +                      (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
4962 +       data_word[2] = (sta_mac_addr[1] << 24) | (sta_mac_addr[0] << 16) |
4963 +                      (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
4964 +       data_word[3] = (sta_mac_addr[5] << 24) | (sta_mac_addr[4] << 16) |
4965 +                      (sta_mac_addr[3] << 8) | (sta_mac_addr[2]);
4966 +       data_word[4] = (ap_mac_addr[3] << 24) | (ap_mac_addr[2] << 16) |
4967 +                      (ap_mac_addr[1] << 8) | (ap_mac_addr[0]);
4968 +       data_word[5] = (ap_mac_addr[5] << 8) | (ap_mac_addr[4]);
4969 +
4970 +       if (AR_SREV_9462_20(ah)) {
4971 +               /* AR9462 2.0 has an extra descriptor word (time based
4972 +                * discard) compared to other chips */
4973 +               REG_WRITE(ah, (AR_WOW_KA_DESC_WORD2 + (12 * 4)), 0);
4974 +               wow_ka_data_word0 = AR_WOW_TXBUF(13);
4975 +       } else {
4976 +               wow_ka_data_word0 = AR_WOW_TXBUF(12);
4977 +       }
4978 +
4979 +       for (i = 0; i < KAL_NUM_DATA_WORDS; i++)
4980 +               REG_WRITE(ah, (wow_ka_data_word0 + i*4), data_word[i]);
4981 +
4982 +}
4983 +
4984 +void ath9k_hw_wow_apply_pattern(struct ath_hw *ah, u8 *user_pattern,
4985 +                               u8 *user_mask, int pattern_count,
4986 +                               int pattern_len)
4987 +{
4988 +       int i;
4989 +       u32 pattern_val, mask_val;
4990 +       u32 set, clr;
4991 +
4992 +       /* FIXME: should check count by querying the hardware capability */
4993 +       if (pattern_count >= MAX_NUM_PATTERN)
4994 +               return;
4995 +
4996 +       REG_SET_BIT(ah, AR_WOW_PATTERN, BIT(pattern_count));
4997 +
4998 +       /* set the registers for pattern */
4999 +       for (i = 0; i < MAX_PATTERN_SIZE; i += 4) {
5000 +               memcpy(&pattern_val, user_pattern, 4);
5001 +               REG_WRITE(ah, (AR_WOW_TB_PATTERN(pattern_count) + i),
5002 +                         pattern_val);
5003 +               user_pattern += 4;
5004 +       }
5005 +
5006 +       /* set the registers for mask */
5007 +       for (i = 0; i < MAX_PATTERN_MASK_SIZE; i += 4) {
5008 +               memcpy(&mask_val, user_mask, 4);
5009 +               REG_WRITE(ah, (AR_WOW_TB_MASK(pattern_count) + i), mask_val);
5010 +               user_mask += 4;
5011 +       }
5012 +
5013 +       /* set the pattern length to be matched
5014 +        *
5015 +        * AR_WOW_LENGTH1_REG1
5016 +        * bit 31:24 pattern 0 length
5017 +        * bit 23:16 pattern 1 length
5018 +        * bit 15:8 pattern 2 length
5019 +        * bit 7:0 pattern 3 length
5020 +        *
5021 +        * AR_WOW_LENGTH1_REG2
5022 +        * bit 31:24 pattern 4 length
5023 +        * bit 23:16 pattern 5 length
5024 +        * bit 15:8 pattern 6 length
5025 +        * bit 7:0 pattern 7 length
5026 +        *
5027 +        * the below logic writes out the new
5028 +        * pattern length for the corresponding
5029 +        * pattern_count, while masking out the
5030 +        * other fields
5031 +        */
5032 +
5033 +       ah->wow_event_mask |= BIT(pattern_count + AR_WOW_PAT_FOUND_SHIFT);
5034 +
5035 +       if (pattern_count < 4) {
5036 +               /* Pattern 0-3 uses AR_WOW_LENGTH1 register */
5037 +               set = (pattern_len & AR_WOW_LENGTH_MAX) <<
5038 +                      AR_WOW_LEN1_SHIFT(pattern_count);
5039 +               clr = AR_WOW_LENGTH1_MASK(pattern_count);
5040 +               REG_RMW(ah, AR_WOW_LENGTH1, set, clr);
5041 +       } else {
5042 +               /* Pattern 4-7 uses AR_WOW_LENGTH2 register */
5043 +               set = (pattern_len & AR_WOW_LENGTH_MAX) <<
5044 +                      AR_WOW_LEN2_SHIFT(pattern_count);
5045 +               clr = AR_WOW_LENGTH2_MASK(pattern_count);
5046 +               REG_RMW(ah, AR_WOW_LENGTH2, set, clr);
5047 +       }
5048 +
5049 +}
5050 +EXPORT_SYMBOL(ath9k_hw_wow_apply_pattern);
5051 +
5052 +u32 ath9k_hw_wow_wakeup(struct ath_hw *ah)
5053 +{
5054 +       u32 wow_status = 0;
5055 +       u32 val = 0, rval;
5056 +
5057 +       /*
5058 +        * read the WoW status register to know
5059 +        * the wakeup reason
5060 +        */
5061 +       rval = REG_READ(ah, AR_WOW_PATTERN);
5062 +       val = AR_WOW_STATUS(rval);
5063 +
5064 +       /*
5065 +        * mask only the WoW events that we have enabled. Sometimes
5066 +        * we have spurious WoW events from the AR_WOW_PATTERN
5067 +        * register. This mask will clean it up.
5068 +        */
5069 +
5070 +       val &= ah->wow_event_mask;
5071 +
5072 +       if (val) {
5073 +               if (val & AR_WOW_MAGIC_PAT_FOUND)
5074 +                       wow_status |= AH_WOW_MAGIC_PATTERN_EN;
5075 +               if (AR_WOW_PATTERN_FOUND(val))
5076 +                       wow_status |= AH_WOW_USER_PATTERN_EN;
5077 +               if (val & AR_WOW_KEEP_ALIVE_FAIL)
5078 +                       wow_status |= AH_WOW_LINK_CHANGE;
5079 +               if (val & AR_WOW_BEACON_FAIL)
5080 +                       wow_status |= AH_WOW_BEACON_MISS;
5081 +       }
5082 +
5083 +       /*
5084 +        * set and clear WOW_PME_CLEAR registers for the chip to
5085 +        * generate next wow signal.
5086 +        * disable D3 before accessing other registers ?
5087 +        */
5088 +
5089 +       /* do we need to check the bit value 0x01000000 (7-10) ?? */
5090 +       REG_RMW(ah, AR_PCIE_PM_CTRL, AR_PMCTRL_WOW_PME_CLR,
5091 +               AR_PMCTRL_PWR_STATE_D1D3);
5092 +
5093 +       /*
5094 +        * clear all events
5095 +        */
5096 +       REG_WRITE(ah, AR_WOW_PATTERN,
5097 +                 AR_WOW_CLEAR_EVENTS(REG_READ(ah, AR_WOW_PATTERN)));
5098 +
5099 +       /*
5100 +        * restore the beacon threshold to init value
5101 +        */
5102 +       REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR);
5103 +
5104 +       /*
5105 +        * Restore the way the PCI-E reset, Power-On-Reset, external
5106 +        * PCIE_POR_SHORT pins are tied to its original value.
5107 +        * Previously just before WoW sleep, we untie the PCI-E
5108 +        * reset to our Chip's Power On Reset so that any PCI-E
5109 +        * reset from the bus will not reset our chip
5110 +        */
5111 +       if (ah->is_pciexpress)
5112 +               ath9k_hw_configpcipowersave(ah, false);
5113 +
5114 +       ah->wow_event_mask = 0;
5115 +
5116 +       return wow_status;
5117 +}
5118 +EXPORT_SYMBOL(ath9k_hw_wow_wakeup);
5119 +
5120 +void ath9k_hw_wow_enable(struct ath_hw *ah, u32 pattern_enable)
5121 +{
5122 +       u32 wow_event_mask;
5123 +       u32 set, clr;
5124 +
5125 +       /*
5126 +        * wow_event_mask is a mask to the AR_WOW_PATTERN register to
5127 +        * indicate which WoW events we have enabled. The WoW events
5128 +        * are from the 'pattern_enable' in this function and
5129 +        * 'pattern_count' of ath9k_hw_wow_apply_pattern()
5130 +        */
5131 +       wow_event_mask = ah->wow_event_mask;
5132 +
5133 +       /*
5134 +        * Untie Power-on-Reset from the PCI-E-Reset. When we are in
5135 +        * WOW sleep, we do want the Reset from the PCI-E to disturb
5136 +        * our hw state
5137 +        */
5138 +       if (ah->is_pciexpress) {
5139 +               /*
5140 +                * we need to untie the internal POR (power-on-reset)
5141 +                * to the external PCI-E reset. We also need to tie
5142 +                * the PCI-E Phy reset to the PCI-E reset.
5143 +                */
5144 +               set = AR_WA_RESET_EN | AR_WA_POR_SHORT;
5145 +               clr = AR_WA_UNTIE_RESET_EN | AR_WA_D3_L1_DISABLE;
5146 +               REG_RMW(ah, AR_WA, set, clr);
5147 +       }
5148 +
5149 +       /*
5150 +        * set the power states appropriately and enable PME
5151 +        */
5152 +       set = AR_PMCTRL_HOST_PME_EN | AR_PMCTRL_PWR_PM_CTRL_ENA |
5153 +             AR_PMCTRL_AUX_PWR_DET | AR_PMCTRL_WOW_PME_CLR;
5154 +
5155 +       /*
5156 +        * set and clear WOW_PME_CLEAR registers for the chip
5157 +        * to generate next wow signal.
5158 +        */
5159 +       REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
5160 +       clr = AR_PMCTRL_WOW_PME_CLR;
5161 +       REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
5162 +
5163 +       /*
5164 +        * Setup for:
5165 +        *      - beacon misses
5166 +        *      - magic pattern
5167 +        *      - keep alive timeout
5168 +        *      - pattern matching
5169 +        */
5170 +
5171 +       /*
5172 +        * Program default values for pattern backoff, aifs/slot/KAL count,
5173 +        * beacon miss timeout, KAL timeout, etc.
5174 +        */
5175 +       set = AR_WOW_BACK_OFF_SHIFT(AR_WOW_PAT_BACKOFF);
5176 +       REG_SET_BIT(ah, AR_WOW_PATTERN, set);
5177 +
5178 +       set = AR_WOW_AIFS_CNT(AR_WOW_CNT_AIFS_CNT) |
5179 +             AR_WOW_SLOT_CNT(AR_WOW_CNT_SLOT_CNT) |
5180 +             AR_WOW_KEEP_ALIVE_CNT(AR_WOW_CNT_KA_CNT);
5181 +       REG_SET_BIT(ah, AR_WOW_COUNT, set);
5182 +
5183 +       if (pattern_enable & AH_WOW_BEACON_MISS)
5184 +               set = AR_WOW_BEACON_TIMO;
5185 +       /* We are not using beacon miss, program a large value */
5186 +       else
5187 +               set = AR_WOW_BEACON_TIMO_MAX;
5188 +
5189 +       REG_WRITE(ah, AR_WOW_BCN_TIMO, set);
5190 +
5191 +       /*
5192 +        * Keep alive timo in ms except AR9280
5193 +        */
5194 +       if (!pattern_enable)
5195 +               set = AR_WOW_KEEP_ALIVE_NEVER;
5196 +       else
5197 +               set = KAL_TIMEOUT * 32;
5198 +
5199 +       REG_WRITE(ah, AR_WOW_KEEP_ALIVE_TIMO, set);
5200 +
5201 +       /*
5202 +        * Keep alive delay in us. based on 'power on clock',
5203 +        * therefore in usec
5204 +        */
5205 +       set = KAL_DELAY * 1000;
5206 +       REG_WRITE(ah, AR_WOW_KEEP_ALIVE_DELAY, set);
5207 +
5208 +       /*
5209 +        * Create keep alive pattern to respond to beacons
5210 +        */
5211 +       ath9k_wow_create_keep_alive_pattern(ah);
5212 +
5213 +       /*
5214 +        * Configure MAC WoW Registers
5215 +        */
5216 +       set = 0;
5217 +       /* Send keep alive timeouts anyway */
5218 +       clr = AR_WOW_KEEP_ALIVE_AUTO_DIS;
5219 +
5220 +       if (pattern_enable & AH_WOW_LINK_CHANGE)
5221 +               wow_event_mask |= AR_WOW_KEEP_ALIVE_FAIL;
5222 +       else
5223 +               set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
5224 +
5225 +       set = AR_WOW_KEEP_ALIVE_FAIL_DIS;
5226 +       REG_RMW(ah, AR_WOW_KEEP_ALIVE, set, clr);
5227 +
5228 +       /*
5229 +        * we are relying on a bmiss failure. ensure we have
5230 +        * enough threshold to prevent false positives
5231 +        */
5232 +       REG_RMW_FIELD(ah, AR_RSSI_THR, AR_RSSI_THR_BM_THR,
5233 +                     AR_WOW_BMISSTHRESHOLD);
5234 +
5235 +       set = 0;
5236 +       clr = 0;
5237 +
5238 +       if (pattern_enable & AH_WOW_BEACON_MISS) {
5239 +               set = AR_WOW_BEACON_FAIL_EN;
5240 +               wow_event_mask |= AR_WOW_BEACON_FAIL;
5241 +       } else {
5242 +               clr = AR_WOW_BEACON_FAIL_EN;
5243 +       }
5244 +
5245 +       REG_RMW(ah, AR_WOW_BCN_EN, set, clr);
5246 +
5247 +       set = 0;
5248 +       clr = 0;
5249 +       /*
5250 +        * Enable the magic packet registers
5251 +        */
5252 +       if (pattern_enable & AH_WOW_MAGIC_PATTERN_EN) {
5253 +               set = AR_WOW_MAGIC_EN;
5254 +               wow_event_mask |= AR_WOW_MAGIC_PAT_FOUND;
5255 +       } else {
5256 +               clr = AR_WOW_MAGIC_EN;
5257 +       }
5258 +       set |= AR_WOW_MAC_INTR_EN;
5259 +       REG_RMW(ah, AR_WOW_PATTERN, set, clr);
5260 +
5261 +       REG_WRITE(ah, AR_WOW_PATTERN_MATCH_LT_256B,
5262 +                 AR_WOW_PATTERN_SUPPORTED);
5263 +
5264 +       /*
5265 +        * Set the power states appropriately and enable PME
5266 +        */
5267 +       clr = 0;
5268 +       set = AR_PMCTRL_PWR_STATE_D1D3 | AR_PMCTRL_HOST_PME_EN |
5269 +             AR_PMCTRL_PWR_PM_CTRL_ENA;
5270 +
5271 +       clr = AR_PCIE_PM_CTRL_ENA;
5272 +       REG_RMW(ah, AR_PCIE_PM_CTRL, set, clr);
5273 +
5274 +       /*
5275 +        * this is needed to prevent the chip waking up
5276 +        * the host within 3-4 seconds with certain
5277 +        * platform/BIOS. The fix is to enable
5278 +        * D1 & D3 to match original definition and
5279 +        * also match the OTP value. Anyway this
5280 +        * is more related to SW WOW.
5281 +        */
5282 +       clr = AR_PMCTRL_PWR_STATE_D1D3;
5283 +       REG_CLR_BIT(ah, AR_PCIE_PM_CTRL, clr);
5284 +
5285 +       set = AR_PMCTRL_PWR_STATE_D1D3_REAL;
5286 +       REG_SET_BIT(ah, AR_PCIE_PM_CTRL, set);
5287 +
5288 +       REG_CLR_BIT(ah, AR_STA_ID1, AR_STA_ID1_PRESERVE_SEQNUM);
5289 +
5290 +       /* to bring down WOW power low margin */
5291 +       set = BIT(13);
5292 +       REG_SET_BIT(ah, AR_PCIE_PHY_REG3, set);
5293 +       /* HW WoW */
5294 +       clr = BIT(5);
5295 +       REG_CLR_BIT(ah, AR_PCU_MISC_MODE3, clr);
5296 +
5297 +       ath9k_hw_set_powermode_wow_sleep(ah);
5298 +       ah->wow_event_mask = wow_event_mask;
5299 +}
5300 +EXPORT_SYMBOL(ath9k_hw_wow_enable);
5301 --- /dev/null
5302 +++ b/drivers/net/wireless/ath/ath9k/tx99.c
5303 @@ -0,0 +1,263 @@
5304 +/*
5305 + * Copyright (c) 2013 Qualcomm Atheros, Inc.
5306 + *
5307 + * Permission to use, copy, modify, and/or distribute this software for any
5308 + * purpose with or without fee is hereby granted, provided that the above
5309 + * copyright notice and this permission notice appear in all copies.
5310 + *
5311 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
5312 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
5313 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
5314 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
5315 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
5316 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
5317 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
5318 + */
5319 +
5320 +#include "ath9k.h"
5321 +
5322 +static void ath9k_tx99_stop(struct ath_softc *sc)
5323 +{
5324 +       struct ath_hw *ah = sc->sc_ah;
5325 +       struct ath_common *common = ath9k_hw_common(ah);
5326 +
5327 +       ath_drain_all_txq(sc);
5328 +       ath_startrecv(sc);
5329 +
5330 +       ath9k_hw_set_interrupts(ah);
5331 +       ath9k_hw_enable_interrupts(ah);
5332 +
5333 +       ieee80211_wake_queues(sc->hw);
5334 +
5335 +       kfree_skb(sc->tx99_skb);
5336 +       sc->tx99_skb = NULL;
5337 +       sc->tx99_state = false;
5338 +
5339 +       ath9k_hw_tx99_stop(sc->sc_ah);
5340 +       ath_dbg(common, XMIT, "TX99 stopped\n");
5341 +}
5342 +
5343 +static struct sk_buff *ath9k_build_tx99_skb(struct ath_softc *sc)
5344 +{
5345 +       static u8 PN9Data[] = {0xff, 0x87, 0xb8, 0x59, 0xb7, 0xa1, 0xcc, 0x24,
5346 +                              0x57, 0x5e, 0x4b, 0x9c, 0x0e, 0xe9, 0xea, 0x50,
5347 +                              0x2a, 0xbe, 0xb4, 0x1b, 0xb6, 0xb0, 0x5d, 0xf1,
5348 +                              0xe6, 0x9a, 0xe3, 0x45, 0xfd, 0x2c, 0x53, 0x18,
5349 +                              0x0c, 0xca, 0xc9, 0xfb, 0x49, 0x37, 0xe5, 0xa8,
5350 +                              0x51, 0x3b, 0x2f, 0x61, 0xaa, 0x72, 0x18, 0x84,
5351 +                              0x02, 0x23, 0x23, 0xab, 0x63, 0x89, 0x51, 0xb3,
5352 +                              0xe7, 0x8b, 0x72, 0x90, 0x4c, 0xe8, 0xfb, 0xc0};
5353 +       u32 len = 1200;
5354 +       struct ieee80211_hw *hw = sc->hw;
5355 +       struct ieee80211_hdr *hdr;
5356 +       struct ieee80211_tx_info *tx_info;
5357 +       struct sk_buff *skb;
5358 +
5359 +       skb = alloc_skb(len, GFP_KERNEL);
5360 +       if (!skb)
5361 +               return NULL;
5362 +
5363 +       skb_put(skb, len);
5364 +
5365 +       memset(skb->data, 0, len);
5366 +
5367 +       hdr = (struct ieee80211_hdr *)skb->data;
5368 +       hdr->frame_control = cpu_to_le16(IEEE80211_FTYPE_DATA);
5369 +       hdr->duration_id = 0;
5370 +
5371 +       memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
5372 +       memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
5373 +       memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
5374 +
5375 +       hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
5376 +
5377 +       tx_info = IEEE80211_SKB_CB(skb);
5378 +       memset(tx_info, 0, sizeof(*tx_info));
5379 +       tx_info->band = hw->conf.chandef.chan->band;
5380 +       tx_info->flags = IEEE80211_TX_CTL_NO_ACK;
5381 +       tx_info->control.vif = sc->tx99_vif;
5382 +
5383 +       memcpy(skb->data + sizeof(*hdr), PN9Data, sizeof(PN9Data));
5384 +
5385 +       return skb;
5386 +}
5387 +
5388 +static void ath9k_tx99_deinit(struct ath_softc *sc)
5389 +{
5390 +       ath_reset(sc);
5391 +
5392 +       ath9k_ps_wakeup(sc);
5393 +       ath9k_tx99_stop(sc);
5394 +       ath9k_ps_restore(sc);
5395 +}
5396 +
5397 +static int ath9k_tx99_init(struct ath_softc *sc)
5398 +{
5399 +       struct ieee80211_hw *hw = sc->hw;
5400 +       struct ath_hw *ah = sc->sc_ah;
5401 +       struct ath_common *common = ath9k_hw_common(ah);
5402 +       struct ath_tx_control txctl;
5403 +       int r;
5404 +
5405 +       if (test_bit(SC_OP_INVALID, &sc->sc_flags)) {
5406 +               ath_err(common,
5407 +                       "driver is in invalid state unable to use TX99");
5408 +               return -EINVAL;
5409 +       }
5410 +
5411 +       sc->tx99_skb = ath9k_build_tx99_skb(sc);
5412 +       if (!sc->tx99_skb)
5413 +               return -ENOMEM;
5414 +
5415 +       memset(&txctl, 0, sizeof(txctl));
5416 +       txctl.txq = sc->tx.txq_map[IEEE80211_AC_VO];
5417 +
5418 +       ath_reset(sc);
5419 +
5420 +       ath9k_ps_wakeup(sc);
5421 +
5422 +       ath9k_hw_disable_interrupts(ah);
5423 +       atomic_set(&ah->intr_ref_cnt, -1);
5424 +       ath_drain_all_txq(sc);
5425 +       ath_stoprecv(sc);
5426 +
5427 +       sc->tx99_state = true;
5428 +
5429 +       ieee80211_stop_queues(hw);
5430 +
5431 +       if (sc->tx99_power == MAX_RATE_POWER + 1)
5432 +               sc->tx99_power = MAX_RATE_POWER;
5433 +
5434 +       ath9k_hw_tx99_set_txpower(ah, sc->tx99_power);
5435 +       r = ath9k_tx99_send(sc, sc->tx99_skb, &txctl);
5436 +       if (r) {
5437 +               ath_dbg(common, XMIT, "Failed to xmit TX99 skb\n");
5438 +               return r;
5439 +       }
5440 +
5441 +       ath_dbg(common, XMIT, "TX99 xmit started using %d ( %ddBm)\n",
5442 +               sc->tx99_power,
5443 +               sc->tx99_power / 2);
5444 +
5445 +       /* We leave the harware awake as it will be chugging on */
5446 +
5447 +       return 0;
5448 +}
5449 +
5450 +static ssize_t read_file_tx99(struct file *file, char __user *user_buf,
5451 +                             size_t count, loff_t *ppos)
5452 +{
5453 +       struct ath_softc *sc = file->private_data;
5454 +       char buf[3];
5455 +       unsigned int len;
5456 +
5457 +       len = sprintf(buf, "%d\n", sc->tx99_state);
5458 +       return simple_read_from_buffer(user_buf, count, ppos, buf, len);
5459 +}
5460 +
5461 +static ssize_t write_file_tx99(struct file *file, const char __user *user_buf,
5462 +                              size_t count, loff_t *ppos)
5463 +{
5464 +       struct ath_softc *sc = file->private_data;
5465 +       struct ath_common *common = ath9k_hw_common(sc->sc_ah);
5466 +       char buf[32];
5467 +       bool start;
5468 +       ssize_t len;
5469 +       int r;
5470 +
5471 +       if (sc->nvifs > 1)
5472 +               return -EOPNOTSUPP;
5473 +
5474 +       len = min(count, sizeof(buf) - 1);
5475 +       if (copy_from_user(buf, user_buf, len))
5476 +               return -EFAULT;
5477 +
5478 +       if (strtobool(buf, &start))
5479 +               return -EINVAL;
5480 +
5481 +       if (start == sc->tx99_state) {
5482 +               if (!start)
5483 +                       return count;
5484 +               ath_dbg(common, XMIT, "Resetting TX99\n");
5485 +               ath9k_tx99_deinit(sc);
5486 +       }
5487 +
5488 +       if (!start) {
5489 +               ath9k_tx99_deinit(sc);
5490 +               return count;
5491 +       }
5492 +
5493 +       r = ath9k_tx99_init(sc);
5494 +       if (r)
5495 +               return r;
5496 +
5497 +       return count;
5498 +}
5499 +
5500 +static const struct file_operations fops_tx99 = {
5501 +       .read = read_file_tx99,
5502 +       .write = write_file_tx99,
5503 +       .open = simple_open,
5504 +       .owner = THIS_MODULE,
5505 +       .llseek = default_llseek,
5506 +};
5507 +
5508 +static ssize_t read_file_tx99_power(struct file *file,
5509 +                                   char __user *user_buf,
5510 +                                   size_t count, loff_t *ppos)
5511 +{
5512 +       struct ath_softc *sc = file->private_data;
5513 +       char buf[32];
5514 +       unsigned int len;
5515 +
5516 +       len = sprintf(buf, "%d (%d dBm)\n",
5517 +                     sc->tx99_power,
5518 +                     sc->tx99_power / 2);
5519 +
5520 +       return simple_read_from_buffer(user_buf, count, ppos, buf, len);
5521 +}
5522 +
5523 +static ssize_t write_file_tx99_power(struct file *file,
5524 +                                    const char __user *user_buf,
5525 +                                    size_t count, loff_t *ppos)
5526 +{
5527 +       struct ath_softc *sc = file->private_data;
5528 +       int r;
5529 +       u8 tx_power;
5530 +
5531 +       r = kstrtou8_from_user(user_buf, count, 0, &tx_power);
5532 +       if (r)
5533 +               return r;
5534 +
5535 +       if (tx_power > MAX_RATE_POWER)
5536 +               return -EINVAL;
5537 +
5538 +       sc->tx99_power = tx_power;
5539 +
5540 +       ath9k_ps_wakeup(sc);
5541 +       ath9k_hw_tx99_set_txpower(sc->sc_ah, sc->tx99_power);
5542 +       ath9k_ps_restore(sc);
5543 +
5544 +       return count;
5545 +}
5546 +
5547 +static const struct file_operations fops_tx99_power = {
5548 +       .read = read_file_tx99_power,
5549 +       .write = write_file_tx99_power,
5550 +       .open = simple_open,
5551 +       .owner = THIS_MODULE,
5552 +       .llseek = default_llseek,
5553 +};
5554 +
5555 +void ath9k_tx99_init_debug(struct ath_softc *sc)
5556 +{
5557 +       if (!AR_SREV_9300_20_OR_LATER(sc->sc_ah))
5558 +               return;
5559 +
5560 +       debugfs_create_file("tx99", S_IRUSR | S_IWUSR,
5561 +                           sc->debug.debugfs_phy, sc,
5562 +                           &fops_tx99);
5563 +       debugfs_create_file("tx99_power", S_IRUSR | S_IWUSR,
5564 +                           sc->debug.debugfs_phy, sc,
5565 +                           &fops_tx99_power);
5566 +}
5567 --- a/drivers/net/wireless/ath/ath9k/dfs_debug.c
5568 +++ b/drivers/net/wireless/ath/ath9k/dfs_debug.c
5569 @@ -44,14 +44,20 @@ static ssize_t read_file_dfs(struct file
5570         if (buf == NULL)
5571                 return -ENOMEM;
5572
5573 -       if (sc->dfs_detector)
5574 -               dfs_pool_stats = sc->dfs_detector->get_stats(sc->dfs_detector);
5575 -
5576         len += scnprintf(buf + len, size - len, "DFS support for "
5577                          "macVersion = 0x%x, macRev = 0x%x: %s\n",
5578                          hw_ver->macVersion, hw_ver->macRev,
5579                          (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_DFS) ?
5580                                         "enabled" : "disabled");
5581 +
5582 +       if (!sc->dfs_detector) {
5583 +               len += scnprintf(buf + len, size - len,
5584 +                               "DFS detector not enabled\n");
5585 +               goto exit;
5586 +       }
5587 +
5588 +       dfs_pool_stats = sc->dfs_detector->get_stats(sc->dfs_detector);
5589 +
5590         len += scnprintf(buf + len, size - len, "Pulse detector statistics:\n");
5591         ATH9K_DFS_STAT("pulse events reported   ", pulses_total);
5592         ATH9K_DFS_STAT("invalid pulse events    ", pulses_no_dfs);
5593 @@ -76,6 +82,7 @@ static ssize_t read_file_dfs(struct file
5594         ATH9K_DFS_POOL_STAT("Seqs. alloc error       ", pseq_alloc_error);
5595         ATH9K_DFS_POOL_STAT("Seqs. in use            ", pseq_used);
5596
5597 +exit:
5598         if (len > size)
5599                 len = size;
5600
5601 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
5602 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
5603 @@ -641,11 +641,12 @@ static void ar9003_hw_override_ini(struc
5604                 else
5605                         ah->enabled_cals &= ~TX_IQ_CAL;
5606
5607 -               if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
5608 -                       ah->enabled_cals |= TX_CL_CAL;
5609 -               else
5610 -                       ah->enabled_cals &= ~TX_CL_CAL;
5611         }
5612 +
5613 +       if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE)
5614 +               ah->enabled_cals |= TX_CL_CAL;
5615 +       else
5616 +               ah->enabled_cals &= ~TX_CL_CAL;
5617  }
5618
5619  static void ar9003_hw_prog_ini(struct ath_hw *ah,
5620 @@ -701,6 +702,54 @@ static int ar9550_hw_get_modes_txgain_in
5621         return ret;
5622  }
5623
5624 +static void ar9003_doubler_fix(struct ath_hw *ah)
5625 +{
5626 +       if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9550(ah)) {
5627 +               REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2,
5628 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5629 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
5630 +               REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2,
5631 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5632 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
5633 +               REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2,
5634 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5635 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S, 0);
5636 +
5637 +               udelay(200);
5638 +
5639 +               REG_CLR_BIT(ah, AR_PHY_65NM_CH0_RXTX2,
5640 +                           AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
5641 +               REG_CLR_BIT(ah, AR_PHY_65NM_CH1_RXTX2,
5642 +                           AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
5643 +               REG_CLR_BIT(ah, AR_PHY_65NM_CH2_RXTX2,
5644 +                           AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK);
5645 +
5646 +               udelay(1);
5647 +
5648 +               REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_RXTX2,
5649 +                             AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
5650 +               REG_RMW_FIELD(ah, AR_PHY_65NM_CH1_RXTX2,
5651 +                             AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
5652 +               REG_RMW_FIELD(ah, AR_PHY_65NM_CH2_RXTX2,
5653 +                             AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK, 1);
5654 +
5655 +               udelay(200);
5656 +
5657 +               REG_RMW_FIELD(ah, AR_PHY_65NM_CH0_SYNTH12,
5658 +                             AR_PHY_65NM_CH0_SYNTH12_VREFMUL3, 0xf);
5659 +
5660 +               REG_RMW(ah, AR_PHY_65NM_CH0_RXTX2, 0,
5661 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5662 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
5663 +               REG_RMW(ah, AR_PHY_65NM_CH1_RXTX2, 0,
5664 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5665 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
5666 +               REG_RMW(ah, AR_PHY_65NM_CH2_RXTX2, 0,
5667 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S |
5668 +                       1 << AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S);
5669 +       }
5670 +}
5671 +
5672  static int ar9003_hw_process_ini(struct ath_hw *ah,
5673                                  struct ath9k_channel *chan)
5674  {
5675 @@ -726,6 +775,8 @@ static int ar9003_hw_process_ini(struct
5676                                            modesIndex);
5677         }
5678
5679 +       ar9003_doubler_fix(ah);
5680 +
5681         /*
5682          * RXGAIN initvals.
5683          */
5684 @@ -1281,6 +1332,7 @@ static void ar9003_hw_ani_cache_ini_regs
5685  static void ar9003_hw_set_radar_params(struct ath_hw *ah,
5686                                        struct ath_hw_radar_conf *conf)
5687  {
5688 +       unsigned int regWrites = 0;
5689         u32 radar_0 = 0, radar_1 = 0;
5690
5691         if (!conf) {
5692 @@ -1307,6 +1359,11 @@ static void ar9003_hw_set_radar_params(s
5693                 REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
5694         else
5695                 REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
5696 +
5697 +       if (AR_SREV_9300(ah) || AR_SREV_9340(ah) || AR_SREV_9580(ah)) {
5698 +               REG_WRITE_ARRAY(&ah->ini_dfs,
5699 +                               IS_CHAN_HT40(ah->curchan) ? 2 : 1, regWrites);
5700 +       }
5701  }
5702
5703  static void ar9003_hw_set_radar_conf(struct ath_hw *ah)
5704 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
5705 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
5706 @@ -341,14 +341,15 @@
5707  #define AR_PHY_CCA_MAX_GOOD_VAL_9300_2GHZ     -95
5708  #define AR_PHY_CCA_MAX_GOOD_VAL_9300_5GHZ     -100
5709
5710 +#define AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_2GHZ -95
5711 +#define AR_PHY_CCA_MAX_GOOD_VAL_9300_FCC_5GHZ -100
5712 +
5713  #define AR_PHY_CCA_NOM_VAL_9462_2GHZ          -127
5714  #define AR_PHY_CCA_MIN_GOOD_VAL_9462_2GHZ     -127
5715  #define AR_PHY_CCA_MAX_GOOD_VAL_9462_2GHZ     -60
5716 -#define AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_2GHZ -95
5717  #define AR_PHY_CCA_NOM_VAL_9462_5GHZ          -127
5718  #define AR_PHY_CCA_MIN_GOOD_VAL_9462_5GHZ     -127
5719  #define AR_PHY_CCA_MAX_GOOD_VAL_9462_5GHZ     -60
5720 -#define AR_PHY_CCA_MAX_GOOD_VAL_9462_FCC_5GHZ -100
5721
5722  #define AR_PHY_CCA_NOM_VAL_9330_2GHZ          -118
5723
5724 @@ -656,13 +657,24 @@
5725  #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT   ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x00000001 : 0x00000002)
5726  #define AR_PHY_SYNTH4_LONG_SHIFT_SELECT_S ((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0 : 1)
5727  #define AR_PHY_65NM_CH0_SYNTH7      0x16098
5728 +#define AR_PHY_65NM_CH0_SYNTH12     0x160ac
5729  #define AR_PHY_65NM_CH0_BIAS1       0x160c0
5730  #define AR_PHY_65NM_CH0_BIAS2       0x160c4
5731  #define AR_PHY_65NM_CH0_BIAS4       0x160cc
5732 +#define AR_PHY_65NM_CH0_RXTX2       0x16104
5733 +#define AR_PHY_65NM_CH1_RXTX2       0x16504
5734 +#define AR_PHY_65NM_CH2_RXTX2       0x16904
5735  #define AR_PHY_65NM_CH0_RXTX4       0x1610c
5736  #define AR_PHY_65NM_CH1_RXTX4       0x1650c
5737  #define AR_PHY_65NM_CH2_RXTX4       0x1690c
5738
5739 +#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3           0x00780000
5740 +#define AR_PHY_65NM_CH0_SYNTH12_VREFMUL3_S         19
5741 +#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK         0x00000004
5742 +#define AR_PHY_65NM_CH0_RXTX2_SYNTHON_MASK_S       2
5743 +#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK        0x00000008
5744 +#define AR_PHY_65NM_CH0_RXTX2_SYNTHOVR_MASK_S      3
5745 +
5746  #define AR_CH0_TOP     (AR_SREV_9300(ah) ? 0x16288 : \
5747                          (((AR_SREV_9462(ah) || AR_SREV_9565(ah)) ? 0x1628c : 0x16280)))
5748  #define AR_CH0_TOP_XPABIASLVL (AR_SREV_9550(ah) ? 0x3c0 : 0x300)
5749 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c
5750 +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
5751 @@ -181,6 +181,7 @@ static void rt2x00lib_autowakeup(struct
5752  static void rt2x00lib_bc_buffer_iter(void *data, u8 *mac,
5753                                      struct ieee80211_vif *vif)
5754  {
5755 +       struct ieee80211_tx_control control = {};
5756         struct rt2x00_dev *rt2x00dev = data;
5757         struct sk_buff *skb;
5758
5759 @@ -195,7 +196,7 @@ static void rt2x00lib_bc_buffer_iter(voi
5760          */
5761         skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
5762         while (skb) {
5763 -               rt2x00mac_tx(rt2x00dev->hw, NULL, skb);
5764 +               rt2x00mac_tx(rt2x00dev->hw, &control, skb);
5765                 skb = ieee80211_get_buffered_bc(rt2x00dev->hw, vif);
5766         }
5767  }
5768 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
5769 +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
5770 @@ -898,7 +898,7 @@ static void ar9003_hw_tx_iq_cal_reload(s
5771
5772  static void ar9003_hw_manual_peak_cal(struct ath_hw *ah, u8 chain, bool is_2g)
5773  {
5774 -       int offset[8], total = 0, test;
5775 +       int offset[8] = {0}, total = 0, test;
5776         int agc_out, i;
5777
5778         REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_GAINSTAGES(chain),
5779 @@ -923,12 +923,18 @@ static void ar9003_hw_manual_peak_cal(st
5780                       AR_PHY_65NM_RXRF_AGC_AGC_ON_OVR, 0x1);
5781         REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
5782                       AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0x1);
5783 -       if (is_2g)
5784 -               REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
5785 -                             AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR, 0x0);
5786 -       else
5787 +
5788 +       if (AR_SREV_9330_11(ah)) {
5789                 REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
5790 -                             AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR, 0x0);
5791 +                             AR_PHY_65NM_RXRF_AGC_AGC2G_CALDAC_OVR, 0x0);
5792 +       } else {
5793 +               if (is_2g)
5794 +                       REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
5795 +                                     AR_PHY_65NM_RXRF_AGC_AGC2G_DBDAC_OVR, 0x0);
5796 +               else
5797 +                       REG_RMW_FIELD(ah, AR_PHY_65NM_RXRF_AGC(chain),
5798 +                                     AR_PHY_65NM_RXRF_AGC_AGC5G_DBDAC_OVR, 0x0);
5799 +       }
5800
5801         for (i = 6; i > 0; i--) {
5802                 offset[i] = BIT(i - 1);
5803 @@ -964,9 +970,9 @@ static void ar9003_hw_manual_peak_cal(st
5804                       AR_PHY_65NM_RXRF_AGC_AGC_CAL_OVR, 0);
5805  }
5806
5807 -static void ar9003_hw_do_manual_peak_cal(struct ath_hw *ah,
5808 -                                        struct ath9k_channel *chan,
5809 -                                        bool run_rtt_cal)
5810 +static void ar9003_hw_do_pcoem_manual_peak_cal(struct ath_hw *ah,
5811 +                                              struct ath9k_channel *chan,
5812 +                                              bool run_rtt_cal)
5813  {
5814         struct ath9k_hw_cal_data *caldata = ah->caldata;
5815         int i;
5816 @@ -1040,14 +1046,14 @@ static void ar9003_hw_cl_cal_post_proc(s
5817         }
5818  }
5819
5820 -static bool ar9003_hw_init_cal(struct ath_hw *ah,
5821 -                              struct ath9k_channel *chan)
5822 +static bool ar9003_hw_init_cal_pcoem(struct ath_hw *ah,
5823 +                                    struct ath9k_channel *chan)
5824  {
5825         struct ath_common *common = ath9k_hw_common(ah);
5826         struct ath9k_hw_cal_data *caldata = ah->caldata;
5827         bool txiqcal_done = false;
5828         bool is_reusable = true, status = true;
5829 -       bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
5830 +       bool run_rtt_cal = false, run_agc_cal;
5831         bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
5832         u32 rx_delay = 0;
5833         u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
5834 @@ -1119,22 +1125,12 @@ static bool ar9003_hw_init_cal(struct at
5835                         REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
5836                                     AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
5837                 txiqcal_done = run_agc_cal = true;
5838 -       } else if (caldata && !test_bit(TXIQCAL_DONE, &caldata->cal_flags)) {
5839 -               run_agc_cal = true;
5840 -               sep_iq_cal = true;
5841         }
5842
5843  skip_tx_iqcal:
5844         if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
5845                 ar9003_mci_init_cal_req(ah, &is_reusable);
5846
5847 -       if (sep_iq_cal) {
5848 -               txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
5849 -               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
5850 -               udelay(5);
5851 -               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
5852 -       }
5853 -
5854         if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
5855                 rx_delay = REG_READ(ah, AR_PHY_RX_DELAY);
5856                 /* Disable BB_active */
5857 @@ -1155,7 +1151,7 @@ skip_tx_iqcal:
5858                                        AR_PHY_AGC_CONTROL_CAL,
5859                                        0, AH_WAIT_TIMEOUT);
5860
5861 -               ar9003_hw_do_manual_peak_cal(ah, chan, run_rtt_cal);
5862 +               ar9003_hw_do_pcoem_manual_peak_cal(ah, chan, run_rtt_cal);
5863         }
5864
5865         if (REG_READ(ah, AR_PHY_CL_CAL_CTL) & AR_PHY_CL_CAL_ENABLE) {
5866 @@ -1228,13 +1224,112 @@ skip_tx_iqcal:
5867         return true;
5868  }
5869
5870 +static bool ar9003_hw_init_cal_soc(struct ath_hw *ah,
5871 +                                  struct ath9k_channel *chan)
5872 +{
5873 +       struct ath_common *common = ath9k_hw_common(ah);
5874 +       struct ath9k_hw_cal_data *caldata = ah->caldata;
5875 +       bool txiqcal_done = false;
5876 +       bool is_reusable = true, status = true;
5877 +       bool run_agc_cal = false, sep_iq_cal = false;
5878 +
5879 +       /* Use chip chainmask only for calibration */
5880 +       ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
5881 +
5882 +       if (ah->enabled_cals & TX_CL_CAL) {
5883 +               REG_SET_BIT(ah, AR_PHY_CL_CAL_CTL, AR_PHY_CL_CAL_ENABLE);
5884 +               run_agc_cal = true;
5885 +       }
5886 +
5887 +       if (IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))
5888 +               goto skip_tx_iqcal;
5889 +
5890 +       /* Do Tx IQ Calibration */
5891 +       REG_RMW_FIELD(ah, AR_PHY_TX_IQCAL_CONTROL_1,
5892 +                     AR_PHY_TX_IQCAL_CONTROL_1_IQCORR_I_Q_COFF_DELPT,
5893 +                     DELPT);
5894 +
5895 +       /*
5896 +        * For AR9485 or later chips, TxIQ cal runs as part of
5897 +        * AGC calibration. Specifically, AR9550 in SoC chips.
5898 +        */
5899 +       if (ah->enabled_cals & TX_IQ_ON_AGC_CAL) {
5900 +               txiqcal_done = true;
5901 +               run_agc_cal = true;
5902 +       } else {
5903 +               sep_iq_cal = true;
5904 +               run_agc_cal = true;
5905 +       }
5906 +
5907 +       /*
5908 +        * In the SoC family, this will run for AR9300, AR9331 and AR9340.
5909 +        */
5910 +       if (sep_iq_cal) {
5911 +               txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
5912 +               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
5913 +               udelay(5);
5914 +               REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
5915 +       }
5916 +
5917 +skip_tx_iqcal:
5918 +       if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
5919 +               if (AR_SREV_9330_11(ah))
5920 +                       ar9003_hw_manual_peak_cal(ah, 0, IS_CHAN_2GHZ(chan));
5921 +
5922 +               /* Calibrate the AGC */
5923 +               REG_WRITE(ah, AR_PHY_AGC_CONTROL,
5924 +                         REG_READ(ah, AR_PHY_AGC_CONTROL) |
5925 +                         AR_PHY_AGC_CONTROL_CAL);
5926 +
5927 +               /* Poll for offset calibration complete */
5928 +               status = ath9k_hw_wait(ah, AR_PHY_AGC_CONTROL,
5929 +                                      AR_PHY_AGC_CONTROL_CAL,
5930 +                                      0, AH_WAIT_TIMEOUT);
5931 +       }
5932 +
5933 +       if (!status) {
5934 +               ath_dbg(common, CALIBRATE,
5935 +                       "offset calibration failed to complete in %d ms; noisy environment?\n",
5936 +                       AH_WAIT_TIMEOUT / 1000);
5937 +               return false;
5938 +       }
5939 +
5940 +       if (txiqcal_done)
5941 +               ar9003_hw_tx_iq_cal_post_proc(ah, is_reusable);
5942 +
5943 +       /* Revert chainmask to runtime parameters */
5944 +       ar9003_hw_set_chain_masks(ah, ah->rxchainmask, ah->txchainmask);
5945 +
5946 +       /* Initialize list pointers */
5947 +       ah->cal_list = ah->cal_list_last = ah->cal_list_curr = NULL;
5948 +
5949 +       INIT_CAL(&ah->iq_caldata);
5950 +       INSERT_CAL(ah, &ah->iq_caldata);
5951 +       ath_dbg(common, CALIBRATE, "enabling IQ Calibration\n");
5952 +
5953 +       /* Initialize current pointer to first element in list */
5954 +       ah->cal_list_curr = ah->cal_list;
5955 +
5956 +       if (ah->cal_list_curr)
5957 +               ath9k_hw_reset_calibration(ah, ah->cal_list_curr);
5958 +
5959 +       if (caldata)
5960 +               caldata->CalValid = 0;
5961 +
5962 +       return true;
5963 +}
5964 +
5965  void ar9003_hw_attach_calib_ops(struct ath_hw *ah)
5966  {
5967         struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
5968         struct ath_hw_ops *ops = ath9k_hw_ops(ah);
5969
5970 +       if (AR_SREV_9485(ah) || AR_SREV_9462(ah) || AR_SREV_9565(ah))
5971 +               priv_ops->init_cal = ar9003_hw_init_cal_pcoem;
5972 +       else
5973 +               priv_ops->init_cal = ar9003_hw_init_cal_soc;
5974 +
5975         priv_ops->init_cal_settings = ar9003_hw_init_cal_settings;
5976 -       priv_ops->init_cal = ar9003_hw_init_cal;
5977         priv_ops->setup_calibration = ar9003_hw_setup_calibration;
5978
5979         ops->calibrate = ar9003_hw_calibrate;
5980 --- a/drivers/net/wireless/ath/ath9k/common.c
5981 +++ b/drivers/net/wireless/ath/ath9k/common.c
5982 @@ -98,10 +98,8 @@ struct ath9k_channel *ath9k_cmn_get_chan
5983  {
5984         struct ieee80211_channel *curchan = chandef->chan;
5985         struct ath9k_channel *channel;
5986 -       u8 chan_idx;
5987
5988 -       chan_idx = curchan->hw_value;
5989 -       channel = &ah->channels[chan_idx];
5990 +       channel = &ah->channels[curchan->hw_value];
5991         ath9k_cmn_update_ichannel(channel, chandef);
5992
5993         return channel;
5994 --- a/net/mac80211/rc80211_minstrel_ht.c
5995 +++ b/net/mac80211/rc80211_minstrel_ht.c
5996 @@ -226,7 +226,7 @@ minstrel_ht_calc_tp(struct minstrel_ht_s
5997                 nsecs = 1000 * mi->overhead / MINSTREL_TRUNC(mi->avg_ampdu_len);
5998
5999         nsecs += minstrel_mcs_groups[group].duration[rate];
6000 -       tp = 1000000 * ((mr->probability * 1000) / nsecs);
6001 +       tp = 1000000 * ((prob * 1000) / nsecs);
6002
6003         mr->cur_tp = MINSTREL_TRUNC(tp);
6004  }
6005 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
6006 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
6007 @@ -3965,7 +3965,7 @@ static void ar9003_hw_apply_tuning_caps(
6008         struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
6009         u8 tuning_caps_param = eep->baseEepHeader.params_for_tuning_caps[0];
6010
6011 -       if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
6012 +       if (AR_SREV_9340(ah))
6013                 return;
6014
6015         if (eep->baseEepHeader.featureEnable & 0x40) {
6016 @@ -3984,18 +3984,20 @@ static void ar9003_hw_quick_drop_apply(s
6017         int quick_drop;
6018         s32 t[3], f[3] = {5180, 5500, 5785};
6019
6020 -       if (!(pBase->miscConfiguration & BIT(1)))
6021 +       if (!(pBase->miscConfiguration & BIT(4)))
6022                 return;
6023
6024 -       if (freq < 4000)
6025 -               quick_drop = eep->modalHeader2G.quick_drop;
6026 -       else {
6027 -               t[0] = eep->base_ext1.quick_drop_low;
6028 -               t[1] = eep->modalHeader5G.quick_drop;
6029 -               t[2] = eep->base_ext1.quick_drop_high;
6030 -               quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
6031 +       if (AR_SREV_9300(ah) || AR_SREV_9580(ah) || AR_SREV_9340(ah)) {
6032 +               if (freq < 4000) {
6033 +                       quick_drop = eep->modalHeader2G.quick_drop;
6034 +               } else {
6035 +                       t[0] = eep->base_ext1.quick_drop_low;
6036 +                       t[1] = eep->modalHeader5G.quick_drop;
6037 +                       t[2] = eep->base_ext1.quick_drop_high;
6038 +                       quick_drop = ar9003_hw_power_interpolate(freq, f, t, 3);
6039 +               }
6040 +               REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
6041         }
6042 -       REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
6043  }
6044
6045  static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
6046 @@ -4035,7 +4037,7 @@ static void ar9003_hw_xlna_bias_strength
6047         struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
6048         u8 bias;
6049
6050 -       if (!(eep->baseEepHeader.featureEnable & 0x40))
6051 +       if (!(eep->baseEepHeader.miscConfiguration & 0x40))
6052                 return;
6053
6054         if (!AR_SREV_9300(ah))
6055 @@ -4120,7 +4122,7 @@ static void ath9k_hw_ar9300_set_board_va
6056         ar9003_hw_xlna_bias_strength_apply(ah, is2ghz);
6057         ar9003_hw_atten_apply(ah, chan);
6058         ar9003_hw_quick_drop_apply(ah, chan->channel);
6059 -       if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
6060 +       if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah))
6061                 ar9003_hw_internal_regulator_apply(ah);
6062         ar9003_hw_apply_tuning_caps(ah);
6063         ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
6064 --- a/net/mac80211/ieee80211_i.h
6065 +++ b/net/mac80211/ieee80211_i.h
6066 @@ -735,6 +735,7 @@ struct ieee80211_sub_if_data {
6067         int csa_counter_offset_beacon;
6068         int csa_counter_offset_presp;
6069         bool csa_radar_required;
6070 +       struct cfg80211_chan_def csa_chandef;
6071
6072         /* used to reconfigure hardware SM PS */
6073         struct work_struct recalc_smps;
6074 @@ -811,6 +812,9 @@ static inline void sdata_unlock(struct i
6075         __release(&sdata->wdev.mtx);
6076  }
6077
6078 +#define sdata_dereference(p, sdata) \
6079 +       rcu_dereference_protected(p, lockdep_is_held(&sdata->wdev.mtx))
6080 +
6081  static inline void
6082  sdata_assert_lock(struct ieee80211_sub_if_data *sdata)
6083  {
6084 @@ -1098,7 +1102,6 @@ struct ieee80211_local {
6085         enum mac80211_scan_state next_scan_state;
6086         struct delayed_work scan_work;
6087         struct ieee80211_sub_if_data __rcu *scan_sdata;
6088 -       struct cfg80211_chan_def csa_chandef;
6089         /* For backward compatibility only -- do not use */
6090         struct cfg80211_chan_def _oper_chandef;
6091
6092 @@ -1236,6 +1239,7 @@ struct ieee80211_csa_ie {
6093         u8 mode;
6094         u8 count;
6095         u8 ttl;
6096 +       u16 pre_value;
6097  };
6098
6099  /* Parsed Information Elements */
6100 @@ -1738,7 +1742,6 @@ ieee80211_vif_change_bandwidth(struct ie
6101  /* NOTE: only use ieee80211_vif_change_channel() for channel switch */
6102  int __must_check
6103  ieee80211_vif_change_channel(struct ieee80211_sub_if_data *sdata,
6104 -                            const struct cfg80211_chan_def *chandef,
6105                              u32 *changed);
6106  void ieee80211_vif_release_channel(struct ieee80211_sub_if_data *sdata);
6107  void ieee80211_vif_vlan_copy_chanctx(struct ieee80211_sub_if_data *sdata);
6108 --- a/net/mac80211/chan.c
6109 +++ b/net/mac80211/chan.c
6110 @@ -411,12 +411,12 @@ int ieee80211_vif_use_channel(struct iee
6111  }
6112
6113  int ieee80211_vif_change_channel(struct ieee80211_sub_if_data *sdata,
6114 -                                const struct cfg80211_chan_def *chandef,
6115                                  u32 *changed)
6116  {
6117         struct ieee80211_local *local = sdata->local;
6118         struct ieee80211_chanctx_conf *conf;
6119         struct ieee80211_chanctx *ctx;
6120 +       const struct cfg80211_chan_def *chandef = &sdata->csa_chandef;
6121         int ret;
6122         u32 chanctx_changed = 0;
6123
6124 --- a/net/mac80211/ibss.c
6125 +++ b/net/mac80211/ibss.c
6126 @@ -534,7 +534,7 @@ int ieee80211_ibss_finish_csa(struct iee
6127         int err;
6128         u16 capability;
6129
6130 -       sdata_lock(sdata);
6131 +       sdata_assert_lock(sdata);
6132         /* update cfg80211 bss information with the new channel */
6133         if (!is_zero_ether_addr(ifibss->bssid)) {
6134                 capability = WLAN_CAPABILITY_IBSS;
6135 @@ -550,16 +550,15 @@ int ieee80211_ibss_finish_csa(struct iee
6136                                         capability);
6137                 /* XXX: should not really modify cfg80211 data */
6138                 if (cbss) {
6139 -                       cbss->channel = sdata->local->csa_chandef.chan;
6140 +                       cbss->channel = sdata->csa_chandef.chan;
6141                         cfg80211_put_bss(sdata->local->hw.wiphy, cbss);
6142                 }
6143         }
6144
6145 -       ifibss->chandef = sdata->local->csa_chandef;
6146 +       ifibss->chandef = sdata->csa_chandef;
6147
6148         /* generate the beacon */
6149         err = ieee80211_ibss_csa_beacon(sdata, NULL);
6150 -       sdata_unlock(sdata);
6151         if (err < 0)
6152                 return err;
6153
6154 @@ -922,7 +921,7 @@ ieee80211_ibss_process_chanswitch(struct
6155                                 IEEE80211_MAX_QUEUE_MAP,
6156                                 IEEE80211_QUEUE_STOP_REASON_CSA);
6157
6158 -       sdata->local->csa_chandef = params.chandef;
6159 +       sdata->csa_chandef = params.chandef;
6160         sdata->vif.csa_active = true;
6161
6162         ieee80211_bss_info_change_notify(sdata, err);
6163 --- a/net/mac80211/mesh.c
6164 +++ b/net/mac80211/mesh.c
6165 @@ -943,14 +943,19 @@ ieee80211_mesh_process_chnswitch(struct
6166                  params.chandef.chan->center_freq);
6167
6168         params.block_tx = csa_ie.mode & WLAN_EID_CHAN_SWITCH_PARAM_TX_RESTRICT;
6169 -       if (beacon)
6170 +       if (beacon) {
6171                 ifmsh->chsw_ttl = csa_ie.ttl - 1;
6172 -       else
6173 -               ifmsh->chsw_ttl = 0;
6174 +               if (ifmsh->pre_value >= csa_ie.pre_value)
6175 +                       return false;
6176 +               ifmsh->pre_value = csa_ie.pre_value;
6177 +       }
6178
6179 -       if (ifmsh->chsw_ttl > 0)
6180 +       if (ifmsh->chsw_ttl < ifmsh->mshcfg.dot11MeshTTL) {
6181                 if (ieee80211_mesh_csa_beacon(sdata, &params, false) < 0)
6182                         return false;
6183 +       } else {
6184 +               return false;
6185 +       }
6186
6187         sdata->csa_radar_required = params.radar_required;
6188
6189 @@ -959,7 +964,7 @@ ieee80211_mesh_process_chnswitch(struct
6190                                 IEEE80211_MAX_QUEUE_MAP,
6191                                 IEEE80211_QUEUE_STOP_REASON_CSA);
6192
6193 -       sdata->local->csa_chandef = params.chandef;
6194 +       sdata->csa_chandef = params.chandef;
6195         sdata->vif.csa_active = true;
6196
6197         ieee80211_bss_info_change_notify(sdata, err);
6198 @@ -1163,7 +1168,6 @@ static int mesh_fwd_csa_frame(struct iee
6199         offset_ttl = (len < 42) ? 7 : 10;
6200         *(pos + offset_ttl) -= 1;
6201         *(pos + offset_ttl + 1) &= ~WLAN_EID_CHAN_SWITCH_PARAM_INITIATOR;
6202 -       sdata->u.mesh.chsw_ttl = *(pos + offset_ttl);
6203
6204         memcpy(mgmt_fwd, mgmt, len);
6205         eth_broadcast_addr(mgmt_fwd->da);
6206 @@ -1182,7 +1186,7 @@ static void mesh_rx_csa_frame(struct iee
6207         u16 pre_value;
6208         bool fwd_csa = true;
6209         size_t baselen;
6210 -       u8 *pos, ttl;
6211 +       u8 *pos;
6212
6213         if (mgmt->u.action.u.measurement.action_code !=
6214             WLAN_ACTION_SPCT_CHL_SWITCH)
6215 @@ -1193,8 +1197,8 @@ static void mesh_rx_csa_frame(struct iee
6216                            u.action.u.chan_switch.variable);
6217         ieee802_11_parse_elems(pos, len - baselen, false, &elems);
6218
6219 -       ttl = elems.mesh_chansw_params_ie->mesh_ttl;
6220 -       if (!--ttl)
6221 +       ifmsh->chsw_ttl = elems.mesh_chansw_params_ie->mesh_ttl;
6222 +       if (!--ifmsh->chsw_ttl)
6223                 fwd_csa = false;
6224
6225         pre_value = le16_to_cpu(elems.mesh_chansw_params_ie->mesh_pre_value);
6226 --- a/net/mac80211/spectmgmt.c
6227 +++ b/net/mac80211/spectmgmt.c
6228 @@ -78,6 +78,8 @@ int ieee80211_parse_ch_switch_ie(struct
6229         if (elems->mesh_chansw_params_ie) {
6230                 csa_ie->ttl = elems->mesh_chansw_params_ie->mesh_ttl;
6231                 csa_ie->mode = elems->mesh_chansw_params_ie->mesh_flags;
6232 +               csa_ie->pre_value = le16_to_cpu(
6233 +                               elems->mesh_chansw_params_ie->mesh_pre_value);
6234         }
6235
6236         new_freq = ieee80211_channel_to_frequency(new_chan_no, new_band);
6237 --- a/drivers/net/wireless/ath/ath6kl/cfg80211.c
6238 +++ b/drivers/net/wireless/ath/ath6kl/cfg80211.c
6239 @@ -1109,7 +1109,9 @@ void ath6kl_cfg80211_ch_switch_notify(st
6240                                 (mode == WMI_11G_HT20) ?
6241                                         NL80211_CHAN_HT20 : NL80211_CHAN_NO_HT);
6242
6243 +       mutex_lock(vif->wdev->mtx);
6244         cfg80211_ch_switch_notify(vif->ndev, &chandef);
6245 +       mutex_unlock(vif->wdev->mtx);
6246  }
6247
6248  static int ath6kl_cfg80211_add_key(struct wiphy *wiphy, struct net_device *ndev,
6249 --- a/drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h
6250 +++ b/drivers/net/wireless/ath/ath9k/ar9462_2p1_initvals.h
6251 @@ -20,6 +20,44 @@
6252
6253  /* AR9462 2.1 */
6254
6255 +#define ar9462_2p1_mac_postamble ar9462_2p0_mac_postamble
6256 +
6257 +#define ar9462_2p1_baseband_core ar9462_2p0_baseband_core
6258 +
6259 +#define ar9462_2p1_radio_core ar9462_2p0_radio_core
6260 +
6261 +#define ar9462_2p1_radio_postamble ar9462_2p0_radio_postamble
6262 +
6263 +#define ar9462_2p1_soc_postamble ar9462_2p0_soc_postamble
6264 +
6265 +#define ar9462_2p1_radio_postamble_sys2ant ar9462_2p0_radio_postamble_sys2ant
6266 +
6267 +#define ar9462_2p1_common_rx_gain ar9462_2p0_common_rx_gain
6268 +
6269 +#define ar9462_2p1_common_mixed_rx_gain ar9462_2p0_common_mixed_rx_gain
6270 +
6271 +#define ar9462_2p1_common_5g_xlna_only_rxgain ar9462_2p0_common_5g_xlna_only_rxgain
6272 +
6273 +#define ar9462_2p1_baseband_core_mix_rxgain ar9462_2p0_baseband_core_mix_rxgain
6274 +
6275 +#define ar9462_2p1_baseband_postamble_mix_rxgain ar9462_2p0_baseband_postamble_mix_rxgain
6276 +
6277 +#define ar9462_2p1_baseband_postamble_5g_xlna ar9462_2p0_baseband_postamble_5g_xlna
6278 +
6279 +#define ar9462_2p1_common_wo_xlna_rx_gain ar9462_2p0_common_wo_xlna_rx_gain
6280 +
6281 +#define ar9462_2p1_modes_low_ob_db_tx_gain ar9462_2p0_modes_low_ob_db_tx_gain
6282 +
6283 +#define ar9462_2p1_modes_high_ob_db_tx_gain ar9462_2p0_modes_high_ob_db_tx_gain
6284 +
6285 +#define ar9462_2p1_modes_mix_ob_db_tx_gain ar9462_2p0_modes_mix_ob_db_tx_gain
6286 +
6287 +#define ar9462_2p1_modes_fast_clock ar9462_2p0_modes_fast_clock
6288 +
6289 +#define ar9462_2p1_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
6290 +
6291 +#define ar9462_2p1_pciephy_clkreq_disable_L1 ar9462_2p0_pciephy_clkreq_disable_L1
6292 +
6293  static const u32 ar9462_2p1_mac_core[][2] = {
6294         /* Addr      allmodes  */
6295         {0x00000008, 0x00000000},
6296 @@ -183,168 +221,6 @@ static const u32 ar9462_2p1_mac_core[][2
6297         {0x000083d0, 0x000301ff},
6298  };
6299
6300 -static const u32 ar9462_2p1_mac_postamble[][5] = {
6301 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
6302 -       {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
6303 -       {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
6304 -       {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
6305 -       {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
6306 -       {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
6307 -       {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
6308 -       {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
6309 -       {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
6310 -};
6311 -
6312 -static const u32 ar9462_2p1_baseband_core[][2] = {
6313 -       /* Addr      allmodes  */
6314 -       {0x00009800, 0xafe68e30},
6315 -       {0x00009804, 0xfd14e000},
6316 -       {0x00009808, 0x9c0a9f6b},
6317 -       {0x0000980c, 0x04900000},
6318 -       {0x00009814, 0x9280c00a},
6319 -       {0x00009818, 0x00000000},
6320 -       {0x0000981c, 0x00020028},
6321 -       {0x00009834, 0x6400a290},
6322 -       {0x00009838, 0x0108ecff},
6323 -       {0x0000983c, 0x0d000600},
6324 -       {0x00009880, 0x201fff00},
6325 -       {0x00009884, 0x00001042},
6326 -       {0x000098a4, 0x00200400},
6327 -       {0x000098b0, 0x32440bbe},
6328 -       {0x000098d0, 0x004b6a8e},
6329 -       {0x000098d4, 0x00000820},
6330 -       {0x000098dc, 0x00000000},
6331 -       {0x000098e4, 0x01ffffff},
6332 -       {0x000098e8, 0x01ffffff},
6333 -       {0x000098ec, 0x01ffffff},
6334 -       {0x000098f0, 0x00000000},
6335 -       {0x000098f4, 0x00000000},
6336 -       {0x00009bf0, 0x80000000},
6337 -       {0x00009c04, 0xff55ff55},
6338 -       {0x00009c08, 0x0320ff55},
6339 -       {0x00009c0c, 0x00000000},
6340 -       {0x00009c10, 0x00000000},
6341 -       {0x00009c14, 0x00046384},
6342 -       {0x00009c18, 0x05b6b440},
6343 -       {0x00009c1c, 0x00b6b440},
6344 -       {0x00009d00, 0xc080a333},
6345 -       {0x00009d04, 0x40206c10},
6346 -       {0x00009d08, 0x009c4060},
6347 -       {0x00009d0c, 0x9883800a},
6348 -       {0x00009d10, 0x01834061},
6349 -       {0x00009d14, 0x00c0040b},
6350 -       {0x00009d18, 0x00000000},
6351 -       {0x00009e08, 0x0038230c},
6352 -       {0x00009e24, 0x990bb515},
6353 -       {0x00009e28, 0x0c6f0000},
6354 -       {0x00009e30, 0x06336f77},
6355 -       {0x00009e34, 0x6af6532f},
6356 -       {0x00009e38, 0x0cc80c00},
6357 -       {0x00009e40, 0x15262820},
6358 -       {0x00009e4c, 0x00001004},
6359 -       {0x00009e50, 0x00ff03f1},
6360 -       {0x00009e54, 0xe4c555c2},
6361 -       {0x00009e58, 0xfd857722},
6362 -       {0x00009e5c, 0xe9198724},
6363 -       {0x00009fc0, 0x803e4788},
6364 -       {0x00009fc4, 0x0001efb5},
6365 -       {0x00009fcc, 0x40000014},
6366 -       {0x00009fd0, 0x0a193b93},
6367 -       {0x0000a20c, 0x00000000},
6368 -       {0x0000a220, 0x00000000},
6369 -       {0x0000a224, 0x00000000},
6370 -       {0x0000a228, 0x10002310},
6371 -       {0x0000a23c, 0x00000000},
6372 -       {0x0000a244, 0x0c000000},
6373 -       {0x0000a2a0, 0x00000001},
6374 -       {0x0000a2c0, 0x00000001},
6375 -       {0x0000a2c8, 0x00000000},
6376 -       {0x0000a2cc, 0x18c43433},
6377 -       {0x0000a2d4, 0x00000000},
6378 -       {0x0000a2ec, 0x00000000},
6379 -       {0x0000a2f0, 0x00000000},
6380 -       {0x0000a2f4, 0x00000000},
6381 -       {0x0000a2f8, 0x00000000},
6382 -       {0x0000a344, 0x00000000},
6383 -       {0x0000a34c, 0x00000000},
6384 -       {0x0000a350, 0x0000a000},
6385 -       {0x0000a364, 0x00000000},
6386 -       {0x0000a370, 0x00000000},
6387 -       {0x0000a390, 0x00000001},
6388 -       {0x0000a394, 0x00000444},
6389 -       {0x0000a398, 0x001f0e0f},
6390 -       {0x0000a39c, 0x0075393f},
6391 -       {0x0000a3a0, 0xb79f6427},
6392 -       {0x0000a3c0, 0x20202020},
6393 -       {0x0000a3c4, 0x22222220},
6394 -       {0x0000a3c8, 0x20200020},
6395 -       {0x0000a3cc, 0x20202020},
6396 -       {0x0000a3d0, 0x20202020},
6397 -       {0x0000a3d4, 0x20202020},
6398 -       {0x0000a3d8, 0x20202020},
6399 -       {0x0000a3dc, 0x20202020},
6400 -       {0x0000a3e0, 0x20202020},
6401 -       {0x0000a3e4, 0x20202020},
6402 -       {0x0000a3e8, 0x20202020},
6403 -       {0x0000a3ec, 0x20202020},
6404 -       {0x0000a3f0, 0x00000000},
6405 -       {0x0000a3f4, 0x00000006},
6406 -       {0x0000a3f8, 0x0c9bd380},
6407 -       {0x0000a3fc, 0x000f0f01},
6408 -       {0x0000a400, 0x8fa91f01},
6409 -       {0x0000a404, 0x00000000},
6410 -       {0x0000a408, 0x0e79e5c6},
6411 -       {0x0000a40c, 0x00820820},
6412 -       {0x0000a414, 0x1ce739ce},
6413 -       {0x0000a418, 0x2d001dce},
6414 -       {0x0000a434, 0x00000000},
6415 -       {0x0000a438, 0x00001801},
6416 -       {0x0000a43c, 0x00100000},
6417 -       {0x0000a444, 0x00000000},
6418 -       {0x0000a448, 0x05000080},
6419 -       {0x0000a44c, 0x00000001},
6420 -       {0x0000a450, 0x00010000},
6421 -       {0x0000a454, 0x07000000},
6422 -       {0x0000a644, 0xbfad9d74},
6423 -       {0x0000a648, 0x0048060a},
6424 -       {0x0000a64c, 0x00002037},
6425 -       {0x0000a670, 0x03020100},
6426 -       {0x0000a674, 0x09080504},
6427 -       {0x0000a678, 0x0d0c0b0a},
6428 -       {0x0000a67c, 0x13121110},
6429 -       {0x0000a680, 0x31301514},
6430 -       {0x0000a684, 0x35343332},
6431 -       {0x0000a688, 0x00000036},
6432 -       {0x0000a690, 0x00000838},
6433 -       {0x0000a6b0, 0x0000000a},
6434 -       {0x0000a6b4, 0x00512c01},
6435 -       {0x0000a7c0, 0x00000000},
6436 -       {0x0000a7c4, 0xfffffffc},
6437 -       {0x0000a7c8, 0x00000000},
6438 -       {0x0000a7cc, 0x00000000},
6439 -       {0x0000a7d0, 0x00000000},
6440 -       {0x0000a7d4, 0x00000004},
6441 -       {0x0000a7dc, 0x00000000},
6442 -       {0x0000a7f0, 0x80000000},
6443 -       {0x0000a8d0, 0x004b6a8e},
6444 -       {0x0000a8d4, 0x00000820},
6445 -       {0x0000a8dc, 0x00000000},
6446 -       {0x0000a8f0, 0x00000000},
6447 -       {0x0000a8f4, 0x00000000},
6448 -       {0x0000abf0, 0x80000000},
6449 -       {0x0000b2d0, 0x00000080},
6450 -       {0x0000b2d4, 0x00000000},
6451 -       {0x0000b2ec, 0x00000000},
6452 -       {0x0000b2f0, 0x00000000},
6453 -       {0x0000b2f4, 0x00000000},
6454 -       {0x0000b2f8, 0x00000000},
6455 -       {0x0000b408, 0x0e79e5c0},
6456 -       {0x0000b40c, 0x00820820},
6457 -       {0x0000b420, 0x00000000},
6458 -       {0x0000b6b0, 0x0000000a},
6459 -       {0x0000b6b4, 0x00000001},
6460 -};
6461 -
6462  static const u32 ar9462_2p1_baseband_postamble[][5] = {
6463         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
6464         {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
6465 @@ -361,7 +237,7 @@ static const u32 ar9462_2p1_baseband_pos
6466         {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3236605e, 0x32365a5e},
6467         {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
6468         {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
6469 -       {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
6470 +       {0x00009e20, 0x000003a5, 0x000003a5, 0x000003a5, 0x000003a5},
6471         {0x00009e2c, 0x0000001c, 0x0000001c, 0x00000021, 0x00000021},
6472         {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
6473         {0x00009e44, 0x62321e27, 0x62321e27, 0xfe291e27, 0xfe291e27},
6474 @@ -400,1375 +276,16 @@ static const u32 ar9462_2p1_baseband_pos
6475         {0x0000ae04, 0x001c0000, 0x001c0000, 0x001c0000, 0x00100000},
6476         {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
6477         {0x0000ae1c, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
6478 -       {0x0000ae20, 0x000001b5, 0x000001b5, 0x000001ce, 0x000001ce},
6479 +       {0x0000ae20, 0x000001a6, 0x000001a6, 0x000001aa, 0x000001aa},
6480         {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
6481  };
6482
6483 -static const u32 ar9462_2p1_radio_core[][2] = {
6484 -       /* Addr      allmodes  */
6485 -       {0x00016000, 0x36db6db6},
6486 -       {0x00016004, 0x6db6db40},
6487 -       {0x00016008, 0x73f00000},
6488 -       {0x0001600c, 0x00000000},
6489 -       {0x00016010, 0x6d820001},
6490 -       {0x00016040, 0x7f80fff8},
6491 -       {0x0001604c, 0x2699e04f},
6492 -       {0x00016050, 0x6db6db6c},
6493 -       {0x00016058, 0x6c200000},
6494 -       {0x00016080, 0x000c0000},
6495 -       {0x00016084, 0x9a68048c},
6496 -       {0x00016088, 0x54214514},
6497 -       {0x0001608c, 0x1203040b},
6498 -       {0x00016090, 0x24926490},
6499 -       {0x00016098, 0xd2888888},
6500 -       {0x000160a0, 0x0a108ffe},
6501 -       {0x000160a4, 0x812fc491},
6502 -       {0x000160a8, 0x423c8000},
6503 -       {0x000160b4, 0x92000000},
6504 -       {0x000160b8, 0x0285dddc},
6505 -       {0x000160bc, 0x02908888},
6506 -       {0x000160c0, 0x00adb6d0},
6507 -       {0x000160c4, 0x6db6db60},
6508 -       {0x000160c8, 0x6db6db6c},
6509 -       {0x000160cc, 0x0de6c1b0},
6510 -       {0x00016100, 0x3fffbe04},
6511 -       {0x00016104, 0xfff80000},
6512 -       {0x00016108, 0x00200400},
6513 -       {0x00016110, 0x00000000},
6514 -       {0x00016144, 0x02084080},
6515 -       {0x00016148, 0x000080c0},
6516 -       {0x00016280, 0x050a0001},
6517 -       {0x00016284, 0x3d841418},
6518 -       {0x00016288, 0x00000000},
6519 -       {0x0001628c, 0xe3000000},
6520 -       {0x00016290, 0xa1005080},
6521 -       {0x00016294, 0x00000020},
6522 -       {0x00016298, 0x54a82900},
6523 -       {0x00016340, 0x121e4276},
6524 -       {0x00016344, 0x00300000},
6525 -       {0x00016400, 0x36db6db6},
6526 -       {0x00016404, 0x6db6db40},
6527 -       {0x00016408, 0x73f00000},
6528 -       {0x0001640c, 0x00000000},
6529 -       {0x00016410, 0x6c800001},
6530 -       {0x00016440, 0x7f80fff8},
6531 -       {0x0001644c, 0x4699e04f},
6532 -       {0x00016450, 0x6db6db6c},
6533 -       {0x00016500, 0x3fffbe04},
6534 -       {0x00016504, 0xfff80000},
6535 -       {0x00016508, 0x00200400},
6536 -       {0x00016510, 0x00000000},
6537 -       {0x00016544, 0x02084080},
6538 -       {0x00016548, 0x000080c0},
6539 -};
6540 -
6541 -static const u32 ar9462_2p1_radio_postamble[][5] = {
6542 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
6543 -       {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
6544 -       {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
6545 -       {0x0001610c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
6546 -       {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
6547 -};
6548 -
6549  static const u32 ar9462_2p1_soc_preamble[][2] = {
6550         /* Addr      allmodes  */
6551 -       {0x000040a4, 0x00a0c1c9},
6552 +       {0x000040a4, 0x00a0c9c9},
6553         {0x00007020, 0x00000000},
6554         {0x00007034, 0x00000002},
6555         {0x00007038, 0x000004c2},
6556  };
6557
6558 -static const u32 ar9462_2p1_soc_postamble[][5] = {
6559 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
6560 -       {0x00007010, 0x00000033, 0x00000033, 0x00000033, 0x00000033},
6561 -};
6562 -
6563 -static const u32 ar9462_2p1_radio_postamble_sys2ant[][5] = {
6564 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
6565 -       {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
6566 -       {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
6567 -       {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
6568 -};
6569 -
6570 -static const u32 ar9462_2p1_common_rx_gain[][2] = {
6571 -       /* Addr      allmodes  */
6572 -       {0x0000a000, 0x00010000},
6573 -       {0x0000a004, 0x00030002},
6574 -       {0x0000a008, 0x00050004},
6575 -       {0x0000a00c, 0x00810080},
6576 -       {0x0000a010, 0x00830082},
6577 -       {0x0000a014, 0x01810180},
6578 -       {0x0000a018, 0x01830182},
6579 -       {0x0000a01c, 0x01850184},
6580 -       {0x0000a020, 0x01890188},
6581 -       {0x0000a024, 0x018b018a},
6582 -       {0x0000a028, 0x018d018c},
6583 -       {0x0000a02c, 0x01910190},
6584 -       {0x0000a030, 0x01930192},
6585 -       {0x0000a034, 0x01950194},
6586 -       {0x0000a038, 0x038a0196},
6587 -       {0x0000a03c, 0x038c038b},
6588 -       {0x0000a040, 0x0390038d},
6589 -       {0x0000a044, 0x03920391},
6590 -       {0x0000a048, 0x03940393},
6591 -       {0x0000a04c, 0x03960395},
6592 -       {0x0000a050, 0x00000000},
6593 -       {0x0000a054, 0x00000000},
6594 -       {0x0000a058, 0x00000000},
6595 -       {0x0000a05c, 0x00000000},
6596 -       {0x0000a060, 0x00000000},
6597 -       {0x0000a064, 0x00000000},
6598 -       {0x0000a068, 0x00000000},
6599 -       {0x0000a06c, 0x00000000},
6600 -       {0x0000a070, 0x00000000},
6601 -       {0x0000a074, 0x00000000},
6602 -       {0x0000a078, 0x00000000},
6603 -       {0x0000a07c, 0x00000000},
6604 -       {0x0000a080, 0x22222229},
6605 -       {0x0000a084, 0x1d1d1d1d},
6606 -       {0x0000a088, 0x1d1d1d1d},
6607 -       {0x0000a08c, 0x1d1d1d1d},
6608 -       {0x0000a090, 0x171d1d1d},
6609 -       {0x0000a094, 0x11111717},
6610 -       {0x0000a098, 0x00030311},
6611 -       {0x0000a09c, 0x00000000},
6612 -       {0x0000a0a0, 0x00000000},
6613 -       {0x0000a0a4, 0x00000000},
6614 -       {0x0000a0a8, 0x00000000},
6615 -       {0x0000a0ac, 0x00000000},
6616 -       {0x0000a0b0, 0x00000000},
6617 -       {0x0000a0b4, 0x00000000},
6618 -       {0x0000a0b8, 0x00000000},
6619 -       {0x0000a0bc, 0x00000000},
6620 -       {0x0000a0c0, 0x001f0000},
6621 -       {0x0000a0c4, 0x01000101},
6622 -       {0x0000a0c8, 0x011e011f},
6623 -       {0x0000a0cc, 0x011c011d},
6624 -       {0x0000a0d0, 0x02030204},
6625 -       {0x0000a0d4, 0x02010202},
6626 -       {0x0000a0d8, 0x021f0200},
6627 -       {0x0000a0dc, 0x0302021e},
6628 -       {0x0000a0e0, 0x03000301},
6629 -       {0x0000a0e4, 0x031e031f},
6630 -       {0x0000a0e8, 0x0402031d},
6631 -       {0x0000a0ec, 0x04000401},
6632 -       {0x0000a0f0, 0x041e041f},
6633 -       {0x0000a0f4, 0x0502041d},
6634 -       {0x0000a0f8, 0x05000501},
6635 -       {0x0000a0fc, 0x051e051f},
6636 -       {0x0000a100, 0x06010602},
6637 -       {0x0000a104, 0x061f0600},
6638 -       {0x0000a108, 0x061d061e},
6639 -       {0x0000a10c, 0x07020703},
6640 -       {0x0000a110, 0x07000701},
6641 -       {0x0000a114, 0x00000000},
6642 -       {0x0000a118, 0x00000000},
6643 -       {0x0000a11c, 0x00000000},
6644 -       {0x0000a120, 0x00000000},
6645 -       {0x0000a124, 0x00000000},
6646 -       {0x0000a128, 0x00000000},
6647 -       {0x0000a12c, 0x00000000},
6648 -       {0x0000a130, 0x00000000},
6649 -       {0x0000a134, 0x00000000},
6650 -       {0x0000a138, 0x00000000},
6651 -       {0x0000a13c, 0x00000000},
6652 -       {0x0000a140, 0x001f0000},
6653 -       {0x0000a144, 0x01000101},
6654 -       {0x0000a148, 0x011e011f},
6655 -       {0x0000a14c, 0x011c011d},
6656 -       {0x0000a150, 0x02030204},
6657 -       {0x0000a154, 0x02010202},
6658 -       {0x0000a158, 0x021f0200},
6659 -       {0x0000a15c, 0x0302021e},
6660 -       {0x0000a160, 0x03000301},
6661 -       {0x0000a164, 0x031e031f},
6662 -       {0x0000a168, 0x0402031d},
6663 -       {0x0000a16c, 0x04000401},
6664 -       {0x0000a170, 0x041e041f},
6665 -       {0x0000a174, 0x0502041d},
6666 -       {0x0000a178, 0x05000501},
6667 -       {0x0000a17c, 0x051e051f},
6668 -       {0x0000a180, 0x06010602},
6669 -       {0x0000a184, 0x061f0600},
6670 -       {0x0000a188, 0x061d061e},
6671 -       {0x0000a18c, 0x07020703},
6672 -       {0x0000a190, 0x07000701},
6673 -       {0x0000a194, 0x00000000},
6674 -       {0x0000a198, 0x00000000},
6675 -       {0x0000a19c, 0x00000000},
6676 -       {0x0000a1a0, 0x00000000},
6677 -       {0x0000a1a4, 0x00000000},
6678 -       {0x0000a1a8, 0x00000000},
6679 -       {0x0000a1ac, 0x00000000},
6680 -       {0x0000a1b0, 0x00000000},
6681 -       {0x0000a1b4, 0x00000000},
6682 -       {0x0000a1b8, 0x00000000},
6683 -       {0x0000a1bc, 0x00000000},
6684 -       {0x0000a1c0, 0x00000000},
6685 -       {0x0000a1c4, 0x00000000},
6686 -       {0x0000a1c8, 0x00000000},
6687 -       {0x0000a1cc, 0x00000000},
6688 -       {0x0000a1d0, 0x00000000},
6689 -       {0x0000a1d4, 0x00000000},
6690 -       {0x0000a1d8, 0x00000000},
6691 -       {0x0000a1dc, 0x00000000},
6692 -       {0x0000a1e0, 0x00000000},
6693 -       {0x0000a1e4, 0x00000000},
6694 -       {0x0000a1e8, 0x00000000},
6695 -       {0x0000a1ec, 0x00000000},
6696 -       {0x0000a1f0, 0x00000396},
6697 -       {0x0000a1f4, 0x00000396},
6698 -       {0x0000a1f8, 0x00000396},
6699 -       {0x0000a1fc, 0x00000196},
6700 -       {0x0000b000, 0x00010000},
6701 -       {0x0000b004, 0x00030002},
6702 -       {0x0000b008, 0x00050004},
6703 -       {0x0000b00c, 0x00810080},
6704 -       {0x0000b010, 0x00830082},
6705 -       {0x0000b014, 0x01810180},
6706 -       {0x0000b018, 0x01830182},
6707 -       {0x0000b01c, 0x01850184},
6708 -       {0x0000b020, 0x02810280},
6709 -       {0x0000b024, 0x02830282},
6710 -       {0x0000b028, 0x02850284},
6711 -       {0x0000b02c, 0x02890288},
6712 -       {0x0000b030, 0x028b028a},
6713 -       {0x0000b034, 0x0388028c},
6714 -       {0x0000b038, 0x038a0389},
6715 -       {0x0000b03c, 0x038c038b},
6716 -       {0x0000b040, 0x0390038d},
6717 -       {0x0000b044, 0x03920391},
6718 -       {0x0000b048, 0x03940393},
6719 -       {0x0000b04c, 0x03960395},
6720 -       {0x0000b050, 0x00000000},
6721 -       {0x0000b054, 0x00000000},
6722 -       {0x0000b058, 0x00000000},
6723 -       {0x0000b05c, 0x00000000},
6724 -       {0x0000b060, 0x00000000},
6725 -       {0x0000b064, 0x00000000},
6726 -       {0x0000b068, 0x00000000},
6727 -       {0x0000b06c, 0x00000000},
6728 -       {0x0000b070, 0x00000000},
6729 -       {0x0000b074, 0x00000000},
6730 -       {0x0000b078, 0x00000000},
6731 -       {0x0000b07c, 0x00000000},
6732 -       {0x0000b080, 0x2a2d2f32},
6733 -       {0x0000b084, 0x21232328},
6734 -       {0x0000b088, 0x19191c1e},
6735 -       {0x0000b08c, 0x12141417},
6736 -       {0x0000b090, 0x07070e0e},
6737 -       {0x0000b094, 0x03030305},
6738 -       {0x0000b098, 0x00000003},
6739 -       {0x0000b09c, 0x00000000},
6740 -       {0x0000b0a0, 0x00000000},
6741 -       {0x0000b0a4, 0x00000000},
6742 -       {0x0000b0a8, 0x00000000},
6743 -       {0x0000b0ac, 0x00000000},
6744 -       {0x0000b0b0, 0x00000000},
6745 -       {0x0000b0b4, 0x00000000},
6746 -       {0x0000b0b8, 0x00000000},
6747 -       {0x0000b0bc, 0x00000000},
6748 -       {0x0000b0c0, 0x003f0020},
6749 -       {0x0000b0c4, 0x00400041},
6750 -       {0x0000b0c8, 0x0140005f},
6751 -       {0x0000b0cc, 0x0160015f},
6752 -       {0x0000b0d0, 0x017e017f},
6753 -       {0x0000b0d4, 0x02410242},
6754 -       {0x0000b0d8, 0x025f0240},
6755 -       {0x0000b0dc, 0x027f0260},
6756 -       {0x0000b0e0, 0x0341027e},
6757 -       {0x0000b0e4, 0x035f0340},
6758 -       {0x0000b0e8, 0x037f0360},
6759 -       {0x0000b0ec, 0x04400441},
6760 -       {0x0000b0f0, 0x0460045f},
6761 -       {0x0000b0f4, 0x0541047f},
6762 -       {0x0000b0f8, 0x055f0540},
6763 -       {0x0000b0fc, 0x057f0560},
6764 -       {0x0000b100, 0x06400641},
6765 -       {0x0000b104, 0x0660065f},
6766 -       {0x0000b108, 0x067e067f},
6767 -       {0x0000b10c, 0x07410742},
6768 -       {0x0000b110, 0x075f0740},
6769 -       {0x0000b114, 0x077f0760},
6770 -       {0x0000b118, 0x07800781},
6771 -       {0x0000b11c, 0x07a0079f},
6772 -       {0x0000b120, 0x07c107bf},
6773 -       {0x0000b124, 0x000007c0},
6774 -       {0x0000b128, 0x00000000},
6775 -       {0x0000b12c, 0x00000000},
6776 -       {0x0000b130, 0x00000000},
6777 -       {0x0000b134, 0x00000000},
6778 -       {0x0000b138, 0x00000000},
6779 -       {0x0000b13c, 0x00000000},
6780 -       {0x0000b140, 0x003f0020},
6781 -       {0x0000b144, 0x00400041},
6782 -       {0x0000b148, 0x0140005f},
6783 -       {0x0000b14c, 0x0160015f},
6784 -       {0x0000b150, 0x017e017f},
6785 -       {0x0000b154, 0x02410242},
6786 -       {0x0000b158, 0x025f0240},
6787 -       {0x0000b15c, 0x027f0260},
6788 -       {0x0000b160, 0x0341027e},
6789 -       {0x0000b164, 0x035f0340},
6790 -       {0x0000b168, 0x037f0360},
6791 -       {0x0000b16c, 0x04400441},
6792 -       {0x0000b170, 0x0460045f},
6793 -       {0x0000b174, 0x0541047f},
6794 -       {0x0000b178, 0x055f0540},
6795 -       {0x0000b17c, 0x057f0560},
6796 -       {0x0000b180, 0x06400641},
6797 -       {0x0000b184, 0x0660065f},
6798 -       {0x0000b188, 0x067e067f},
6799 -       {0x0000b18c, 0x07410742},
6800 -       {0x0000b190, 0x075f0740},
6801 -       {0x0000b194, 0x077f0760},
6802 -       {0x0000b198, 0x07800781},
6803 -       {0x0000b19c, 0x07a0079f},
6804 -       {0x0000b1a0, 0x07c107bf},
6805 -       {0x0000b1a4, 0x000007c0},
6806 -       {0x0000b1a8, 0x00000000},
6807 -       {0x0000b1ac, 0x00000000},
6808 -       {0x0000b1b0, 0x00000000},
6809 -       {0x0000b1b4, 0x00000000},
6810 -       {0x0000b1b8, 0x00000000},
6811 -       {0x0000b1bc, 0x00000000},
6812 -       {0x0000b1c0, 0x00000000},
6813 -       {0x0000b1c4, 0x00000000},
6814 -       {0x0000b1c8, 0x00000000},
6815 -       {0x0000b1cc, 0x00000000},
6816 -       {0x0000b1d0, 0x00000000},
6817 -       {0x0000b1d4, 0x00000000},
6818 -       {0x0000b1d8, 0x00000000},
6819 -       {0x0000b1dc, 0x00000000},
6820 -       {0x0000b1e0, 0x00000000},
6821 -       {0x0000b1e4, 0x00000000},
6822 -       {0x0000b1e8, 0x00000000},
6823 -       {0x0000b1ec, 0x00000000},
6824 -       {0x0000b1f0, 0x00000396},
6825 -       {0x0000b1f4, 0x00000396},
6826 -       {0x0000b1f8, 0x00000396},
6827 -       {0x0000b1fc, 0x00000196},
6828 -};
6829 -
6830 -static const u32 ar9462_2p1_common_mixed_rx_gain[][2] = {
6831 -       /* Addr      allmodes  */
6832 -       {0x0000a000, 0x00010000},
6833 -       {0x0000a004, 0x00030002},
6834 -       {0x0000a008, 0x00050004},
6835 -       {0x0000a00c, 0x00810080},
6836 -       {0x0000a010, 0x00830082},
6837 -       {0x0000a014, 0x01810180},
6838 -       {0x0000a018, 0x01830182},
6839 -       {0x0000a01c, 0x01850184},
6840 -       {0x0000a020, 0x01890188},
6841 -       {0x0000a024, 0x018b018a},
6842 -       {0x0000a028, 0x018d018c},
6843 -       {0x0000a02c, 0x03820190},
6844 -       {0x0000a030, 0x03840383},
6845 -       {0x0000a034, 0x03880385},
6846 -       {0x0000a038, 0x038a0389},
6847 -       {0x0000a03c, 0x038c038b},
6848 -       {0x0000a040, 0x0390038d},
6849 -       {0x0000a044, 0x03920391},
6850 -       {0x0000a048, 0x03940393},
6851 -       {0x0000a04c, 0x03960395},
6852 -       {0x0000a050, 0x00000000},
6853 -       {0x0000a054, 0x00000000},
6854 -       {0x0000a058, 0x00000000},
6855 -       {0x0000a05c, 0x00000000},
6856 -       {0x0000a060, 0x00000000},
6857 -       {0x0000a064, 0x00000000},
6858 -       {0x0000a068, 0x00000000},
6859 -       {0x0000a06c, 0x00000000},
6860 -       {0x0000a070, 0x00000000},
6861 -       {0x0000a074, 0x00000000},
6862 -       {0x0000a078, 0x00000000},
6863 -       {0x0000a07c, 0x00000000},
6864 -       {0x0000a080, 0x29292929},
6865 -       {0x0000a084, 0x29292929},
6866 -       {0x0000a088, 0x29292929},
6867 -       {0x0000a08c, 0x29292929},
6868 -       {0x0000a090, 0x22292929},
6869 -       {0x0000a094, 0x1d1d2222},
6870 -       {0x0000a098, 0x0c111117},
6871 -       {0x0000a09c, 0x00030303},
6872 -       {0x0000a0a0, 0x00000000},
6873 -       {0x0000a0a4, 0x00000000},
6874 -       {0x0000a0a8, 0x00000000},
6875 -       {0x0000a0ac, 0x00000000},
6876 -       {0x0000a0b0, 0x00000000},
6877 -       {0x0000a0b4, 0x00000000},
6878 -       {0x0000a0b8, 0x00000000},
6879 -       {0x0000a0bc, 0x00000000},
6880 -       {0x0000a0c0, 0x001f0000},
6881 -       {0x0000a0c4, 0x01000101},
6882 -       {0x0000a0c8, 0x011e011f},
6883 -       {0x0000a0cc, 0x011c011d},
6884 -       {0x0000a0d0, 0x02030204},
6885 -       {0x0000a0d4, 0x02010202},
6886 -       {0x0000a0d8, 0x021f0200},
6887 -       {0x0000a0dc, 0x0302021e},
6888 -       {0x0000a0e0, 0x03000301},
6889 -       {0x0000a0e4, 0x031e031f},
6890 -       {0x0000a0e8, 0x0402031d},
6891 -       {0x0000a0ec, 0x04000401},
6892 -       {0x0000a0f0, 0x041e041f},
6893 -       {0x0000a0f4, 0x0502041d},
6894 -       {0x0000a0f8, 0x05000501},
6895 -       {0x0000a0fc, 0x051e051f},
6896 -       {0x0000a100, 0x06010602},
6897 -       {0x0000a104, 0x061f0600},
6898 -       {0x0000a108, 0x061d061e},
6899 -       {0x0000a10c, 0x07020703},
6900 -       {0x0000a110, 0x07000701},
6901 -       {0x0000a114, 0x00000000},
6902 -       {0x0000a118, 0x00000000},
6903 -       {0x0000a11c, 0x00000000},
6904 -       {0x0000a120, 0x00000000},
6905 -       {0x0000a124, 0x00000000},
6906 -       {0x0000a128, 0x00000000},
6907 -       {0x0000a12c, 0x00000000},
6908 -       {0x0000a130, 0x00000000},
6909 -       {0x0000a134, 0x00000000},
6910 -       {0x0000a138, 0x00000000},
6911 -       {0x0000a13c, 0x00000000},
6912 -       {0x0000a140, 0x001f0000},
6913 -       {0x0000a144, 0x01000101},
6914 -       {0x0000a148, 0x011e011f},
6915 -       {0x0000a14c, 0x011c011d},
6916 -       {0x0000a150, 0x02030204},
6917 -       {0x0000a154, 0x02010202},
6918 -       {0x0000a158, 0x021f0200},
6919 -       {0x0000a15c, 0x0302021e},
6920 -       {0x0000a160, 0x03000301},
6921 -       {0x0000a164, 0x031e031f},
6922 -       {0x0000a168, 0x0402031d},
6923 -       {0x0000a16c, 0x04000401},
6924 -       {0x0000a170, 0x041e041f},
6925 -       {0x0000a174, 0x0502041d},
6926 -       {0x0000a178, 0x05000501},
6927 -       {0x0000a17c, 0x051e051f},
6928 -       {0x0000a180, 0x06010602},
6929 -       {0x0000a184, 0x061f0600},
6930 -       {0x0000a188, 0x061d061e},
6931 -       {0x0000a18c, 0x07020703},
6932 -       {0x0000a190, 0x07000701},
6933 -       {0x0000a194, 0x00000000},
6934 -       {0x0000a198, 0x00000000},
6935 -       {0x0000a19c, 0x00000000},
6936 -       {0x0000a1a0, 0x00000000},
6937 -       {0x0000a1a4, 0x00000000},
6938 -       {0x0000a1a8, 0x00000000},
6939 -       {0x0000a1ac, 0x00000000},
6940 -       {0x0000a1b0, 0x00000000},
6941 -       {0x0000a1b4, 0x00000000},
6942 -       {0x0000a1b8, 0x00000000},
6943 -       {0x0000a1bc, 0x00000000},
6944 -       {0x0000a1c0, 0x00000000},
6945 -       {0x0000a1c4, 0x00000000},
6946 -       {0x0000a1c8, 0x00000000},
6947 -       {0x0000a1cc, 0x00000000},
6948 -       {0x0000a1d0, 0x00000000},
6949 -       {0x0000a1d4, 0x00000000},
6950 -       {0x0000a1d8, 0x00000000},
6951 -       {0x0000a1dc, 0x00000000},
6952 -       {0x0000a1e0, 0x00000000},
6953 -       {0x0000a1e4, 0x00000000},
6954 -       {0x0000a1e8, 0x00000000},
6955 -       {0x0000a1ec, 0x00000000},
6956 -       {0x0000a1f0, 0x00000396},
6957 -       {0x0000a1f4, 0x00000396},
6958 -       {0x0000a1f8, 0x00000396},
6959 -       {0x0000a1fc, 0x00000196},
6960 -       {0x0000b000, 0x00010000},
6961 -       {0x0000b004, 0x00030002},
6962 -       {0x0000b008, 0x00050004},
6963 -       {0x0000b00c, 0x00810080},
6964 -       {0x0000b010, 0x00830082},
6965 -       {0x0000b014, 0x01810180},
6966 -       {0x0000b018, 0x01830182},
6967 -       {0x0000b01c, 0x01850184},
6968 -       {0x0000b020, 0x02810280},
6969 -       {0x0000b024, 0x02830282},
6970 -       {0x0000b028, 0x02850284},
6971 -       {0x0000b02c, 0x02890288},
6972 -       {0x0000b030, 0x028b028a},
6973 -       {0x0000b034, 0x0388028c},
6974 -       {0x0000b038, 0x038a0389},
6975 -       {0x0000b03c, 0x038c038b},
6976 -       {0x0000b040, 0x0390038d},
6977 -       {0x0000b044, 0x03920391},
6978 -       {0x0000b048, 0x03940393},
6979 -       {0x0000b04c, 0x03960395},
6980 -       {0x0000b050, 0x00000000},
6981 -       {0x0000b054, 0x00000000},
6982 -       {0x0000b058, 0x00000000},
6983 -       {0x0000b05c, 0x00000000},
6984 -       {0x0000b060, 0x00000000},
6985 -       {0x0000b064, 0x00000000},
6986 -       {0x0000b068, 0x00000000},
6987 -       {0x0000b06c, 0x00000000},
6988 -       {0x0000b070, 0x00000000},
6989 -       {0x0000b074, 0x00000000},
6990 -       {0x0000b078, 0x00000000},
6991 -       {0x0000b07c, 0x00000000},
6992 -       {0x0000b080, 0x2a2d2f32},
6993 -       {0x0000b084, 0x21232328},
6994 -       {0x0000b088, 0x19191c1e},
6995 -       {0x0000b08c, 0x12141417},
6996 -       {0x0000b090, 0x07070e0e},
6997 -       {0x0000b094, 0x03030305},
6998 -       {0x0000b098, 0x00000003},
6999 -       {0x0000b09c, 0x00000000},
7000 -       {0x0000b0a0, 0x00000000},
7001 -       {0x0000b0a4, 0x00000000},
7002 -       {0x0000b0a8, 0x00000000},
7003 -       {0x0000b0ac, 0x00000000},
7004 -       {0x0000b0b0, 0x00000000},
7005 -       {0x0000b0b4, 0x00000000},
7006 -       {0x0000b0b8, 0x00000000},
7007 -       {0x0000b0bc, 0x00000000},
7008 -       {0x0000b0c0, 0x003f0020},
7009 -       {0x0000b0c4, 0x00400041},
7010 -       {0x0000b0c8, 0x0140005f},
7011 -       {0x0000b0cc, 0x0160015f},
7012 -       {0x0000b0d0, 0x017e017f},
7013 -       {0x0000b0d4, 0x02410242},
7014 -       {0x0000b0d8, 0x025f0240},
7015 -       {0x0000b0dc, 0x027f0260},
7016 -       {0x0000b0e0, 0x0341027e},
7017 -       {0x0000b0e4, 0x035f0340},
7018 -       {0x0000b0e8, 0x037f0360},
7019 -       {0x0000b0ec, 0x04400441},
7020 -       {0x0000b0f0, 0x0460045f},
7021 -       {0x0000b0f4, 0x0541047f},
7022 -       {0x0000b0f8, 0x055f0540},
7023 -       {0x0000b0fc, 0x057f0560},
7024 -       {0x0000b100, 0x06400641},
7025 -       {0x0000b104, 0x0660065f},
7026 -       {0x0000b108, 0x067e067f},
7027 -       {0x0000b10c, 0x07410742},
7028 -       {0x0000b110, 0x075f0740},
7029 -       {0x0000b114, 0x077f0760},
7030 -       {0x0000b118, 0x07800781},
7031 -       {0x0000b11c, 0x07a0079f},
7032 -       {0x0000b120, 0x07c107bf},
7033 -       {0x0000b124, 0x000007c0},
7034 -       {0x0000b128, 0x00000000},
7035 -       {0x0000b12c, 0x00000000},
7036 -       {0x0000b130, 0x00000000},
7037 -       {0x0000b134, 0x00000000},
7038 -       {0x0000b138, 0x00000000},
7039 -       {0x0000b13c, 0x00000000},
7040 -       {0x0000b140, 0x003f0020},
7041 -       {0x0000b144, 0x00400041},
7042 -       {0x0000b148, 0x0140005f},
7043 -       {0x0000b14c, 0x0160015f},
7044 -       {0x0000b150, 0x017e017f},
7045 -       {0x0000b154, 0x02410242},
7046 -       {0x0000b158, 0x025f0240},
7047 -       {0x0000b15c, 0x027f0260},
7048 -       {0x0000b160, 0x0341027e},
7049 -       {0x0000b164, 0x035f0340},
7050 -       {0x0000b168, 0x037f0360},
7051 -       {0x0000b16c, 0x04400441},
7052 -       {0x0000b170, 0x0460045f},
7053 -       {0x0000b174, 0x0541047f},
7054 -       {0x0000b178, 0x055f0540},
7055 -       {0x0000b17c, 0x057f0560},
7056 -       {0x0000b180, 0x06400641},
7057 -       {0x0000b184, 0x0660065f},
7058 -       {0x0000b188, 0x067e067f},
7059 -       {0x0000b18c, 0x07410742},
7060 -       {0x0000b190, 0x075f0740},
7061 -       {0x0000b194, 0x077f0760},
7062 -       {0x0000b198, 0x07800781},
7063 -       {0x0000b19c, 0x07a0079f},
7064 -       {0x0000b1a0, 0x07c107bf},
7065 -       {0x0000b1a4, 0x000007c0},
7066 -       {0x0000b1a8, 0x00000000},
7067 -       {0x0000b1ac, 0x00000000},
7068 -       {0x0000b1b0, 0x00000000},
7069 -       {0x0000b1b4, 0x00000000},
7070 -       {0x0000b1b8, 0x00000000},
7071 -       {0x0000b1bc, 0x00000000},
7072 -       {0x0000b1c0, 0x00000000},
7073 -       {0x0000b1c4, 0x00000000},
7074 -       {0x0000b1c8, 0x00000000},
7075 -       {0x0000b1cc, 0x00000000},
7076 -       {0x0000b1d0, 0x00000000},
7077 -       {0x0000b1d4, 0x00000000},
7078 -       {0x0000b1d8, 0x00000000},
7079 -       {0x0000b1dc, 0x00000000},
7080 -       {0x0000b1e0, 0x00000000},
7081 -       {0x0000b1e4, 0x00000000},
7082 -       {0x0000b1e8, 0x00000000},
7083 -       {0x0000b1ec, 0x00000000},
7084 -       {0x0000b1f0, 0x00000396},
7085 -       {0x0000b1f4, 0x00000396},
7086 -       {0x0000b1f8, 0x00000396},
7087 -       {0x0000b1fc, 0x00000196},
7088 -};
7089 -
7090 -static const u32 ar9462_2p1_baseband_core_mix_rxgain[][2] = {
7091 -       /* Addr      allmodes  */
7092 -       {0x00009fd0, 0x0a2d6b93},
7093 -};
7094 -
7095 -static const u32 ar9462_2p1_baseband_postamble_mix_rxgain[][5] = {
7096 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7097 -       {0x00009820, 0x206a022e, 0x206a022e, 0x206a01ae, 0x206a01ae},
7098 -       {0x00009824, 0x63c640de, 0x5ac640d0, 0x63c640da, 0x63c640da},
7099 -       {0x00009828, 0x0796be89, 0x0696b081, 0x0916be81, 0x0916be81},
7100 -       {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000d8, 0x6c4000d8},
7101 -       {0x00009e10, 0x92c88d2e, 0x7ec88d2e, 0x7ec86d2e, 0x7ec86d2e},
7102 -       {0x00009e14, 0x37b95d5e, 0x37b9605e, 0x3236605e, 0x32395c5e},
7103 -};
7104 -
7105 -static const u32 ar9462_2p1_baseband_postamble_5g_xlna[][5] = {
7106 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7107 -       {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
7108 -};
7109 -
7110 -static const u32 ar9462_2p1_common_wo_xlna_rx_gain[][2] = {
7111 -       /* Addr      allmodes  */
7112 -       {0x0000a000, 0x00010000},
7113 -       {0x0000a004, 0x00030002},
7114 -       {0x0000a008, 0x00050004},
7115 -       {0x0000a00c, 0x00810080},
7116 -       {0x0000a010, 0x00830082},
7117 -       {0x0000a014, 0x01810180},
7118 -       {0x0000a018, 0x01830182},
7119 -       {0x0000a01c, 0x01850184},
7120 -       {0x0000a020, 0x01890188},
7121 -       {0x0000a024, 0x018b018a},
7122 -       {0x0000a028, 0x018d018c},
7123 -       {0x0000a02c, 0x03820190},
7124 -       {0x0000a030, 0x03840383},
7125 -       {0x0000a034, 0x03880385},
7126 -       {0x0000a038, 0x038a0389},
7127 -       {0x0000a03c, 0x038c038b},
7128 -       {0x0000a040, 0x0390038d},
7129 -       {0x0000a044, 0x03920391},
7130 -       {0x0000a048, 0x03940393},
7131 -       {0x0000a04c, 0x03960395},
7132 -       {0x0000a050, 0x00000000},
7133 -       {0x0000a054, 0x00000000},
7134 -       {0x0000a058, 0x00000000},
7135 -       {0x0000a05c, 0x00000000},
7136 -       {0x0000a060, 0x00000000},
7137 -       {0x0000a064, 0x00000000},
7138 -       {0x0000a068, 0x00000000},
7139 -       {0x0000a06c, 0x00000000},
7140 -       {0x0000a070, 0x00000000},
7141 -       {0x0000a074, 0x00000000},
7142 -       {0x0000a078, 0x00000000},
7143 -       {0x0000a07c, 0x00000000},
7144 -       {0x0000a080, 0x29292929},
7145 -       {0x0000a084, 0x29292929},
7146 -       {0x0000a088, 0x29292929},
7147 -       {0x0000a08c, 0x29292929},
7148 -       {0x0000a090, 0x22292929},
7149 -       {0x0000a094, 0x1d1d2222},
7150 -       {0x0000a098, 0x0c111117},
7151 -       {0x0000a09c, 0x00030303},
7152 -       {0x0000a0a0, 0x00000000},
7153 -       {0x0000a0a4, 0x00000000},
7154 -       {0x0000a0a8, 0x00000000},
7155 -       {0x0000a0ac, 0x00000000},
7156 -       {0x0000a0b0, 0x00000000},
7157 -       {0x0000a0b4, 0x00000000},
7158 -       {0x0000a0b8, 0x00000000},
7159 -       {0x0000a0bc, 0x00000000},
7160 -       {0x0000a0c0, 0x001f0000},
7161 -       {0x0000a0c4, 0x01000101},
7162 -       {0x0000a0c8, 0x011e011f},
7163 -       {0x0000a0cc, 0x011c011d},
7164 -       {0x0000a0d0, 0x02030204},
7165 -       {0x0000a0d4, 0x02010202},
7166 -       {0x0000a0d8, 0x021f0200},
7167 -       {0x0000a0dc, 0x0302021e},
7168 -       {0x0000a0e0, 0x03000301},
7169 -       {0x0000a0e4, 0x031e031f},
7170 -       {0x0000a0e8, 0x0402031d},
7171 -       {0x0000a0ec, 0x04000401},
7172 -       {0x0000a0f0, 0x041e041f},
7173 -       {0x0000a0f4, 0x0502041d},
7174 -       {0x0000a0f8, 0x05000501},
7175 -       {0x0000a0fc, 0x051e051f},
7176 -       {0x0000a100, 0x06010602},
7177 -       {0x0000a104, 0x061f0600},
7178 -       {0x0000a108, 0x061d061e},
7179 -       {0x0000a10c, 0x07020703},
7180 -       {0x0000a110, 0x07000701},
7181 -       {0x0000a114, 0x00000000},
7182 -       {0x0000a118, 0x00000000},
7183 -       {0x0000a11c, 0x00000000},
7184 -       {0x0000a120, 0x00000000},
7185 -       {0x0000a124, 0x00000000},
7186 -       {0x0000a128, 0x00000000},
7187 -       {0x0000a12c, 0x00000000},
7188 -       {0x0000a130, 0x00000000},
7189 -       {0x0000a134, 0x00000000},
7190 -       {0x0000a138, 0x00000000},
7191 -       {0x0000a13c, 0x00000000},
7192 -       {0x0000a140, 0x001f0000},
7193 -       {0x0000a144, 0x01000101},
7194 -       {0x0000a148, 0x011e011f},
7195 -       {0x0000a14c, 0x011c011d},
7196 -       {0x0000a150, 0x02030204},
7197 -       {0x0000a154, 0x02010202},
7198 -       {0x0000a158, 0x021f0200},
7199 -       {0x0000a15c, 0x0302021e},
7200 -       {0x0000a160, 0x03000301},
7201 -       {0x0000a164, 0x031e031f},
7202 -       {0x0000a168, 0x0402031d},
7203 -       {0x0000a16c, 0x04000401},
7204 -       {0x0000a170, 0x041e041f},
7205 -       {0x0000a174, 0x0502041d},
7206 -       {0x0000a178, 0x05000501},
7207 -       {0x0000a17c, 0x051e051f},
7208 -       {0x0000a180, 0x06010602},
7209 -       {0x0000a184, 0x061f0600},
7210 -       {0x0000a188, 0x061d061e},
7211 -       {0x0000a18c, 0x07020703},
7212 -       {0x0000a190, 0x07000701},
7213 -       {0x0000a194, 0x00000000},
7214 -       {0x0000a198, 0x00000000},
7215 -       {0x0000a19c, 0x00000000},
7216 -       {0x0000a1a0, 0x00000000},
7217 -       {0x0000a1a4, 0x00000000},
7218 -       {0x0000a1a8, 0x00000000},
7219 -       {0x0000a1ac, 0x00000000},
7220 -       {0x0000a1b0, 0x00000000},
7221 -       {0x0000a1b4, 0x00000000},
7222 -       {0x0000a1b8, 0x00000000},
7223 -       {0x0000a1bc, 0x00000000},
7224 -       {0x0000a1c0, 0x00000000},
7225 -       {0x0000a1c4, 0x00000000},
7226 -       {0x0000a1c8, 0x00000000},
7227 -       {0x0000a1cc, 0x00000000},
7228 -       {0x0000a1d0, 0x00000000},
7229 -       {0x0000a1d4, 0x00000000},
7230 -       {0x0000a1d8, 0x00000000},
7231 -       {0x0000a1dc, 0x00000000},
7232 -       {0x0000a1e0, 0x00000000},
7233 -       {0x0000a1e4, 0x00000000},
7234 -       {0x0000a1e8, 0x00000000},
7235 -       {0x0000a1ec, 0x00000000},
7236 -       {0x0000a1f0, 0x00000396},
7237 -       {0x0000a1f4, 0x00000396},
7238 -       {0x0000a1f8, 0x00000396},
7239 -       {0x0000a1fc, 0x00000196},
7240 -       {0x0000b000, 0x00010000},
7241 -       {0x0000b004, 0x00030002},
7242 -       {0x0000b008, 0x00050004},
7243 -       {0x0000b00c, 0x00810080},
7244 -       {0x0000b010, 0x00830082},
7245 -       {0x0000b014, 0x01810180},
7246 -       {0x0000b018, 0x01830182},
7247 -       {0x0000b01c, 0x01850184},
7248 -       {0x0000b020, 0x02810280},
7249 -       {0x0000b024, 0x02830282},
7250 -       {0x0000b028, 0x02850284},
7251 -       {0x0000b02c, 0x02890288},
7252 -       {0x0000b030, 0x028b028a},
7253 -       {0x0000b034, 0x0388028c},
7254 -       {0x0000b038, 0x038a0389},
7255 -       {0x0000b03c, 0x038c038b},
7256 -       {0x0000b040, 0x0390038d},
7257 -       {0x0000b044, 0x03920391},
7258 -       {0x0000b048, 0x03940393},
7259 -       {0x0000b04c, 0x03960395},
7260 -       {0x0000b050, 0x00000000},
7261 -       {0x0000b054, 0x00000000},
7262 -       {0x0000b058, 0x00000000},
7263 -       {0x0000b05c, 0x00000000},
7264 -       {0x0000b060, 0x00000000},
7265 -       {0x0000b064, 0x00000000},
7266 -       {0x0000b068, 0x00000000},
7267 -       {0x0000b06c, 0x00000000},
7268 -       {0x0000b070, 0x00000000},
7269 -       {0x0000b074, 0x00000000},
7270 -       {0x0000b078, 0x00000000},
7271 -       {0x0000b07c, 0x00000000},
7272 -       {0x0000b080, 0x32323232},
7273 -       {0x0000b084, 0x2f2f3232},
7274 -       {0x0000b088, 0x23282a2d},
7275 -       {0x0000b08c, 0x1c1e2123},
7276 -       {0x0000b090, 0x14171919},
7277 -       {0x0000b094, 0x0e0e1214},
7278 -       {0x0000b098, 0x03050707},
7279 -       {0x0000b09c, 0x00030303},
7280 -       {0x0000b0a0, 0x00000000},
7281 -       {0x0000b0a4, 0x00000000},
7282 -       {0x0000b0a8, 0x00000000},
7283 -       {0x0000b0ac, 0x00000000},
7284 -       {0x0000b0b0, 0x00000000},
7285 -       {0x0000b0b4, 0x00000000},
7286 -       {0x0000b0b8, 0x00000000},
7287 -       {0x0000b0bc, 0x00000000},
7288 -       {0x0000b0c0, 0x003f0020},
7289 -       {0x0000b0c4, 0x00400041},
7290 -       {0x0000b0c8, 0x0140005f},
7291 -       {0x0000b0cc, 0x0160015f},
7292 -       {0x0000b0d0, 0x017e017f},
7293 -       {0x0000b0d4, 0x02410242},
7294 -       {0x0000b0d8, 0x025f0240},
7295 -       {0x0000b0dc, 0x027f0260},
7296 -       {0x0000b0e0, 0x0341027e},
7297 -       {0x0000b0e4, 0x035f0340},
7298 -       {0x0000b0e8, 0x037f0360},
7299 -       {0x0000b0ec, 0x04400441},
7300 -       {0x0000b0f0, 0x0460045f},
7301 -       {0x0000b0f4, 0x0541047f},
7302 -       {0x0000b0f8, 0x055f0540},
7303 -       {0x0000b0fc, 0x057f0560},
7304 -       {0x0000b100, 0x06400641},
7305 -       {0x0000b104, 0x0660065f},
7306 -       {0x0000b108, 0x067e067f},
7307 -       {0x0000b10c, 0x07410742},
7308 -       {0x0000b110, 0x075f0740},
7309 -       {0x0000b114, 0x077f0760},
7310 -       {0x0000b118, 0x07800781},
7311 -       {0x0000b11c, 0x07a0079f},
7312 -       {0x0000b120, 0x07c107bf},
7313 -       {0x0000b124, 0x000007c0},
7314 -       {0x0000b128, 0x00000000},
7315 -       {0x0000b12c, 0x00000000},
7316 -       {0x0000b130, 0x00000000},
7317 -       {0x0000b134, 0x00000000},
7318 -       {0x0000b138, 0x00000000},
7319 -       {0x0000b13c, 0x00000000},
7320 -       {0x0000b140, 0x003f0020},
7321 -       {0x0000b144, 0x00400041},
7322 -       {0x0000b148, 0x0140005f},
7323 -       {0x0000b14c, 0x0160015f},
7324 -       {0x0000b150, 0x017e017f},
7325 -       {0x0000b154, 0x02410242},
7326 -       {0x0000b158, 0x025f0240},
7327 -       {0x0000b15c, 0x027f0260},
7328 -       {0x0000b160, 0x0341027e},
7329 -       {0x0000b164, 0x035f0340},
7330 -       {0x0000b168, 0x037f0360},
7331 -       {0x0000b16c, 0x04400441},
7332 -       {0x0000b170, 0x0460045f},
7333 -       {0x0000b174, 0x0541047f},
7334 -       {0x0000b178, 0x055f0540},
7335 -       {0x0000b17c, 0x057f0560},
7336 -       {0x0000b180, 0x06400641},
7337 -       {0x0000b184, 0x0660065f},
7338 -       {0x0000b188, 0x067e067f},
7339 -       {0x0000b18c, 0x07410742},
7340 -       {0x0000b190, 0x075f0740},
7341 -       {0x0000b194, 0x077f0760},
7342 -       {0x0000b198, 0x07800781},
7343 -       {0x0000b19c, 0x07a0079f},
7344 -       {0x0000b1a0, 0x07c107bf},
7345 -       {0x0000b1a4, 0x000007c0},
7346 -       {0x0000b1a8, 0x00000000},
7347 -       {0x0000b1ac, 0x00000000},
7348 -       {0x0000b1b0, 0x00000000},
7349 -       {0x0000b1b4, 0x00000000},
7350 -       {0x0000b1b8, 0x00000000},
7351 -       {0x0000b1bc, 0x00000000},
7352 -       {0x0000b1c0, 0x00000000},
7353 -       {0x0000b1c4, 0x00000000},
7354 -       {0x0000b1c8, 0x00000000},
7355 -       {0x0000b1cc, 0x00000000},
7356 -       {0x0000b1d0, 0x00000000},
7357 -       {0x0000b1d4, 0x00000000},
7358 -       {0x0000b1d8, 0x00000000},
7359 -       {0x0000b1dc, 0x00000000},
7360 -       {0x0000b1e0, 0x00000000},
7361 -       {0x0000b1e4, 0x00000000},
7362 -       {0x0000b1e8, 0x00000000},
7363 -       {0x0000b1ec, 0x00000000},
7364 -       {0x0000b1f0, 0x00000396},
7365 -       {0x0000b1f4, 0x00000396},
7366 -       {0x0000b1f8, 0x00000396},
7367 -       {0x0000b1fc, 0x00000196},
7368 -};
7369 -
7370 -static const u32 ar9462_2p1_common_5g_xlna_only_rx_gain[][2] = {
7371 -       /* Addr      allmodes  */
7372 -       {0x0000a000, 0x00010000},
7373 -       {0x0000a004, 0x00030002},
7374 -       {0x0000a008, 0x00050004},
7375 -       {0x0000a00c, 0x00810080},
7376 -       {0x0000a010, 0x00830082},
7377 -       {0x0000a014, 0x01810180},
7378 -       {0x0000a018, 0x01830182},
7379 -       {0x0000a01c, 0x01850184},
7380 -       {0x0000a020, 0x01890188},
7381 -       {0x0000a024, 0x018b018a},
7382 -       {0x0000a028, 0x018d018c},
7383 -       {0x0000a02c, 0x03820190},
7384 -       {0x0000a030, 0x03840383},
7385 -       {0x0000a034, 0x03880385},
7386 -       {0x0000a038, 0x038a0389},
7387 -       {0x0000a03c, 0x038c038b},
7388 -       {0x0000a040, 0x0390038d},
7389 -       {0x0000a044, 0x03920391},
7390 -       {0x0000a048, 0x03940393},
7391 -       {0x0000a04c, 0x03960395},
7392 -       {0x0000a050, 0x00000000},
7393 -       {0x0000a054, 0x00000000},
7394 -       {0x0000a058, 0x00000000},
7395 -       {0x0000a05c, 0x00000000},
7396 -       {0x0000a060, 0x00000000},
7397 -       {0x0000a064, 0x00000000},
7398 -       {0x0000a068, 0x00000000},
7399 -       {0x0000a06c, 0x00000000},
7400 -       {0x0000a070, 0x00000000},
7401 -       {0x0000a074, 0x00000000},
7402 -       {0x0000a078, 0x00000000},
7403 -       {0x0000a07c, 0x00000000},
7404 -       {0x0000a080, 0x29292929},
7405 -       {0x0000a084, 0x29292929},
7406 -       {0x0000a088, 0x29292929},
7407 -       {0x0000a08c, 0x29292929},
7408 -       {0x0000a090, 0x22292929},
7409 -       {0x0000a094, 0x1d1d2222},
7410 -       {0x0000a098, 0x0c111117},
7411 -       {0x0000a09c, 0x00030303},
7412 -       {0x0000a0a0, 0x00000000},
7413 -       {0x0000a0a4, 0x00000000},
7414 -       {0x0000a0a8, 0x00000000},
7415 -       {0x0000a0ac, 0x00000000},
7416 -       {0x0000a0b0, 0x00000000},
7417 -       {0x0000a0b4, 0x00000000},
7418 -       {0x0000a0b8, 0x00000000},
7419 -       {0x0000a0bc, 0x00000000},
7420 -       {0x0000a0c0, 0x001f0000},
7421 -       {0x0000a0c4, 0x01000101},
7422 -       {0x0000a0c8, 0x011e011f},
7423 -       {0x0000a0cc, 0x011c011d},
7424 -       {0x0000a0d0, 0x02030204},
7425 -       {0x0000a0d4, 0x02010202},
7426 -       {0x0000a0d8, 0x021f0200},
7427 -       {0x0000a0dc, 0x0302021e},
7428 -       {0x0000a0e0, 0x03000301},
7429 -       {0x0000a0e4, 0x031e031f},
7430 -       {0x0000a0e8, 0x0402031d},
7431 -       {0x0000a0ec, 0x04000401},
7432 -       {0x0000a0f0, 0x041e041f},
7433 -       {0x0000a0f4, 0x0502041d},
7434 -       {0x0000a0f8, 0x05000501},
7435 -       {0x0000a0fc, 0x051e051f},
7436 -       {0x0000a100, 0x06010602},
7437 -       {0x0000a104, 0x061f0600},
7438 -       {0x0000a108, 0x061d061e},
7439 -       {0x0000a10c, 0x07020703},
7440 -       {0x0000a110, 0x07000701},
7441 -       {0x0000a114, 0x00000000},
7442 -       {0x0000a118, 0x00000000},
7443 -       {0x0000a11c, 0x00000000},
7444 -       {0x0000a120, 0x00000000},
7445 -       {0x0000a124, 0x00000000},
7446 -       {0x0000a128, 0x00000000},
7447 -       {0x0000a12c, 0x00000000},
7448 -       {0x0000a130, 0x00000000},
7449 -       {0x0000a134, 0x00000000},
7450 -       {0x0000a138, 0x00000000},
7451 -       {0x0000a13c, 0x00000000},
7452 -       {0x0000a140, 0x001f0000},
7453 -       {0x0000a144, 0x01000101},
7454 -       {0x0000a148, 0x011e011f},
7455 -       {0x0000a14c, 0x011c011d},
7456 -       {0x0000a150, 0x02030204},
7457 -       {0x0000a154, 0x02010202},
7458 -       {0x0000a158, 0x021f0200},
7459 -       {0x0000a15c, 0x0302021e},
7460 -       {0x0000a160, 0x03000301},
7461 -       {0x0000a164, 0x031e031f},
7462 -       {0x0000a168, 0x0402031d},
7463 -       {0x0000a16c, 0x04000401},
7464 -       {0x0000a170, 0x041e041f},
7465 -       {0x0000a174, 0x0502041d},
7466 -       {0x0000a178, 0x05000501},
7467 -       {0x0000a17c, 0x051e051f},
7468 -       {0x0000a180, 0x06010602},
7469 -       {0x0000a184, 0x061f0600},
7470 -       {0x0000a188, 0x061d061e},
7471 -       {0x0000a18c, 0x07020703},
7472 -       {0x0000a190, 0x07000701},
7473 -       {0x0000a194, 0x00000000},
7474 -       {0x0000a198, 0x00000000},
7475 -       {0x0000a19c, 0x00000000},
7476 -       {0x0000a1a0, 0x00000000},
7477 -       {0x0000a1a4, 0x00000000},
7478 -       {0x0000a1a8, 0x00000000},
7479 -       {0x0000a1ac, 0x00000000},
7480 -       {0x0000a1b0, 0x00000000},
7481 -       {0x0000a1b4, 0x00000000},
7482 -       {0x0000a1b8, 0x00000000},
7483 -       {0x0000a1bc, 0x00000000},
7484 -       {0x0000a1c0, 0x00000000},
7485 -       {0x0000a1c4, 0x00000000},
7486 -       {0x0000a1c8, 0x00000000},
7487 -       {0x0000a1cc, 0x00000000},
7488 -       {0x0000a1d0, 0x00000000},
7489 -       {0x0000a1d4, 0x00000000},
7490 -       {0x0000a1d8, 0x00000000},
7491 -       {0x0000a1dc, 0x00000000},
7492 -       {0x0000a1e0, 0x00000000},
7493 -       {0x0000a1e4, 0x00000000},
7494 -       {0x0000a1e8, 0x00000000},
7495 -       {0x0000a1ec, 0x00000000},
7496 -       {0x0000a1f0, 0x00000396},
7497 -       {0x0000a1f4, 0x00000396},
7498 -       {0x0000a1f8, 0x00000396},
7499 -       {0x0000a1fc, 0x00000196},
7500 -       {0x0000b000, 0x00010000},
7501 -       {0x0000b004, 0x00030002},
7502 -       {0x0000b008, 0x00050004},
7503 -       {0x0000b00c, 0x00810080},
7504 -       {0x0000b010, 0x00830082},
7505 -       {0x0000b014, 0x01810180},
7506 -       {0x0000b018, 0x01830182},
7507 -       {0x0000b01c, 0x01850184},
7508 -       {0x0000b020, 0x02810280},
7509 -       {0x0000b024, 0x02830282},
7510 -       {0x0000b028, 0x02850284},
7511 -       {0x0000b02c, 0x02890288},
7512 -       {0x0000b030, 0x028b028a},
7513 -       {0x0000b034, 0x0388028c},
7514 -       {0x0000b038, 0x038a0389},
7515 -       {0x0000b03c, 0x038c038b},
7516 -       {0x0000b040, 0x0390038d},
7517 -       {0x0000b044, 0x03920391},
7518 -       {0x0000b048, 0x03940393},
7519 -       {0x0000b04c, 0x03960395},
7520 -       {0x0000b050, 0x00000000},
7521 -       {0x0000b054, 0x00000000},
7522 -       {0x0000b058, 0x00000000},
7523 -       {0x0000b05c, 0x00000000},
7524 -       {0x0000b060, 0x00000000},
7525 -       {0x0000b064, 0x00000000},
7526 -       {0x0000b068, 0x00000000},
7527 -       {0x0000b06c, 0x00000000},
7528 -       {0x0000b070, 0x00000000},
7529 -       {0x0000b074, 0x00000000},
7530 -       {0x0000b078, 0x00000000},
7531 -       {0x0000b07c, 0x00000000},
7532 -       {0x0000b080, 0x2a2d2f32},
7533 -       {0x0000b084, 0x21232328},
7534 -       {0x0000b088, 0x19191c1e},
7535 -       {0x0000b08c, 0x12141417},
7536 -       {0x0000b090, 0x07070e0e},
7537 -       {0x0000b094, 0x03030305},
7538 -       {0x0000b098, 0x00000003},
7539 -       {0x0000b09c, 0x00000000},
7540 -       {0x0000b0a0, 0x00000000},
7541 -       {0x0000b0a4, 0x00000000},
7542 -       {0x0000b0a8, 0x00000000},
7543 -       {0x0000b0ac, 0x00000000},
7544 -       {0x0000b0b0, 0x00000000},
7545 -       {0x0000b0b4, 0x00000000},
7546 -       {0x0000b0b8, 0x00000000},
7547 -       {0x0000b0bc, 0x00000000},
7548 -       {0x0000b0c0, 0x003f0020},
7549 -       {0x0000b0c4, 0x00400041},
7550 -       {0x0000b0c8, 0x0140005f},
7551 -       {0x0000b0cc, 0x0160015f},
7552 -       {0x0000b0d0, 0x017e017f},
7553 -       {0x0000b0d4, 0x02410242},
7554 -       {0x0000b0d8, 0x025f0240},
7555 -       {0x0000b0dc, 0x027f0260},
7556 -       {0x0000b0e0, 0x0341027e},
7557 -       {0x0000b0e4, 0x035f0340},
7558 -       {0x0000b0e8, 0x037f0360},
7559 -       {0x0000b0ec, 0x04400441},
7560 -       {0x0000b0f0, 0x0460045f},
7561 -       {0x0000b0f4, 0x0541047f},
7562 -       {0x0000b0f8, 0x055f0540},
7563 -       {0x0000b0fc, 0x057f0560},
7564 -       {0x0000b100, 0x06400641},
7565 -       {0x0000b104, 0x0660065f},
7566 -       {0x0000b108, 0x067e067f},
7567 -       {0x0000b10c, 0x07410742},
7568 -       {0x0000b110, 0x075f0740},
7569 -       {0x0000b114, 0x077f0760},
7570 -       {0x0000b118, 0x07800781},
7571 -       {0x0000b11c, 0x07a0079f},
7572 -       {0x0000b120, 0x07c107bf},
7573 -       {0x0000b124, 0x000007c0},
7574 -       {0x0000b128, 0x00000000},
7575 -       {0x0000b12c, 0x00000000},
7576 -       {0x0000b130, 0x00000000},
7577 -       {0x0000b134, 0x00000000},
7578 -       {0x0000b138, 0x00000000},
7579 -       {0x0000b13c, 0x00000000},
7580 -       {0x0000b140, 0x003f0020},
7581 -       {0x0000b144, 0x00400041},
7582 -       {0x0000b148, 0x0140005f},
7583 -       {0x0000b14c, 0x0160015f},
7584 -       {0x0000b150, 0x017e017f},
7585 -       {0x0000b154, 0x02410242},
7586 -       {0x0000b158, 0x025f0240},
7587 -       {0x0000b15c, 0x027f0260},
7588 -       {0x0000b160, 0x0341027e},
7589 -       {0x0000b164, 0x035f0340},
7590 -       {0x0000b168, 0x037f0360},
7591 -       {0x0000b16c, 0x04400441},
7592 -       {0x0000b170, 0x0460045f},
7593 -       {0x0000b174, 0x0541047f},
7594 -       {0x0000b178, 0x055f0540},
7595 -       {0x0000b17c, 0x057f0560},
7596 -       {0x0000b180, 0x06400641},
7597 -       {0x0000b184, 0x0660065f},
7598 -       {0x0000b188, 0x067e067f},
7599 -       {0x0000b18c, 0x07410742},
7600 -       {0x0000b190, 0x075f0740},
7601 -       {0x0000b194, 0x077f0760},
7602 -       {0x0000b198, 0x07800781},
7603 -       {0x0000b19c, 0x07a0079f},
7604 -       {0x0000b1a0, 0x07c107bf},
7605 -       {0x0000b1a4, 0x000007c0},
7606 -       {0x0000b1a8, 0x00000000},
7607 -       {0x0000b1ac, 0x00000000},
7608 -       {0x0000b1b0, 0x00000000},
7609 -       {0x0000b1b4, 0x00000000},
7610 -       {0x0000b1b8, 0x00000000},
7611 -       {0x0000b1bc, 0x00000000},
7612 -       {0x0000b1c0, 0x00000000},
7613 -       {0x0000b1c4, 0x00000000},
7614 -       {0x0000b1c8, 0x00000000},
7615 -       {0x0000b1cc, 0x00000000},
7616 -       {0x0000b1d0, 0x00000000},
7617 -       {0x0000b1d4, 0x00000000},
7618 -       {0x0000b1d8, 0x00000000},
7619 -       {0x0000b1dc, 0x00000000},
7620 -       {0x0000b1e0, 0x00000000},
7621 -       {0x0000b1e4, 0x00000000},
7622 -       {0x0000b1e8, 0x00000000},
7623 -       {0x0000b1ec, 0x00000000},
7624 -       {0x0000b1f0, 0x00000396},
7625 -       {0x0000b1f4, 0x00000396},
7626 -       {0x0000b1f8, 0x00000396},
7627 -       {0x0000b1fc, 0x00000196},
7628 -};
7629 -
7630 -static const u32 ar9462_2p1_modes_low_ob_db_tx_gain[][5] = {
7631 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7632 -       {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7633 -       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
7634 -       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
7635 -       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
7636 -       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7637 -       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
7638 -       {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7639 -       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7640 -       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
7641 -       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
7642 -       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
7643 -       {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
7644 -       {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
7645 -       {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
7646 -       {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
7647 -       {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
7648 -       {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
7649 -       {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
7650 -       {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
7651 -       {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
7652 -       {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
7653 -       {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
7654 -       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
7655 -       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
7656 -       {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
7657 -       {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
7658 -       {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
7659 -       {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
7660 -       {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
7661 -       {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
7662 -       {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
7663 -       {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
7664 -       {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7665 -       {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7666 -       {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7667 -       {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7668 -       {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7669 -       {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7670 -       {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
7671 -       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7672 -       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7673 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7674 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7675 -       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7676 -       {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
7677 -       {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
7678 -       {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
7679 -       {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
7680 -       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
7681 -       {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
7682 -       {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
7683 -       {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
7684 -       {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
7685 -       {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
7686 -       {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
7687 -       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
7688 -       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
7689 -       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
7690 -       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7691 -       {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
7692 -       {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
7693 -       {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
7694 -       {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
7695 -       {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
7696 -       {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
7697 -};
7698 -
7699 -static const u32 ar9462_2p1_modes_high_ob_db_tx_gain[][5] = {
7700 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7701 -       {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7702 -       {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7703 -       {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
7704 -       {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
7705 -       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7706 -       {0x0000a410, 0x000050da, 0x000050da, 0x000050de, 0x000050de},
7707 -       {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7708 -       {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
7709 -       {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
7710 -       {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
7711 -       {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
7712 -       {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
7713 -       {0x0000a514, 0x18022622, 0x18022622, 0x11000400, 0x11000400},
7714 -       {0x0000a518, 0x1b022822, 0x1b022822, 0x15000402, 0x15000402},
7715 -       {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
7716 -       {0x0000a520, 0x22022c41, 0x22022c41, 0x1b000603, 0x1b000603},
7717 -       {0x0000a524, 0x28023042, 0x28023042, 0x1f000a02, 0x1f000a02},
7718 -       {0x0000a528, 0x2c023044, 0x2c023044, 0x23000a04, 0x23000a04},
7719 -       {0x0000a52c, 0x2f023644, 0x2f023644, 0x26000a20, 0x26000a20},
7720 -       {0x0000a530, 0x34025643, 0x34025643, 0x2a000e20, 0x2a000e20},
7721 -       {0x0000a534, 0x38025a44, 0x38025a44, 0x2e000e22, 0x2e000e22},
7722 -       {0x0000a538, 0x3b025e45, 0x3b025e45, 0x31000e24, 0x31000e24},
7723 -       {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x34001640, 0x34001640},
7724 -       {0x0000a540, 0x48025e6c, 0x48025e6c, 0x38001660, 0x38001660},
7725 -       {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3b001861, 0x3b001861},
7726 -       {0x0000a548, 0x55025eb3, 0x55025eb3, 0x3e001a81, 0x3e001a81},
7727 -       {0x0000a54c, 0x58025ef3, 0x58025ef3, 0x42001a83, 0x42001a83},
7728 -       {0x0000a550, 0x5d025ef6, 0x5d025ef6, 0x44001a84, 0x44001a84},
7729 -       {0x0000a554, 0x62025f56, 0x62025f56, 0x48001ce3, 0x48001ce3},
7730 -       {0x0000a558, 0x66027f56, 0x66027f56, 0x4c001ce5, 0x4c001ce5},
7731 -       {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x50001ce9, 0x50001ce9},
7732 -       {0x0000a560, 0x70049f56, 0x70049f56, 0x54001ceb, 0x54001ceb},
7733 -       {0x0000a564, 0x751ffff6, 0x751ffff6, 0x56001eec, 0x56001eec},
7734 -       {0x0000a568, 0x751ffff6, 0x751ffff6, 0x58001ef0, 0x58001ef0},
7735 -       {0x0000a56c, 0x751ffff6, 0x751ffff6, 0x5a001ef4, 0x5a001ef4},
7736 -       {0x0000a570, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
7737 -       {0x0000a574, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
7738 -       {0x0000a578, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
7739 -       {0x0000a57c, 0x751ffff6, 0x751ffff6, 0x5c001ff6, 0x5c001ff6},
7740 -       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7741 -       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7742 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7743 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7744 -       {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
7745 -       {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
7746 -       {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
7747 -       {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
7748 -       {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
7749 -       {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
7750 -       {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
7751 -       {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7752 -       {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7753 -       {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7754 -       {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7755 -       {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7756 -       {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7757 -       {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
7758 -       {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
7759 -       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7760 -       {0x00016044, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
7761 -       {0x00016048, 0x8db49060, 0x8db49060, 0x8db49060, 0x8db49060},
7762 -       {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
7763 -       {0x00016444, 0x056d82e4, 0x056d82e4, 0x056d82e4, 0x056d82e4},
7764 -       {0x00016448, 0x8db49000, 0x8db49000, 0x8db49000, 0x8db49000},
7765 -       {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
7766 -};
7767 -
7768 -static const u32 ar9462_2p1_modes_mix_ob_db_tx_gain[][5] = {
7769 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7770 -       {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7771 -       {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7772 -       {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
7773 -       {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
7774 -       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7775 -       {0x0000a410, 0x0000d0da, 0x0000d0da, 0x0000d0de, 0x0000d0de},
7776 -       {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7777 -       {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
7778 -       {0x0000a504, 0x06002223, 0x06002223, 0x04000002, 0x04000002},
7779 -       {0x0000a508, 0x0a022220, 0x0a022220, 0x08000004, 0x08000004},
7780 -       {0x0000a50c, 0x0f022223, 0x0f022223, 0x0b000200, 0x0b000200},
7781 -       {0x0000a510, 0x14022620, 0x14022620, 0x0f000202, 0x0f000202},
7782 -       {0x0000a514, 0x18022622, 0x18022622, 0x12000400, 0x12000400},
7783 -       {0x0000a518, 0x1b022822, 0x1b022822, 0x16000402, 0x16000402},
7784 -       {0x0000a51c, 0x20022842, 0x20022842, 0x19000404, 0x19000404},
7785 -       {0x0000a520, 0x22022c41, 0x22022c41, 0x1c000603, 0x1c000603},
7786 -       {0x0000a524, 0x28023042, 0x28023042, 0x21000a02, 0x21000a02},
7787 -       {0x0000a528, 0x2c023044, 0x2c023044, 0x25000a04, 0x25000a04},
7788 -       {0x0000a52c, 0x2f023644, 0x2f023644, 0x28000a20, 0x28000a20},
7789 -       {0x0000a530, 0x34025643, 0x34025643, 0x2c000e20, 0x2c000e20},
7790 -       {0x0000a534, 0x38025a44, 0x38025a44, 0x30000e22, 0x30000e22},
7791 -       {0x0000a538, 0x3b025e45, 0x3b025e45, 0x34000e24, 0x34000e24},
7792 -       {0x0000a53c, 0x41025e4a, 0x41025e4a, 0x38001640, 0x38001640},
7793 -       {0x0000a540, 0x48025e6c, 0x48025e6c, 0x3c001660, 0x3c001660},
7794 -       {0x0000a544, 0x4e025e8e, 0x4e025e8e, 0x3f001861, 0x3f001861},
7795 -       {0x0000a548, 0x55025eb3, 0x55025eb3, 0x43001a81, 0x43001a81},
7796 -       {0x0000a54c, 0x58025ef3, 0x58025ef3, 0x47001a83, 0x47001a83},
7797 -       {0x0000a550, 0x5d025ef6, 0x5d025ef6, 0x4a001c84, 0x4a001c84},
7798 -       {0x0000a554, 0x62025f56, 0x62025f56, 0x4e001ce3, 0x4e001ce3},
7799 -       {0x0000a558, 0x66027f56, 0x66027f56, 0x52001ce5, 0x52001ce5},
7800 -       {0x0000a55c, 0x6a029f56, 0x6a029f56, 0x56001ce9, 0x56001ce9},
7801 -       {0x0000a560, 0x70049f56, 0x70049f56, 0x5a001ceb, 0x5a001ceb},
7802 -       {0x0000a564, 0x751ffff6, 0x751ffff6, 0x5c001eec, 0x5c001eec},
7803 -       {0x0000a568, 0x751ffff6, 0x751ffff6, 0x5e001ef0, 0x5e001ef0},
7804 -       {0x0000a56c, 0x751ffff6, 0x751ffff6, 0x60001ef4, 0x60001ef4},
7805 -       {0x0000a570, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
7806 -       {0x0000a574, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
7807 -       {0x0000a578, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
7808 -       {0x0000a57c, 0x751ffff6, 0x751ffff6, 0x62001ff6, 0x62001ff6},
7809 -       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7810 -       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7811 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7812 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7813 -       {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
7814 -       {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
7815 -       {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
7816 -       {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
7817 -       {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
7818 -       {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
7819 -       {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
7820 -       {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7821 -       {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7822 -       {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7823 -       {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7824 -       {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
7825 -       {0x0000b2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
7826 -       {0x0000b2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
7827 -       {0x0000b2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
7828 -       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
7829 -};
7830 -
7831 -static const u32 ar9462_2p1_modes_fast_clock[][3] = {
7832 -       /* Addr      5G_HT20     5G_HT40   */
7833 -       {0x00001030, 0x00000268, 0x000004d0},
7834 -       {0x00001070, 0x0000018c, 0x00000318},
7835 -       {0x000010b0, 0x00000fd0, 0x00001fa0},
7836 -       {0x00008014, 0x044c044c, 0x08980898},
7837 -       {0x0000801c, 0x148ec02b, 0x148ec057},
7838 -       {0x00008318, 0x000044c0, 0x00008980},
7839 -       {0x00009e00, 0x0372131c, 0x0372131c},
7840 -       {0x0000a230, 0x0000400b, 0x00004016},
7841 -       {0x0000a254, 0x00000898, 0x00001130},
7842 -};
7843 -
7844 -static const u32 ar9462_2p1_baseband_core_txfir_coeff_japan_2484[][2] = {
7845 -       /* Addr      allmodes  */
7846 -       {0x0000a398, 0x00000000},
7847 -       {0x0000a39c, 0x6f7f0301},
7848 -       {0x0000a3a0, 0xca9228ee},
7849 -};
7850 -
7851  #endif /* INITVALS_9462_2P1_H */
7852 --- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
7853 +++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
7854 @@ -20,24 +20,11 @@
7855
7856  /* AR9485 1.1 */
7857
7858 -static const u32 ar9485_1_1_mac_postamble[][5] = {
7859 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7860 -       {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
7861 -       {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
7862 -       {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
7863 -       {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
7864 -       {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
7865 -       {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
7866 -       {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
7867 -       {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
7868 -};
7869 +#define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
7870
7871 -static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_disable_L1[][2] = {
7872 -       /* Addr      allmodes  */
7873 -       {0x00018c00, 0x18012e5e},
7874 -       {0x00018c04, 0x000801d8},
7875 -       {0x00018c08, 0x0000080c},
7876 -};
7877 +#define ar9485_1_1_mac_postamble ar9331_1p1_mac_postamble
7878 +
7879 +#define ar9485_1_1_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
7880
7881  static const u32 ar9485Common_wo_xlna_rx_gain_1_1[][2] = {
7882         /* Addr      allmodes  */
7883 @@ -553,100 +540,6 @@ static const u32 ar9485Modes_low_ob_db_t
7884         {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
7885  };
7886
7887 -static const u32 ar9485_modes_lowest_ob_db_tx_gain_1_1[][5] = {
7888 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7889 -       {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
7890 -       {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0x7999a83a, 0x7999a83a},
7891 -       {0x0000a2dc, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
7892 -       {0x0000a2e0, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
7893 -       {0x0000a2e4, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
7894 -       {0x0000a2e8, 0x00000000, 0x00000000, 0xfe2d3552, 0xfe2d3552},
7895 -       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
7896 -       {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7897 -       {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
7898 -       {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
7899 -       {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
7900 -       {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
7901 -       {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
7902 -       {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
7903 -       {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
7904 -       {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
7905 -       {0x0000a520, 0x2f001f04, 0x2f001f04, 0x21000603, 0x21000603},
7906 -       {0x0000a524, 0x35001fc4, 0x35001fc4, 0x25000605, 0x25000605},
7907 -       {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2a000a03, 0x2a000a03},
7908 -       {0x0000a52c, 0x41023e85, 0x41023e85, 0x2c000a04, 0x2c000a04},
7909 -       {0x0000a530, 0x48023ec6, 0x48023ec6, 0x34000e20, 0x34000e20},
7910 -       {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000e21, 0x35000e21},
7911 -       {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
7912 -       {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
7913 -       {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
7914 -       {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
7915 -       {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
7916 -       {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
7917 -       {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
7918 -       {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
7919 -       {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
7920 -       {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
7921 -       {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
7922 -       {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
7923 -       {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
7924 -       {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
7925 -       {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
7926 -       {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
7927 -       {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
7928 -       {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
7929 -       {0x0000a580, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7930 -       {0x0000a584, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7931 -       {0x0000a588, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7932 -       {0x0000a58c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7933 -       {0x0000a590, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7934 -       {0x0000a594, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7935 -       {0x0000a598, 0x00000000, 0x00000000, 0x01404501, 0x01404501},
7936 -       {0x0000a59c, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
7937 -       {0x0000a5a0, 0x00000000, 0x00000000, 0x02808a02, 0x02808a02},
7938 -       {0x0000a5a4, 0x00000000, 0x00000000, 0x02808803, 0x02808803},
7939 -       {0x0000a5a8, 0x00000000, 0x00000000, 0x04c14b04, 0x04c14b04},
7940 -       {0x0000a5ac, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
7941 -       {0x0000a5b0, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
7942 -       {0x0000a5b4, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
7943 -       {0x0000a5b8, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
7944 -       {0x0000a5bc, 0x00000000, 0x00000000, 0x04c15305, 0x04c15305},
7945 -       {0x0000b500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7946 -       {0x0000b504, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7947 -       {0x0000b508, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7948 -       {0x0000b50c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7949 -       {0x0000b510, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7950 -       {0x0000b514, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7951 -       {0x0000b518, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7952 -       {0x0000b51c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7953 -       {0x0000b520, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7954 -       {0x0000b524, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7955 -       {0x0000b528, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7956 -       {0x0000b52c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7957 -       {0x0000b530, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7958 -       {0x0000b534, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7959 -       {0x0000b538, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7960 -       {0x0000b53c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7961 -       {0x0000b540, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7962 -       {0x0000b544, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7963 -       {0x0000b548, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7964 -       {0x0000b54c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7965 -       {0x0000b550, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7966 -       {0x0000b554, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7967 -       {0x0000b558, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7968 -       {0x0000b55c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7969 -       {0x0000b560, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7970 -       {0x0000b564, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7971 -       {0x0000b568, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7972 -       {0x0000b56c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7973 -       {0x0000b570, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7974 -       {0x0000b574, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7975 -       {0x0000b578, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7976 -       {0x0000b57c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
7977 -       {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
7978 -       {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
7979 -};
7980 -
7981  static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
7982         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
7983         {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
7984 @@ -1101,20 +994,6 @@ static const u32 ar9485_common_rx_gain_1
7985         {0x0000a1fc, 0x00000296},
7986  };
7987
7988 -static const u32 ar9485_1_1_pcie_phy_pll_on_clkreq_enable_L1[][2] = {
7989 -       /* Addr      allmodes  */
7990 -       {0x00018c00, 0x18052e5e},
7991 -       {0x00018c04, 0x000801d8},
7992 -       {0x00018c08, 0x0000080c},
7993 -};
7994 -
7995 -static const u32 ar9485_1_1_pcie_phy_clkreq_enable_L1[][2] = {
7996 -       /* Addr      allmodes  */
7997 -       {0x00018c00, 0x18053e5e},
7998 -       {0x00018c04, 0x000801d8},
7999 -       {0x00018c08, 0x0000080c},
8000 -};
8001 -
8002  static const u32 ar9485_1_1_soc_preamble[][2] = {
8003         /* Addr      allmodes  */
8004         {0x00004014, 0xba280400},
8005 @@ -1173,13 +1052,6 @@ static const u32 ar9485_1_1_baseband_pos
8006         {0x0000be18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8007  };
8008
8009 -static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
8010 -       /* Addr      allmodes  */
8011 -       {0x00018c00, 0x18013e5e},
8012 -       {0x00018c04, 0x000801d8},
8013 -       {0x00018c08, 0x0000080c},
8014 -};
8015 -
8016  static const u32 ar9485_1_1_radio_postamble[][2] = {
8017         /* Addr      allmodes  */
8018         {0x0001609c, 0x0b283f31},
8019 @@ -1351,11 +1223,18 @@ static const u32 ar9485_1_1_mac_core[][2
8020         {0x000083d0, 0x000301ff},
8021  };
8022
8023 -static const u32 ar9485_1_1_baseband_core_txfir_coeff_japan_2484[][2] = {
8024 +static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = {
8025         /* Addr      allmodes  */
8026 -       {0x0000a398, 0x00000000},
8027 -       {0x0000a39c, 0x6f7f0301},
8028 -       {0x0000a3a0, 0xca9228ee},
8029 +       {0x00018c00, 0x18013e5e},
8030 +       {0x00018c04, 0x000801d8},
8031 +       {0x00018c08, 0x0000080c},
8032 +};
8033 +
8034 +static const u32 ar9485_1_1_pll_on_cdr_on_clkreq_disable_L1[][2] = {
8035 +       /* Addr      allmodes  */
8036 +       {0x00018c00, 0x1801265e},
8037 +       {0x00018c04, 0x000801d8},
8038 +       {0x00018c08, 0x0000080c},
8039  };
8040
8041  #endif /* INITVALS_9485_H */
8042 --- a/drivers/net/wireless/ath/ath9k/pci.c
8043 +++ b/drivers/net/wireless/ath/ath9k/pci.c
8044 @@ -195,6 +195,93 @@ static DEFINE_PCI_DEVICE_TABLE(ath_pci_i
8045                          0x3219),
8046           .driver_data = ATH9K_PCI_BT_ANT_DIV },
8047
8048 +       /* AR9485 cards with PLL power-save disabled by default. */
8049 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8050 +                        0x0032,
8051 +                        PCI_VENDOR_ID_AZWAVE,
8052 +                        0x2C97),
8053 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8054 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8055 +                        0x0032,
8056 +                        PCI_VENDOR_ID_AZWAVE,
8057 +                        0x2100),
8058 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8059 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8060 +                        0x0032,
8061 +                        0x1C56, /* ASKEY */
8062 +                        0x4001),
8063 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8064 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8065 +                        0x0032,
8066 +                        0x11AD, /* LITEON */
8067 +                        0x6627),
8068 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8069 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8070 +                        0x0032,
8071 +                        0x11AD, /* LITEON */
8072 +                        0x6628),
8073 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8074 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8075 +                        0x0032,
8076 +                        PCI_VENDOR_ID_FOXCONN,
8077 +                        0xE04E),
8078 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8079 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8080 +                        0x0032,
8081 +                        PCI_VENDOR_ID_FOXCONN,
8082 +                        0xE04F),
8083 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8084 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8085 +                        0x0032,
8086 +                        0x144F, /* ASKEY */
8087 +                        0x7197),
8088 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8089 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8090 +                        0x0032,
8091 +                        0x1B9A, /* XAVI */
8092 +                        0x2000),
8093 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8094 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8095 +                        0x0032,
8096 +                        0x1B9A, /* XAVI */
8097 +                        0x2001),
8098 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8099 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8100 +                        0x0032,
8101 +                        PCI_VENDOR_ID_AZWAVE,
8102 +                        0x1186),
8103 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8104 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8105 +                        0x0032,
8106 +                        PCI_VENDOR_ID_AZWAVE,
8107 +                        0x1F86),
8108 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8109 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8110 +                        0x0032,
8111 +                        PCI_VENDOR_ID_AZWAVE,
8112 +                        0x1195),
8113 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8114 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8115 +                        0x0032,
8116 +                        PCI_VENDOR_ID_AZWAVE,
8117 +                        0x1F95),
8118 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8119 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8120 +                        0x0032,
8121 +                        0x1B9A, /* XAVI */
8122 +                        0x1C00),
8123 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8124 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8125 +                        0x0032,
8126 +                        0x1B9A, /* XAVI */
8127 +                        0x1C01),
8128 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8129 +       { PCI_DEVICE_SUB(PCI_VENDOR_ID_ATHEROS,
8130 +                        0x0032,
8131 +                        PCI_VENDOR_ID_ASUSTEK,
8132 +                        0x850D),
8133 +         .driver_data = ATH9K_PCI_NO_PLL_PWRSAVE },
8134 +
8135         { PCI_VDEVICE(ATHEROS, 0x0032) }, /* PCI-E  AR9485 */
8136         { PCI_VDEVICE(ATHEROS, 0x0033) }, /* PCI-E  AR9580 */
8137
8138 --- a/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
8139 +++ b/drivers/net/wireless/ath/ath9k/ar9462_2p0_initvals.h
8140 @@ -20,7 +20,15 @@
8141
8142  /* AR9462 2.0 */
8143
8144 -static const u32 ar9462_modes_fast_clock_2p0[][3] = {
8145 +#define ar9462_2p0_mac_postamble ar9331_1p1_mac_postamble
8146 +
8147 +#define ar9462_2p0_common_wo_xlna_rx_gain ar9300Common_wo_xlna_rx_gain_table_2p2
8148 +
8149 +#define ar9462_2p0_common_5g_xlna_only_rxgain ar9462_2p0_common_mixed_rx_gain
8150 +
8151 +#define ar9462_2p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
8152 +
8153 +static const u32 ar9462_2p0_modes_fast_clock[][3] = {
8154         /* Addr      5G_HT20     5G_HT40   */
8155         {0x00001030, 0x00000268, 0x000004d0},
8156         {0x00001070, 0x0000018c, 0x00000318},
8157 @@ -33,13 +41,6 @@ static const u32 ar9462_modes_fast_clock
8158         {0x0000a254, 0x00000898, 0x00001130},
8159  };
8160
8161 -static const u32 ar9462_pciephy_clkreq_enable_L1_2p0[][2] = {
8162 -       /* Addr      allmodes  */
8163 -       {0x00018c00, 0x18253ede},
8164 -       {0x00018c04, 0x000801d8},
8165 -       {0x00018c08, 0x0003780c},
8166 -};
8167 -
8168  static const u32 ar9462_2p0_baseband_postamble[][5] = {
8169         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8170         {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a800d},
8171 @@ -99,7 +100,7 @@ static const u32 ar9462_2p0_baseband_pos
8172         {0x0000b284, 0x00000000, 0x00000000, 0x00000550, 0x00000550},
8173  };
8174
8175 -static const u32 ar9462_common_rx_gain_table_2p0[][2] = {
8176 +static const u32 ar9462_2p0_common_rx_gain[][2] = {
8177         /* Addr      allmodes  */
8178         {0x0000a000, 0x00010000},
8179         {0x0000a004, 0x00030002},
8180 @@ -359,20 +360,13 @@ static const u32 ar9462_common_rx_gain_t
8181         {0x0000b1fc, 0x00000196},
8182  };
8183
8184 -static const u32 ar9462_pciephy_clkreq_disable_L1_2p0[][2] = {
8185 +static const u32 ar9462_2p0_pciephy_clkreq_disable_L1[][2] = {
8186         /* Addr      allmodes  */
8187         {0x00018c00, 0x18213ede},
8188         {0x00018c04, 0x000801d8},
8189         {0x00018c08, 0x0003780c},
8190  };
8191
8192 -static const u32 ar9462_pciephy_pll_on_clkreq_disable_L1_2p0[][2] = {
8193 -       /* Addr      allmodes  */
8194 -       {0x00018c00, 0x18212ede},
8195 -       {0x00018c04, 0x000801d8},
8196 -       {0x00018c08, 0x0003780c},
8197 -};
8198 -
8199  static const u32 ar9462_2p0_radio_postamble_sys2ant[][5] = {
8200         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8201         {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
8202 @@ -380,348 +374,81 @@ static const u32 ar9462_2p0_radio_postam
8203         {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
8204  };
8205
8206 -static const u32 ar9462_common_wo_xlna_rx_gain_table_2p0[][2] = {
8207 -       /* Addr      allmodes  */
8208 -       {0x0000a000, 0x00010000},
8209 -       {0x0000a004, 0x00030002},
8210 -       {0x0000a008, 0x00050004},
8211 -       {0x0000a00c, 0x00810080},
8212 -       {0x0000a010, 0x00830082},
8213 -       {0x0000a014, 0x01810180},
8214 -       {0x0000a018, 0x01830182},
8215 -       {0x0000a01c, 0x01850184},
8216 -       {0x0000a020, 0x01890188},
8217 -       {0x0000a024, 0x018b018a},
8218 -       {0x0000a028, 0x018d018c},
8219 -       {0x0000a02c, 0x03820190},
8220 -       {0x0000a030, 0x03840383},
8221 -       {0x0000a034, 0x03880385},
8222 -       {0x0000a038, 0x038a0389},
8223 -       {0x0000a03c, 0x038c038b},
8224 -       {0x0000a040, 0x0390038d},
8225 -       {0x0000a044, 0x03920391},
8226 -       {0x0000a048, 0x03940393},
8227 -       {0x0000a04c, 0x03960395},
8228 -       {0x0000a050, 0x00000000},
8229 -       {0x0000a054, 0x00000000},
8230 -       {0x0000a058, 0x00000000},
8231 -       {0x0000a05c, 0x00000000},
8232 -       {0x0000a060, 0x00000000},
8233 -       {0x0000a064, 0x00000000},
8234 -       {0x0000a068, 0x00000000},
8235 -       {0x0000a06c, 0x00000000},
8236 -       {0x0000a070, 0x00000000},
8237 -       {0x0000a074, 0x00000000},
8238 -       {0x0000a078, 0x00000000},
8239 -       {0x0000a07c, 0x00000000},
8240 -       {0x0000a080, 0x29292929},
8241 -       {0x0000a084, 0x29292929},
8242 -       {0x0000a088, 0x29292929},
8243 -       {0x0000a08c, 0x29292929},
8244 -       {0x0000a090, 0x22292929},
8245 -       {0x0000a094, 0x1d1d2222},
8246 -       {0x0000a098, 0x0c111117},
8247 -       {0x0000a09c, 0x00030303},
8248 -       {0x0000a0a0, 0x00000000},
8249 -       {0x0000a0a4, 0x00000000},
8250 -       {0x0000a0a8, 0x00000000},
8251 -       {0x0000a0ac, 0x00000000},
8252 -       {0x0000a0b0, 0x00000000},
8253 -       {0x0000a0b4, 0x00000000},
8254 -       {0x0000a0b8, 0x00000000},
8255 -       {0x0000a0bc, 0x00000000},
8256 -       {0x0000a0c0, 0x001f0000},
8257 -       {0x0000a0c4, 0x01000101},
8258 -       {0x0000a0c8, 0x011e011f},
8259 -       {0x0000a0cc, 0x011c011d},
8260 -       {0x0000a0d0, 0x02030204},
8261 -       {0x0000a0d4, 0x02010202},
8262 -       {0x0000a0d8, 0x021f0200},
8263 -       {0x0000a0dc, 0x0302021e},
8264 -       {0x0000a0e0, 0x03000301},
8265 -       {0x0000a0e4, 0x031e031f},
8266 -       {0x0000a0e8, 0x0402031d},
8267 -       {0x0000a0ec, 0x04000401},
8268 -       {0x0000a0f0, 0x041e041f},
8269 -       {0x0000a0f4, 0x0502041d},
8270 -       {0x0000a0f8, 0x05000501},
8271 -       {0x0000a0fc, 0x051e051f},
8272 -       {0x0000a100, 0x06010602},
8273 -       {0x0000a104, 0x061f0600},
8274 -       {0x0000a108, 0x061d061e},
8275 -       {0x0000a10c, 0x07020703},
8276 -       {0x0000a110, 0x07000701},
8277 -       {0x0000a114, 0x00000000},
8278 -       {0x0000a118, 0x00000000},
8279 -       {0x0000a11c, 0x00000000},
8280 -       {0x0000a120, 0x00000000},
8281 -       {0x0000a124, 0x00000000},
8282 -       {0x0000a128, 0x00000000},
8283 -       {0x0000a12c, 0x00000000},
8284 -       {0x0000a130, 0x00000000},
8285 -       {0x0000a134, 0x00000000},
8286 -       {0x0000a138, 0x00000000},
8287 -       {0x0000a13c, 0x00000000},
8288 -       {0x0000a140, 0x001f0000},
8289 -       {0x0000a144, 0x01000101},
8290 -       {0x0000a148, 0x011e011f},
8291 -       {0x0000a14c, 0x011c011d},
8292 -       {0x0000a150, 0x02030204},
8293 -       {0x0000a154, 0x02010202},
8294 -       {0x0000a158, 0x021f0200},
8295 -       {0x0000a15c, 0x0302021e},
8296 -       {0x0000a160, 0x03000301},
8297 -       {0x0000a164, 0x031e031f},
8298 -       {0x0000a168, 0x0402031d},
8299 -       {0x0000a16c, 0x04000401},
8300 -       {0x0000a170, 0x041e041f},
8301 -       {0x0000a174, 0x0502041d},
8302 -       {0x0000a178, 0x05000501},
8303 -       {0x0000a17c, 0x051e051f},
8304 -       {0x0000a180, 0x06010602},
8305 -       {0x0000a184, 0x061f0600},
8306 -       {0x0000a188, 0x061d061e},
8307 -       {0x0000a18c, 0x07020703},
8308 -       {0x0000a190, 0x07000701},
8309 -       {0x0000a194, 0x00000000},
8310 -       {0x0000a198, 0x00000000},
8311 -       {0x0000a19c, 0x00000000},
8312 -       {0x0000a1a0, 0x00000000},
8313 -       {0x0000a1a4, 0x00000000},
8314 -       {0x0000a1a8, 0x00000000},
8315 -       {0x0000a1ac, 0x00000000},
8316 -       {0x0000a1b0, 0x00000000},
8317 -       {0x0000a1b4, 0x00000000},
8318 -       {0x0000a1b8, 0x00000000},
8319 -       {0x0000a1bc, 0x00000000},
8320 -       {0x0000a1c0, 0x00000000},
8321 -       {0x0000a1c4, 0x00000000},
8322 -       {0x0000a1c8, 0x00000000},
8323 -       {0x0000a1cc, 0x00000000},
8324 -       {0x0000a1d0, 0x00000000},
8325 -       {0x0000a1d4, 0x00000000},
8326 -       {0x0000a1d8, 0x00000000},
8327 -       {0x0000a1dc, 0x00000000},
8328 -       {0x0000a1e0, 0x00000000},
8329 -       {0x0000a1e4, 0x00000000},
8330 -       {0x0000a1e8, 0x00000000},
8331 -       {0x0000a1ec, 0x00000000},
8332 -       {0x0000a1f0, 0x00000396},
8333 -       {0x0000a1f4, 0x00000396},
8334 -       {0x0000a1f8, 0x00000396},
8335 -       {0x0000a1fc, 0x00000196},
8336 -       {0x0000b000, 0x00010000},
8337 -       {0x0000b004, 0x00030002},
8338 -       {0x0000b008, 0x00050004},
8339 -       {0x0000b00c, 0x00810080},
8340 -       {0x0000b010, 0x00830082},
8341 -       {0x0000b014, 0x01810180},
8342 -       {0x0000b018, 0x01830182},
8343 -       {0x0000b01c, 0x01850184},
8344 -       {0x0000b020, 0x02810280},
8345 -       {0x0000b024, 0x02830282},
8346 -       {0x0000b028, 0x02850284},
8347 -       {0x0000b02c, 0x02890288},
8348 -       {0x0000b030, 0x028b028a},
8349 -       {0x0000b034, 0x0388028c},
8350 -       {0x0000b038, 0x038a0389},
8351 -       {0x0000b03c, 0x038c038b},
8352 -       {0x0000b040, 0x0390038d},
8353 -       {0x0000b044, 0x03920391},
8354 -       {0x0000b048, 0x03940393},
8355 -       {0x0000b04c, 0x03960395},
8356 -       {0x0000b050, 0x00000000},
8357 -       {0x0000b054, 0x00000000},
8358 -       {0x0000b058, 0x00000000},
8359 -       {0x0000b05c, 0x00000000},
8360 -       {0x0000b060, 0x00000000},
8361 -       {0x0000b064, 0x00000000},
8362 -       {0x0000b068, 0x00000000},
8363 -       {0x0000b06c, 0x00000000},
8364 -       {0x0000b070, 0x00000000},
8365 -       {0x0000b074, 0x00000000},
8366 -       {0x0000b078, 0x00000000},
8367 -       {0x0000b07c, 0x00000000},
8368 -       {0x0000b080, 0x32323232},
8369 -       {0x0000b084, 0x2f2f3232},
8370 -       {0x0000b088, 0x23282a2d},
8371 -       {0x0000b08c, 0x1c1e2123},
8372 -       {0x0000b090, 0x14171919},
8373 -       {0x0000b094, 0x0e0e1214},
8374 -       {0x0000b098, 0x03050707},
8375 -       {0x0000b09c, 0x00030303},
8376 -       {0x0000b0a0, 0x00000000},
8377 -       {0x0000b0a4, 0x00000000},
8378 -       {0x0000b0a8, 0x00000000},
8379 -       {0x0000b0ac, 0x00000000},
8380 -       {0x0000b0b0, 0x00000000},
8381 -       {0x0000b0b4, 0x00000000},
8382 -       {0x0000b0b8, 0x00000000},
8383 -       {0x0000b0bc, 0x00000000},
8384 -       {0x0000b0c0, 0x003f0020},
8385 -       {0x0000b0c4, 0x00400041},
8386 -       {0x0000b0c8, 0x0140005f},
8387 -       {0x0000b0cc, 0x0160015f},
8388 -       {0x0000b0d0, 0x017e017f},
8389 -       {0x0000b0d4, 0x02410242},
8390 -       {0x0000b0d8, 0x025f0240},
8391 -       {0x0000b0dc, 0x027f0260},
8392 -       {0x0000b0e0, 0x0341027e},
8393 -       {0x0000b0e4, 0x035f0340},
8394 -       {0x0000b0e8, 0x037f0360},
8395 -       {0x0000b0ec, 0x04400441},
8396 -       {0x0000b0f0, 0x0460045f},
8397 -       {0x0000b0f4, 0x0541047f},
8398 -       {0x0000b0f8, 0x055f0540},
8399 -       {0x0000b0fc, 0x057f0560},
8400 -       {0x0000b100, 0x06400641},
8401 -       {0x0000b104, 0x0660065f},
8402 -       {0x0000b108, 0x067e067f},
8403 -       {0x0000b10c, 0x07410742},
8404 -       {0x0000b110, 0x075f0740},
8405 -       {0x0000b114, 0x077f0760},
8406 -       {0x0000b118, 0x07800781},
8407 -       {0x0000b11c, 0x07a0079f},
8408 -       {0x0000b120, 0x07c107bf},
8409 -       {0x0000b124, 0x000007c0},
8410 -       {0x0000b128, 0x00000000},
8411 -       {0x0000b12c, 0x00000000},
8412 -       {0x0000b130, 0x00000000},
8413 -       {0x0000b134, 0x00000000},
8414 -       {0x0000b138, 0x00000000},
8415 -       {0x0000b13c, 0x00000000},
8416 -       {0x0000b140, 0x003f0020},
8417 -       {0x0000b144, 0x00400041},
8418 -       {0x0000b148, 0x0140005f},
8419 -       {0x0000b14c, 0x0160015f},
8420 -       {0x0000b150, 0x017e017f},
8421 -       {0x0000b154, 0x02410242},
8422 -       {0x0000b158, 0x025f0240},
8423 -       {0x0000b15c, 0x027f0260},
8424 -       {0x0000b160, 0x0341027e},
8425 -       {0x0000b164, 0x035f0340},
8426 -       {0x0000b168, 0x037f0360},
8427 -       {0x0000b16c, 0x04400441},
8428 -       {0x0000b170, 0x0460045f},
8429 -       {0x0000b174, 0x0541047f},
8430 -       {0x0000b178, 0x055f0540},
8431 -       {0x0000b17c, 0x057f0560},
8432 -       {0x0000b180, 0x06400641},
8433 -       {0x0000b184, 0x0660065f},
8434 -       {0x0000b188, 0x067e067f},
8435 -       {0x0000b18c, 0x07410742},
8436 -       {0x0000b190, 0x075f0740},
8437 -       {0x0000b194, 0x077f0760},
8438 -       {0x0000b198, 0x07800781},
8439 -       {0x0000b19c, 0x07a0079f},
8440 -       {0x0000b1a0, 0x07c107bf},
8441 -       {0x0000b1a4, 0x000007c0},
8442 -       {0x0000b1a8, 0x00000000},
8443 -       {0x0000b1ac, 0x00000000},
8444 -       {0x0000b1b0, 0x00000000},
8445 -       {0x0000b1b4, 0x00000000},
8446 -       {0x0000b1b8, 0x00000000},
8447 -       {0x0000b1bc, 0x00000000},
8448 -       {0x0000b1c0, 0x00000000},
8449 -       {0x0000b1c4, 0x00000000},
8450 -       {0x0000b1c8, 0x00000000},
8451 -       {0x0000b1cc, 0x00000000},
8452 -       {0x0000b1d0, 0x00000000},
8453 -       {0x0000b1d4, 0x00000000},
8454 -       {0x0000b1d8, 0x00000000},
8455 -       {0x0000b1dc, 0x00000000},
8456 -       {0x0000b1e0, 0x00000000},
8457 -       {0x0000b1e4, 0x00000000},
8458 -       {0x0000b1e8, 0x00000000},
8459 -       {0x0000b1ec, 0x00000000},
8460 -       {0x0000b1f0, 0x00000396},
8461 -       {0x0000b1f4, 0x00000396},
8462 -       {0x0000b1f8, 0x00000396},
8463 -       {0x0000b1fc, 0x00000196},
8464 -};
8465 -
8466 -static const u32 ar9462_2p0_baseband_core_txfir_coeff_japan_2484[][2] = {
8467 -       /* Addr      allmodes  */
8468 -       {0x0000a398, 0x00000000},
8469 -       {0x0000a39c, 0x6f7f0301},
8470 -       {0x0000a3a0, 0xca9228ee},
8471 -};
8472 -
8473 -static const u32 ar9462_modes_low_ob_db_tx_gain_table_2p0[][5] = {
8474 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8475 -       {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
8476 -       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
8477 -       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
8478 -       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
8479 -       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
8480 -       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
8481 -       {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8482 -       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8483 -       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
8484 -       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
8485 -       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
8486 -       {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
8487 -       {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
8488 -       {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
8489 -       {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
8490 -       {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
8491 -       {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
8492 -       {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
8493 -       {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
8494 -       {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
8495 -       {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
8496 -       {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
8497 -       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
8498 -       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
8499 -       {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
8500 -       {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
8501 -       {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
8502 -       {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
8503 -       {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
8504 -       {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
8505 -       {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
8506 -       {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
8507 -       {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8508 -       {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8509 -       {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8510 -       {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8511 -       {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8512 -       {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8513 -       {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8514 -       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8515 -       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8516 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8517 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8518 -       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8519 -       {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
8520 -       {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
8521 -       {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
8522 -       {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
8523 -       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
8524 -       {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
8525 -       {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
8526 -       {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
8527 -       {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
8528 -       {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
8529 -       {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
8530 -       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
8531 -       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
8532 -       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
8533 -       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
8534 -       {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
8535 -       {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
8536 -       {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
8537 -       {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
8538 -       {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
8539 -       {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
8540 -};
8541 -
8542 -static const u32 ar9462_2p0_soc_postamble[][5] = {
8543 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8544 -       {0x00007010, 0x00000033, 0x00000033, 0x00000033, 0x00000033},
8545 -};
8546 -
8547 -static const u32 ar9462_2p0_baseband_core[][2] = {
8548 +static const u32 ar9462_2p0_modes_low_ob_db_tx_gain[][5] = {
8549 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8550 +       {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
8551 +       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
8552 +       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
8553 +       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
8554 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
8555 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
8556 +       {0x0000a458, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8557 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8558 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
8559 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
8560 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
8561 +       {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
8562 +       {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
8563 +       {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
8564 +       {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
8565 +       {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
8566 +       {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
8567 +       {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
8568 +       {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
8569 +       {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
8570 +       {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
8571 +       {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
8572 +       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
8573 +       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
8574 +       {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
8575 +       {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
8576 +       {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
8577 +       {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
8578 +       {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
8579 +       {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
8580 +       {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
8581 +       {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
8582 +       {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8583 +       {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8584 +       {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8585 +       {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8586 +       {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8587 +       {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8588 +       {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
8589 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8590 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8591 +       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8592 +       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8593 +       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8594 +       {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
8595 +       {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
8596 +       {0x0000a61c, 0x02008802, 0x02008802, 0x02008501, 0x02008501},
8597 +       {0x0000a620, 0x0300cc03, 0x0300cc03, 0x0280ca03, 0x0280ca03},
8598 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
8599 +       {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04014c04, 0x04014c04},
8600 +       {0x0000a62c, 0x03810c03, 0x03810c03, 0x04015005, 0x04015005},
8601 +       {0x0000a630, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
8602 +       {0x0000a634, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
8603 +       {0x0000a638, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
8604 +       {0x0000a63c, 0x03810e04, 0x03810e04, 0x04015005, 0x04015005},
8605 +       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
8606 +       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
8607 +       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
8608 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
8609 +       {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
8610 +       {0x00016048, 0x64992060, 0x64992060, 0x64992060, 0x64992060},
8611 +       {0x00016054, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
8612 +       {0x00016444, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
8613 +       {0x00016448, 0x64992000, 0x64992000, 0x64992000, 0x64992000},
8614 +       {0x00016454, 0x6db60000, 0x6db60000, 0x6db60000, 0x6db60000},
8615 +};
8616 +
8617 +static const u32 ar9462_2p0_soc_postamble[][5] = {
8618 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8619 +       {0x00007010, 0x00000033, 0x00000033, 0x00000033, 0x00000033},
8620 +};
8621 +
8622 +static const u32 ar9462_2p0_baseband_core[][2] = {
8623         /* Addr      allmodes  */
8624         {0x00009800, 0xafe68e30},
8625         {0x00009804, 0xfd14e000},
8626 @@ -879,7 +606,7 @@ static const u32 ar9462_2p0_radio_postam
8627         {0x0001650c, 0x48000000, 0x40000000, 0x40000000, 0x40000000},
8628  };
8629
8630 -static const u32 ar9462_modes_mix_ob_db_tx_gain_table_2p0[][5] = {
8631 +static const u32 ar9462_2p0_modes_mix_ob_db_tx_gain[][5] = {
8632         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8633         {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
8634         {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
8635 @@ -942,7 +669,7 @@ static const u32 ar9462_modes_mix_ob_db_
8636         {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
8637  };
8638
8639 -static const u32 ar9462_modes_high_ob_db_tx_gain_table_2p0[][5] = {
8640 +static const u32 ar9462_2p0_modes_high_ob_db_tx_gain[][5] = {
8641         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8642         {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
8643         {0x0000a2dc, 0x01feee00, 0x01feee00, 0x03aaa352, 0x03aaa352},
8644 @@ -1240,19 +967,7 @@ static const u32 ar9462_2p0_mac_core[][2
8645         {0x000083d0, 0x000301ff},
8646  };
8647
8648 -static const u32 ar9462_2p0_mac_postamble[][5] = {
8649 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8650 -       {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
8651 -       {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
8652 -       {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
8653 -       {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
8654 -       {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
8655 -       {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
8656 -       {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
8657 -       {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
8658 -};
8659 -
8660 -static const u32 ar9462_common_mixed_rx_gain_table_2p0[][2] = {
8661 +static const u32 ar9462_2p0_common_mixed_rx_gain[][2] = {
8662         /* Addr      allmodes  */
8663         {0x0000a000, 0x00010000},
8664         {0x0000a004, 0x00030002},
8665 @@ -1517,266 +1232,6 @@ static const u32 ar9462_2p0_baseband_pos
8666         {0x00009e3c, 0xcf946220, 0xcf946220, 0xcfd5c782, 0xcfd5c282},
8667  };
8668
8669 -static const u32 ar9462_2p0_5g_xlna_only_rxgain[][2] = {
8670 -       /* Addr      allmodes  */
8671 -       {0x0000a000, 0x00010000},
8672 -       {0x0000a004, 0x00030002},
8673 -       {0x0000a008, 0x00050004},
8674 -       {0x0000a00c, 0x00810080},
8675 -       {0x0000a010, 0x00830082},
8676 -       {0x0000a014, 0x01810180},
8677 -       {0x0000a018, 0x01830182},
8678 -       {0x0000a01c, 0x01850184},
8679 -       {0x0000a020, 0x01890188},
8680 -       {0x0000a024, 0x018b018a},
8681 -       {0x0000a028, 0x018d018c},
8682 -       {0x0000a02c, 0x03820190},
8683 -       {0x0000a030, 0x03840383},
8684 -       {0x0000a034, 0x03880385},
8685 -       {0x0000a038, 0x038a0389},
8686 -       {0x0000a03c, 0x038c038b},
8687 -       {0x0000a040, 0x0390038d},
8688 -       {0x0000a044, 0x03920391},
8689 -       {0x0000a048, 0x03940393},
8690 -       {0x0000a04c, 0x03960395},
8691 -       {0x0000a050, 0x00000000},
8692 -       {0x0000a054, 0x00000000},
8693 -       {0x0000a058, 0x00000000},
8694 -       {0x0000a05c, 0x00000000},
8695 -       {0x0000a060, 0x00000000},
8696 -       {0x0000a064, 0x00000000},
8697 -       {0x0000a068, 0x00000000},
8698 -       {0x0000a06c, 0x00000000},
8699 -       {0x0000a070, 0x00000000},
8700 -       {0x0000a074, 0x00000000},
8701 -       {0x0000a078, 0x00000000},
8702 -       {0x0000a07c, 0x00000000},
8703 -       {0x0000a080, 0x29292929},
8704 -       {0x0000a084, 0x29292929},
8705 -       {0x0000a088, 0x29292929},
8706 -       {0x0000a08c, 0x29292929},
8707 -       {0x0000a090, 0x22292929},
8708 -       {0x0000a094, 0x1d1d2222},
8709 -       {0x0000a098, 0x0c111117},
8710 -       {0x0000a09c, 0x00030303},
8711 -       {0x0000a0a0, 0x00000000},
8712 -       {0x0000a0a4, 0x00000000},
8713 -       {0x0000a0a8, 0x00000000},
8714 -       {0x0000a0ac, 0x00000000},
8715 -       {0x0000a0b0, 0x00000000},
8716 -       {0x0000a0b4, 0x00000000},
8717 -       {0x0000a0b8, 0x00000000},
8718 -       {0x0000a0bc, 0x00000000},
8719 -       {0x0000a0c0, 0x001f0000},
8720 -       {0x0000a0c4, 0x01000101},
8721 -       {0x0000a0c8, 0x011e011f},
8722 -       {0x0000a0cc, 0x011c011d},
8723 -       {0x0000a0d0, 0x02030204},
8724 -       {0x0000a0d4, 0x02010202},
8725 -       {0x0000a0d8, 0x021f0200},
8726 -       {0x0000a0dc, 0x0302021e},
8727 -       {0x0000a0e0, 0x03000301},
8728 -       {0x0000a0e4, 0x031e031f},
8729 -       {0x0000a0e8, 0x0402031d},
8730 -       {0x0000a0ec, 0x04000401},
8731 -       {0x0000a0f0, 0x041e041f},
8732 -       {0x0000a0f4, 0x0502041d},
8733 -       {0x0000a0f8, 0x05000501},
8734 -       {0x0000a0fc, 0x051e051f},
8735 -       {0x0000a100, 0x06010602},
8736 -       {0x0000a104, 0x061f0600},
8737 -       {0x0000a108, 0x061d061e},
8738 -       {0x0000a10c, 0x07020703},
8739 -       {0x0000a110, 0x07000701},
8740 -       {0x0000a114, 0x00000000},
8741 -       {0x0000a118, 0x00000000},
8742 -       {0x0000a11c, 0x00000000},
8743 -       {0x0000a120, 0x00000000},
8744 -       {0x0000a124, 0x00000000},
8745 -       {0x0000a128, 0x00000000},
8746 -       {0x0000a12c, 0x00000000},
8747 -       {0x0000a130, 0x00000000},
8748 -       {0x0000a134, 0x00000000},
8749 -       {0x0000a138, 0x00000000},
8750 -       {0x0000a13c, 0x00000000},
8751 -       {0x0000a140, 0x001f0000},
8752 -       {0x0000a144, 0x01000101},
8753 -       {0x0000a148, 0x011e011f},
8754 -       {0x0000a14c, 0x011c011d},
8755 -       {0x0000a150, 0x02030204},
8756 -       {0x0000a154, 0x02010202},
8757 -       {0x0000a158, 0x021f0200},
8758 -       {0x0000a15c, 0x0302021e},
8759 -       {0x0000a160, 0x03000301},
8760 -       {0x0000a164, 0x031e031f},
8761 -       {0x0000a168, 0x0402031d},
8762 -       {0x0000a16c, 0x04000401},
8763 -       {0x0000a170, 0x041e041f},
8764 -       {0x0000a174, 0x0502041d},
8765 -       {0x0000a178, 0x05000501},
8766 -       {0x0000a17c, 0x051e051f},
8767 -       {0x0000a180, 0x06010602},
8768 -       {0x0000a184, 0x061f0600},
8769 -       {0x0000a188, 0x061d061e},
8770 -       {0x0000a18c, 0x07020703},
8771 -       {0x0000a190, 0x07000701},
8772 -       {0x0000a194, 0x00000000},
8773 -       {0x0000a198, 0x00000000},
8774 -       {0x0000a19c, 0x00000000},
8775 -       {0x0000a1a0, 0x00000000},
8776 -       {0x0000a1a4, 0x00000000},
8777 -       {0x0000a1a8, 0x00000000},
8778 -       {0x0000a1ac, 0x00000000},
8779 -       {0x0000a1b0, 0x00000000},
8780 -       {0x0000a1b4, 0x00000000},
8781 -       {0x0000a1b8, 0x00000000},
8782 -       {0x0000a1bc, 0x00000000},
8783 -       {0x0000a1c0, 0x00000000},
8784 -       {0x0000a1c4, 0x00000000},
8785 -       {0x0000a1c8, 0x00000000},
8786 -       {0x0000a1cc, 0x00000000},
8787 -       {0x0000a1d0, 0x00000000},
8788 -       {0x0000a1d4, 0x00000000},
8789 -       {0x0000a1d8, 0x00000000},
8790 -       {0x0000a1dc, 0x00000000},
8791 -       {0x0000a1e0, 0x00000000},
8792 -       {0x0000a1e4, 0x00000000},
8793 -       {0x0000a1e8, 0x00000000},
8794 -       {0x0000a1ec, 0x00000000},
8795 -       {0x0000a1f0, 0x00000396},
8796 -       {0x0000a1f4, 0x00000396},
8797 -       {0x0000a1f8, 0x00000396},
8798 -       {0x0000a1fc, 0x00000196},
8799 -       {0x0000b000, 0x00010000},
8800 -       {0x0000b004, 0x00030002},
8801 -       {0x0000b008, 0x00050004},
8802 -       {0x0000b00c, 0x00810080},
8803 -       {0x0000b010, 0x00830082},
8804 -       {0x0000b014, 0x01810180},
8805 -       {0x0000b018, 0x01830182},
8806 -       {0x0000b01c, 0x01850184},
8807 -       {0x0000b020, 0x02810280},
8808 -       {0x0000b024, 0x02830282},
8809 -       {0x0000b028, 0x02850284},
8810 -       {0x0000b02c, 0x02890288},
8811 -       {0x0000b030, 0x028b028a},
8812 -       {0x0000b034, 0x0388028c},
8813 -       {0x0000b038, 0x038a0389},
8814 -       {0x0000b03c, 0x038c038b},
8815 -       {0x0000b040, 0x0390038d},
8816 -       {0x0000b044, 0x03920391},
8817 -       {0x0000b048, 0x03940393},
8818 -       {0x0000b04c, 0x03960395},
8819 -       {0x0000b050, 0x00000000},
8820 -       {0x0000b054, 0x00000000},
8821 -       {0x0000b058, 0x00000000},
8822 -       {0x0000b05c, 0x00000000},
8823 -       {0x0000b060, 0x00000000},
8824 -       {0x0000b064, 0x00000000},
8825 -       {0x0000b068, 0x00000000},
8826 -       {0x0000b06c, 0x00000000},
8827 -       {0x0000b070, 0x00000000},
8828 -       {0x0000b074, 0x00000000},
8829 -       {0x0000b078, 0x00000000},
8830 -       {0x0000b07c, 0x00000000},
8831 -       {0x0000b080, 0x2a2d2f32},
8832 -       {0x0000b084, 0x21232328},
8833 -       {0x0000b088, 0x19191c1e},
8834 -       {0x0000b08c, 0x12141417},
8835 -       {0x0000b090, 0x07070e0e},
8836 -       {0x0000b094, 0x03030305},
8837 -       {0x0000b098, 0x00000003},
8838 -       {0x0000b09c, 0x00000000},
8839 -       {0x0000b0a0, 0x00000000},
8840 -       {0x0000b0a4, 0x00000000},
8841 -       {0x0000b0a8, 0x00000000},
8842 -       {0x0000b0ac, 0x00000000},
8843 -       {0x0000b0b0, 0x00000000},
8844 -       {0x0000b0b4, 0x00000000},
8845 -       {0x0000b0b8, 0x00000000},
8846 -       {0x0000b0bc, 0x00000000},
8847 -       {0x0000b0c0, 0x003f0020},
8848 -       {0x0000b0c4, 0x00400041},
8849 -       {0x0000b0c8, 0x0140005f},
8850 -       {0x0000b0cc, 0x0160015f},
8851 -       {0x0000b0d0, 0x017e017f},
8852 -       {0x0000b0d4, 0x02410242},
8853 -       {0x0000b0d8, 0x025f0240},
8854 -       {0x0000b0dc, 0x027f0260},
8855 -       {0x0000b0e0, 0x0341027e},
8856 -       {0x0000b0e4, 0x035f0340},
8857 -       {0x0000b0e8, 0x037f0360},
8858 -       {0x0000b0ec, 0x04400441},
8859 -       {0x0000b0f0, 0x0460045f},
8860 -       {0x0000b0f4, 0x0541047f},
8861 -       {0x0000b0f8, 0x055f0540},
8862 -       {0x0000b0fc, 0x057f0560},
8863 -       {0x0000b100, 0x06400641},
8864 -       {0x0000b104, 0x0660065f},
8865 -       {0x0000b108, 0x067e067f},
8866 -       {0x0000b10c, 0x07410742},
8867 -       {0x0000b110, 0x075f0740},
8868 -       {0x0000b114, 0x077f0760},
8869 -       {0x0000b118, 0x07800781},
8870 -       {0x0000b11c, 0x07a0079f},
8871 -       {0x0000b120, 0x07c107bf},
8872 -       {0x0000b124, 0x000007c0},
8873 -       {0x0000b128, 0x00000000},
8874 -       {0x0000b12c, 0x00000000},
8875 -       {0x0000b130, 0x00000000},
8876 -       {0x0000b134, 0x00000000},
8877 -       {0x0000b138, 0x00000000},
8878 -       {0x0000b13c, 0x00000000},
8879 -       {0x0000b140, 0x003f0020},
8880 -       {0x0000b144, 0x00400041},
8881 -       {0x0000b148, 0x0140005f},
8882 -       {0x0000b14c, 0x0160015f},
8883 -       {0x0000b150, 0x017e017f},
8884 -       {0x0000b154, 0x02410242},
8885 -       {0x0000b158, 0x025f0240},
8886 -       {0x0000b15c, 0x027f0260},
8887 -       {0x0000b160, 0x0341027e},
8888 -       {0x0000b164, 0x035f0340},
8889 -       {0x0000b168, 0x037f0360},
8890 -       {0x0000b16c, 0x04400441},
8891 -       {0x0000b170, 0x0460045f},
8892 -       {0x0000b174, 0x0541047f},
8893 -       {0x0000b178, 0x055f0540},
8894 -       {0x0000b17c, 0x057f0560},
8895 -       {0x0000b180, 0x06400641},
8896 -       {0x0000b184, 0x0660065f},
8897 -       {0x0000b188, 0x067e067f},
8898 -       {0x0000b18c, 0x07410742},
8899 -       {0x0000b190, 0x075f0740},
8900 -       {0x0000b194, 0x077f0760},
8901 -       {0x0000b198, 0x07800781},
8902 -       {0x0000b19c, 0x07a0079f},
8903 -       {0x0000b1a0, 0x07c107bf},
8904 -       {0x0000b1a4, 0x000007c0},
8905 -       {0x0000b1a8, 0x00000000},
8906 -       {0x0000b1ac, 0x00000000},
8907 -       {0x0000b1b0, 0x00000000},
8908 -       {0x0000b1b4, 0x00000000},
8909 -       {0x0000b1b8, 0x00000000},
8910 -       {0x0000b1bc, 0x00000000},
8911 -       {0x0000b1c0, 0x00000000},
8912 -       {0x0000b1c4, 0x00000000},
8913 -       {0x0000b1c8, 0x00000000},
8914 -       {0x0000b1cc, 0x00000000},
8915 -       {0x0000b1d0, 0x00000000},
8916 -       {0x0000b1d4, 0x00000000},
8917 -       {0x0000b1d8, 0x00000000},
8918 -       {0x0000b1dc, 0x00000000},
8919 -       {0x0000b1e0, 0x00000000},
8920 -       {0x0000b1e4, 0x00000000},
8921 -       {0x0000b1e8, 0x00000000},
8922 -       {0x0000b1ec, 0x00000000},
8923 -       {0x0000b1f0, 0x00000396},
8924 -       {0x0000b1f4, 0x00000396},
8925 -       {0x0000b1f8, 0x00000396},
8926 -       {0x0000b1fc, 0x00000196},
8927 -};
8928 -
8929  static const u32 ar9462_2p0_baseband_core_mix_rxgain[][2] = {
8930         /* Addr      allmodes  */
8931         {0x00009fd0, 0x0a2d6b93},
8932 --- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
8933 +++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
8934 @@ -303,7 +303,7 @@ static const u32 ar9300_2p2_mac_postambl
8935         {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
8936         {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
8937         {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
8938 -       {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
8939 +       {0x00008120, 0x18f04800, 0x18f04800, 0x18f04810, 0x18f04810},
8940         {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
8941         {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
8942  };
8943 @@ -352,7 +352,7 @@ static const u32 ar9300_2p2_baseband_pos
8944         {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
8945         {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
8946         {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
8947 -       {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
8948 +       {0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},
8949         {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
8950         {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
8951         {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
8952 @@ -378,9 +378,9 @@ static const u32 ar9300_2p2_baseband_cor
8953         {0x00009814, 0x9280c00a},
8954         {0x00009818, 0x00000000},
8955         {0x0000981c, 0x00020028},
8956 -       {0x00009834, 0x6400a290},
8957 +       {0x00009834, 0x6400a190},
8958         {0x00009838, 0x0108ecff},
8959 -       {0x0000983c, 0x0d000600},
8960 +       {0x0000983c, 0x14000600},
8961         {0x00009880, 0x201fff00},
8962         {0x00009884, 0x00001042},
8963         {0x000098a4, 0x00200400},
8964 @@ -401,7 +401,7 @@ static const u32 ar9300_2p2_baseband_cor
8965         {0x00009d04, 0x40206c10},
8966         {0x00009d08, 0x009c4060},
8967         {0x00009d0c, 0x9883800a},
8968 -       {0x00009d10, 0x01834061},
8969 +       {0x00009d10, 0x01884061},
8970         {0x00009d14, 0x00c0040b},
8971         {0x00009d18, 0x00000000},
8972         {0x00009e08, 0x0038230c},
8973 @@ -459,7 +459,7 @@ static const u32 ar9300_2p2_baseband_cor
8974         {0x0000a3e8, 0x20202020},
8975         {0x0000a3ec, 0x20202020},
8976         {0x0000a3f0, 0x00000000},
8977 -       {0x0000a3f4, 0x00000246},
8978 +       {0x0000a3f4, 0x00000000},
8979         {0x0000a3f8, 0x0c9bd380},
8980         {0x0000a3fc, 0x000f0f01},
8981         {0x0000a400, 0x8fa91f01},
8982 @@ -534,107 +534,107 @@ static const u32 ar9300_2p2_baseband_cor
8983
8984  static const u32 ar9300Modes_high_power_tx_gain_table_2p2[][5] = {
8985         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
8986 -       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
8987 -       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
8988 -       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
8989 +       {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
8990 +       {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
8991 +       {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
8992         {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
8993 -       {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
8994 -       {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
8995 -       {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
8996 -       {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
8997 -       {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
8998 -       {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
8999 -       {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
9000 -       {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402},
9001 -       {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404},
9002 -       {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603},
9003 -       {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02},
9004 -       {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04},
9005 -       {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20},
9006 -       {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20},
9007 -       {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22},
9008 -       {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24},
9009 -       {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640},
9010 -       {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660},
9011 -       {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861},
9012 -       {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81},
9013 -       {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
9014 -       {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84},
9015 -       {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3},
9016 -       {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5},
9017 -       {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9},
9018 -       {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb},
9019 -       {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
9020 -       {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
9021 -       {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
9022 -       {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
9023 -       {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
9024 -       {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
9025 -       {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
9026 -       {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000},
9027 -       {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002},
9028 -       {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004},
9029 -       {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200},
9030 -       {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202},
9031 -       {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400},
9032 -       {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402},
9033 -       {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404},
9034 -       {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603},
9035 -       {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02},
9036 -       {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04},
9037 -       {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20},
9038 -       {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20},
9039 -       {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22},
9040 -       {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24},
9041 -       {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640},
9042 -       {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660},
9043 -       {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861},
9044 -       {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81},
9045 -       {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83},
9046 -       {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84},
9047 -       {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3},
9048 -       {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5},
9049 -       {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9},
9050 -       {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb},
9051 -       {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
9052 -       {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
9053 -       {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
9054 -       {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
9055 -       {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
9056 -       {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
9057 -       {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
9058 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
9059 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9060 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
9061 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
9062 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
9063 +       {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
9064 +       {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
9065 +       {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
9066 +       {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
9067 +       {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
9068 +       {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
9069 +       {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
9070 +       {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
9071 +       {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
9072 +       {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
9073 +       {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
9074 +       {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
9075 +       {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
9076 +       {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
9077 +       {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
9078 +       {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
9079 +       {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
9080 +       {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
9081 +       {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
9082 +       {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
9083 +       {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
9084 +       {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9085 +       {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9086 +       {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9087 +       {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9088 +       {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9089 +       {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9090 +       {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9091 +       {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
9092 +       {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
9093 +       {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
9094 +       {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
9095 +       {0x0000a590, 0x15800028, 0x15800028, 0x0f800202, 0x0f800202},
9096 +       {0x0000a594, 0x1b80002b, 0x1b80002b, 0x12800400, 0x12800400},
9097 +       {0x0000a598, 0x1f820028, 0x1f820028, 0x16800402, 0x16800402},
9098 +       {0x0000a59c, 0x2582002b, 0x2582002b, 0x19800404, 0x19800404},
9099 +       {0x0000a5a0, 0x2a84002a, 0x2a84002a, 0x1c800603, 0x1c800603},
9100 +       {0x0000a5a4, 0x2e86002a, 0x2e86002a, 0x21800a02, 0x21800a02},
9101 +       {0x0000a5a8, 0x3382202d, 0x3382202d, 0x25800a04, 0x25800a04},
9102 +       {0x0000a5ac, 0x3884202c, 0x3884202c, 0x28800a20, 0x28800a20},
9103 +       {0x0000a5b0, 0x3c86202c, 0x3c86202c, 0x2c800e20, 0x2c800e20},
9104 +       {0x0000a5b4, 0x4188202d, 0x4188202d, 0x30800e22, 0x30800e22},
9105 +       {0x0000a5b8, 0x4586402d, 0x4586402d, 0x34800e24, 0x34800e24},
9106 +       {0x0000a5bc, 0x4986222d, 0x4986222d, 0x38801640, 0x38801640},
9107 +       {0x0000a5c0, 0x4d862231, 0x4d862231, 0x3c801660, 0x3c801660},
9108 +       {0x0000a5c4, 0x50882231, 0x50882231, 0x3f801861, 0x3f801861},
9109 +       {0x0000a5c8, 0x5688422e, 0x5688422e, 0x43801a81, 0x43801a81},
9110 +       {0x0000a5cc, 0x5e88442e, 0x5e88442e, 0x47801a83, 0x47801a83},
9111 +       {0x0000a5d0, 0x628a4431, 0x628a4431, 0x4a801c84, 0x4a801c84},
9112 +       {0x0000a5d4, 0x648a4432, 0x648a4432, 0x4e801ce3, 0x4e801ce3},
9113 +       {0x0000a5d8, 0x688a4434, 0x688a4434, 0x52801ce5, 0x52801ce5},
9114 +       {0x0000a5dc, 0x6c8a6434, 0x6c8a6434, 0x56801ce9, 0x56801ce9},
9115 +       {0x0000a5e0, 0x6f8a6633, 0x6f8a6633, 0x5a801ceb, 0x5a801ceb},
9116 +       {0x0000a5e4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9117 +       {0x0000a5e8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9118 +       {0x0000a5ec, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9119 +       {0x0000a5f0, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9120 +       {0x0000a5f4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9121 +       {0x0000a5f8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9122 +       {0x0000a5fc, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9123         {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9124         {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9125 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9126 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9127 -       {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
9128 -       {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
9129 -       {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
9130 -       {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
9131 -       {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
9132 -       {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
9133 -       {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
9134 -       {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
9135 -       {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
9136 -       {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
9137 -       {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
9138 -       {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
9139 -       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
9140 -       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
9141 -       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
9142 +       {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
9143 +       {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
9144 +       {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
9145 +       {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
9146 +       {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
9147 +       {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
9148 +       {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
9149 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
9150 +       {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
9151 +       {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9152 +       {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9153 +       {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9154 +       {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9155 +       {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9156 +       {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
9157 +       {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
9158 +       {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
9159         {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
9160 -       {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
9161 -       {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
9162 -       {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
9163 +       {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
9164 +       {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
9165 +       {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
9166         {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
9167         {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
9168 -       {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
9169 +       {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
9170         {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9171         {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
9172 -       {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
9173 +       {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
9174         {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9175         {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
9176 -       {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
9177 +       {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
9178         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9179  };
9180
9181 @@ -644,7 +644,7 @@ static const u32 ar9300Modes_high_ob_db_
9182         {0x0000a2e0, 0x0000f000, 0x0000f000, 0x03ccc584, 0x03ccc584},
9183         {0x0000a2e4, 0x01ff0000, 0x01ff0000, 0x03f0f800, 0x03f0f800},
9184         {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
9185 -       {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
9186 +       {0x0000a410, 0x000050d4, 0x000050d4, 0x000050d9, 0x000050d9},
9187         {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
9188         {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
9189         {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
9190 @@ -1086,8 +1086,8 @@ static const u32 ar9300Common_rx_gain_ta
9191         {0x0000b074, 0x00000000},
9192         {0x0000b078, 0x00000000},
9193         {0x0000b07c, 0x00000000},
9194 -       {0x0000b080, 0x2a2d2f32},
9195 -       {0x0000b084, 0x21232328},
9196 +       {0x0000b080, 0x23232323},
9197 +       {0x0000b084, 0x21232323},
9198         {0x0000b088, 0x19191c1e},
9199         {0x0000b08c, 0x12141417},
9200         {0x0000b090, 0x07070e0e},
9201 @@ -1385,9 +1385,9 @@ static const u32 ar9300_2p2_mac_core[][2
9202         {0x000081f8, 0x00000000},
9203         {0x000081fc, 0x00000000},
9204         {0x00008240, 0x00100000},
9205 -       {0x00008244, 0x0010f424},
9206 +       {0x00008244, 0x0010f400},
9207         {0x00008248, 0x00000800},
9208 -       {0x0000824c, 0x0001e848},
9209 +       {0x0000824c, 0x0001e800},
9210         {0x00008250, 0x00000000},
9211         {0x00008254, 0x00000000},
9212         {0x00008258, 0x00000000},
9213 @@ -1726,16 +1726,30 @@ static const u32 ar9300PciePhy_pll_on_cl
9214
9215  static const u32 ar9300PciePhy_clkreq_enable_L1_2p2[][2] = {
9216         /* Addr      allmodes  */
9217 -       {0x00004040, 0x08253e5e},
9218 +       {0x00004040, 0x0825365e},
9219         {0x00004040, 0x0008003b},
9220         {0x00004044, 0x00000000},
9221  };
9222
9223  static const u32 ar9300PciePhy_clkreq_disable_L1_2p2[][2] = {
9224         /* Addr      allmodes  */
9225 -       {0x00004040, 0x08213e5e},
9226 +       {0x00004040, 0x0821365e},
9227         {0x00004040, 0x0008003b},
9228         {0x00004044, 0x00000000},
9229  };
9230
9231 +static const u32 ar9300_2p2_baseband_core_txfir_coeff_japan_2484[][2] = {
9232 +       /* Addr      allmodes  */
9233 +       {0x0000a398, 0x00000000},
9234 +       {0x0000a39c, 0x6f7f0301},
9235 +       {0x0000a3a0, 0xca9228ee},
9236 +};
9237 +
9238 +static const u32 ar9300_2p2_baseband_postamble_dfs_channel[][3] = {
9239 +       /* Addr      5G          2G        */
9240 +       {0x00009824, 0x5ac668d0, 0x5ac668d0},
9241 +       {0x00009e0c, 0x6d4000e2, 0x6d4000e2},
9242 +       {0x00009e14, 0x37b9625e, 0x37b9625e},
9243 +};
9244 +
9245  #endif /* INITVALS_9003_2P2_H */
9246 --- /dev/null
9247 +++ b/drivers/net/wireless/ath/ath9k/ar9565_1p1_initvals.h
9248 @@ -0,0 +1,64 @@
9249 +/*
9250 + * Copyright (c) 2010-2011 Atheros Communications Inc.
9251 + * Copyright (c) 2011-2012 Qualcomm Atheros Inc.
9252 + *
9253 + * Permission to use, copy, modify, and/or distribute this software for any
9254 + * purpose with or without fee is hereby granted, provided that the above
9255 + * copyright notice and this permission notice appear in all copies.
9256 + *
9257 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9258 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
9259 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
9260 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
9261 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
9262 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
9263 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
9264 + */
9265 +
9266 +#ifndef INITVALS_9565_1P1_H
9267 +#define INITVALS_9565_1P1_H
9268 +
9269 +/* AR9565 1.1 */
9270 +
9271 +#define ar9565_1p1_mac_core ar9565_1p0_mac_core
9272 +
9273 +#define ar9565_1p1_mac_postamble ar9565_1p0_mac_postamble
9274 +
9275 +#define ar9565_1p1_baseband_core ar9565_1p0_baseband_core
9276 +
9277 +#define ar9565_1p1_baseband_postamble ar9565_1p0_baseband_postamble
9278 +
9279 +#define ar9565_1p1_radio_core ar9565_1p0_radio_core
9280 +
9281 +#define ar9565_1p1_soc_preamble ar9565_1p0_soc_preamble
9282 +
9283 +#define ar9565_1p1_soc_postamble ar9565_1p0_soc_postamble
9284 +
9285 +#define ar9565_1p1_Common_rx_gain_table ar9565_1p0_Common_rx_gain_table
9286 +
9287 +#define ar9565_1p1_Modes_lowest_ob_db_tx_gain_table ar9565_1p0_Modes_lowest_ob_db_tx_gain_table
9288 +
9289 +#define ar9565_1p1_pciephy_clkreq_disable_L1 ar9565_1p0_pciephy_clkreq_disable_L1
9290 +
9291 +#define ar9565_1p1_modes_fast_clock ar9565_1p0_modes_fast_clock
9292 +
9293 +#define ar9565_1p1_common_wo_xlna_rx_gain_table ar9565_1p0_common_wo_xlna_rx_gain_table
9294 +
9295 +#define ar9565_1p1_modes_low_ob_db_tx_gain_table ar9565_1p0_modes_low_ob_db_tx_gain_table
9296 +
9297 +#define ar9565_1p1_modes_high_ob_db_tx_gain_table ar9565_1p0_modes_high_ob_db_tx_gain_table
9298 +
9299 +#define ar9565_1p1_modes_high_power_tx_gain_table ar9565_1p0_modes_high_power_tx_gain_table
9300 +
9301 +#define ar9565_1p1_baseband_core_txfir_coeff_japan_2484 ar9565_1p0_baseband_core_txfir_coeff_japan_2484
9302 +
9303 +static const u32 ar9565_1p1_radio_postamble[][5] = {
9304 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
9305 +       {0x0001609c, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524, 0x0b8ee524},
9306 +       {0x000160ac, 0xa4646c08, 0xa4646c08, 0x24645808, 0x24645808},
9307 +       {0x000160b0, 0x01d67f70, 0x01d67f70, 0x01d67f70, 0x01d67f70},
9308 +       {0x0001610c, 0x40000000, 0x40000000, 0x40000000, 0x40000000},
9309 +       {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
9310 +};
9311 +
9312 +#endif /* INITVALS_9565_1P1_H */
9313 --- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
9314 +++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
9315 @@ -20,18 +20,34 @@
9316
9317  /* AR9580 1.0 */
9318
9319 +#define ar9580_1p0_soc_preamble ar9300_2p2_soc_preamble
9320 +
9321 +#define ar9580_1p0_soc_postamble ar9300_2p2_soc_postamble
9322 +
9323 +#define ar9580_1p0_radio_core ar9300_2p2_radio_core
9324 +
9325 +#define ar9580_1p0_mac_postamble ar9300_2p2_mac_postamble
9326 +
9327 +#define ar9580_1p0_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
9328 +
9329 +#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
9330 +
9331 +#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
9332 +
9333  #define ar9580_1p0_modes_fast_clock ar9300Modes_fast_clock_2p2
9334
9335 +#define ar9580_1p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
9336 +
9337  static const u32 ar9580_1p0_radio_postamble[][5] = {
9338         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
9339         {0x0001609c, 0x0dd08f29, 0x0dd08f29, 0x0b283f31, 0x0b283f31},
9340         {0x000160ac, 0xa4653c00, 0xa4653c00, 0x24652800, 0x24652800},
9341         {0x000160b0, 0x03284f3e, 0x03284f3e, 0x05d08f20, 0x05d08f20},
9342 -       {0x0001610c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
9343 +       {0x0001610c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
9344         {0x00016140, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
9345 -       {0x0001650c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
9346 +       {0x0001650c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
9347         {0x00016540, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
9348 -       {0x0001690c, 0x08000000, 0x00000000, 0x00000000, 0x00000000},
9349 +       {0x0001690c, 0xc8000000, 0xc0000000, 0xc0000000, 0xc0000000},
9350         {0x00016940, 0x10804008, 0x10804008, 0x50804008, 0x50804008},
9351  };
9352
9353 @@ -41,12 +57,10 @@ static const u32 ar9580_1p0_baseband_cor
9354         {0x00009804, 0xfd14e000},
9355         {0x00009808, 0x9c0a9f6b},
9356         {0x0000980c, 0x04900000},
9357 -       {0x00009814, 0x3280c00a},
9358 -       {0x00009818, 0x00000000},
9359         {0x0000981c, 0x00020028},
9360 -       {0x00009834, 0x6400a290},
9361 +       {0x00009834, 0x6400a190},
9362         {0x00009838, 0x0108ecff},
9363 -       {0x0000983c, 0x0d000600},
9364 +       {0x0000983c, 0x14000600},
9365         {0x00009880, 0x201fff00},
9366         {0x00009884, 0x00001042},
9367         {0x000098a4, 0x00200400},
9368 @@ -67,7 +81,7 @@ static const u32 ar9580_1p0_baseband_cor
9369         {0x00009d04, 0x40206c10},
9370         {0x00009d08, 0x009c4060},
9371         {0x00009d0c, 0x9883800a},
9372 -       {0x00009d10, 0x01834061},
9373 +       {0x00009d10, 0x01884061},
9374         {0x00009d14, 0x00c0040b},
9375         {0x00009d18, 0x00000000},
9376         {0x00009e08, 0x0038230c},
9377 @@ -198,8 +212,6 @@ static const u32 ar9580_1p0_baseband_cor
9378         {0x0000c420, 0x00000000},
9379  };
9380
9381 -#define ar9580_1p0_mac_postamble ar9300_2p2_mac_postamble
9382 -
9383  static const u32 ar9580_1p0_low_ob_db_tx_gain_table[][5] = {
9384         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
9385         {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
9386 @@ -306,7 +318,112 @@ static const u32 ar9580_1p0_low_ob_db_tx
9387         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9388  };
9389
9390 -#define ar9580_1p0_high_power_tx_gain_table ar9580_1p0_low_ob_db_tx_gain_table
9391 +static const u32 ar9580_1p0_high_power_tx_gain_table[][5] = {
9392 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
9393 +       {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
9394 +       {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
9395 +       {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
9396 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
9397 +       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
9398 +       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9399 +       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
9400 +       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
9401 +       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
9402 +       {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
9403 +       {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
9404 +       {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
9405 +       {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
9406 +       {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
9407 +       {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
9408 +       {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
9409 +       {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
9410 +       {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
9411 +       {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
9412 +       {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
9413 +       {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
9414 +       {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
9415 +       {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
9416 +       {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
9417 +       {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
9418 +       {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
9419 +       {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
9420 +       {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
9421 +       {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
9422 +       {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
9423 +       {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9424 +       {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9425 +       {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9426 +       {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9427 +       {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9428 +       {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9429 +       {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
9430 +       {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
9431 +       {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
9432 +       {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
9433 +       {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
9434 +       {0x0000a590, 0x15800028, 0x15800028, 0x0f800202, 0x0f800202},
9435 +       {0x0000a594, 0x1b80002b, 0x1b80002b, 0x12800400, 0x12800400},
9436 +       {0x0000a598, 0x1f820028, 0x1f820028, 0x16800402, 0x16800402},
9437 +       {0x0000a59c, 0x2582002b, 0x2582002b, 0x19800404, 0x19800404},
9438 +       {0x0000a5a0, 0x2a84002a, 0x2a84002a, 0x1c800603, 0x1c800603},
9439 +       {0x0000a5a4, 0x2e86002a, 0x2e86002a, 0x21800a02, 0x21800a02},
9440 +       {0x0000a5a8, 0x3382202d, 0x3382202d, 0x25800a04, 0x25800a04},
9441 +       {0x0000a5ac, 0x3884202c, 0x3884202c, 0x28800a20, 0x28800a20},
9442 +       {0x0000a5b0, 0x3c86202c, 0x3c86202c, 0x2c800e20, 0x2c800e20},
9443 +       {0x0000a5b4, 0x4188202d, 0x4188202d, 0x30800e22, 0x30800e22},
9444 +       {0x0000a5b8, 0x4586402d, 0x4586402d, 0x34800e24, 0x34800e24},
9445 +       {0x0000a5bc, 0x4986222d, 0x4986222d, 0x38801640, 0x38801640},
9446 +       {0x0000a5c0, 0x4d862231, 0x4d862231, 0x3c801660, 0x3c801660},
9447 +       {0x0000a5c4, 0x50882231, 0x50882231, 0x3f801861, 0x3f801861},
9448 +       {0x0000a5c8, 0x5688422e, 0x5688422e, 0x43801a81, 0x43801a81},
9449 +       {0x0000a5cc, 0x5a88442e, 0x5a88442e, 0x47801a83, 0x47801a83},
9450 +       {0x0000a5d0, 0x5e8a4431, 0x5e8a4431, 0x4a801c84, 0x4a801c84},
9451 +       {0x0000a5d4, 0x648a4432, 0x648a4432, 0x4e801ce3, 0x4e801ce3},
9452 +       {0x0000a5d8, 0x688a4434, 0x688a4434, 0x52801ce5, 0x52801ce5},
9453 +       {0x0000a5dc, 0x6c8a6434, 0x6c8a6434, 0x56801ce9, 0x56801ce9},
9454 +       {0x0000a5e0, 0x6f8a6633, 0x6f8a6633, 0x5a801ceb, 0x5a801ceb},
9455 +       {0x0000a5e4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9456 +       {0x0000a5e8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9457 +       {0x0000a5ec, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9458 +       {0x0000a5f0, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9459 +       {0x0000a5f4, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9460 +       {0x0000a5f8, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9461 +       {0x0000a5fc, 0x738c6634, 0x738c6634, 0x5d801eec, 0x5d801eec},
9462 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9463 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9464 +       {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
9465 +       {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
9466 +       {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
9467 +       {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
9468 +       {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
9469 +       {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
9470 +       {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
9471 +       {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
9472 +       {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
9473 +       {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9474 +       {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9475 +       {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9476 +       {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9477 +       {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
9478 +       {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
9479 +       {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
9480 +       {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
9481 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
9482 +       {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
9483 +       {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
9484 +       {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
9485 +       {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
9486 +       {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
9487 +       {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
9488 +       {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9489 +       {0x00016288, 0x05a2040a, 0x05a2040a, 0x05a20408, 0x05a20408},
9490 +       {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
9491 +       {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
9492 +       {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9493 +       {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
9494 +       {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
9495 +       {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9496 +};
9497
9498  static const u32 ar9580_1p0_lowest_ob_db_tx_gain_table[][5] = {
9499         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
9500 @@ -414,8 +531,6 @@ static const u32 ar9580_1p0_lowest_ob_db
9501         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9502  };
9503
9504 -#define ar9580_1p0_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
9505 -
9506  static const u32 ar9580_1p0_mac_core[][2] = {
9507         /* Addr      allmodes  */
9508         {0x00000008, 0x00000000},
9509 @@ -679,14 +794,6 @@ static const u32 ar9580_1p0_mixed_ob_db_
9510         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9511  };
9512
9513 -#define ar9580_1p0_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
9514 -
9515 -#define ar9580_1p0_soc_postamble ar9300_2p2_soc_postamble
9516 -
9517 -#define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
9518 -
9519 -#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
9520 -
9521  static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
9522         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
9523         {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
9524 @@ -761,165 +868,271 @@ static const u32 ar9580_1p0_type6_tx_gai
9525         {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
9526  };
9527
9528 -static const u32 ar9580_1p0_soc_preamble[][2] = {
9529 +static const u32 ar9580_1p0_rx_gain_table[][2] = {
9530         /* Addr      allmodes  */
9531 -       {0x000040a4, 0x00a0c1c9},
9532 -       {0x00007008, 0x00000000},
9533 -       {0x00007020, 0x00000000},
9534 -       {0x00007034, 0x00000002},
9535 -       {0x00007038, 0x000004c2},
9536 -       {0x00007048, 0x00000008},
9537 -};
9538 -
9539 -#define ar9580_1p0_rx_gain_table ar9462_common_rx_gain_table_2p0
9540 -
9541 -static const u32 ar9580_1p0_radio_core[][2] = {
9542 -       /* Addr      allmodes  */
9543 -       {0x00016000, 0x36db6db6},
9544 -       {0x00016004, 0x6db6db40},
9545 -       {0x00016008, 0x73f00000},
9546 -       {0x0001600c, 0x00000000},
9547 -       {0x00016040, 0x7f80fff8},
9548 -       {0x0001604c, 0x76d005b5},
9549 -       {0x00016050, 0x556cf031},
9550 -       {0x00016054, 0x13449440},
9551 -       {0x00016058, 0x0c51c92c},
9552 -       {0x0001605c, 0x3db7fffc},
9553 -       {0x00016060, 0xfffffffc},
9554 -       {0x00016064, 0x000f0278},
9555 -       {0x0001606c, 0x6db60000},
9556 -       {0x00016080, 0x00000000},
9557 -       {0x00016084, 0x0e48048c},
9558 -       {0x00016088, 0x54214514},
9559 -       {0x0001608c, 0x119f481e},
9560 -       {0x00016090, 0x24926490},
9561 -       {0x00016098, 0xd2888888},
9562 -       {0x000160a0, 0x0a108ffe},
9563 -       {0x000160a4, 0x812fc370},
9564 -       {0x000160a8, 0x423c8000},
9565 -       {0x000160b4, 0x92480080},
9566 -       {0x000160c0, 0x00adb6d0},
9567 -       {0x000160c4, 0x6db6db60},
9568 -       {0x000160c8, 0x6db6db6c},
9569 -       {0x000160cc, 0x01e6c000},
9570 -       {0x00016100, 0x3fffbe01},
9571 -       {0x00016104, 0xfff80000},
9572 -       {0x00016108, 0x00080010},
9573 -       {0x00016144, 0x02084080},
9574 -       {0x00016148, 0x00000000},
9575 -       {0x00016280, 0x058a0001},
9576 -       {0x00016284, 0x3d840208},
9577 -       {0x00016288, 0x05a20408},
9578 -       {0x0001628c, 0x00038c07},
9579 -       {0x00016290, 0x00000004},
9580 -       {0x00016294, 0x458aa14f},
9581 -       {0x00016380, 0x00000000},
9582 -       {0x00016384, 0x00000000},
9583 -       {0x00016388, 0x00800700},
9584 -       {0x0001638c, 0x00800700},
9585 -       {0x00016390, 0x00800700},
9586 -       {0x00016394, 0x00000000},
9587 -       {0x00016398, 0x00000000},
9588 -       {0x0001639c, 0x00000000},
9589 -       {0x000163a0, 0x00000001},
9590 -       {0x000163a4, 0x00000001},
9591 -       {0x000163a8, 0x00000000},
9592 -       {0x000163ac, 0x00000000},
9593 -       {0x000163b0, 0x00000000},
9594 -       {0x000163b4, 0x00000000},
9595 -       {0x000163b8, 0x00000000},
9596 -       {0x000163bc, 0x00000000},
9597 -       {0x000163c0, 0x000000a0},
9598 -       {0x000163c4, 0x000c0000},
9599 -       {0x000163c8, 0x14021402},
9600 -       {0x000163cc, 0x00001402},
9601 -       {0x000163d0, 0x00000000},
9602 -       {0x000163d4, 0x00000000},
9603 -       {0x00016400, 0x36db6db6},
9604 -       {0x00016404, 0x6db6db40},
9605 -       {0x00016408, 0x73f00000},
9606 -       {0x0001640c, 0x00000000},
9607 -       {0x00016440, 0x7f80fff8},
9608 -       {0x0001644c, 0x76d005b5},
9609 -       {0x00016450, 0x556cf031},
9610 -       {0x00016454, 0x13449440},
9611 -       {0x00016458, 0x0c51c92c},
9612 -       {0x0001645c, 0x3db7fffc},
9613 -       {0x00016460, 0xfffffffc},
9614 -       {0x00016464, 0x000f0278},
9615 -       {0x0001646c, 0x6db60000},
9616 -       {0x00016500, 0x3fffbe01},
9617 -       {0x00016504, 0xfff80000},
9618 -       {0x00016508, 0x00080010},
9619 -       {0x00016544, 0x02084080},
9620 -       {0x00016548, 0x00000000},
9621 -       {0x00016780, 0x00000000},
9622 -       {0x00016784, 0x00000000},
9623 -       {0x00016788, 0x00800700},
9624 -       {0x0001678c, 0x00800700},
9625 -       {0x00016790, 0x00800700},
9626 -       {0x00016794, 0x00000000},
9627 -       {0x00016798, 0x00000000},
9628 -       {0x0001679c, 0x00000000},
9629 -       {0x000167a0, 0x00000001},
9630 -       {0x000167a4, 0x00000001},
9631 -       {0x000167a8, 0x00000000},
9632 -       {0x000167ac, 0x00000000},
9633 -       {0x000167b0, 0x00000000},
9634 -       {0x000167b4, 0x00000000},
9635 -       {0x000167b8, 0x00000000},
9636 -       {0x000167bc, 0x00000000},
9637 -       {0x000167c0, 0x000000a0},
9638 -       {0x000167c4, 0x000c0000},
9639 -       {0x000167c8, 0x14021402},
9640 -       {0x000167cc, 0x00001402},
9641 -       {0x000167d0, 0x00000000},
9642 -       {0x000167d4, 0x00000000},
9643 -       {0x00016800, 0x36db6db6},
9644 -       {0x00016804, 0x6db6db40},
9645 -       {0x00016808, 0x73f00000},
9646 -       {0x0001680c, 0x00000000},
9647 -       {0x00016840, 0x7f80fff8},
9648 -       {0x0001684c, 0x76d005b5},
9649 -       {0x00016850, 0x556cf031},
9650 -       {0x00016854, 0x13449440},
9651 -       {0x00016858, 0x0c51c92c},
9652 -       {0x0001685c, 0x3db7fffc},
9653 -       {0x00016860, 0xfffffffc},
9654 -       {0x00016864, 0x000f0278},
9655 -       {0x0001686c, 0x6db60000},
9656 -       {0x00016900, 0x3fffbe01},
9657 -       {0x00016904, 0xfff80000},
9658 -       {0x00016908, 0x00080010},
9659 -       {0x00016944, 0x02084080},
9660 -       {0x00016948, 0x00000000},
9661 -       {0x00016b80, 0x00000000},
9662 -       {0x00016b84, 0x00000000},
9663 -       {0x00016b88, 0x00800700},
9664 -       {0x00016b8c, 0x00800700},
9665 -       {0x00016b90, 0x00800700},
9666 -       {0x00016b94, 0x00000000},
9667 -       {0x00016b98, 0x00000000},
9668 -       {0x00016b9c, 0x00000000},
9669 -       {0x00016ba0, 0x00000001},
9670 -       {0x00016ba4, 0x00000001},
9671 -       {0x00016ba8, 0x00000000},
9672 -       {0x00016bac, 0x00000000},
9673 -       {0x00016bb0, 0x00000000},
9674 -       {0x00016bb4, 0x00000000},
9675 -       {0x00016bb8, 0x00000000},
9676 -       {0x00016bbc, 0x00000000},
9677 -       {0x00016bc0, 0x000000a0},
9678 -       {0x00016bc4, 0x000c0000},
9679 -       {0x00016bc8, 0x14021402},
9680 -       {0x00016bcc, 0x00001402},
9681 -       {0x00016bd0, 0x00000000},
9682 -       {0x00016bd4, 0x00000000},
9683 +       {0x0000a000, 0x00010000},
9684 +       {0x0000a004, 0x00030002},
9685 +       {0x0000a008, 0x00050004},
9686 +       {0x0000a00c, 0x00810080},
9687 +       {0x0000a010, 0x00830082},
9688 +       {0x0000a014, 0x01810180},
9689 +       {0x0000a018, 0x01830182},
9690 +       {0x0000a01c, 0x01850184},
9691 +       {0x0000a020, 0x01890188},
9692 +       {0x0000a024, 0x018b018a},
9693 +       {0x0000a028, 0x018d018c},
9694 +       {0x0000a02c, 0x01910190},
9695 +       {0x0000a030, 0x01930192},
9696 +       {0x0000a034, 0x01950194},
9697 +       {0x0000a038, 0x038a0196},
9698 +       {0x0000a03c, 0x038c038b},
9699 +       {0x0000a040, 0x0390038d},
9700 +       {0x0000a044, 0x03920391},
9701 +       {0x0000a048, 0x03940393},
9702 +       {0x0000a04c, 0x03960395},
9703 +       {0x0000a050, 0x00000000},
9704 +       {0x0000a054, 0x00000000},
9705 +       {0x0000a058, 0x00000000},
9706 +       {0x0000a05c, 0x00000000},
9707 +       {0x0000a060, 0x00000000},
9708 +       {0x0000a064, 0x00000000},
9709 +       {0x0000a068, 0x00000000},
9710 +       {0x0000a06c, 0x00000000},
9711 +       {0x0000a070, 0x00000000},
9712 +       {0x0000a074, 0x00000000},
9713 +       {0x0000a078, 0x00000000},
9714 +       {0x0000a07c, 0x00000000},
9715 +       {0x0000a080, 0x22222229},
9716 +       {0x0000a084, 0x1d1d1d1d},
9717 +       {0x0000a088, 0x1d1d1d1d},
9718 +       {0x0000a08c, 0x1d1d1d1d},
9719 +       {0x0000a090, 0x171d1d1d},
9720 +       {0x0000a094, 0x11111717},
9721 +       {0x0000a098, 0x00030311},
9722 +       {0x0000a09c, 0x00000000},
9723 +       {0x0000a0a0, 0x00000000},
9724 +       {0x0000a0a4, 0x00000000},
9725 +       {0x0000a0a8, 0x00000000},
9726 +       {0x0000a0ac, 0x00000000},
9727 +       {0x0000a0b0, 0x00000000},
9728 +       {0x0000a0b4, 0x00000000},
9729 +       {0x0000a0b8, 0x00000000},
9730 +       {0x0000a0bc, 0x00000000},
9731 +       {0x0000a0c0, 0x001f0000},
9732 +       {0x0000a0c4, 0x01000101},
9733 +       {0x0000a0c8, 0x011e011f},
9734 +       {0x0000a0cc, 0x011c011d},
9735 +       {0x0000a0d0, 0x02030204},
9736 +       {0x0000a0d4, 0x02010202},
9737 +       {0x0000a0d8, 0x021f0200},
9738 +       {0x0000a0dc, 0x0302021e},
9739 +       {0x0000a0e0, 0x03000301},
9740 +       {0x0000a0e4, 0x031e031f},
9741 +       {0x0000a0e8, 0x0402031d},
9742 +       {0x0000a0ec, 0x04000401},
9743 +       {0x0000a0f0, 0x041e041f},
9744 +       {0x0000a0f4, 0x0502041d},
9745 +       {0x0000a0f8, 0x05000501},
9746 +       {0x0000a0fc, 0x051e051f},
9747 +       {0x0000a100, 0x06010602},
9748 +       {0x0000a104, 0x061f0600},
9749 +       {0x0000a108, 0x061d061e},
9750 +       {0x0000a10c, 0x07020703},
9751 +       {0x0000a110, 0x07000701},
9752 +       {0x0000a114, 0x00000000},
9753 +       {0x0000a118, 0x00000000},
9754 +       {0x0000a11c, 0x00000000},
9755 +       {0x0000a120, 0x00000000},
9756 +       {0x0000a124, 0x00000000},
9757 +       {0x0000a128, 0x00000000},
9758 +       {0x0000a12c, 0x00000000},
9759 +       {0x0000a130, 0x00000000},
9760 +       {0x0000a134, 0x00000000},
9761 +       {0x0000a138, 0x00000000},
9762 +       {0x0000a13c, 0x00000000},
9763 +       {0x0000a140, 0x001f0000},
9764 +       {0x0000a144, 0x01000101},
9765 +       {0x0000a148, 0x011e011f},
9766 +       {0x0000a14c, 0x011c011d},
9767 +       {0x0000a150, 0x02030204},
9768 +       {0x0000a154, 0x02010202},
9769 +       {0x0000a158, 0x021f0200},
9770 +       {0x0000a15c, 0x0302021e},
9771 +       {0x0000a160, 0x03000301},
9772 +       {0x0000a164, 0x031e031f},
9773 +       {0x0000a168, 0x0402031d},
9774 +       {0x0000a16c, 0x04000401},
9775 +       {0x0000a170, 0x041e041f},
9776 +       {0x0000a174, 0x0502041d},
9777 +       {0x0000a178, 0x05000501},
9778 +       {0x0000a17c, 0x051e051f},
9779 +       {0x0000a180, 0x06010602},
9780 +       {0x0000a184, 0x061f0600},
9781 +       {0x0000a188, 0x061d061e},
9782 +       {0x0000a18c, 0x07020703},
9783 +       {0x0000a190, 0x07000701},
9784 +       {0x0000a194, 0x00000000},
9785 +       {0x0000a198, 0x00000000},
9786 +       {0x0000a19c, 0x00000000},
9787 +       {0x0000a1a0, 0x00000000},
9788 +       {0x0000a1a4, 0x00000000},
9789 +       {0x0000a1a8, 0x00000000},
9790 +       {0x0000a1ac, 0x00000000},
9791 +       {0x0000a1b0, 0x00000000},
9792 +       {0x0000a1b4, 0x00000000},
9793 +       {0x0000a1b8, 0x00000000},
9794 +       {0x0000a1bc, 0x00000000},
9795 +       {0x0000a1c0, 0x00000000},
9796 +       {0x0000a1c4, 0x00000000},
9797 +       {0x0000a1c8, 0x00000000},
9798 +       {0x0000a1cc, 0x00000000},
9799 +       {0x0000a1d0, 0x00000000},
9800 +       {0x0000a1d4, 0x00000000},
9801 +       {0x0000a1d8, 0x00000000},
9802 +       {0x0000a1dc, 0x00000000},
9803 +       {0x0000a1e0, 0x00000000},
9804 +       {0x0000a1e4, 0x00000000},
9805 +       {0x0000a1e8, 0x00000000},
9806 +       {0x0000a1ec, 0x00000000},
9807 +       {0x0000a1f0, 0x00000396},
9808 +       {0x0000a1f4, 0x00000396},
9809 +       {0x0000a1f8, 0x00000396},
9810 +       {0x0000a1fc, 0x00000196},
9811 +       {0x0000b000, 0x00010000},
9812 +       {0x0000b004, 0x00030002},
9813 +       {0x0000b008, 0x00050004},
9814 +       {0x0000b00c, 0x00810080},
9815 +       {0x0000b010, 0x00830082},
9816 +       {0x0000b014, 0x01810180},
9817 +       {0x0000b018, 0x01830182},
9818 +       {0x0000b01c, 0x01850184},
9819 +       {0x0000b020, 0x02810280},
9820 +       {0x0000b024, 0x02830282},
9821 +       {0x0000b028, 0x02850284},
9822 +       {0x0000b02c, 0x02890288},
9823 +       {0x0000b030, 0x028b028a},
9824 +       {0x0000b034, 0x0388028c},
9825 +       {0x0000b038, 0x038a0389},
9826 +       {0x0000b03c, 0x038c038b},
9827 +       {0x0000b040, 0x0390038d},
9828 +       {0x0000b044, 0x03920391},
9829 +       {0x0000b048, 0x03940393},
9830 +       {0x0000b04c, 0x03960395},
9831 +       {0x0000b050, 0x00000000},
9832 +       {0x0000b054, 0x00000000},
9833 +       {0x0000b058, 0x00000000},
9834 +       {0x0000b05c, 0x00000000},
9835 +       {0x0000b060, 0x00000000},
9836 +       {0x0000b064, 0x00000000},
9837 +       {0x0000b068, 0x00000000},
9838 +       {0x0000b06c, 0x00000000},
9839 +       {0x0000b070, 0x00000000},
9840 +       {0x0000b074, 0x00000000},
9841 +       {0x0000b078, 0x00000000},
9842 +       {0x0000b07c, 0x00000000},
9843 +       {0x0000b080, 0x23232323},
9844 +       {0x0000b084, 0x21232323},
9845 +       {0x0000b088, 0x19191c1e},
9846 +       {0x0000b08c, 0x12141417},
9847 +       {0x0000b090, 0x07070e0e},
9848 +       {0x0000b094, 0x03030305},
9849 +       {0x0000b098, 0x00000003},
9850 +       {0x0000b09c, 0x00000000},
9851 +       {0x0000b0a0, 0x00000000},
9852 +       {0x0000b0a4, 0x00000000},
9853 +       {0x0000b0a8, 0x00000000},
9854 +       {0x0000b0ac, 0x00000000},
9855 +       {0x0000b0b0, 0x00000000},
9856 +       {0x0000b0b4, 0x00000000},
9857 +       {0x0000b0b8, 0x00000000},
9858 +       {0x0000b0bc, 0x00000000},
9859 +       {0x0000b0c0, 0x003f0020},
9860 +       {0x0000b0c4, 0x00400041},
9861 +       {0x0000b0c8, 0x0140005f},
9862 +       {0x0000b0cc, 0x0160015f},
9863 +       {0x0000b0d0, 0x017e017f},
9864 +       {0x0000b0d4, 0x02410242},
9865 +       {0x0000b0d8, 0x025f0240},
9866 +       {0x0000b0dc, 0x027f0260},
9867 +       {0x0000b0e0, 0x0341027e},
9868 +       {0x0000b0e4, 0x035f0340},
9869 +       {0x0000b0e8, 0x037f0360},
9870 +       {0x0000b0ec, 0x04400441},
9871 +       {0x0000b0f0, 0x0460045f},
9872 +       {0x0000b0f4, 0x0541047f},
9873 +       {0x0000b0f8, 0x055f0540},
9874 +       {0x0000b0fc, 0x057f0560},
9875 +       {0x0000b100, 0x06400641},
9876 +       {0x0000b104, 0x0660065f},
9877 +       {0x0000b108, 0x067e067f},
9878 +       {0x0000b10c, 0x07410742},
9879 +       {0x0000b110, 0x075f0740},
9880 +       {0x0000b114, 0x077f0760},
9881 +       {0x0000b118, 0x07800781},
9882 +       {0x0000b11c, 0x07a0079f},
9883 +       {0x0000b120, 0x07c107bf},
9884 +       {0x0000b124, 0x000007c0},
9885 +       {0x0000b128, 0x00000000},
9886 +       {0x0000b12c, 0x00000000},
9887 +       {0x0000b130, 0x00000000},
9888 +       {0x0000b134, 0x00000000},
9889 +       {0x0000b138, 0x00000000},
9890 +       {0x0000b13c, 0x00000000},
9891 +       {0x0000b140, 0x003f0020},
9892 +       {0x0000b144, 0x00400041},
9893 +       {0x0000b148, 0x0140005f},
9894 +       {0x0000b14c, 0x0160015f},
9895 +       {0x0000b150, 0x017e017f},
9896 +       {0x0000b154, 0x02410242},
9897 +       {0x0000b158, 0x025f0240},
9898 +       {0x0000b15c, 0x027f0260},
9899 +       {0x0000b160, 0x0341027e},
9900 +       {0x0000b164, 0x035f0340},
9901 +       {0x0000b168, 0x037f0360},
9902 +       {0x0000b16c, 0x04400441},
9903 +       {0x0000b170, 0x0460045f},
9904 +       {0x0000b174, 0x0541047f},
9905 +       {0x0000b178, 0x055f0540},
9906 +       {0x0000b17c, 0x057f0560},
9907 +       {0x0000b180, 0x06400641},
9908 +       {0x0000b184, 0x0660065f},
9909 +       {0x0000b188, 0x067e067f},
9910 +       {0x0000b18c, 0x07410742},
9911 +       {0x0000b190, 0x075f0740},
9912 +       {0x0000b194, 0x077f0760},
9913 +       {0x0000b198, 0x07800781},
9914 +       {0x0000b19c, 0x07a0079f},
9915 +       {0x0000b1a0, 0x07c107bf},
9916 +       {0x0000b1a4, 0x000007c0},
9917 +       {0x0000b1a8, 0x00000000},
9918 +       {0x0000b1ac, 0x00000000},
9919 +       {0x0000b1b0, 0x00000000},
9920 +       {0x0000b1b4, 0x00000000},
9921 +       {0x0000b1b8, 0x00000000},
9922 +       {0x0000b1bc, 0x00000000},
9923 +       {0x0000b1c0, 0x00000000},
9924 +       {0x0000b1c4, 0x00000000},
9925 +       {0x0000b1c8, 0x00000000},
9926 +       {0x0000b1cc, 0x00000000},
9927 +       {0x0000b1d0, 0x00000000},
9928 +       {0x0000b1d4, 0x00000000},
9929 +       {0x0000b1d8, 0x00000000},
9930 +       {0x0000b1dc, 0x00000000},
9931 +       {0x0000b1e0, 0x00000000},
9932 +       {0x0000b1e4, 0x00000000},
9933 +       {0x0000b1e8, 0x00000000},
9934 +       {0x0000b1ec, 0x00000000},
9935 +       {0x0000b1f0, 0x00000396},
9936 +       {0x0000b1f4, 0x00000396},
9937 +       {0x0000b1f8, 0x00000396},
9938 +       {0x0000b1fc, 0x00000196},
9939  };
9940
9941  static const u32 ar9580_1p0_baseband_postamble[][5] = {
9942         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
9943         {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
9944 +       {0x00009814, 0x3280c00a, 0x3280c00a, 0x3280c00a, 0x3280c00a},
9945 +       {0x00009818, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9946         {0x00009820, 0x206a022e, 0x206a022e, 0x206a012e, 0x206a012e},
9947         {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
9948         {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
9949 @@ -956,7 +1169,7 @@ static const u32 ar9580_1p0_baseband_pos
9950         {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
9951         {0x0000a28c, 0x00022222, 0x00022222, 0x00022222, 0x00022222},
9952         {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
9953 -       {0x0000a2d0, 0x00041981, 0x00041981, 0x00041981, 0x00041982},
9954 +       {0x0000a2d0, 0x00041983, 0x00041983, 0x00041981, 0x00041982},
9955         {0x0000a2d8, 0x7999a83b, 0x7999a83b, 0x7999a83b, 0x7999a83b},
9956         {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
9957         {0x0000a830, 0x0000019c, 0x0000019c, 0x0000019c, 0x0000019c},
9958 @@ -994,4 +1207,13 @@ static const u32 ar9580_1p0_pcie_phy_pll
9959         {0x00004044, 0x00000000},
9960  };
9961
9962 +static const u32 ar9580_1p0_baseband_postamble_dfs_channel[][3] = {
9963 +       /* Addr      5G          2G        */
9964 +       {0x00009814, 0x3400c00f, 0x3400c00f},
9965 +       {0x00009824, 0x5ac668d0, 0x5ac668d0},
9966 +       {0x00009828, 0x06903080, 0x06903080},
9967 +       {0x00009e0c, 0x6d4000e2, 0x6d4000e2},
9968 +       {0x00009e14, 0x37b9625e, 0x37b9625e},
9969 +};
9970 +
9971  #endif /* INITVALS_9580_1P0_H */
9972 --- a/drivers/net/wireless/ath/ath9k/reg.h
9973 +++ b/drivers/net/wireless/ath/ath9k/reg.h
9974 @@ -809,6 +809,8 @@
9975  #define AR_SREV_REVISION_9462_21       3
9976  #define AR_SREV_VERSION_9565            0x2C0
9977  #define AR_SREV_REVISION_9565_10        0
9978 +#define AR_SREV_REVISION_9565_101       1
9979 +#define AR_SREV_REVISION_9565_11        2
9980  #define AR_SREV_VERSION_9550           0x400
9981
9982  #define AR_SREV_5416(_ah) \
9983 @@ -881,9 +883,6 @@
9984
9985  #define AR_SREV_9330(_ah) \
9986         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9330))
9987 -#define AR_SREV_9330_10(_ah) \
9988 -       (AR_SREV_9330((_ah)) && \
9989 -        ((_ah)->hw_version.macRev == AR_SREV_REVISION_9330_10))
9990  #define AR_SREV_9330_11(_ah) \
9991         (AR_SREV_9330((_ah)) && \
9992          ((_ah)->hw_version.macRev == AR_SREV_REVISION_9330_11))
9993 @@ -927,10 +926,18 @@
9994
9995  #define AR_SREV_9565(_ah) \
9996         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565))
9997 -
9998  #define AR_SREV_9565_10(_ah) \
9999         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
10000          ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_10))
10001 +#define AR_SREV_9565_101(_ah) \
10002 +       (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
10003 +        ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_101))
10004 +#define AR_SREV_9565_11(_ah) \
10005 +       (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
10006 +        ((_ah)->hw_version.macRev == AR_SREV_REVISION_9565_11))
10007 +#define AR_SREV_9565_11_OR_LATER(_ah) \
10008 +       (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9565) && \
10009 +        ((_ah)->hw_version.macRev >= AR_SREV_REVISION_9565_11))
10010
10011  #define AR_SREV_9550(_ah) \
10012         (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9550))
10013 --- a/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h
10014 +++ b/drivers/net/wireless/ath/ath9k/ar9330_1p1_initvals.h
10015 @@ -18,6 +18,10 @@
10016  #ifndef INITVALS_9330_1P1_H
10017  #define INITVALS_9330_1P1_H
10018
10019 +#define ar9331_1p1_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
10020 +
10021 +#define ar9331_modes_high_power_tx_gain_1p1 ar9331_modes_lowest_ob_db_tx_gain_1p1
10022 +
10023  static const u32 ar9331_1p1_baseband_postamble[][5] = {
10024         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
10025         {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a8005},
10026 @@ -55,7 +59,7 @@ static const u32 ar9331_1p1_baseband_pos
10027         {0x0000a284, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10028         {0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10029         {0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10030 -       {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
10031 +       {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00058d18, 0x00058d18},
10032         {0x0000a2d0, 0x00071982, 0x00071982, 0x00071982, 0x00071982},
10033         {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
10034         {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10035 @@ -252,7 +256,7 @@ static const u32 ar9331_modes_low_ob_db_
10036         {0x0000a2e0, 0xffffcc84, 0xffffcc84, 0xffffcc84, 0xffffcc84},
10037         {0x0000a2e4, 0xfffff000, 0xfffff000, 0xfffff000, 0xfffff000},
10038         {0x0000a2e8, 0xfffe0000, 0xfffe0000, 0xfffe0000, 0xfffe0000},
10039 -       {0x0000a410, 0x000050d7, 0x000050d7, 0x000050d0, 0x000050d0},
10040 +       {0x0000a410, 0x000050d7, 0x000050d7, 0x000050d4, 0x000050d4},
10041         {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
10042         {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
10043         {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
10044 @@ -337,8 +341,6 @@ static const u32 ar9331_modes_low_ob_db_
10045         {0x00016284, 0x14d3f000, 0x14d3f000, 0x14d3f000, 0x14d3f000},
10046  };
10047
10048 -#define ar9331_1p1_baseband_core_txfir_coeff_japan_2484 ar9462_2p0_baseband_core_txfir_coeff_japan_2484
10049 -
10050  static const u32 ar9331_1p1_xtal_25M[][2] = {
10051         /* Addr      allmodes  */
10052         {0x00007038, 0x000002f8},
10053 @@ -373,17 +375,17 @@ static const u32 ar9331_1p1_radio_core[]
10054         {0x000160b4, 0x92480040},
10055         {0x000160c0, 0x006db6db},
10056         {0x000160c4, 0x0186db60},
10057 -       {0x000160c8, 0x6db4db6c},
10058 +       {0x000160c8, 0x6db6db6c},
10059         {0x000160cc, 0x6de6c300},
10060         {0x000160d0, 0x14500820},
10061         {0x00016100, 0x04cb0001},
10062         {0x00016104, 0xfff80015},
10063         {0x00016108, 0x00080010},
10064         {0x0001610c, 0x00170000},
10065 -       {0x00016140, 0x10800000},
10066 +       {0x00016140, 0x50804000},
10067         {0x00016144, 0x01884080},
10068         {0x00016148, 0x000080c0},
10069 -       {0x00016280, 0x01000015},
10070 +       {0x00016280, 0x01001015},
10071         {0x00016284, 0x14d20000},
10072         {0x00016288, 0x00318000},
10073         {0x0001628c, 0x50000000},
10074 @@ -622,12 +624,12 @@ static const u32 ar9331_1p1_baseband_cor
10075         {0x0000a370, 0x00000000},
10076         {0x0000a390, 0x00000001},
10077         {0x0000a394, 0x00000444},
10078 -       {0x0000a398, 0x001f0e0f},
10079 -       {0x0000a39c, 0x0075393f},
10080 -       {0x0000a3a0, 0xb79f6427},
10081 -       {0x0000a3a4, 0x00000000},
10082 -       {0x0000a3a8, 0xaaaaaaaa},
10083 -       {0x0000a3ac, 0x3c466478},
10084 +       {0x0000a398, 0x00000000},
10085 +       {0x0000a39c, 0x210d0401},
10086 +       {0x0000a3a0, 0xab9a7144},
10087 +       {0x0000a3a4, 0x00000011},
10088 +       {0x0000a3a8, 0x3c3c003d},
10089 +       {0x0000a3ac, 0x30310030},
10090         {0x0000a3c0, 0x20202020},
10091         {0x0000a3c4, 0x22222220},
10092         {0x0000a3c8, 0x20200020},
10093 @@ -686,100 +688,18 @@ static const u32 ar9331_1p1_baseband_cor
10094         {0x0000a7dc, 0x00000001},
10095  };
10096
10097 -static const u32 ar9331_modes_high_power_tx_gain_1p1[][5] = {
10098 +static const u32 ar9331_1p1_mac_postamble[][5] = {
10099         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
10100 -       {0x0000a2d8, 0x7999a83a, 0x7999a83a, 0x7999a83a, 0x7999a83a},
10101 -       {0x0000a2dc, 0xffff2a52, 0xffff2a52, 0xffff2a52, 0xffff2a52},
10102 -       {0x0000a2e0, 0xffffcc84, 0xffffcc84, 0xffffcc84, 0xffffcc84},
10103 -       {0x0000a2e4, 0xfffff000, 0xfffff000, 0xfffff000, 0xfffff000},
10104 -       {0x0000a2e8, 0xfffe0000, 0xfffe0000, 0xfffe0000, 0xfffe0000},
10105 -       {0x0000a410, 0x000050d7, 0x000050d7, 0x000050d0, 0x000050d0},
10106 -       {0x0000a500, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
10107 -       {0x0000a504, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
10108 -       {0x0000a508, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
10109 -       {0x0000a50c, 0x11062202, 0x11062202, 0x0d000200, 0x0d000200},
10110 -       {0x0000a510, 0x17022e00, 0x17022e00, 0x11000202, 0x11000202},
10111 -       {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x15000400, 0x15000400},
10112 -       {0x0000a518, 0x25020ec0, 0x25020ec0, 0x19000402, 0x19000402},
10113 -       {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1d000404, 0x1d000404},
10114 -       {0x0000a520, 0x2f001f04, 0x2f001f04, 0x23000a00, 0x23000a00},
10115 -       {0x0000a524, 0x35001fc4, 0x35001fc4, 0x27000a02, 0x27000a02},
10116 -       {0x0000a528, 0x3c022f04, 0x3c022f04, 0x2b000a04, 0x2b000a04},
10117 -       {0x0000a52c, 0x41023e85, 0x41023e85, 0x2d000a20, 0x2d000a20},
10118 -       {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000a22, 0x31000a22},
10119 -       {0x0000a534, 0x4d023f01, 0x4d023f01, 0x35000a24, 0x35000a24},
10120 -       {0x0000a538, 0x53023f4b, 0x53023f4b, 0x38000a43, 0x38000a43},
10121 -       {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x3b000e42, 0x3b000e42},
10122 -       {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x3f000e44, 0x3f000e44},
10123 -       {0x0000a544, 0x6502feca, 0x6502feca, 0x42000e64, 0x42000e64},
10124 -       {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x46000e66, 0x46000e66},
10125 -       {0x0000a54c, 0x7203feca, 0x7203feca, 0x4a000ea6, 0x4a000ea6},
10126 -       {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x4a000ea6, 0x4a000ea6},
10127 -       {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x4a000ea6, 0x4a000ea6},
10128 -       {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x4a000ea6, 0x4a000ea6},
10129 -       {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x4a000ea6, 0x4a000ea6},
10130 -       {0x0000a560, 0x900fff0b, 0x900fff0b, 0x4a000ea6, 0x4a000ea6},
10131 -       {0x0000a564, 0x960fffcb, 0x960fffcb, 0x4a000ea6, 0x4a000ea6},
10132 -       {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
10133 -       {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
10134 -       {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
10135 -       {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
10136 -       {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
10137 -       {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x4a000ea6, 0x4a000ea6},
10138 -       {0x0000a580, 0x00022200, 0x00022200, 0x00000000, 0x00000000},
10139 -       {0x0000a584, 0x05062002, 0x05062002, 0x04000002, 0x04000002},
10140 -       {0x0000a588, 0x0c002e00, 0x0c002e00, 0x08000004, 0x08000004},
10141 -       {0x0000a58c, 0x11062202, 0x11062202, 0x0b000200, 0x0b000200},
10142 -       {0x0000a590, 0x17022e00, 0x17022e00, 0x0f000202, 0x0f000202},
10143 -       {0x0000a594, 0x1d000ec2, 0x1d000ec2, 0x11000400, 0x11000400},
10144 -       {0x0000a598, 0x25020ec0, 0x25020ec0, 0x15000402, 0x15000402},
10145 -       {0x0000a59c, 0x2b020ec3, 0x2b020ec3, 0x19000404, 0x19000404},
10146 -       {0x0000a5a0, 0x2f001f04, 0x2f001f04, 0x1b000603, 0x1b000603},
10147 -       {0x0000a5a4, 0x35001fc4, 0x35001fc4, 0x1f000a02, 0x1f000a02},
10148 -       {0x0000a5a8, 0x3c022f04, 0x3c022f04, 0x23000a04, 0x23000a04},
10149 -       {0x0000a5ac, 0x41023e85, 0x41023e85, 0x26000a20, 0x26000a20},
10150 -       {0x0000a5b0, 0x48023ec6, 0x48023ec6, 0x2a000e20, 0x2a000e20},
10151 -       {0x0000a5b4, 0x4d023f01, 0x4d023f01, 0x2e000e22, 0x2e000e22},
10152 -       {0x0000a5b8, 0x53023f4b, 0x53023f4b, 0x31000e24, 0x31000e24},
10153 -       {0x0000a5bc, 0x5a027f09, 0x5a027f09, 0x34001640, 0x34001640},
10154 -       {0x0000a5c0, 0x5f027fc9, 0x5f027fc9, 0x38001660, 0x38001660},
10155 -       {0x0000a5c4, 0x6502feca, 0x6502feca, 0x3b001861, 0x3b001861},
10156 -       {0x0000a5c8, 0x6b02ff4a, 0x6b02ff4a, 0x3e001a81, 0x3e001a81},
10157 -       {0x0000a5cc, 0x7203feca, 0x7203feca, 0x42001a83, 0x42001a83},
10158 -       {0x0000a5d0, 0x7703ff0b, 0x7703ff0b, 0x44001c84, 0x44001c84},
10159 -       {0x0000a5d4, 0x7d06ffcb, 0x7d06ffcb, 0x48001ce3, 0x48001ce3},
10160 -       {0x0000a5d8, 0x8407ff0b, 0x8407ff0b, 0x4c001ce5, 0x4c001ce5},
10161 -       {0x0000a5dc, 0x8907ffcb, 0x8907ffcb, 0x50001ce9, 0x50001ce9},
10162 -       {0x0000a5e0, 0x900fff0b, 0x900fff0b, 0x54001ceb, 0x54001ceb},
10163 -       {0x0000a5e4, 0x960fffcb, 0x960fffcb, 0x56001eec, 0x56001eec},
10164 -       {0x0000a5e8, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
10165 -       {0x0000a5ec, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
10166 -       {0x0000a5f0, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
10167 -       {0x0000a5f4, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
10168 -       {0x0000a5f8, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
10169 -       {0x0000a5fc, 0x9c1fff0b, 0x9c1fff0b, 0x56001eec, 0x56001eec},
10170 -       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10171 -       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10172 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10173 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10174 -       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10175 -       {0x0000a614, 0x01404000, 0x01404000, 0x01404000, 0x01404000},
10176 -       {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
10177 -       {0x0000a61c, 0x02008802, 0x02008802, 0x02008802, 0x02008802},
10178 -       {0x0000a620, 0x0280c802, 0x0280c802, 0x0280c802, 0x0280c802},
10179 -       {0x0000a624, 0x03010a03, 0x03010a03, 0x03010a03, 0x03010a03},
10180 -       {0x0000a628, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
10181 -       {0x0000a62c, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
10182 -       {0x0000a630, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
10183 -       {0x0000a634, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
10184 -       {0x0000a638, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
10185 -       {0x0000a63c, 0x03010c04, 0x03010c04, 0x03010c04, 0x03010c04},
10186 -       {0x00016044, 0x034922db, 0x034922db, 0x034922db, 0x034922db},
10187 -       {0x00016284, 0x14d3f000, 0x14d3f000, 0x14d3f000, 0x14d3f000},
10188 +       {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
10189 +       {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
10190 +       {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
10191 +       {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
10192 +       {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
10193 +       {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
10194 +       {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
10195 +       {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
10196  };
10197
10198 -#define ar9331_1p1_mac_postamble ar9300_2p2_mac_postamble
10199 -
10200  static const u32 ar9331_1p1_soc_preamble[][2] = {
10201         /* Addr      allmodes  */
10202         {0x00007020, 0x00000000},
10203 --- a/drivers/net/wireless/ath/ath9k/ar9330_1p2_initvals.h
10204 +++ b/drivers/net/wireless/ath/ath9k/ar9330_1p2_initvals.h
10205 @@ -18,6 +18,28 @@
10206  #ifndef INITVALS_9330_1P2_H
10207  #define INITVALS_9330_1P2_H
10208
10209 +#define ar9331_modes_high_power_tx_gain_1p2 ar9331_modes_high_ob_db_tx_gain_1p2
10210 +
10211 +#define ar9331_modes_low_ob_db_tx_gain_1p2 ar9331_modes_high_ob_db_tx_gain_1p2
10212 +
10213 +#define ar9331_modes_lowest_ob_db_tx_gain_1p2 ar9331_modes_high_ob_db_tx_gain_1p2
10214 +
10215 +#define ar9331_1p2_baseband_core_txfir_coeff_japan_2484 ar9331_1p1_baseband_core_txfir_coeff_japan_2484
10216 +
10217 +#define ar9331_1p2_xtal_25M ar9331_1p1_xtal_25M
10218 +
10219 +#define ar9331_1p2_xtal_40M ar9331_1p1_xtal_40M
10220 +
10221 +#define ar9331_1p2_soc_postamble ar9331_1p1_soc_postamble
10222 +
10223 +#define ar9331_1p2_mac_postamble ar9331_1p1_mac_postamble
10224 +
10225 +#define ar9331_1p2_soc_preamble ar9331_1p1_soc_preamble
10226 +
10227 +#define ar9331_1p2_mac_core ar9331_1p1_mac_core
10228 +
10229 +#define ar9331_common_wo_xlna_rx_gain_1p2 ar9331_common_wo_xlna_rx_gain_1p1
10230 +
10231  static const u32 ar9331_modes_high_ob_db_tx_gain_1p2[][5] = {
10232         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
10233         {0x0000a410, 0x000050d7, 0x000050d7, 0x000050d7, 0x000050d7},
10234 @@ -103,57 +125,6 @@ static const u32 ar9331_modes_high_ob_db
10235         {0x0000a63c, 0x04011004, 0x04011004, 0x04011004, 0x04011004},
10236  };
10237
10238 -#define ar9331_modes_high_power_tx_gain_1p2 ar9331_modes_high_ob_db_tx_gain_1p2
10239 -
10240 -#define ar9331_modes_low_ob_db_tx_gain_1p2 ar9331_modes_high_power_tx_gain_1p2
10241 -
10242 -#define ar9331_modes_lowest_ob_db_tx_gain_1p2 ar9331_modes_low_ob_db_tx_gain_1p2
10243 -
10244 -static const u32 ar9331_1p2_baseband_postamble[][5] = {
10245 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
10246 -       {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a8005},
10247 -       {0x00009820, 0x206a002e, 0x206a002e, 0x206a002e, 0x206a002e},
10248 -       {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
10249 -       {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
10250 -       {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
10251 -       {0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x0000059c},
10252 -       {0x00009c00, 0x00000044, 0x00000044, 0x00000044, 0x00000044},
10253 -       {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a4, 0x037216a4},
10254 -       {0x00009e04, 0x00182020, 0x00182020, 0x00182020, 0x00182020},
10255 -       {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
10256 -       {0x00009e10, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e},
10257 -       {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},
10258 -       {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10259 -       {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
10260 -       {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
10261 -       {0x00009e2c, 0x0000001c, 0x0000001c, 0x00003221, 0x00003221},
10262 -       {0x00009e3c, 0xcf946222, 0xcf946222, 0xcf946222, 0xcf946222},
10263 -       {0x00009e44, 0x02321e27, 0x02321e27, 0x02282324, 0x02282324},
10264 -       {0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},
10265 -       {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
10266 -       {0x0000a204, 0x00003fc0, 0x00003fc4, 0x00003fc4, 0x00003fc0},
10267 -       {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
10268 -       {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
10269 -       {0x0000a234, 0x00000fff, 0x00000fff, 0x10000fff, 0x00000fff},
10270 -       {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
10271 -       {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
10272 -       {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
10273 -       {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
10274 -       {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
10275 -       {0x0000a260, 0x3a021501, 0x3a021501, 0x3a021501, 0x3a021501},
10276 -       {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
10277 -       {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
10278 -       {0x0000a284, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10279 -       {0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10280 -       {0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10281 -       {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
10282 -       {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071981},
10283 -       {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
10284 -       {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10285 -       {0x0000ae04, 0x00802020, 0x00802020, 0x00802020, 0x00802020},
10286 -       {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10287 -};
10288 -
10289  static const u32 ar9331_1p2_radio_core[][2] = {
10290         /* Addr      allmodes  */
10291         {0x00016000, 0x36db6db6},
10292 @@ -219,24 +190,318 @@ static const u32 ar9331_1p2_radio_core[]
10293         {0x000163d4, 0x00000000},
10294  };
10295
10296 -#define ar9331_1p2_baseband_core_txfir_coeff_japan_2484 ar9331_1p1_baseband_core_txfir_coeff_japan_2484
10297 -
10298 -#define ar9331_1p2_xtal_25M ar9331_1p1_xtal_25M
10299 -
10300 -#define ar9331_1p2_xtal_40M ar9331_1p1_xtal_40M
10301 -
10302 -#define ar9331_1p2_baseband_core ar9331_1p1_baseband_core
10303 -
10304 -#define ar9331_1p2_soc_postamble ar9331_1p1_soc_postamble
10305 -
10306 -#define ar9331_1p2_mac_postamble ar9331_1p1_mac_postamble
10307 -
10308 -#define ar9331_1p2_soc_preamble ar9331_1p1_soc_preamble
10309 -
10310 -#define ar9331_1p2_mac_core ar9331_1p1_mac_core
10311 +static const u32 ar9331_1p2_baseband_core[][2] = {
10312 +       /* Addr      allmodes  */
10313 +       {0x00009800, 0xafe68e30},
10314 +       {0x00009804, 0xfd14e000},
10315 +       {0x00009808, 0x9c0a8f6b},
10316 +       {0x0000980c, 0x04800000},
10317 +       {0x00009814, 0x9280c00a},
10318 +       {0x00009818, 0x00000000},
10319 +       {0x0000981c, 0x00020028},
10320 +       {0x00009834, 0x5f3ca3de},
10321 +       {0x00009838, 0x0108ecff},
10322 +       {0x0000983c, 0x14750600},
10323 +       {0x00009880, 0x201fff00},
10324 +       {0x00009884, 0x00001042},
10325 +       {0x000098a4, 0x00200400},
10326 +       {0x000098b0, 0x32840bbe},
10327 +       {0x000098d0, 0x004b6a8e},
10328 +       {0x000098d4, 0x00000820},
10329 +       {0x000098dc, 0x00000000},
10330 +       {0x000098f0, 0x00000000},
10331 +       {0x000098f4, 0x00000000},
10332 +       {0x00009c04, 0x00000000},
10333 +       {0x00009c08, 0x03200000},
10334 +       {0x00009c0c, 0x00000000},
10335 +       {0x00009c10, 0x00000000},
10336 +       {0x00009c14, 0x00046384},
10337 +       {0x00009c18, 0x05b6b440},
10338 +       {0x00009c1c, 0x00b6b440},
10339 +       {0x00009d00, 0xc080a333},
10340 +       {0x00009d04, 0x40206c10},
10341 +       {0x00009d08, 0x009c4060},
10342 +       {0x00009d0c, 0x1883800a},
10343 +       {0x00009d10, 0x01834061},
10344 +       {0x00009d14, 0x00c00400},
10345 +       {0x00009d18, 0x00000000},
10346 +       {0x00009e08, 0x0038233c},
10347 +       {0x00009e24, 0x9927b515},
10348 +       {0x00009e28, 0x12ef0200},
10349 +       {0x00009e30, 0x06336f77},
10350 +       {0x00009e34, 0x6af6532f},
10351 +       {0x00009e38, 0x0cc80c00},
10352 +       {0x00009e40, 0x0d261820},
10353 +       {0x00009e4c, 0x00001004},
10354 +       {0x00009e50, 0x00ff03f1},
10355 +       {0x00009fc0, 0x803e4788},
10356 +       {0x00009fc4, 0x0001efb5},
10357 +       {0x00009fcc, 0x40000014},
10358 +       {0x0000a20c, 0x00000000},
10359 +       {0x0000a220, 0x00000000},
10360 +       {0x0000a224, 0x00000000},
10361 +       {0x0000a228, 0x10002310},
10362 +       {0x0000a23c, 0x00000000},
10363 +       {0x0000a244, 0x0c000000},
10364 +       {0x0000a2a0, 0x00000001},
10365 +       {0x0000a2c0, 0x00000001},
10366 +       {0x0000a2c8, 0x00000000},
10367 +       {0x0000a2cc, 0x18c43433},
10368 +       {0x0000a2d4, 0x00000000},
10369 +       {0x0000a2dc, 0x00000000},
10370 +       {0x0000a2e0, 0x00000000},
10371 +       {0x0000a2e4, 0x00000000},
10372 +       {0x0000a2e8, 0x00000000},
10373 +       {0x0000a2ec, 0x00000000},
10374 +       {0x0000a2f0, 0x00000000},
10375 +       {0x0000a2f4, 0x00000000},
10376 +       {0x0000a2f8, 0x00000000},
10377 +       {0x0000a344, 0x00000000},
10378 +       {0x0000a34c, 0x00000000},
10379 +       {0x0000a350, 0x0000a000},
10380 +       {0x0000a364, 0x00000000},
10381 +       {0x0000a370, 0x00000000},
10382 +       {0x0000a390, 0x00000001},
10383 +       {0x0000a394, 0x00000444},
10384 +       {0x0000a398, 0x001f0e0f},
10385 +       {0x0000a39c, 0x0075393f},
10386 +       {0x0000a3a0, 0xb79f6427},
10387 +       {0x0000a3a4, 0x00000000},
10388 +       {0x0000a3a8, 0xaaaaaaaa},
10389 +       {0x0000a3ac, 0x3c466478},
10390 +       {0x0000a3c0, 0x20202020},
10391 +       {0x0000a3c4, 0x22222220},
10392 +       {0x0000a3c8, 0x20200020},
10393 +       {0x0000a3cc, 0x20202020},
10394 +       {0x0000a3d0, 0x20202020},
10395 +       {0x0000a3d4, 0x20202020},
10396 +       {0x0000a3d8, 0x20202020},
10397 +       {0x0000a3dc, 0x20202020},
10398 +       {0x0000a3e0, 0x20202020},
10399 +       {0x0000a3e4, 0x20202020},
10400 +       {0x0000a3e8, 0x20202020},
10401 +       {0x0000a3ec, 0x20202020},
10402 +       {0x0000a3f0, 0x00000000},
10403 +       {0x0000a3f4, 0x00000006},
10404 +       {0x0000a3f8, 0x0cdbd380},
10405 +       {0x0000a3fc, 0x000f0f01},
10406 +       {0x0000a400, 0x8fa91f01},
10407 +       {0x0000a404, 0x00000000},
10408 +       {0x0000a408, 0x0e79e5c6},
10409 +       {0x0000a40c, 0x00820820},
10410 +       {0x0000a414, 0x1ce739ce},
10411 +       {0x0000a418, 0x2d001dce},
10412 +       {0x0000a41c, 0x1ce739ce},
10413 +       {0x0000a420, 0x000001ce},
10414 +       {0x0000a424, 0x1ce739ce},
10415 +       {0x0000a428, 0x000001ce},
10416 +       {0x0000a42c, 0x1ce739ce},
10417 +       {0x0000a430, 0x1ce739ce},
10418 +       {0x0000a434, 0x00000000},
10419 +       {0x0000a438, 0x00001801},
10420 +       {0x0000a43c, 0x00000000},
10421 +       {0x0000a440, 0x00000000},
10422 +       {0x0000a444, 0x00000000},
10423 +       {0x0000a448, 0x04000000},
10424 +       {0x0000a44c, 0x00000001},
10425 +       {0x0000a450, 0x00010000},
10426 +       {0x0000a458, 0x00000000},
10427 +       {0x0000a640, 0x00000000},
10428 +       {0x0000a644, 0x3fad9d74},
10429 +       {0x0000a648, 0x0048060a},
10430 +       {0x0000a64c, 0x00003c37},
10431 +       {0x0000a670, 0x03020100},
10432 +       {0x0000a674, 0x09080504},
10433 +       {0x0000a678, 0x0d0c0b0a},
10434 +       {0x0000a67c, 0x13121110},
10435 +       {0x0000a680, 0x31301514},
10436 +       {0x0000a684, 0x35343332},
10437 +       {0x0000a688, 0x00000036},
10438 +       {0x0000a690, 0x00000838},
10439 +       {0x0000a7c0, 0x00000000},
10440 +       {0x0000a7c4, 0xfffffffc},
10441 +       {0x0000a7c8, 0x00000000},
10442 +       {0x0000a7cc, 0x00000000},
10443 +       {0x0000a7d0, 0x00000000},
10444 +       {0x0000a7d4, 0x00000004},
10445 +       {0x0000a7dc, 0x00000001},
10446 +};
10447
10448 -#define ar9331_common_wo_xlna_rx_gain_1p2 ar9331_common_wo_xlna_rx_gain_1p1
10449 +static const u32 ar9331_1p2_baseband_postamble[][5] = {
10450 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
10451 +       {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8005, 0xd00a8005},
10452 +       {0x00009820, 0x206a002e, 0x206a002e, 0x206a002e, 0x206a002e},
10453 +       {0x00009824, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0, 0x5ac640d0},
10454 +       {0x00009828, 0x06903081, 0x06903081, 0x06903881, 0x06903881},
10455 +       {0x0000982c, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4, 0x05eea6d4},
10456 +       {0x00009830, 0x0000059c, 0x0000059c, 0x0000059c, 0x0000059c},
10457 +       {0x00009c00, 0x00000044, 0x00000044, 0x00000044, 0x00000044},
10458 +       {0x00009e00, 0x0372161e, 0x0372161e, 0x037216a4, 0x037216a4},
10459 +       {0x00009e04, 0x00182020, 0x00182020, 0x00182020, 0x00182020},
10460 +       {0x00009e0c, 0x6c4000e2, 0x6d4000e2, 0x6d4000e2, 0x6c4000e2},
10461 +       {0x00009e10, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e, 0x7ec80d2e},
10462 +       {0x00009e14, 0x31395d5e, 0x3139605e, 0x3139605e, 0x31395d5e},
10463 +       {0x00009e18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10464 +       {0x00009e1c, 0x0001cf9c, 0x0001cf9c, 0x00021f9c, 0x00021f9c},
10465 +       {0x00009e20, 0x000003b5, 0x000003b5, 0x000003ce, 0x000003ce},
10466 +       {0x00009e2c, 0x0000001c, 0x0000001c, 0x00003221, 0x00003221},
10467 +       {0x00009e3c, 0xcf946222, 0xcf946222, 0xcf946222, 0xcf946222},
10468 +       {0x00009e44, 0x02321e27, 0x02321e27, 0x02282324, 0x02282324},
10469 +       {0x00009e48, 0x5030201a, 0x5030201a, 0x50302010, 0x50302010},
10470 +       {0x00009fc8, 0x0003f000, 0x0003f000, 0x0001a000, 0x0001a000},
10471 +       {0x0000a204, 0x00003fc0, 0x00003fc4, 0x00003fc4, 0x00003fc0},
10472 +       {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
10473 +       {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
10474 +       {0x0000a234, 0x00000fff, 0x00000fff, 0x10000fff, 0x00000fff},
10475 +       {0x0000a238, 0xffb81018, 0xffb81018, 0xffb81018, 0xffb81018},
10476 +       {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
10477 +       {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
10478 +       {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
10479 +       {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
10480 +       {0x0000a260, 0x3a021501, 0x3a021501, 0x3a021501, 0x3a021501},
10481 +       {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
10482 +       {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
10483 +       {0x0000a284, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10484 +       {0x0000a288, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10485 +       {0x0000a28c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10486 +       {0x0000a2c4, 0x00158d18, 0x00158d18, 0x00158d18, 0x00158d18},
10487 +       {0x0000a2d0, 0x00071981, 0x00071981, 0x00071981, 0x00071981},
10488 +       {0x0000a2d8, 0xf999a83a, 0xf999a83a, 0xf999a83a, 0xf999a83a},
10489 +       {0x0000a358, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10490 +       {0x0000ae04, 0x00802020, 0x00802020, 0x00802020, 0x00802020},
10491 +       {0x0000ae18, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
10492 +};
10493
10494 -#define ar9331_common_rx_gain_1p2 ar9485_common_rx_gain_1_1
10495 +static const u32 ar9331_common_rx_gain_1p2[][2] = {
10496 +       /* Addr      allmodes  */
10497 +       {0x0000a000, 0x00010000},
10498 +       {0x0000a004, 0x00030002},
10499 +       {0x0000a008, 0x00050004},
10500 +       {0x0000a00c, 0x00810080},
10501 +       {0x0000a010, 0x01800082},
10502 +       {0x0000a014, 0x01820181},
10503 +       {0x0000a018, 0x01840183},
10504 +       {0x0000a01c, 0x01880185},
10505 +       {0x0000a020, 0x018a0189},
10506 +       {0x0000a024, 0x02850284},
10507 +       {0x0000a028, 0x02890288},
10508 +       {0x0000a02c, 0x03850384},
10509 +       {0x0000a030, 0x03890388},
10510 +       {0x0000a034, 0x038b038a},
10511 +       {0x0000a038, 0x038d038c},
10512 +       {0x0000a03c, 0x03910390},
10513 +       {0x0000a040, 0x03930392},
10514 +       {0x0000a044, 0x03950394},
10515 +       {0x0000a048, 0x00000396},
10516 +       {0x0000a04c, 0x00000000},
10517 +       {0x0000a050, 0x00000000},
10518 +       {0x0000a054, 0x00000000},
10519 +       {0x0000a058, 0x00000000},
10520 +       {0x0000a05c, 0x00000000},
10521 +       {0x0000a060, 0x00000000},
10522 +       {0x0000a064, 0x00000000},
10523 +       {0x0000a068, 0x00000000},
10524 +       {0x0000a06c, 0x00000000},
10525 +       {0x0000a070, 0x00000000},
10526 +       {0x0000a074, 0x00000000},
10527 +       {0x0000a078, 0x00000000},
10528 +       {0x0000a07c, 0x00000000},
10529 +       {0x0000a080, 0x28282828},
10530 +       {0x0000a084, 0x28282828},
10531 +       {0x0000a088, 0x28282828},
10532 +       {0x0000a08c, 0x28282828},
10533 +       {0x0000a090, 0x28282828},
10534 +       {0x0000a094, 0x21212128},
10535 +       {0x0000a098, 0x171c1c1c},
10536 +       {0x0000a09c, 0x02020212},
10537 +       {0x0000a0a0, 0x00000202},
10538 +       {0x0000a0a4, 0x00000000},
10539 +       {0x0000a0a8, 0x00000000},
10540 +       {0x0000a0ac, 0x00000000},
10541 +       {0x0000a0b0, 0x00000000},
10542 +       {0x0000a0b4, 0x00000000},
10543 +       {0x0000a0b8, 0x00000000},
10544 +       {0x0000a0bc, 0x00000000},
10545 +       {0x0000a0c0, 0x001f0000},
10546 +       {0x0000a0c4, 0x111f1100},
10547 +       {0x0000a0c8, 0x111d111e},
10548 +       {0x0000a0cc, 0x111b111c},
10549 +       {0x0000a0d0, 0x22032204},
10550 +       {0x0000a0d4, 0x22012202},
10551 +       {0x0000a0d8, 0x221f2200},
10552 +       {0x0000a0dc, 0x221d221e},
10553 +       {0x0000a0e0, 0x33013302},
10554 +       {0x0000a0e4, 0x331f3300},
10555 +       {0x0000a0e8, 0x4402331e},
10556 +       {0x0000a0ec, 0x44004401},
10557 +       {0x0000a0f0, 0x441e441f},
10558 +       {0x0000a0f4, 0x55015502},
10559 +       {0x0000a0f8, 0x551f5500},
10560 +       {0x0000a0fc, 0x6602551e},
10561 +       {0x0000a100, 0x66006601},
10562 +       {0x0000a104, 0x661e661f},
10563 +       {0x0000a108, 0x7703661d},
10564 +       {0x0000a10c, 0x77017702},
10565 +       {0x0000a110, 0x00007700},
10566 +       {0x0000a114, 0x00000000},
10567 +       {0x0000a118, 0x00000000},
10568 +       {0x0000a11c, 0x00000000},
10569 +       {0x0000a120, 0x00000000},
10570 +       {0x0000a124, 0x00000000},
10571 +       {0x0000a128, 0x00000000},
10572 +       {0x0000a12c, 0x00000000},
10573 +       {0x0000a130, 0x00000000},
10574 +       {0x0000a134, 0x00000000},
10575 +       {0x0000a138, 0x00000000},
10576 +       {0x0000a13c, 0x00000000},
10577 +       {0x0000a140, 0x001f0000},
10578 +       {0x0000a144, 0x111f1100},
10579 +       {0x0000a148, 0x111d111e},
10580 +       {0x0000a14c, 0x111b111c},
10581 +       {0x0000a150, 0x22032204},
10582 +       {0x0000a154, 0x22012202},
10583 +       {0x0000a158, 0x221f2200},
10584 +       {0x0000a15c, 0x221d221e},
10585 +       {0x0000a160, 0x33013302},
10586 +       {0x0000a164, 0x331f3300},
10587 +       {0x0000a168, 0x4402331e},
10588 +       {0x0000a16c, 0x44004401},
10589 +       {0x0000a170, 0x441e441f},
10590 +       {0x0000a174, 0x55015502},
10591 +       {0x0000a178, 0x551f5500},
10592 +       {0x0000a17c, 0x6602551e},
10593 +       {0x0000a180, 0x66006601},
10594 +       {0x0000a184, 0x661e661f},
10595 +       {0x0000a188, 0x7703661d},
10596 +       {0x0000a18c, 0x77017702},
10597 +       {0x0000a190, 0x00007700},
10598 +       {0x0000a194, 0x00000000},
10599 +       {0x0000a198, 0x00000000},
10600 +       {0x0000a19c, 0x00000000},
10601 +       {0x0000a1a0, 0x00000000},
10602 +       {0x0000a1a4, 0x00000000},
10603 +       {0x0000a1a8, 0x00000000},
10604 +       {0x0000a1ac, 0x00000000},
10605 +       {0x0000a1b0, 0x00000000},
10606 +       {0x0000a1b4, 0x00000000},
10607 +       {0x0000a1b8, 0x00000000},
10608 +       {0x0000a1bc, 0x00000000},
10609 +       {0x0000a1c0, 0x00000000},
10610 +       {0x0000a1c4, 0x00000000},
10611 +       {0x0000a1c8, 0x00000000},
10612 +       {0x0000a1cc, 0x00000000},
10613 +       {0x0000a1d0, 0x00000000},
10614 +       {0x0000a1d4, 0x00000000},
10615 +       {0x0000a1d8, 0x00000000},
10616 +       {0x0000a1dc, 0x00000000},
10617 +       {0x0000a1e0, 0x00000000},
10618 +       {0x0000a1e4, 0x00000000},
10619 +       {0x0000a1e8, 0x00000000},
10620 +       {0x0000a1ec, 0x00000000},
10621 +       {0x0000a1f0, 0x00000396},
10622 +       {0x0000a1f4, 0x00000396},
10623 +       {0x0000a1f8, 0x00000396},
10624 +       {0x0000a1fc, 0x00000296},
10625 +};
10626
10627  #endif /* INITVALS_9330_1P2_H */
10628 --- a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
10629 +++ b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
10630 @@ -20,6 +20,14 @@
10631
10632  /* AR955X 1.0 */
10633
10634 +#define ar955x_1p0_soc_postamble ar9300_2p2_soc_postamble
10635 +
10636 +#define ar955x_1p0_common_rx_gain_table ar9300Common_rx_gain_table_2p2
10637 +
10638 +#define ar955x_1p0_common_wo_xlna_rx_gain_table ar9300Common_wo_xlna_rx_gain_table_2p2
10639 +
10640 +#define ar955x_1p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
10641 +
10642  static const u32 ar955x_1p0_radio_postamble[][5] = {
10643         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
10644         {0x00016098, 0xd2dd5554, 0xd2dd5554, 0xd28b3330, 0xd28b3330},
10645 @@ -37,13 +45,6 @@ static const u32 ar955x_1p0_radio_postam
10646         {0x00016940, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
10647  };
10648
10649 -static const u32 ar955x_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
10650 -       /* Addr      allmodes  */
10651 -       {0x0000a398, 0x00000000},
10652 -       {0x0000a39c, 0x6f7f0301},
10653 -       {0x0000a3a0, 0xca9228ee},
10654 -};
10655 -
10656  static const u32 ar955x_1p0_baseband_postamble[][5] = {
10657         /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
10658         {0x00009810, 0xd00a8005, 0xd00a8005, 0xd00a8011, 0xd00a8011},
10659 @@ -473,266 +474,6 @@ static const u32 ar955x_1p0_mac_core[][2
10660         {0x000083d0, 0x8c7901ff},
10661  };
10662
10663 -static const u32 ar955x_1p0_common_rx_gain_table[][2] = {
10664 -       /* Addr      allmodes  */
10665 -       {0x0000a000, 0x00010000},
10666 -       {0x0000a004, 0x00030002},
10667 -       {0x0000a008, 0x00050004},
10668 -       {0x0000a00c, 0x00810080},
10669 -       {0x0000a010, 0x00830082},
10670 -       {0x0000a014, 0x01810180},
10671 -       {0x0000a018, 0x01830182},
10672 -       {0x0000a01c, 0x01850184},
10673 -       {0x0000a020, 0x01890188},
10674 -       {0x0000a024, 0x018b018a},
10675 -       {0x0000a028, 0x018d018c},
10676 -       {0x0000a02c, 0x01910190},
10677 -       {0x0000a030, 0x01930192},
10678 -       {0x0000a034, 0x01950194},
10679 -       {0x0000a038, 0x038a0196},
10680 -       {0x0000a03c, 0x038c038b},
10681 -       {0x0000a040, 0x0390038d},
10682 -       {0x0000a044, 0x03920391},
10683 -       {0x0000a048, 0x03940393},
10684 -       {0x0000a04c, 0x03960395},
10685 -       {0x0000a050, 0x00000000},
10686 -       {0x0000a054, 0x00000000},
10687 -       {0x0000a058, 0x00000000},
10688 -       {0x0000a05c, 0x00000000},
10689 -       {0x0000a060, 0x00000000},
10690 -       {0x0000a064, 0x00000000},
10691 -       {0x0000a068, 0x00000000},
10692 -       {0x0000a06c, 0x00000000},
10693 -       {0x0000a070, 0x00000000},
10694 -       {0x0000a074, 0x00000000},
10695 -       {0x0000a078, 0x00000000},
10696 -       {0x0000a07c, 0x00000000},
10697 -       {0x0000a080, 0x22222229},
10698 -       {0x0000a084, 0x1d1d1d1d},
10699 -       {0x0000a088, 0x1d1d1d1d},
10700 -       {0x0000a08c, 0x1d1d1d1d},
10701 -       {0x0000a090, 0x171d1d1d},
10702 -       {0x0000a094, 0x11111717},
10703 -       {0x0000a098, 0x00030311},
10704 -       {0x0000a09c, 0x00000000},
10705 -       {0x0000a0a0, 0x00000000},
10706 -       {0x0000a0a4, 0x00000000},
10707 -       {0x0000a0a8, 0x00000000},
10708 -       {0x0000a0ac, 0x00000000},
10709 -       {0x0000a0b0, 0x00000000},
10710 -       {0x0000a0b4, 0x00000000},
10711 -       {0x0000a0b8, 0x00000000},
10712 -       {0x0000a0bc, 0x00000000},
10713 -       {0x0000a0c0, 0x001f0000},
10714 -       {0x0000a0c4, 0x01000101},
10715 -       {0x0000a0c8, 0x011e011f},
10716 -       {0x0000a0cc, 0x011c011d},
10717 -       {0x0000a0d0, 0x02030204},
10718 -       {0x0000a0d4, 0x02010202},
10719 -       {0x0000a0d8, 0x021f0200},
10720 -       {0x0000a0dc, 0x0302021e},
10721 -       {0x0000a0e0, 0x03000301},
10722 -       {0x0000a0e4, 0x031e031f},
10723 -       {0x0000a0e8, 0x0402031d},
10724 -       {0x0000a0ec, 0x04000401},
10725 -       {0x0000a0f0, 0x041e041f},
10726 -       {0x0000a0f4, 0x0502041d},
10727 -       {0x0000a0f8, 0x05000501},
10728 -       {0x0000a0fc, 0x051e051f},
10729 -       {0x0000a100, 0x06010602},
10730 -       {0x0000a104, 0x061f0600},
10731 -       {0x0000a108, 0x061d061e},
10732 -       {0x0000a10c, 0x07020703},
10733 -       {0x0000a110, 0x07000701},
10734 -       {0x0000a114, 0x00000000},
10735 -       {0x0000a118, 0x00000000},
10736 -       {0x0000a11c, 0x00000000},
10737 -       {0x0000a120, 0x00000000},
10738 -       {0x0000a124, 0x00000000},
10739 -       {0x0000a128, 0x00000000},
10740 -       {0x0000a12c, 0x00000000},
10741 -       {0x0000a130, 0x00000000},
10742 -       {0x0000a134, 0x00000000},
10743 -       {0x0000a138, 0x00000000},
10744 -       {0x0000a13c, 0x00000000},
10745 -       {0x0000a140, 0x001f0000},
10746 -       {0x0000a144, 0x01000101},
10747 -       {0x0000a148, 0x011e011f},
10748 -       {0x0000a14c, 0x011c011d},
10749 -       {0x0000a150, 0x02030204},
10750 -       {0x0000a154, 0x02010202},
10751 -       {0x0000a158, 0x021f0200},
10752 -       {0x0000a15c, 0x0302021e},
10753 -       {0x0000a160, 0x03000301},
10754 -       {0x0000a164, 0x031e031f},
10755 -       {0x0000a168, 0x0402031d},
10756 -       {0x0000a16c, 0x04000401},
10757 -       {0x0000a170, 0x041e041f},
10758 -       {0x0000a174, 0x0502041d},
10759 -       {0x0000a178, 0x05000501},
10760 -       {0x0000a17c, 0x051e051f},
10761 -       {0x0000a180, 0x06010602},
10762 -       {0x0000a184, 0x061f0600},
10763 -       {0x0000a188, 0x061d061e},
10764 -       {0x0000a18c, 0x07020703},
10765 -       {0x0000a190, 0x07000701},
10766 -       {0x0000a194, 0x00000000},
10767 -       {0x0000a198, 0x00000000},
10768 -       {0x0000a19c, 0x00000000},
10769 -       {0x0000a1a0, 0x00000000},
10770 -       {0x0000a1a4, 0x00000000},
10771 -       {0x0000a1a8, 0x00000000},
10772 -       {0x0000a1ac, 0x00000000},
10773 -       {0x0000a1b0, 0x00000000},
10774 -       {0x0000a1b4, 0x00000000},
10775 -       {0x0000a1b8, 0x00000000},
10776 -       {0x0000a1bc, 0x00000000},
10777 -       {0x0000a1c0, 0x00000000},
10778 -       {0x0000a1c4, 0x00000000},
10779 -       {0x0000a1c8, 0x00000000},
10780 -       {0x0000a1cc, 0x00000000},
10781 -       {0x0000a1d0, 0x00000000},
10782 -       {0x0000a1d4, 0x00000000},
10783 -       {0x0000a1d8, 0x00000000},
10784 -       {0x0000a1dc, 0x00000000},
10785 -       {0x0000a1e0, 0x00000000},
10786 -       {0x0000a1e4, 0x00000000},
10787 -       {0x0000a1e8, 0x00000000},
10788 -       {0x0000a1ec, 0x00000000},
10789 -       {0x0000a1f0, 0x00000396},
10790 -       {0x0000a1f4, 0x00000396},
10791 -       {0x0000a1f8, 0x00000396},
10792 -       {0x0000a1fc, 0x00000196},
10793 -       {0x0000b000, 0x00010000},
10794 -       {0x0000b004, 0x00030002},
10795 -       {0x0000b008, 0x00050004},
10796 -       {0x0000b00c, 0x00810080},
10797 -       {0x0000b010, 0x00830082},
10798 -       {0x0000b014, 0x01810180},
10799 -       {0x0000b018, 0x01830182},
10800 -       {0x0000b01c, 0x01850184},
10801 -       {0x0000b020, 0x02810280},
10802 -       {0x0000b024, 0x02830282},
10803 -       {0x0000b028, 0x02850284},
10804 -       {0x0000b02c, 0x02890288},
10805 -       {0x0000b030, 0x028b028a},
10806 -       {0x0000b034, 0x0388028c},
10807 -       {0x0000b038, 0x038a0389},
10808 -       {0x0000b03c, 0x038c038b},
10809 -       {0x0000b040, 0x0390038d},
10810 -       {0x0000b044, 0x03920391},
10811 -       {0x0000b048, 0x03940393},
10812 -       {0x0000b04c, 0x03960395},
10813 -       {0x0000b050, 0x00000000},
10814 -       {0x0000b054, 0x00000000},
10815 -       {0x0000b058, 0x00000000},
10816 -       {0x0000b05c, 0x00000000},
10817 -       {0x0000b060, 0x00000000},
10818 -       {0x0000b064, 0x00000000},
10819 -       {0x0000b068, 0x00000000},
10820 -       {0x0000b06c, 0x00000000},
10821 -       {0x0000b070, 0x00000000},
10822 -       {0x0000b074, 0x00000000},
10823 -       {0x0000b078, 0x00000000},
10824 -       {0x0000b07c, 0x00000000},
10825 -       {0x0000b080, 0x23232323},
10826 -       {0x0000b084, 0x21232323},
10827 -       {0x0000b088, 0x19191c1e},
10828 -       {0x0000b08c, 0x12141417},
10829 -       {0x0000b090, 0x07070e0e},
10830 -       {0x0000b094, 0x03030305},
10831 -       {0x0000b098, 0x00000003},
10832 -       {0x0000b09c, 0x00000000},
10833 -       {0x0000b0a0, 0x00000000},
10834 -       {0x0000b0a4, 0x00000000},
10835 -       {0x0000b0a8, 0x00000000},
10836 -       {0x0000b0ac, 0x00000000},
10837 -       {0x0000b0b0, 0x00000000},
10838 -       {0x0000b0b4, 0x00000000},
10839 -       {0x0000b0b8, 0x00000000},
10840 -       {0x0000b0bc, 0x00000000},
10841 -       {0x0000b0c0, 0x003f0020},
10842 -       {0x0000b0c4, 0x00400041},
10843 -       {0x0000b0c8, 0x0140005f},
10844 -       {0x0000b0cc, 0x0160015f},
10845 -       {0x0000b0d0, 0x017e017f},
10846 -       {0x0000b0d4, 0x02410242},
10847 -       {0x0000b0d8, 0x025f0240},
10848 -       {0x0000b0dc, 0x027f0260},
10849 -       {0x0000b0e0, 0x0341027e},
10850 -       {0x0000b0e4, 0x035f0340},
10851 -       {0x0000b0e8, 0x037f0360},
10852 -       {0x0000b0ec, 0x04400441},
10853 -       {0x0000b0f0, 0x0460045f},
10854 -       {0x0000b0f4, 0x0541047f},
10855 -       {0x0000b0f8, 0x055f0540},
10856 -       {0x0000b0fc, 0x057f0560},
10857 -       {0x0000b100, 0x06400641},
10858 -       {0x0000b104, 0x0660065f},
10859 -       {0x0000b108, 0x067e067f},
10860 -       {0x0000b10c, 0x07410742},
10861 -       {0x0000b110, 0x075f0740},
10862 -       {0x0000b114, 0x077f0760},
10863 -       {0x0000b118, 0x07800781},
10864 -       {0x0000b11c, 0x07a0079f},
10865 -       {0x0000b120, 0x07c107bf},
10866 -       {0x0000b124, 0x000007c0},
10867 -       {0x0000b128, 0x00000000},
10868 -       {0x0000b12c, 0x00000000},
10869 -       {0x0000b130, 0x00000000},
10870 -       {0x0000b134, 0x00000000},
10871 -       {0x0000b138, 0x00000000},
10872 -       {0x0000b13c, 0x00000000},
10873 -       {0x0000b140, 0x003f0020},
10874 -       {0x0000b144, 0x00400041},
10875 -       {0x0000b148, 0x0140005f},
10876 -       {0x0000b14c, 0x0160015f},
10877 -       {0x0000b150, 0x017e017f},
10878 -       {0x0000b154, 0x02410242},
10879 -       {0x0000b158, 0x025f0240},
10880 -       {0x0000b15c, 0x027f0260},
10881 -       {0x0000b160, 0x0341027e},
10882 -       {0x0000b164, 0x035f0340},
10883 -       {0x0000b168, 0x037f0360},
10884 -       {0x0000b16c, 0x04400441},
10885 -       {0x0000b170, 0x0460045f},
10886 -       {0x0000b174, 0x0541047f},
10887 -       {0x0000b178, 0x055f0540},
10888 -       {0x0000b17c, 0x057f0560},
10889 -       {0x0000b180, 0x06400641},
10890 -       {0x0000b184, 0x0660065f},
10891 -       {0x0000b188, 0x067e067f},
10892 -       {0x0000b18c, 0x07410742},
10893 -       {0x0000b190, 0x075f0740},
10894 -       {0x0000b194, 0x077f0760},
10895 -       {0x0000b198, 0x07800781},
10896 -       {0x0000b19c, 0x07a0079f},
10897 -       {0x0000b1a0, 0x07c107bf},
10898 -       {0x0000b1a4, 0x000007c0},
10899 -       {0x0000b1a8, 0x00000000},
10900 -       {0x0000b1ac, 0x00000000},
10901 -       {0x0000b1b0, 0x00000000},
10902 -       {0x0000b1b4, 0x00000000},
10903 -       {0x0000b1b8, 0x00000000},
10904 -       {0x0000b1bc, 0x00000000},
10905 -       {0x0000b1c0, 0x00000000},
10906 -       {0x0000b1c4, 0x00000000},
10907 -       {0x0000b1c8, 0x00000000},
10908 -       {0x0000b1cc, 0x00000000},
10909 -       {0x0000b1d0, 0x00000000},
10910 -       {0x0000b1d4, 0x00000000},
10911 -       {0x0000b1d8, 0x00000000},
10912 -       {0x0000b1dc, 0x00000000},
10913 -       {0x0000b1e0, 0x00000000},
10914 -       {0x0000b1e4, 0x00000000},
10915 -       {0x0000b1e8, 0x00000000},
10916 -       {0x0000b1ec, 0x00000000},
10917 -       {0x0000b1f0, 0x00000396},
10918 -       {0x0000b1f4, 0x00000396},
10919 -       {0x0000b1f8, 0x00000396},
10920 -       {0x0000b1fc, 0x00000196},
10921 -};
10922 -
10923  static const u32 ar955x_1p0_baseband_core[][2] = {
10924         /* Addr      allmodes  */
10925         {0x00009800, 0xafe68e30},
10926 @@ -891,266 +632,6 @@ static const u32 ar955x_1p0_baseband_cor
10927         {0x0000c420, 0x00000000},
10928  };
10929
10930 -static const u32 ar955x_1p0_common_wo_xlna_rx_gain_table[][2] = {
10931 -       /* Addr      allmodes  */
10932 -       {0x0000a000, 0x00010000},
10933 -       {0x0000a004, 0x00030002},
10934 -       {0x0000a008, 0x00050004},
10935 -       {0x0000a00c, 0x00810080},
10936 -       {0x0000a010, 0x00830082},
10937 -       {0x0000a014, 0x01810180},
10938 -       {0x0000a018, 0x01830182},
10939 -       {0x0000a01c, 0x01850184},
10940 -       {0x0000a020, 0x01890188},
10941 -       {0x0000a024, 0x018b018a},
10942 -       {0x0000a028, 0x018d018c},
10943 -       {0x0000a02c, 0x03820190},
10944 -       {0x0000a030, 0x03840383},
10945 -       {0x0000a034, 0x03880385},
10946 -       {0x0000a038, 0x038a0389},
10947 -       {0x0000a03c, 0x038c038b},
10948 -       {0x0000a040, 0x0390038d},
10949 -       {0x0000a044, 0x03920391},
10950 -       {0x0000a048, 0x03940393},
10951 -       {0x0000a04c, 0x03960395},
10952 -       {0x0000a050, 0x00000000},
10953 -       {0x0000a054, 0x00000000},
10954 -       {0x0000a058, 0x00000000},
10955 -       {0x0000a05c, 0x00000000},
10956 -       {0x0000a060, 0x00000000},
10957 -       {0x0000a064, 0x00000000},
10958 -       {0x0000a068, 0x00000000},
10959 -       {0x0000a06c, 0x00000000},
10960 -       {0x0000a070, 0x00000000},
10961 -       {0x0000a074, 0x00000000},
10962 -       {0x0000a078, 0x00000000},
10963 -       {0x0000a07c, 0x00000000},
10964 -       {0x0000a080, 0x29292929},
10965 -       {0x0000a084, 0x29292929},
10966 -       {0x0000a088, 0x29292929},
10967 -       {0x0000a08c, 0x29292929},
10968 -       {0x0000a090, 0x22292929},
10969 -       {0x0000a094, 0x1d1d2222},
10970 -       {0x0000a098, 0x0c111117},
10971 -       {0x0000a09c, 0x00030303},
10972 -       {0x0000a0a0, 0x00000000},
10973 -       {0x0000a0a4, 0x00000000},
10974 -       {0x0000a0a8, 0x00000000},
10975 -       {0x0000a0ac, 0x00000000},
10976 -       {0x0000a0b0, 0x00000000},
10977 -       {0x0000a0b4, 0x00000000},
10978 -       {0x0000a0b8, 0x00000000},
10979 -       {0x0000a0bc, 0x00000000},
10980 -       {0x0000a0c0, 0x001f0000},
10981 -       {0x0000a0c4, 0x01000101},
10982 -       {0x0000a0c8, 0x011e011f},
10983 -       {0x0000a0cc, 0x011c011d},
10984 -       {0x0000a0d0, 0x02030204},
10985 -       {0x0000a0d4, 0x02010202},
10986 -       {0x0000a0d8, 0x021f0200},
10987 -       {0x0000a0dc, 0x0302021e},
10988 -       {0x0000a0e0, 0x03000301},
10989 -       {0x0000a0e4, 0x031e031f},
10990 -       {0x0000a0e8, 0x0402031d},
10991 -       {0x0000a0ec, 0x04000401},
10992 -       {0x0000a0f0, 0x041e041f},
10993 -       {0x0000a0f4, 0x0502041d},
10994 -       {0x0000a0f8, 0x05000501},
10995 -       {0x0000a0fc, 0x051e051f},
10996 -       {0x0000a100, 0x06010602},
10997 -       {0x0000a104, 0x061f0600},
10998 -       {0x0000a108, 0x061d061e},
10999 -       {0x0000a10c, 0x07020703},
11000 -       {0x0000a110, 0x07000701},
11001 -       {0x0000a114, 0x00000000},
11002 -       {0x0000a118, 0x00000000},
11003 -       {0x0000a11c, 0x00000000},
11004 -       {0x0000a120, 0x00000000},
11005 -       {0x0000a124, 0x00000000},
11006 -       {0x0000a128, 0x00000000},
11007 -       {0x0000a12c, 0x00000000},
11008 -       {0x0000a130, 0x00000000},
11009 -       {0x0000a134, 0x00000000},
11010 -       {0x0000a138, 0x00000000},
11011 -       {0x0000a13c, 0x00000000},
11012 -       {0x0000a140, 0x001f0000},
11013 -       {0x0000a144, 0x01000101},
11014 -       {0x0000a148, 0x011e011f},
11015 -       {0x0000a14c, 0x011c011d},
11016 -       {0x0000a150, 0x02030204},
11017 -       {0x0000a154, 0x02010202},
11018 -       {0x0000a158, 0x021f0200},
11019 -       {0x0000a15c, 0x0302021e},
11020 -       {0x0000a160, 0x03000301},
11021 -       {0x0000a164, 0x031e031f},
11022 -       {0x0000a168, 0x0402031d},
11023 -       {0x0000a16c, 0x04000401},
11024 -       {0x0000a170, 0x041e041f},
11025 -       {0x0000a174, 0x0502041d},
11026 -       {0x0000a178, 0x05000501},
11027 -       {0x0000a17c, 0x051e051f},
11028 -       {0x0000a180, 0x06010602},
11029 -       {0x0000a184, 0x061f0600},
11030 -       {0x0000a188, 0x061d061e},
11031 -       {0x0000a18c, 0x07020703},
11032 -       {0x0000a190, 0x07000701},
11033 -       {0x0000a194, 0x00000000},
11034 -       {0x0000a198, 0x00000000},
11035 -       {0x0000a19c, 0x00000000},
11036 -       {0x0000a1a0, 0x00000000},
11037 -       {0x0000a1a4, 0x00000000},
11038 -       {0x0000a1a8, 0x00000000},
11039 -       {0x0000a1ac, 0x00000000},
11040 -       {0x0000a1b0, 0x00000000},
11041 -       {0x0000a1b4, 0x00000000},
11042 -       {0x0000a1b8, 0x00000000},
11043 -       {0x0000a1bc, 0x00000000},
11044 -       {0x0000a1c0, 0x00000000},
11045 -       {0x0000a1c4, 0x00000000},
11046 -       {0x0000a1c8, 0x00000000},
11047 -       {0x0000a1cc, 0x00000000},
11048 -       {0x0000a1d0, 0x00000000},
11049 -       {0x0000a1d4, 0x00000000},
11050 -       {0x0000a1d8, 0x00000000},
11051 -       {0x0000a1dc, 0x00000000},
11052 -       {0x0000a1e0, 0x00000000},
11053 -       {0x0000a1e4, 0x00000000},
11054 -       {0x0000a1e8, 0x00000000},
11055 -       {0x0000a1ec, 0x00000000},
11056 -       {0x0000a1f0, 0x00000396},
11057 -       {0x0000a1f4, 0x00000396},
11058 -       {0x0000a1f8, 0x00000396},
11059 -       {0x0000a1fc, 0x00000196},
11060 -       {0x0000b000, 0x00010000},
11061 -       {0x0000b004, 0x00030002},
11062 -       {0x0000b008, 0x00050004},
11063 -       {0x0000b00c, 0x00810080},
11064 -       {0x0000b010, 0x00830082},
11065 -       {0x0000b014, 0x01810180},
11066 -       {0x0000b018, 0x01830182},
11067 -       {0x0000b01c, 0x01850184},
11068 -       {0x0000b020, 0x02810280},
11069 -       {0x0000b024, 0x02830282},
11070 -       {0x0000b028, 0x02850284},
11071 -       {0x0000b02c, 0x02890288},
11072 -       {0x0000b030, 0x028b028a},
11073 -       {0x0000b034, 0x0388028c},
11074 -       {0x0000b038, 0x038a0389},
11075 -       {0x0000b03c, 0x038c038b},
11076 -       {0x0000b040, 0x0390038d},
11077 -       {0x0000b044, 0x03920391},
11078 -       {0x0000b048, 0x03940393},
11079 -       {0x0000b04c, 0x03960395},
11080 -       {0x0000b050, 0x00000000},
11081 -       {0x0000b054, 0x00000000},
11082 -       {0x0000b058, 0x00000000},
11083 -       {0x0000b05c, 0x00000000},
11084 -       {0x0000b060, 0x00000000},
11085 -       {0x0000b064, 0x00000000},
11086 -       {0x0000b068, 0x00000000},
11087 -       {0x0000b06c, 0x00000000},
11088 -       {0x0000b070, 0x00000000},
11089 -       {0x0000b074, 0x00000000},
11090 -       {0x0000b078, 0x00000000},
11091 -       {0x0000b07c, 0x00000000},
11092 -       {0x0000b080, 0x32323232},
11093 -       {0x0000b084, 0x2f2f3232},
11094 -       {0x0000b088, 0x23282a2d},
11095 -       {0x0000b08c, 0x1c1e2123},
11096 -       {0x0000b090, 0x14171919},
11097 -       {0x0000b094, 0x0e0e1214},
11098 -       {0x0000b098, 0x03050707},
11099 -       {0x0000b09c, 0x00030303},
11100 -       {0x0000b0a0, 0x00000000},
11101 -       {0x0000b0a4, 0x00000000},
11102 -       {0x0000b0a8, 0x00000000},
11103 -       {0x0000b0ac, 0x00000000},
11104 -       {0x0000b0b0, 0x00000000},
11105 -       {0x0000b0b4, 0x00000000},
11106 -       {0x0000b0b8, 0x00000000},
11107 -       {0x0000b0bc, 0x00000000},
11108 -       {0x0000b0c0, 0x003f0020},
11109 -       {0x0000b0c4, 0x00400041},
11110 -       {0x0000b0c8, 0x0140005f},
11111 -       {0x0000b0cc, 0x0160015f},
11112 -       {0x0000b0d0, 0x017e017f},
11113 -       {0x0000b0d4, 0x02410242},
11114 -       {0x0000b0d8, 0x025f0240},
11115 -       {0x0000b0dc, 0x027f0260},
11116 -       {0x0000b0e0, 0x0341027e},
11117 -       {0x0000b0e4, 0x035f0340},
11118 -       {0x0000b0e8, 0x037f0360},
11119 -       {0x0000b0ec, 0x04400441},
11120 -       {0x0000b0f0, 0x0460045f},
11121 -       {0x0000b0f4, 0x0541047f},
11122 -       {0x0000b0f8, 0x055f0540},
11123 -       {0x0000b0fc, 0x057f0560},
11124 -       {0x0000b100, 0x06400641},
11125 -       {0x0000b104, 0x0660065f},
11126 -       {0x0000b108, 0x067e067f},
11127 -       {0x0000b10c, 0x07410742},
11128 -       {0x0000b110, 0x075f0740},
11129 -       {0x0000b114, 0x077f0760},
11130 -       {0x0000b118, 0x07800781},
11131 -       {0x0000b11c, 0x07a0079f},
11132 -       {0x0000b120, 0x07c107bf},
11133 -       {0x0000b124, 0x000007c0},
11134 -       {0x0000b128, 0x00000000},
11135 -       {0x0000b12c, 0x00000000},
11136 -       {0x0000b130, 0x00000000},
11137 -       {0x0000b134, 0x00000000},
11138 -       {0x0000b138, 0x00000000},
11139 -       {0x0000b13c, 0x00000000},
11140 -       {0x0000b140, 0x003f0020},
11141 -       {0x0000b144, 0x00400041},
11142 -       {0x0000b148, 0x0140005f},
11143 -       {0x0000b14c, 0x0160015f},
11144 -       {0x0000b150, 0x017e017f},
11145 -       {0x0000b154, 0x02410242},
11146 -       {0x0000b158, 0x025f0240},
11147 -       {0x0000b15c, 0x027f0260},
11148 -       {0x0000b160, 0x0341027e},
11149 -       {0x0000b164, 0x035f0340},
11150 -       {0x0000b168, 0x037f0360},
11151 -       {0x0000b16c, 0x04400441},
11152 -       {0x0000b170, 0x0460045f},
11153 -       {0x0000b174, 0x0541047f},
11154 -       {0x0000b178, 0x055f0540},
11155 -       {0x0000b17c, 0x057f0560},
11156 -       {0x0000b180, 0x06400641},
11157 -       {0x0000b184, 0x0660065f},
11158 -       {0x0000b188, 0x067e067f},
11159 -       {0x0000b18c, 0x07410742},
11160 -       {0x0000b190, 0x075f0740},
11161 -       {0x0000b194, 0x077f0760},
11162 -       {0x0000b198, 0x07800781},
11163 -       {0x0000b19c, 0x07a0079f},
11164 -       {0x0000b1a0, 0x07c107bf},
11165 -       {0x0000b1a4, 0x000007c0},
11166 -       {0x0000b1a8, 0x00000000},
11167 -       {0x0000b1ac, 0x00000000},
11168 -       {0x0000b1b0, 0x00000000},
11169 -       {0x0000b1b4, 0x00000000},
11170 -       {0x0000b1b8, 0x00000000},
11171 -       {0x0000b1bc, 0x00000000},
11172 -       {0x0000b1c0, 0x00000000},
11173 -       {0x0000b1c4, 0x00000000},
11174 -       {0x0000b1c8, 0x00000000},
11175 -       {0x0000b1cc, 0x00000000},
11176 -       {0x0000b1d0, 0x00000000},
11177 -       {0x0000b1d4, 0x00000000},
11178 -       {0x0000b1d8, 0x00000000},
11179 -       {0x0000b1dc, 0x00000000},
11180 -       {0x0000b1e0, 0x00000000},
11181 -       {0x0000b1e4, 0x00000000},
11182 -       {0x0000b1e8, 0x00000000},
11183 -       {0x0000b1ec, 0x00000000},
11184 -       {0x0000b1f0, 0x00000396},
11185 -       {0x0000b1f4, 0x00000396},
11186 -       {0x0000b1f8, 0x00000396},
11187 -       {0x0000b1fc, 0x00000196},
11188 -};
11189 -
11190  static const u32 ar955x_1p0_soc_preamble[][2] = {
11191         /* Addr      allmodes  */
11192         {0x00007000, 0x00000000},
11193 @@ -1263,11 +744,6 @@ static const u32 ar955x_1p0_modes_no_xpa
11194         {0x00016848, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
11195  };
11196
11197 -static const u32 ar955x_1p0_soc_postamble[][5] = {
11198 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
11199 -       {0x00007010, 0x00000023, 0x00000023, 0x00000023, 0x00000023},
11200 -};
11201 -
11202  static const u32 ar955x_1p0_modes_fast_clock[][3] = {
11203         /* Addr      5G_HT20     5G_HT40   */
11204         {0x00001030, 0x00000268, 0x000004d0},
11205 --- a/drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h
11206 +++ b/drivers/net/wireless/ath/ath9k/ar9565_1p0_initvals.h
11207 @@ -20,6 +20,12 @@
11208
11209  /* AR9565 1.0 */
11210
11211 +#define ar9565_1p0_mac_postamble ar9331_1p1_mac_postamble
11212 +
11213 +#define ar9565_1p0_Modes_lowest_ob_db_tx_gain_table ar9565_1p0_modes_low_ob_db_tx_gain_table
11214 +
11215 +#define ar9565_1p0_baseband_core_txfir_coeff_japan_2484 ar9300_2p2_baseband_core_txfir_coeff_japan_2484
11216 +
11217  static const u32 ar9565_1p0_mac_core[][2] = {
11218         /* Addr      allmodes  */
11219         {0x00000008, 0x00000000},
11220 @@ -182,18 +188,6 @@ static const u32 ar9565_1p0_mac_core[][2
11221         {0x000083d0, 0x800301ff},
11222  };
11223
11224 -static const u32 ar9565_1p0_mac_postamble[][5] = {
11225 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
11226 -       {0x00001030, 0x00000230, 0x00000460, 0x000002c0, 0x00000160},
11227 -       {0x00001070, 0x00000168, 0x000002d0, 0x00000318, 0x0000018c},
11228 -       {0x000010b0, 0x00000e60, 0x00001cc0, 0x00007c70, 0x00003e38},
11229 -       {0x00008014, 0x03e803e8, 0x07d007d0, 0x10801600, 0x08400b00},
11230 -       {0x0000801c, 0x128d8027, 0x128d804f, 0x12e00057, 0x12e0002b},
11231 -       {0x00008120, 0x08f04800, 0x08f04800, 0x08f04810, 0x08f04810},
11232 -       {0x000081d0, 0x00003210, 0x00003210, 0x0000320a, 0x0000320a},
11233 -       {0x00008318, 0x00003e80, 0x00007d00, 0x00006880, 0x00003440},
11234 -};
11235 -
11236  static const u32 ar9565_1p0_baseband_core[][2] = {
11237         /* Addr      allmodes  */
11238         {0x00009800, 0xafe68e30},
11239 @@ -711,66 +705,6 @@ static const u32 ar9565_1p0_Common_rx_ga
11240         {0x0000b1fc, 0x00000196},
11241  };
11242
11243 -static const u32 ar9565_1p0_Modes_lowest_ob_db_tx_gain_table[][5] = {
11244 -       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
11245 -       {0x0000a2dc, 0xfc0a9380, 0xfc0a9380, 0xfdab5b52, 0xfdab5b52},
11246 -       {0x0000a2e0, 0xffecec00, 0xffecec00, 0xfd339c84, 0xfd339c84},
11247 -       {0x0000a2e4, 0xfc0f0000, 0xfc0f0000, 0xfec3e000, 0xfec3e000},
11248 -       {0x0000a2e8, 0xfc100000, 0xfc100000, 0xfffc0000, 0xfffc0000},
11249 -       {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
11250 -       {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11251 -       {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
11252 -       {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
11253 -       {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
11254 -       {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
11255 -       {0x0000a514, 0x1c000223, 0x1c000223, 0x12000400, 0x12000400},
11256 -       {0x0000a518, 0x21020220, 0x21020220, 0x16000402, 0x16000402},
11257 -       {0x0000a51c, 0x27020223, 0x27020223, 0x19000404, 0x19000404},
11258 -       {0x0000a520, 0x2b022220, 0x2b022220, 0x1c000603, 0x1c000603},
11259 -       {0x0000a524, 0x2f022222, 0x2f022222, 0x21000a02, 0x21000a02},
11260 -       {0x0000a528, 0x34022225, 0x34022225, 0x25000a04, 0x25000a04},
11261 -       {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x28000a20, 0x28000a20},
11262 -       {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2c000e20, 0x2c000e20},
11263 -       {0x0000a534, 0x4202242a, 0x4202242a, 0x30000e22, 0x30000e22},
11264 -       {0x0000a538, 0x4702244a, 0x4702244a, 0x34000e24, 0x34000e24},
11265 -       {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x38001640, 0x38001640},
11266 -       {0x0000a540, 0x4e02246c, 0x4e02246c, 0x3c001660, 0x3c001660},
11267 -       {0x0000a544, 0x5302266c, 0x5302266c, 0x3f001861, 0x3f001861},
11268 -       {0x0000a548, 0x5702286c, 0x5702286c, 0x43001a81, 0x43001a81},
11269 -       {0x0000a54c, 0x5c04286b, 0x5c04286b, 0x47001a83, 0x47001a83},
11270 -       {0x0000a550, 0x61042a6c, 0x61042a6c, 0x4a001c84, 0x4a001c84},
11271 -       {0x0000a554, 0x66062a6c, 0x66062a6c, 0x4e001ce3, 0x4e001ce3},
11272 -       {0x0000a558, 0x6b062e6c, 0x6b062e6c, 0x52001ce5, 0x52001ce5},
11273 -       {0x0000a55c, 0x7006308c, 0x7006308c, 0x56001ce9, 0x56001ce9},
11274 -       {0x0000a560, 0x730a308a, 0x730a308a, 0x5a001ceb, 0x5a001ceb},
11275 -       {0x0000a564, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
11276 -       {0x0000a568, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
11277 -       {0x0000a56c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
11278 -       {0x0000a570, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
11279 -       {0x0000a574, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
11280 -       {0x0000a578, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
11281 -       {0x0000a57c, 0x770a308c, 0x770a308c, 0x5d001eec, 0x5d001eec},
11282 -       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11283 -       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11284 -       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11285 -       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11286 -       {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11287 -       {0x0000a614, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11288 -       {0x0000a618, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11289 -       {0x0000a61c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11290 -       {0x0000a620, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11291 -       {0x0000a624, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11292 -       {0x0000a628, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11293 -       {0x0000a62c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11294 -       {0x0000a630, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11295 -       {0x0000a634, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11296 -       {0x0000a638, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11297 -       {0x0000a63c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11298 -       {0x00016044, 0x012482d4, 0x012482d4, 0x012482d4, 0x012482d4},
11299 -       {0x00016048, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11300 -       {0x00016054, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11301 -};
11302 -
11303  static const u32 ar9565_1p0_pciephy_clkreq_disable_L1[][2] = {
11304         /* Addr      allmodes  */
11305         {0x00018c00, 0x18212ede},
11306 @@ -1231,11 +1165,4 @@ static const u32 ar9565_1p0_modes_high_p
11307         {0x00016054, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11308  };
11309
11310 -static const u32 ar9565_1p0_baseband_core_txfir_coeff_japan_2484[][2] = {
11311 -       /* Addr      allmodes  */
11312 -       {0x0000a398, 0x00000000},
11313 -       {0x0000a39c, 0x6f7f0301},
11314 -       {0x0000a3a0, 0xca9228ee},
11315 -};
11316 -
11317  #endif /* INITVALS_9565_1P0_H */
11318 --- a/include/linux/ath9k_platform.h
11319 +++ b/include/linux/ath9k_platform.h
11320 @@ -32,6 +32,8 @@ struct ath9k_platform_data {
11321         u32 gpio_val;
11322
11323         bool is_clk_25mhz;
11324 +       bool tx_gain_buffalo;
11325 +
11326         int (*get_mac_revision)(void);
11327         int (*external_reset)(void);
11328  };
11329 --- /dev/null
11330 +++ b/drivers/net/wireless/ath/ath9k/ar9003_buffalo_initvals.h
11331 @@ -0,0 +1,126 @@
11332 +/*
11333 + * Copyright (c) 2013 Qualcomm Atheros Inc.
11334 + *
11335 + * Permission to use, copy, modify, and/or distribute this software for any
11336 + * purpose with or without fee is hereby granted, provided that the above
11337 + * copyright notice and this permission notice appear in all copies.
11338 + *
11339 + * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
11340 + * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
11341 + * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11342 + * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
11343 + * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
11344 + * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
11345 + * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
11346 + */
11347 +
11348 +#ifndef INITVALS_9003_BUFFALO_H
11349 +#define INITVALS_9003_BUFFALO_H
11350 +
11351 +static const u32 ar9300Modes_high_power_tx_gain_table_buffalo[][5] = {
11352 +       /* Addr      5G_HT20     5G_HT40     2G_HT40     2G_HT20   */
11353 +       {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
11354 +       {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
11355 +       {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
11356 +       {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
11357 +       {0x0000a410, 0x000050d8, 0x000050d8, 0x000050d9, 0x000050d9},
11358 +       {0x0000a500, 0x00002220, 0x00002220, 0x00000000, 0x00000000},
11359 +       {0x0000a504, 0x04002222, 0x04002222, 0x04000002, 0x04000002},
11360 +       {0x0000a508, 0x09002421, 0x09002421, 0x08000004, 0x08000004},
11361 +       {0x0000a50c, 0x0d002621, 0x0d002621, 0x0b000200, 0x0b000200},
11362 +       {0x0000a510, 0x13004620, 0x13004620, 0x0f000202, 0x0f000202},
11363 +       {0x0000a514, 0x19004a20, 0x19004a20, 0x11000400, 0x11000400},
11364 +       {0x0000a518, 0x1d004e20, 0x1d004e20, 0x15000402, 0x15000402},
11365 +       {0x0000a51c, 0x21005420, 0x21005420, 0x19000404, 0x19000404},
11366 +       {0x0000a520, 0x26005e20, 0x26005e20, 0x1b000603, 0x1b000603},
11367 +       {0x0000a524, 0x2b005e40, 0x2b005e40, 0x1f000a02, 0x1f000a02},
11368 +       {0x0000a528, 0x2f005e42, 0x2f005e42, 0x23000a04, 0x23000a04},
11369 +       {0x0000a52c, 0x33005e44, 0x33005e44, 0x26000a20, 0x26000a20},
11370 +       {0x0000a530, 0x38005e65, 0x38005e65, 0x2a000e20, 0x2a000e20},
11371 +       {0x0000a534, 0x3c005e69, 0x3c005e69, 0x2e000e22, 0x2e000e22},
11372 +       {0x0000a538, 0x40005e6b, 0x40005e6b, 0x31000e24, 0x31000e24},
11373 +       {0x0000a53c, 0x44005e6d, 0x44005e6d, 0x34001640, 0x34001640},
11374 +       {0x0000a540, 0x49005e72, 0x49005e72, 0x38001660, 0x38001660},
11375 +       {0x0000a544, 0x4e005eb2, 0x4e005eb2, 0x3b001861, 0x3b001861},
11376 +       {0x0000a548, 0x53005f12, 0x53005f12, 0x3e001a81, 0x3e001a81},
11377 +       {0x0000a54c, 0x59025eb2, 0x59025eb2, 0x42001a83, 0x42001a83},
11378 +       {0x0000a550, 0x5e025f12, 0x5e025f12, 0x44001c84, 0x44001c84},
11379 +       {0x0000a554, 0x61027f12, 0x61027f12, 0x48001ce3, 0x48001ce3},
11380 +       {0x0000a558, 0x6702bf12, 0x6702bf12, 0x4c001ce5, 0x4c001ce5},
11381 +       {0x0000a55c, 0x6b02bf14, 0x6b02bf14, 0x50001ce9, 0x50001ce9},
11382 +       {0x0000a560, 0x6f02bf16, 0x6f02bf16, 0x54001ceb, 0x54001ceb},
11383 +       {0x0000a564, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
11384 +       {0x0000a568, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
11385 +       {0x0000a56c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
11386 +       {0x0000a570, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
11387 +       {0x0000a574, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
11388 +       {0x0000a578, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
11389 +       {0x0000a57c, 0x6f02bf16, 0x6f02bf16, 0x56001eec, 0x56001eec},
11390 +       {0x0000a580, 0x00802220, 0x00802220, 0x00800000, 0x00800000},
11391 +       {0x0000a584, 0x04802222, 0x04802222, 0x04800002, 0x04800002},
11392 +       {0x0000a588, 0x09802421, 0x09802421, 0x08800004, 0x08800004},
11393 +       {0x0000a58c, 0x0d802621, 0x0d802621, 0x0b800200, 0x0b800200},
11394 +       {0x0000a590, 0x13804620, 0x13804620, 0x0f800202, 0x0f800202},
11395 +       {0x0000a594, 0x19804a20, 0x19804a20, 0x11800400, 0x11800400},
11396 +       {0x0000a598, 0x1d804e20, 0x1d804e20, 0x15800402, 0x15800402},
11397 +       {0x0000a59c, 0x21805420, 0x21805420, 0x19800404, 0x19800404},
11398 +       {0x0000a5a0, 0x26805e20, 0x26805e20, 0x1b800603, 0x1b800603},
11399 +       {0x0000a5a4, 0x2b805e40, 0x2b805e40, 0x1f800a02, 0x1f800a02},
11400 +       {0x0000a5a8, 0x2f805e42, 0x2f805e42, 0x23800a04, 0x23800a04},
11401 +       {0x0000a5ac, 0x33805e44, 0x33805e44, 0x26800a20, 0x26800a20},
11402 +       {0x0000a5b0, 0x38805e65, 0x38805e65, 0x2a800e20, 0x2a800e20},
11403 +       {0x0000a5b4, 0x3c805e69, 0x3c805e69, 0x2e800e22, 0x2e800e22},
11404 +       {0x0000a5b8, 0x40805e6b, 0x40805e6b, 0x31800e24, 0x31800e24},
11405 +       {0x0000a5bc, 0x44805e6d, 0x44805e6d, 0x34801640, 0x34801640},
11406 +       {0x0000a5c0, 0x49805e72, 0x49805e72, 0x38801660, 0x38801660},
11407 +       {0x0000a5c4, 0x4e805eb2, 0x4e805eb2, 0x3b801861, 0x3b801861},
11408 +       {0x0000a5c8, 0x53805f12, 0x53805f12, 0x3e801a81, 0x3e801a81},
11409 +       {0x0000a5cc, 0x59825eb2, 0x59825eb2, 0x42801a83, 0x42801a83},
11410 +       {0x0000a5d0, 0x5e825f12, 0x5e825f12, 0x44801c84, 0x44801c84},
11411 +       {0x0000a5d4, 0x61827f12, 0x61827f12, 0x48801ce3, 0x48801ce3},
11412 +       {0x0000a5d8, 0x6782bf12, 0x6782bf12, 0x4c801ce5, 0x4c801ce5},
11413 +       {0x0000a5dc, 0x6b82bf14, 0x6b82bf14, 0x50801ce9, 0x50801ce9},
11414 +       {0x0000a5e0, 0x6f82bf16, 0x6f82bf16, 0x54801ceb, 0x54801ceb},
11415 +       {0x0000a5e4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
11416 +       {0x0000a5e8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
11417 +       {0x0000a5ec, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
11418 +       {0x0000a5f0, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
11419 +       {0x0000a5f4, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
11420 +       {0x0000a5f8, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
11421 +       {0x0000a5fc, 0x6f82bf16, 0x6f82bf16, 0x56801eec, 0x56801eec},
11422 +       {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11423 +       {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11424 +       {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11425 +       {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
11426 +       {0x0000a610, 0x00804000, 0x00804000, 0x00000000, 0x00000000},
11427 +       {0x0000a614, 0x00804201, 0x00804201, 0x01404000, 0x01404000},
11428 +       {0x0000a618, 0x0280c802, 0x0280c802, 0x01404501, 0x01404501},
11429 +       {0x0000a61c, 0x0280ca03, 0x0280ca03, 0x02008501, 0x02008501},
11430 +       {0x0000a620, 0x04c15104, 0x04c15104, 0x0280ca03, 0x0280ca03},
11431 +       {0x0000a624, 0x04c15305, 0x04c15305, 0x03010c04, 0x03010c04},
11432 +       {0x0000a628, 0x04c15305, 0x04c15305, 0x04014c04, 0x04014c04},
11433 +       {0x0000a62c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
11434 +       {0x0000a630, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
11435 +       {0x0000a634, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
11436 +       {0x0000a638, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
11437 +       {0x0000a63c, 0x04c15305, 0x04c15305, 0x04015005, 0x04015005},
11438 +       {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
11439 +       {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
11440 +       {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
11441 +       {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
11442 +       {0x0000c2dc, 0x0380c7fc, 0x0380c7fc, 0x03aaa352, 0x03aaa352},
11443 +       {0x0000c2e0, 0x0000f800, 0x0000f800, 0x03ccc584, 0x03ccc584},
11444 +       {0x0000c2e4, 0x03ff0000, 0x03ff0000, 0x03f0f800, 0x03f0f800},
11445 +       {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
11446 +       {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
11447 +       {0x00016048, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
11448 +       {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
11449 +       {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
11450 +       {0x00016448, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
11451 +       {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
11452 +       {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
11453 +       {0x00016848, 0x66480001, 0x66480001, 0x66480001, 0x66480001},
11454 +       {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
11455 +};
11456 +
11457 +#endif /* INITVALS_9003_BUFFALO_H */
11458 --- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
11459 +++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
11460 @@ -76,9 +76,16 @@ static bool ar9002_hw_get_isr(struct ath
11461                                 mask2 |= ATH9K_INT_CST;
11462                         if (isr2 & AR_ISR_S2_TSFOOR)
11463                                 mask2 |= ATH9K_INT_TSFOOR;
11464 +
11465 +                       if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) {
11466 +                               REG_WRITE(ah, AR_ISR_S2, isr2);
11467 +                               isr &= ~AR_ISR_BCNMISC;
11468 +                       }
11469                 }
11470
11471 -               isr = REG_READ(ah, AR_ISR_RAC);
11472 +               if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)
11473 +                       isr = REG_READ(ah, AR_ISR_RAC);
11474 +
11475                 if (isr == 0xffffffff) {
11476                         *masked = 0;
11477                         return false;
11478 @@ -97,11 +104,23 @@ static bool ar9002_hw_get_isr(struct ath
11479
11480                         *masked |= ATH9K_INT_TX;
11481
11482 -                       s0_s = REG_READ(ah, AR_ISR_S0_S);
11483 +                       if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED) {
11484 +                               s0_s = REG_READ(ah, AR_ISR_S0_S);
11485 +                               s1_s = REG_READ(ah, AR_ISR_S1_S);
11486 +                       } else {
11487 +                               s0_s = REG_READ(ah, AR_ISR_S0);
11488 +                               REG_WRITE(ah, AR_ISR_S0, s0_s);
11489 +                               s1_s = REG_READ(ah, AR_ISR_S1);
11490 +                               REG_WRITE(ah, AR_ISR_S1, s1_s);
11491 +
11492 +                               isr &= ~(AR_ISR_TXOK |
11493 +                                        AR_ISR_TXDESC |
11494 +                                        AR_ISR_TXERR |
11495 +                                        AR_ISR_TXEOL);
11496 +                       }
11497 +
11498                         ah->intr_txqs |= MS(s0_s, AR_ISR_S0_QCU_TXOK);
11499                         ah->intr_txqs |= MS(s0_s, AR_ISR_S0_QCU_TXDESC);
11500 -
11501 -                       s1_s = REG_READ(ah, AR_ISR_S1_S);
11502                         ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXERR);
11503                         ah->intr_txqs |= MS(s1_s, AR_ISR_S1_QCU_TXEOL);
11504                 }
11505 @@ -120,7 +139,12 @@ static bool ar9002_hw_get_isr(struct ath
11506         if (isr & AR_ISR_GENTMR) {
11507                 u32 s5_s;
11508
11509 -               s5_s = REG_READ(ah, AR_ISR_S5_S);
11510 +               if (pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED) {
11511 +                       s5_s = REG_READ(ah, AR_ISR_S5_S);
11512 +               } else {
11513 +                       s5_s = REG_READ(ah, AR_ISR_S5);
11514 +               }
11515 +
11516                 ah->intr_gen_timer_trigger =
11517                                 MS(s5_s, AR_ISR_S5_GENTIMER_TRIG);
11518
11519 @@ -133,6 +157,16 @@ static bool ar9002_hw_get_isr(struct ath
11520                 if ((s5_s & AR_ISR_S5_TIM_TIMER) &&
11521                     !(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
11522                         *masked |= ATH9K_INT_TIM_TIMER;
11523 +
11524 +               if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) {
11525 +                       REG_WRITE(ah, AR_ISR_S5, s5_s);
11526 +                       isr &= ~AR_ISR_GENTMR;
11527 +               }
11528 +       }
11529 +
11530 +       if (!(pCap->hw_caps & ATH9K_HW_CAP_RAC_SUPPORTED)) {
11531 +               REG_WRITE(ah, AR_ISR, isr);
11532 +               REG_READ(ah, AR_ISR);
11533         }
11534
11535         if (sync_cause) {