package/boot/uboot-sunxi/patches/011-sunxi-support-h3-ccu.patch

   1 diff --git a/arch/arm/cpu/armv7/sunxi/clock.c b/arch/arm/cpu/armv7/sunxi/clock.c
   2 index 47fb70f..5cc5d25 100644
   3 --- a/arch/arm/cpu/armv7/sunxi/clock.c
   4 +++ b/arch/arm/cpu/armv7/sunxi/clock.c
   5 @@ -14,12 +14,17 @@
   6  #include <asm/arch/gpio.h>
   7  #include <asm/arch/sys_proto.h>
   8
   9 +__weak void clock_init_sec(void)
  10 +{
  11 +}
  12 +
  13  int clock_init(void)
  14  {
  15  #ifdef CONFIG_SPL_BUILD
  16         clock_init_safe();
  17  #endif
  18         clock_init_uart();
  19 +       clock_init_sec();
  20
  21         return 0;
  22  }
  23 diff --git a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
  24 index 4501884..d0085e8 100644
  25 --- a/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
  26 +++ b/arch/arm/cpu/armv7/sunxi/clock_sun6i.c
  27 @@ -45,6 +45,19 @@ void clock_init_safe(void)
  28  }
  29  #endif
  30
  31 +void clock_init_sec(void)
  32 +{
  33 +       struct sunxi_ccm_reg * const ccm =
  34 +               (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
  35 +
  36 +#ifdef CONFIG_MACH_SUN8I_H3
  37 +       setbits_le32(&ccm->ccu_sec_switch,
  38 +                    CCM_SEC_SWITCH_MBUS_NONSEC |
  39 +                    CCM_SEC_SWITCH_BUS_NONSEC |
  40 +                    CCM_SEC_SWITCH_PLL_NONSEC);
  41 +#endif
  42 +}
  43 +
  44  void clock_init_uart(void)
  45  {
  46  #if CONFIG_CONS_INDEX < 5
  47 diff --git a/arch/arm/include/asm/arch-sunxi/clock.h b/arch/arm/include/asm/arch-sunxi/clock.h
  48 index 8ca58ae..6c0573f 100644
  49 --- a/arch/arm/include/asm/arch-sunxi/clock.h
  50 +++ b/arch/arm/include/asm/arch-sunxi/clock.h
  51 @@ -30,6 +30,7 @@ int clock_init(void);
  52  int clock_twi_onoff(int port, int state);
  53  void clock_set_de_mod_clock(u32 *clk_cfg, unsigned int hz);
  54  void clock_init_safe(void);
  55 +void clock_init_sec(void);
  56  void clock_init_uart(void);
  57  #endif
  58
  59 diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
  60 index 5c76275..554d858 100644
  61 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
  62 +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h
  63 @@ -137,6 +137,8 @@ struct sunxi_ccm_reg {
  64         u32 apb1_reset_cfg;     /* 0x2d0 APB1 Reset config */
  65         u32 reserved24;
  66         u32 apb2_reset_cfg;     /* 0x2d8 APB2 Reset config */
  67 +       u32 reserved25[5];
  68 +       u32 ccu_sec_switch;     /* 0x2f0 CCU Security Switch, H3 only */
  69  };
  70
  71  /* apb2 bit field */
  72 @@ -375,6 +377,11 @@ struct sunxi_ccm_reg {
  73  #define CCM_DE_CTRL_PLL10              (5 << 24)
  74  #define CCM_DE_CTRL_GATE               (1 << 31)
  75
  76 +/* CCU security switch, H3 only */
  77 +#define CCM_SEC_SWITCH_MBUS_NONSEC     (1 << 2)
  78 +#define CCM_SEC_SWITCH_BUS_NONSEC      (1 << 1)
  79 +#define CCM_SEC_SWITCH_PLL_NONSEC      (1 << 0)
  80 +
  81  #ifndef __ASSEMBLY__
  82  void clock_set_pll1(unsigned int hz);
  83  void clock_set_pll3(unsigned int hz);