target/linux/mvebu/patches-3.18/018-normalize_pinctrl_entries_for_armada_socs.patch

   1 From 70ee4e9d9f054e258480fd51c90cfc2b72be8b78 Mon Sep 17 00:00:00 2001
   2 From: Arnaud Ebalard <arno@natisbad.org>
   3 Date: Sat, 22 Nov 2014 17:23:30 +0100
   4 Subject: arm: mvebu: normalize pinctrl entries for Armada SoCs
   5
   6 There are currently 2 differents naming conventions used between the
   7 existing Armada SoC DT files for pinctrl entries (*_pin(s): *-pin(s)
   8 and pmx_*: pmx-*) with a vast majority of files using the former:
   9
  10 $ grep _pin arch/arm/boot/dts/armada-*.dts* | wc -l
  11 155
  12 $ grep pmx arch/arm/boot/dts/armada-*.dts* | wc -l
  13 13
  14
  15 In fact, only some Armada XP files are using the second variant.
  16 This patch normalizes those files (mainly ge0/1 entries) to use
  17 the first variant.
  18
  19 Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
  20 Link: https://lkml.kernel.org/r/00114c3169e1d93259ff4150ed46ee36eae16b1e.1416670812.git.arno@natisbad.org
  21 Signed-off-by: Jason Cooper <jason@lakedaemon.net>
  22
  23 --- a/arch/arm/boot/dts/armada-xp-axpwifiap.dts
  24 +++ b/arch/arm/boot/dts/armada-xp-axpwifiap.dts
  25 @@ -84,14 +84,14 @@
  26                         };
  27
  28                         ethernet@70000 {
  29 -                               pinctrl-0 = <&pmx_ge0_rgmii>;
  30 +                               pinctrl-0 = <&ge0_rgmii_pins>;
  31                                 pinctrl-names = "default";
  32                                 status = "okay";
  33                                 phy = <&phy0>;
  34                                 phy-mode = "rgmii-id";
  35                         };
  36                         ethernet@74000 {
  37 -                               pinctrl-0 = <&pmx_ge1_rgmii>;
  38 +                               pinctrl-0 = <&ge1_rgmii_pins>;
  39                                 pinctrl-names = "default";
  40                                 status = "okay";
  41                                 phy = <&phy1>;
  42 @@ -116,7 +116,7 @@
  43                 compatible = "gpio-keys";
  44                 #address-cells = <1>;
  45                 #size-cells = <0>;
  46 -               pinctrl-0 = <&pmx_keys>;
  47 +               pinctrl-0 = <&keys_pin>;
  48                 pinctrl-names = "default";
  49
  50                 button@1 {
  51 @@ -128,15 +128,15 @@
  52  };
  53
  54  &pinctrl {
  55 -       pinctrl-0 = <&pmx_phy_int>;
  56 +       pinctrl-0 = <&phy_int_pin>;
  57         pinctrl-names = "default";
  58
  59 -       pmx_keys: pmx-keys {
  60 +       keys_pin: keys-pin {
  61                 marvell,pins = "mpp33";
  62                 marvell,function = "gpio";
  63         };
  64
  65 -       pmx_phy_int: pmx-phy-int {
  66 +       phy_int_pin: phy-int-pin {
  67                 marvell,pins = "mpp32";
  68                 marvell,function = "gpio";
  69         };
  70 --- a/arch/arm/boot/dts/armada-xp.dtsi
  71 +++ b/arch/arm/boot/dts/armada-xp.dtsi
  72 @@ -220,7 +220,7 @@
  73  };
  74
  75  &pinctrl {
  76 -       pmx_ge0_gmii: pmx-ge0-gmii {
  77 +       ge0_gmii_pins: ge0-gmii-pins {
  78                 marvell,pins =
  79                      "mpp0",  "mpp1",  "mpp2",  "mpp3",
  80                      "mpp4",  "mpp5",  "mpp6",  "mpp7",
  81 @@ -231,7 +231,7 @@
  82                 marvell,function = "ge0";
  83         };
  84
  85 -       pmx_ge0_rgmii: pmx-ge0-rgmii {
  86 +       ge0_rgmii_pins: ge0-rgmii-pins {
  87                 marvell,pins =
  88                      "mpp0", "mpp1", "mpp2", "mpp3",
  89                      "mpp4", "mpp5", "mpp6", "mpp7",
  90 @@ -239,7 +239,7 @@
  91                 marvell,function = "ge0";
  92         };
  93
  94 -       pmx_ge1_rgmii: pmx-ge1-rgmii {
  95 +       ge1_rgmii_pins: ge1-rgmii-pins {
  96                 marvell,pins =
  97                      "mpp12", "mpp13", "mpp14", "mpp15",
  98                      "mpp16", "mpp17", "mpp18", "mpp19",