trace-cmd: remove the compile fix patch
[15.05/openwrt.git] / target / linux / ixp4xx / patches-3.3 / 120-compex_support.patch
1 From 24025a2dcf1248079dd3019fac6ed955252d277f Mon Sep 17 00:00:00 2001
2 From: Imre Kaloz <kaloz@openwrt.org>
3 Date: Mon, 14 Jul 2008 21:56:34 +0200
4 Subject: [PATCH] Add support for the Compex WP18 / NP18A boards
5
6 Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
7 ---
8
9 --- a/arch/arm/mach-ixp4xx/Kconfig
10 +++ b/arch/arm/mach-ixp4xx/Kconfig
11 @@ -89,6 +89,14 @@ config MACH_SIDEWINDER
12           Engineering Sidewinder board. For more information on this
13           platform, see http://www.adiengineering.com
14  
15 +config MACH_COMPEXWP18
16 +       bool "Compex WP18 / NP18A"
17 +       select PCI
18 +       help
19 +         Say 'Y' here if you want your kernel to support Compex' 
20 +         WP18 or NP18A boards. For more information on this
21 +         platform, see http://www.compex.com.sg/home/OEM/product_ap.htm
22 +
23  config ARCH_IXDP425
24         bool "IXDP425"
25         help
26 --- a/arch/arm/mach-ixp4xx/Makefile
27 +++ b/arch/arm/mach-ixp4xx/Makefile
28 @@ -21,6 +21,7 @@ obj-pci-$(CONFIG_MACH_FSG)            += fsg-pci.o
29  obj-pci-$(CONFIG_MACH_ARCOM_VULCAN)    += vulcan-pci.o
30  obj-pci-$(CONFIG_MACH_PRONGHORN)       += pronghorn-pci.o
31  obj-pci-$(CONFIG_MACH_SIDEWINDER)      += sidewinder-pci.o
32 +obj-pci-$(CONFIG_MACH_COMPEXWP18)      += ixdp425-pci.o
33  
34  obj-y  += common.o
35  
36 @@ -43,6 +44,7 @@ obj-$(CONFIG_MACH_GORAMO_MLR) += goramo_
37  obj-$(CONFIG_MACH_ARCOM_VULCAN)        += vulcan-setup.o
38  obj-$(CONFIG_MACH_PRONGHORN)   += pronghorn-setup.o
39  obj-$(CONFIG_MACH_SIDEWINDER)  += sidewinder-setup.o
40 +obj-$(CONFIG_MACH_COMPEXWP18)  += compex42x-setup.o
41  
42  obj-$(CONFIG_PCI)              += $(obj-pci-$(CONFIG_PCI)) common-pci.o
43  obj-$(CONFIG_IXP4XX_QMGR)      += ixp4xx_qmgr.o
44 --- /dev/null
45 +++ b/arch/arm/mach-ixp4xx/compex42x-setup.c
46 @@ -0,0 +1,138 @@
47 +/*
48 + * arch/arm/mach-ixp4xx/compex-setup.c
49 + *
50 + * Compex WP18 / NP18A board-setup
51 + *
52 + * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
53 + *
54 + * based on coyote-setup.c:
55 + *     Copyright (C) 2003-2005 MontaVista Software, Inc.
56 + *
57 + * Author: Imre Kaloz <Kaloz@openwrt.org>
58 + */
59 +
60 +#include <linux/kernel.h>
61 +#include <linux/serial.h>
62 +#include <linux/serial_8250.h>
63 +
64 +#include <asm/mach-types.h>
65 +#include <asm/mach/arch.h>
66 +#include <asm/mach/flash.h>
67 +
68 +static struct flash_platform_data compex42x_flash_data = {
69 +       .map_name       = "cfi_probe",
70 +       .width          = 2,
71 +};
72 +
73 +static struct resource compex42x_flash_resource = {
74 +       .flags          = IORESOURCE_MEM,
75 +};
76 +
77 +static struct platform_device compex42x_flash = {
78 +       .name           = "IXP4XX-Flash",
79 +       .id             = 0,
80 +       .dev            = {
81 +               .platform_data = &compex42x_flash_data,
82 +       },
83 +       .num_resources  = 1,
84 +       .resource       = &compex42x_flash_resource,
85 +};
86 +
87 +static struct resource compex42x_uart_resources[] = {
88 +       {
89 +               .start          = IXP4XX_UART1_BASE_PHYS,
90 +               .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
91 +               .flags          = IORESOURCE_MEM
92 +       },
93 +       {
94 +               .start          = IXP4XX_UART2_BASE_PHYS,
95 +               .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
96 +               .flags          = IORESOURCE_MEM
97 +       }
98 +};
99 +
100 +static struct plat_serial8250_port compex42x_uart_data[] = {
101 +       {
102 +               .mapbase        = IXP4XX_UART1_BASE_PHYS,
103 +               .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
104 +               .irq            = IRQ_IXP4XX_UART1,
105 +               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
106 +               .iotype         = UPIO_MEM,
107 +               .regshift       = 2,
108 +               .uartclk        = IXP4XX_UART_XTAL,
109 +       },
110 +       {
111 +               .mapbase        = IXP4XX_UART2_BASE_PHYS,
112 +               .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
113 +               .irq            = IRQ_IXP4XX_UART2,
114 +               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
115 +               .iotype         = UPIO_MEM,
116 +               .regshift       = 2,
117 +               .uartclk        = IXP4XX_UART_XTAL,
118 +       },
119 +       { },
120 +};
121 +
122 +static struct platform_device compex42x_uart = {
123 +       .name                   = "serial8250",
124 +       .id                     = PLAT8250_DEV_PLATFORM,
125 +       .dev.platform_data      = compex42x_uart_data,
126 +       .num_resources          = 2,
127 +       .resource               = compex42x_uart_resources,
128 +};
129 +
130 +static struct eth_plat_info compex42x_plat_eth[] = {
131 +       {
132 +               .phy            = IXP4XX_ETH_PHY_MAX_ADDR,
133 +               .phy_mask       = 0xf0000,
134 +               .rxq            = 3,
135 +               .txreadyq       = 20,
136 +       }, {
137 +               .phy            = 3,
138 +               .rxq            = 4,
139 +               .txreadyq       = 21,
140 +       }
141 +};
142 +
143 +static struct platform_device compex42x_eth[] = {
144 +       {
145 +               .name                   = "ixp4xx_eth",
146 +               .id                     = IXP4XX_ETH_NPEB,
147 +               .dev.platform_data      = compex42x_plat_eth,
148 +       }, {
149 +               .name                   = "ixp4xx_eth",
150 +               .id                     = IXP4XX_ETH_NPEC,
151 +               .dev.platform_data      = compex42x_plat_eth + 1,
152 +       }
153 +};
154 +
155 +static struct platform_device *compex42x_devices[] __initdata = {
156 +       &compex42x_flash,
157 +       &compex42x_uart,
158 +       &compex42x_eth[0],
159 +       &compex42x_eth[1],
160 +};
161 +
162 +static void __init compex42x_init(void)
163 +{
164 +       ixp4xx_sys_init();
165 +
166 +       compex42x_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
167 +       compex42x_flash_resource.end =
168 +               IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
169 +
170 +       platform_add_devices(compex42x_devices, ARRAY_SIZE(compex42x_devices));
171 +}
172 +
173 +MACHINE_START(COMPEXWP18, "Compex WP18 / NP18A")
174 +       /* Maintainer: Imre Kaloz <Kaloz@openwrt.org> */
175 +       .map_io         = ixp4xx_map_io,
176 +       .init_irq       = ixp4xx_init_irq,
177 +       .timer          = &ixp4xx_timer,
178 +       .atag_offset    = 0x0100,
179 +       .init_machine   = compex42x_init,
180 +#if defined(CONFIG_PCI)
181 +       .dma_zone_size  = SZ_64M,
182 +#endif
183 +       .restart        = ixp4xx_restart,
184 +MACHINE_END
185 --- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
186 +++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
187 @@ -70,7 +70,8 @@ struct hw_pci ixdp425_pci __initdata = {
188  int __init ixdp425_pci_init(void)
189  {
190         if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
191 -                       machine_is_ixdp465() || machine_is_kixrp435())
192 +                       machine_is_ixdp465() || machine_is_kixrp435() ||
193 +                       machine_is_compex42x())
194                 pci_common_init(&ixdp425_pci);
195         return 0;
196  }