bcm53xx: initial support for kernel 3.18
[15.05/openwrt.git] / target / linux / bcm53xx / patches-3.18 / 130-ARM-BCM5301X-register-bcma-bus.patch
1 From 414f0ad9b3a8e8ee6eaf09c6d79d5f448ac28630 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 25 Jan 2014 17:03:07 +0100
4 Subject: [PATCH 07/17] ARM: BCM5301X: register bcma bus
5
6 ---
7  arch/arm/boot/dts/bcm4708.dtsi | 58 ++++++++++++++++++++++++++++++++++++++++++
8  1 file changed, 58 insertions(+)
9
10 --- a/arch/arm/boot/dts/bcm5301x.dtsi
11 +++ b/arch/arm/boot/dts/bcm5301x.dtsi
12 @@ -94,18 +94,102 @@
13                 };
14         };
15  
16 +       nvram0: nvram@1c000000 {
17 +               compatible = "brcm,bcm47xx-nvram";
18 +               reg = <0x1c000000 0x01000000>;
19 +       };
20 +
21 +       sprom0: sprom@0 {
22 +               compatible = "brcm,bcm47xx-sprom";
23 +               nvram = <&nvram0>;
24 +       };
25 +
26         axi@18000000 {
27                 compatible = "brcm,bus-axi";
28                 reg = <0x18000000 0x1000>;
29                 ranges = <0x00000000 0x18000000 0x00100000>;
30                 #address-cells = <1>;
31                 #size-cells = <1>;
32 +               sprom = <&sprom0>;
33  
34                 chipcommon: chipcommon@0 {
35                         reg = <0x00000000 0x1000>;
36 +                       interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
37  
38                         gpio-controller;
39                         #gpio-cells = <2>;
40                 };
41 +
42 +               pcie@12000 {
43 +                       reg = <0x00012000 0x1000>;
44 +                       interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>,
45 +                                    <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
46 +                                    <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
47 +                                    <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>,
48 +                                    <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>,
49 +                                    <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
50 +               };
51 +
52 +               pcie@13000 {
53 +                       reg = <0x00013000 0x1000>;
54 +                       interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
55 +                                    <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
56 +                                    <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
57 +                                    <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
58 +                                    <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
59 +                                    <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>;
60 +               };
61 +
62 +               pcie@14000 {
63 +                       reg = <0x00014000 0x1000>;
64 +                       interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>,
65 +                                    <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
66 +                                    <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>,
67 +                                    <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>,
68 +                                    <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>,
69 +                                    <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
70 +               };
71 +
72 +               usb2@21000 {
73 +                       reg = <0x00021000 0x1000>;
74 +                       interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
75 +               };
76 +
77 +               usb3@23000 {
78 +                       reg = <0x00023000 0x1000>;
79 +                       interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
80 +               };
81 +
82 +               ethernet@24000 {
83 +                       reg = <0x00024000 0x1000>;
84 +                       interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
85 +               };
86 +
87 +               ethernet@25000 {
88 +                       reg = <0x00025000 0x1000>;
89 +                       interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
90 +               };
91 +
92 +               ethernet@26000 {
93 +                       reg = <0x00026000 0x1000>;
94 +                       interrupts = <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>;
95 +               };
96 +
97 +               ethernet@27000 {
98 +                       reg = <0x00027000 0x1000>;
99 +                       interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
100 +               };
101 +
102 +               nand@28000 {
103 +                       reg = <0x00028000 0x1000>;
104 +                       interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
105 +                                    <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
106 +                                    <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
107 +                                    <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
108 +                                    <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
109 +                                    <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>,
110 +                                    <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
111 +                                    <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
112 +               };
113         };
114  };