package/kernel/mac80211/patches/370-0014-brcmfmac-Add-support-for-the-BCM4365-and-BCM4366-PCI.patch

   1 From: Hante Meuleman <meuleman@broadcom.com>
   2 Date: Fri, 18 Sep 2015 22:08:17 +0200
   3 Subject: [PATCH] brcmfmac: Add support for the BCM4365 and BCM4366 PCIE
   4  devices.
   5
   6 This patch adds support for the BCM4365 and BCM4366 11ac Wave2
   7 PCIE devices.
   8
   9 Reviewed-by: Arend Van Spriel <arend@broadcom.com>
  10 Reviewed-by: Pieter-Paul Giesberts <pieterpg@broadcom.com>
  11 Signed-off-by: Hante Meuleman <meuleman@broadcom.com>
  12 Signed-off-by: Arend van Spriel <arend@broadcom.com>
  13 Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
  14 ---
  15
  16 --- a/drivers/net/wireless/brcm80211/brcmfmac/chip.c
  17 +++ b/drivers/net/wireless/brcm80211/brcmfmac/chip.c
  18 @@ -208,6 +208,7 @@ struct sbsocramregs {
  19  };
  20
  21  #define SOCRAMREGOFFS(_f)      offsetof(struct sbsocramregs, _f)
  22 +#define SYSMEMREGOFFS(_f)      offsetof(struct sbsocramregs, _f)
  23
  24  #define ARMCR4_CAP             (0x04)
  25  #define ARMCR4_BANKIDX         (0x40)
  26 @@ -516,6 +517,9 @@ static int brcmf_chip_cores_check(struct
  27                 case BCMA_CORE_ARM_CR4:
  28                         cpu_found = true;
  29                         break;
  30 +               case BCMA_CORE_ARM_CA7:
  31 +                       cpu_found = true;
  32 +                       break;
  33                 default:
  34                         break;
  35                 }
  36 @@ -614,6 +618,29 @@ static void brcmf_chip_socram_ramsize(st
  37         }
  38  }
  39
  40 +/** Return the SYS MEM size */
  41 +static u32 brcmf_chip_sysmem_ramsize(struct brcmf_core_priv *sysmem)
  42 +{
  43 +       u32 memsize = 0;
  44 +       u32 coreinfo;
  45 +       u32 idx;
  46 +       u32 nb;
  47 +       u32 banksize;
  48 +
  49 +       if (!brcmf_chip_iscoreup(&sysmem->pub))
  50 +               brcmf_chip_resetcore(&sysmem->pub, 0, 0, 0);
  51 +
  52 +       coreinfo = brcmf_chip_core_read32(sysmem, SYSMEMREGOFFS(coreinfo));
  53 +       nb = (coreinfo & SRCI_SRNB_MASK) >> SRCI_SRNB_SHIFT;
  54 +
  55 +       for (idx = 0; idx < nb; idx++) {
  56 +               brcmf_chip_socram_banksize(sysmem, idx, &banksize);
  57 +               memsize += banksize;
  58 +       }
  59 +
  60 +       return memsize;
  61 +}
  62 +
  63  /** Return the TCM-RAM size of the ARMCR4 core. */
  64  static u32 brcmf_chip_tcm_ramsize(struct brcmf_core_priv *cr4)
  65  {
  66 @@ -656,6 +683,9 @@ static u32 brcmf_chip_tcm_rambase(struct
  67         case BRCM_CC_4358_CHIP_ID:
  68         case BRCM_CC_43602_CHIP_ID:
  69                 return 0x180000;
  70 +       case BRCM_CC_4365_CHIP_ID:
  71 +       case BRCM_CC_4366_CHIP_ID:
  72 +               return 0x200000;
  73         default:
  74                 brcmf_err("unknown chip: %s\n", ci->pub.name);
  75                 break;
  76 @@ -678,10 +708,28 @@ static int brcmf_chip_get_raminfo(struct
  77                         return -EINVAL;
  78                 }
  79         } else {
  80 -               mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_INTERNAL_MEM);
  81 -               mem_core = container_of(mem, struct brcmf_core_priv, pub);
  82 -               brcmf_chip_socram_ramsize(mem_core, &ci->pub.ramsize,
  83 -                                         &ci->pub.srsize);
  84 +               mem = brcmf_chip_get_core(&ci->pub, BCMA_CORE_SYS_MEM);
  85 +               if (mem) {
  86 +                       mem_core = container_of(mem, struct brcmf_core_priv,
  87 +                                               pub);
  88 +                       ci->pub.ramsize = brcmf_chip_sysmem_ramsize(mem_core);
  89 +                       ci->pub.rambase = brcmf_chip_tcm_rambase(ci);
  90 +                       if (!ci->pub.rambase) {
  91 +                               brcmf_err("RAM base not provided with ARM CA7 core\n");
  92 +                               return -EINVAL;
  93 +                       }
  94 +               } else {
  95 +                       mem = brcmf_chip_get_core(&ci->pub,
  96 +                                                 BCMA_CORE_INTERNAL_MEM);
  97 +                       if (!mem) {
  98 +                               brcmf_err("No memory cores found\n");
  99 +                               return -ENOMEM;
 100 +                       }
 101 +                       mem_core = container_of(mem, struct brcmf_core_priv,
 102 +                                               pub);
 103 +                       brcmf_chip_socram_ramsize(mem_core, &ci->pub.ramsize,
 104 +                                                 &ci->pub.srsize);
 105 +               }
 106         }
 107         brcmf_dbg(INFO, "RAM: base=0x%x size=%d (0x%x) sr=%d (0x%x)\n",
 108                   ci->pub.rambase, ci->pub.ramsize, ci->pub.ramsize,
 109 @@ -924,7 +972,7 @@ static int brcmf_chip_recognition(struct
 110  static void brcmf_chip_disable_arm(struct brcmf_chip_priv *chip, u16 id)
 111  {
 112         struct brcmf_core *core;
 113 -       struct brcmf_core_priv *cr4;
 114 +       struct brcmf_core_priv *cpu;
 115         u32 val;
 116
 117
 118 @@ -937,10 +985,11 @@ static void brcmf_chip_disable_arm(struc
 119                 brcmf_chip_coredisable(core, 0, 0);
 120                 break;
 121         case BCMA_CORE_ARM_CR4:
 122 -               cr4 = container_of(core, struct brcmf_core_priv, pub);
 123 +       case BCMA_CORE_ARM_CA7:
 124 +               cpu = container_of(core, struct brcmf_core_priv, pub);
 125
 126                 /* clear all IOCTL bits except HALT bit */
 127 -               val = chip->ops->read32(chip->ctx, cr4->wrapbase + BCMA_IOCTL);
 128 +               val = chip->ops->read32(chip->ctx, cpu->wrapbase + BCMA_IOCTL);
 129                 val &= ARMCR4_BCMA_IOCTL_CPUHALT;
 130                 brcmf_chip_resetcore(core, val, ARMCR4_BCMA_IOCTL_CPUHALT,
 131                                      ARMCR4_BCMA_IOCTL_CPUHALT);
 132 @@ -1162,6 +1211,33 @@ static bool brcmf_chip_cr4_set_active(st
 133         return true;
 134  }
 135
 136 +static inline void
 137 +brcmf_chip_ca7_set_passive(struct brcmf_chip_priv *chip)
 138 +{
 139 +       struct brcmf_core *core;
 140 +
 141 +       brcmf_chip_disable_arm(chip, BCMA_CORE_ARM_CA7);
 142 +
 143 +       core = brcmf_chip_get_core(&chip->pub, BCMA_CORE_80211);
 144 +       brcmf_chip_resetcore(core, D11_BCMA_IOCTL_PHYRESET |
 145 +                                  D11_BCMA_IOCTL_PHYCLOCKEN,
 146 +                            D11_BCMA_IOCTL_PHYCLOCKEN,
 147 +                            D11_BCMA_IOCTL_PHYCLOCKEN);
 148 +}
 149 +
 150 +static bool brcmf_chip_ca7_set_active(struct brcmf_chip_priv *chip, u32 rstvec)
 151 +{
 152 +       struct brcmf_core *core;
 153 +
 154 +       chip->ops->activate(chip->ctx, &chip->pub, rstvec);
 155 +
 156 +       /* restore ARM */
 157 +       core = brcmf_chip_get_core(&chip->pub, BCMA_CORE_ARM_CA7);
 158 +       brcmf_chip_resetcore(core, ARMCR4_BCMA_IOCTL_CPUHALT, 0, 0);
 159 +
 160 +       return true;
 161 +}
 162 +
 163  void brcmf_chip_set_passive(struct brcmf_chip *pub)
 164  {
 165         struct brcmf_chip_priv *chip;
 166 @@ -1175,8 +1251,16 @@ void brcmf_chip_set_passive(struct brcmf
 167                 brcmf_chip_cr4_set_passive(chip);
 168                 return;
 169         }
 170 -
 171 -       brcmf_chip_cm3_set_passive(chip);
 172 +       arm = brcmf_chip_get_core(pub, BCMA_CORE_ARM_CA7);
 173 +       if (arm) {
 174 +               brcmf_chip_ca7_set_passive(chip);
 175 +               return;
 176 +       }
 177 +       arm = brcmf_chip_get_core(pub, BCMA_CORE_ARM_CM3);
 178 +       if (arm) {
 179 +               brcmf_chip_cm3_set_passive(chip);
 180 +               return;
 181 +       }
 182  }
 183
 184  bool brcmf_chip_set_active(struct brcmf_chip *pub, u32 rstvec)
 185 @@ -1190,8 +1274,14 @@ bool brcmf_chip_set_active(struct brcmf_
 186         arm = brcmf_chip_get_core(pub, BCMA_CORE_ARM_CR4);
 187         if (arm)
 188                 return brcmf_chip_cr4_set_active(chip, rstvec);
 189 +       arm = brcmf_chip_get_core(pub, BCMA_CORE_ARM_CA7);
 190 +       if (arm)
 191 +               return brcmf_chip_ca7_set_active(chip, rstvec);
 192 +       arm = brcmf_chip_get_core(pub, BCMA_CORE_ARM_CM3);
 193 +       if (arm)
 194 +               return brcmf_chip_cm3_set_active(chip);
 195
 196 -       return brcmf_chip_cm3_set_active(chip);
 197 +       return false;
 198  }
 199
 200  bool brcmf_chip_sr_capable(struct brcmf_chip *pub)
 201 --- a/drivers/net/wireless/brcm80211/brcmfmac/pcie.c
 202 +++ b/drivers/net/wireless/brcm80211/brcmfmac/pcie.c
 203 @@ -55,6 +55,10 @@ enum brcmf_pcie_state {
 204  #define BRCMF_PCIE_43570_NVRAM_NAME            "brcm/brcmfmac43570-pcie.txt"
 205  #define BRCMF_PCIE_4358_FW_NAME                        "brcm/brcmfmac4358-pcie.bin"
 206  #define BRCMF_PCIE_4358_NVRAM_NAME             "brcm/brcmfmac4358-pcie.txt"
 207 +#define BRCMF_PCIE_4365_FW_NAME                        "brcm/brcmfmac4365b-pcie.bin"
 208 +#define BRCMF_PCIE_4365_NVRAM_NAME             "brcm/brcmfmac4365b-pcie.txt"
 209 +#define BRCMF_PCIE_4366_FW_NAME                        "brcm/brcmfmac4366b-pcie.bin"
 210 +#define BRCMF_PCIE_4366_NVRAM_NAME             "brcm/brcmfmac4366b-pcie.txt"
 211
 212  #define BRCMF_PCIE_FW_UP_TIMEOUT               2000 /* msec */
 213
 214 @@ -204,6 +208,10 @@ MODULE_FIRMWARE(BRCMF_PCIE_43570_FW_NAME
 215  MODULE_FIRMWARE(BRCMF_PCIE_43570_NVRAM_NAME);
 216  MODULE_FIRMWARE(BRCMF_PCIE_4358_FW_NAME);
 217  MODULE_FIRMWARE(BRCMF_PCIE_4358_NVRAM_NAME);
 218 +MODULE_FIRMWARE(BRCMF_PCIE_4365_FW_NAME);
 219 +MODULE_FIRMWARE(BRCMF_PCIE_4365_NVRAM_NAME);
 220 +MODULE_FIRMWARE(BRCMF_PCIE_4366_FW_NAME);
 221 +MODULE_FIRMWARE(BRCMF_PCIE_4366_NVRAM_NAME);
 222
 223
 224  struct brcmf_pcie_console {
 225 @@ -1440,6 +1448,14 @@ static int brcmf_pcie_get_fwnames(struct
 226                 fw_name = BRCMF_PCIE_4358_FW_NAME;
 227                 nvram_name = BRCMF_PCIE_4358_NVRAM_NAME;
 228                 break;
 229 +       case BRCM_CC_4365_CHIP_ID:
 230 +               fw_name = BRCMF_PCIE_4365_FW_NAME;
 231 +               nvram_name = BRCMF_PCIE_4365_NVRAM_NAME;
 232 +               break;
 233 +       case BRCM_CC_4366_CHIP_ID:
 234 +               fw_name = BRCMF_PCIE_4366_FW_NAME;
 235 +               nvram_name = BRCMF_PCIE_4366_NVRAM_NAME;
 236 +               break;
 237         default:
 238                 brcmf_err("Unsupported chip 0x%04x\n", devinfo->ci->chip);
 239                 return -ENODEV;
 240 @@ -1973,6 +1989,12 @@ static struct pci_device_id brcmf_pcie_d
 241         BRCMF_PCIE_DEVICE(BRCM_PCIE_43602_2G_DEVICE_ID),
 242         BRCMF_PCIE_DEVICE(BRCM_PCIE_43602_5G_DEVICE_ID),
 243         BRCMF_PCIE_DEVICE(BRCM_PCIE_43602_RAW_DEVICE_ID),
 244 +       BRCMF_PCIE_DEVICE(BRCM_PCIE_4365_DEVICE_ID),
 245 +       BRCMF_PCIE_DEVICE(BRCM_PCIE_4365_2G_DEVICE_ID),
 246 +       BRCMF_PCIE_DEVICE(BRCM_PCIE_4365_5G_DEVICE_ID),
 247 +       BRCMF_PCIE_DEVICE(BRCM_PCIE_4366_DEVICE_ID),
 248 +       BRCMF_PCIE_DEVICE(BRCM_PCIE_4366_2G_DEVICE_ID),
 249 +       BRCMF_PCIE_DEVICE(BRCM_PCIE_4366_5G_DEVICE_ID),
 250         { /* end: all zeroes */ }
 251  };
 252
 253 --- a/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h
 254 +++ b/drivers/net/wireless/brcm80211/include/brcm_hw_ids.h
 255 @@ -48,6 +48,8 @@
 256  #define BRCM_CC_43570_CHIP_ID          43570
 257  #define BRCM_CC_4358_CHIP_ID           0x4358
 258  #define BRCM_CC_43602_CHIP_ID          43602
 259 +#define BRCM_CC_4365_CHIP_ID           0x4365
 260 +#define BRCM_CC_4366_CHIP_ID           0x4366
 261
 262  /* USB Device IDs */
 263  #define BRCM_USB_43143_DEVICE_ID       0xbd1e
 264 @@ -67,6 +69,13 @@
 265  #define BRCM_PCIE_43602_2G_DEVICE_ID   0x43bb
 266  #define BRCM_PCIE_43602_5G_DEVICE_ID   0x43bc
 267  #define BRCM_PCIE_43602_RAW_DEVICE_ID  43602
 268 +#define BRCM_PCIE_4365_DEVICE_ID       0x43ca
 269 +#define BRCM_PCIE_4365_2G_DEVICE_ID    0x43cb
 270 +#define BRCM_PCIE_4365_5G_DEVICE_ID    0x43cc
 271 +#define BRCM_PCIE_4366_DEVICE_ID       0x43c3
 272 +#define BRCM_PCIE_4366_2G_DEVICE_ID    0x43c4
 273 +#define BRCM_PCIE_4366_5G_DEVICE_ID    0x43c5
 274 +
 275
 276  /* brcmsmac IDs */
 277  #define BCM4313_D11N2G_ID      0x4727  /* 4313 802.11n 2.4G device */