target/linux/generic/files/drivers/net/phy/ar8216.c

   1 /*
   2  * ar8216.c: AR8216 switch driver
   3  *
   4  * Copyright (C) 2009 Felix Fietkau <nbd@openwrt.org>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version 2
   9  * of the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  */
  16
  17 #include <linux/if.h>
  18 #include <linux/module.h>
  19 #include <linux/init.h>
  20 #include <linux/list.h>
  21 #include <linux/if_ether.h>
  22 #include <linux/skbuff.h>
  23 #include <linux/netdevice.h>
  24 #include <linux/netlink.h>
  25 #include <linux/bitops.h>
  26 #include <net/genetlink.h>
  27 #include <linux/switch.h>
  28 #include <linux/delay.h>
  29 #include <linux/phy.h>
  30 #include <linux/netdevice.h>
  31 #include <linux/etherdevice.h>
  32 #include "ar8216.h"
  33
  34 /* size of the vlan table */
  35 #define AR8X16_MAX_VLANS        128
  36 #define AR8X16_PROBE_RETRIES    10
  37
  38 struct ar8216_priv {
  39         struct switch_dev dev;
  40         struct phy_device *phy;
  41         u32 (*read)(struct ar8216_priv *priv, int reg);
  42         void (*write)(struct ar8216_priv *priv, int reg, u32 val);
  43         const struct net_device_ops *ndo_old;
  44         struct net_device_ops ndo;
  45         struct mutex reg_mutex;
  46         int chip;
  47         bool initialized;
  48         bool port4_phy;
  49         char buf[80];
  50
  51         bool init;
  52
  53         /* all fields below are cleared on reset */
  54         bool vlan;
  55         u16 vlan_id[AR8X16_MAX_VLANS];
  56         u8 vlan_table[AR8X16_MAX_VLANS];
  57         u8 vlan_tagged;
  58         u16 pvid[AR8216_NUM_PORTS];
  59 };
  60
  61 #define to_ar8216(_dev) container_of(_dev, struct ar8216_priv, dev)
  62
  63 static inline void
  64 split_addr(u32 regaddr, u16 *r1, u16 *r2, u16 *page)
  65 {
  66         regaddr >>= 1;
  67         *r1 = regaddr & 0x1e;
  68
  69         regaddr >>= 5;
  70         *r2 = regaddr & 0x7;
  71
  72         regaddr >>= 3;
  73         *page = regaddr & 0x1ff;
  74 }
  75
  76 static u32
  77 ar8216_mii_read(struct ar8216_priv *priv, int reg)
  78 {
  79         struct phy_device *phy = priv->phy;
  80         struct mii_bus *bus = phy->bus;
  81         u16 r1, r2, page;
  82         u16 lo, hi;
  83
  84         split_addr((u32) reg, &r1, &r2, &page);
  85
  86         mutex_lock(&bus->mdio_lock);
  87
  88         bus->write(bus, 0x18, 0, page);
  89         msleep(1); /* wait for the page switch to propagate */
  90         lo = bus->read(bus, 0x10 | r2, r1);
  91         hi = bus->read(bus, 0x10 | r2, r1 + 1);
  92
  93         mutex_unlock(&bus->mdio_lock);
  94
  95         return (hi << 16) | lo;
  96 }
  97
  98 static void
  99 ar8216_mii_write(struct ar8216_priv *priv, int reg, u32 val)
 100 {
 101         struct phy_device *phy = priv->phy;
 102         struct mii_bus *bus = phy->bus;
 103         u16 r1, r2, r3;
 104         u16 lo, hi;
 105
 106         split_addr((u32) reg, &r1, &r2, &r3);
 107         lo = val & 0xffff;
 108         hi = (u16) (val >> 16);
 109
 110         mutex_lock(&bus->mdio_lock);
 111
 112         bus->write(bus, 0x18, 0, r3);
 113         msleep(1); /* wait for the page switch to propagate */
 114         bus->write(bus, 0x10 | r2, r1 + 1, hi);
 115         bus->write(bus, 0x10 | r2, r1, lo);
 116
 117         mutex_unlock(&bus->mdio_lock);
 118 }
 119
 120 static u32
 121 ar8216_rmw(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 122 {
 123         u32 v;
 124
 125         v = priv->read(priv, reg);
 126         v &= ~mask;
 127         v |= val;
 128         priv->write(priv, reg, v);
 129
 130         return v;
 131 }
 132
 133 static inline int
 134 ar8216_id_chip(struct ar8216_priv *priv)
 135 {
 136         u32 val;
 137         u16 id;
 138         int i;
 139
 140         val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 141         if (val == ~0)
 142                 return UNKNOWN;
 143
 144         id = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 145         for (i = 0; i < AR8X16_PROBE_RETRIES; i++) {
 146                 u16 t;
 147
 148                 val = ar8216_mii_read(priv, AR8216_REG_CTRL);
 149                 if (val == ~0)
 150                         return UNKNOWN;
 151
 152                 t = val & (AR8216_CTRL_REVISION | AR8216_CTRL_VERSION);
 153                 if (t != id)
 154                         return UNKNOWN;
 155         }
 156
 157         switch (id) {
 158         case 0x0101:
 159                 return AR8216;
 160         case 0x0301:
 161                 return AR8236;
 162         case 0x1000:
 163         case 0x1001:
 164                 return AR8316;
 165         default:
 166                 printk(KERN_DEBUG
 167                         "ar8216: Unknown Atheros device [ver=%d, rev=%d, phy_id=%04x%04x]\n",
 168                         (int)(id >> AR8216_CTRL_VERSION_S),
 169                         (int)(id & AR8216_CTRL_REVISION),
 170                         mdiobus_read(priv->phy->bus, priv->phy->addr, 2),
 171                         mdiobus_read(priv->phy->bus, priv->phy->addr, 3));
 172
 173                 return UNKNOWN;
 174         }
 175 }
 176
 177 static void
 178 ar8216_read_port_link(struct ar8216_priv *priv, int port,
 179                       struct switch_port_link *link)
 180 {
 181         u32 status;
 182         u32 speed;
 183
 184         memset(link, '\0', sizeof(*link));
 185
 186         status = priv->read(priv, AR8216_REG_PORT_STATUS(port));
 187
 188         link->aneg = !!(status & AR8216_PORT_STATUS_LINK_AUTO);
 189         if (link->aneg) {
 190                 link->link = !!(status & AR8216_PORT_STATUS_LINK_UP);
 191                 if (!link->link)
 192                         return;
 193         } else {
 194                 link->link = true;
 195         }
 196
 197         link->duplex = !!(status & AR8216_PORT_STATUS_DUPLEX);
 198         link->tx_flow = !!(status & AR8216_PORT_STATUS_TXFLOW);
 199         link->rx_flow = !!(status & AR8216_PORT_STATUS_RXFLOW);
 200
 201         speed = (status & AR8216_PORT_STATUS_SPEED) >>
 202                  AR8216_PORT_STATUS_SPEED_S;
 203
 204         switch (speed) {
 205         case AR8216_PORT_SPEED_10M:
 206                 link->speed = SWITCH_PORT_SPEED_10;
 207                 break;
 208         case AR8216_PORT_SPEED_100M:
 209                 link->speed = SWITCH_PORT_SPEED_100;
 210                 break;
 211         case AR8216_PORT_SPEED_1000M:
 212                 link->speed = SWITCH_PORT_SPEED_1000;
 213                 break;
 214         default:
 215                 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
 216                 break;
 217         }
 218 }
 219
 220 static int
 221 ar8216_set_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 222                 struct switch_val *val)
 223 {
 224         struct ar8216_priv *priv = to_ar8216(dev);
 225         priv->vlan = !!val->value.i;
 226         return 0;
 227 }
 228
 229 static int
 230 ar8216_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
 231                 struct switch_val *val)
 232 {
 233         struct ar8216_priv *priv = to_ar8216(dev);
 234         val->value.i = priv->vlan;
 235         return 0;
 236 }
 237
 238
 239 static int
 240 ar8216_set_pvid(struct switch_dev *dev, int port, int vlan)
 241 {
 242         struct ar8216_priv *priv = to_ar8216(dev);
 243
 244         /* make sure no invalid PVIDs get set */
 245
 246         if (vlan >= dev->vlans)
 247                 return -EINVAL;
 248
 249         priv->pvid[port] = vlan;
 250         return 0;
 251 }
 252
 253 static int
 254 ar8216_get_pvid(struct switch_dev *dev, int port, int *vlan)
 255 {
 256         struct ar8216_priv *priv = to_ar8216(dev);
 257         *vlan = priv->pvid[port];
 258         return 0;
 259 }
 260
 261 static int
 262 ar8216_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
 263                 struct switch_val *val)
 264 {
 265         struct ar8216_priv *priv = to_ar8216(dev);
 266         priv->vlan_id[val->port_vlan] = val->value.i;
 267         return 0;
 268 }
 269
 270 static int
 271 ar8216_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
 272                 struct switch_val *val)
 273 {
 274         struct ar8216_priv *priv = to_ar8216(dev);
 275         val->value.i = priv->vlan_id[val->port_vlan];
 276         return 0;
 277 }
 278
 279 static int
 280 ar8216_get_port_link(struct switch_dev *dev, int port,
 281                      struct switch_port_link *link)
 282 {
 283         struct ar8216_priv *priv = to_ar8216(dev);
 284
 285         ar8216_read_port_link(priv, port, link);
 286         return 0;
 287 }
 288
 289 static int
 290 ar8216_mangle_tx(struct sk_buff *skb, struct net_device *dev)
 291 {
 292         struct ar8216_priv *priv = dev->phy_ptr;
 293         unsigned char *buf;
 294
 295     if (unlikely(!priv))
 296         goto error;
 297
 298         if (!priv->vlan)
 299                 goto send;
 300
 301         if (unlikely(skb_headroom(skb) < 2)) {
 302                 if (pskb_expand_head(skb, 2, 0, GFP_ATOMIC) < 0)
 303                         goto error;
 304         }
 305
 306         buf = skb_push(skb, 2);
 307         buf[0] = 0x10;
 308         buf[1] = 0x80;
 309
 310 send:
 311         return priv->ndo_old->ndo_start_xmit(skb, dev);
 312
 313 error:
 314         dev_kfree_skb_any(skb);
 315         return 0;
 316 }
 317
 318 static int
 319 ar8216_mangle_rx(struct sk_buff *skb, int napi)
 320 {
 321         struct ar8216_priv *priv;
 322         struct net_device *dev;
 323         unsigned char *buf;
 324         int port, vlan;
 325
 326         dev = skb->dev;
 327         if (!dev)
 328                 goto error;
 329
 330         priv = dev->phy_ptr;
 331         if (!priv)
 332                 goto error;
 333
 334         /* don't strip the header if vlan mode is disabled */
 335         if (!priv->vlan)
 336                 goto recv;
 337
 338         /* strip header, get vlan id */
 339         buf = skb->data;
 340         skb_pull(skb, 2);
 341
 342         /* check for vlan header presence */
 343         if ((buf[12 + 2] != 0x81) || (buf[13 + 2] != 0x00))
 344                 goto recv;
 345
 346         port = buf[0] & 0xf;
 347
 348         /* no need to fix up packets coming from a tagged source */
 349         if (priv->vlan_tagged & (1 << port))
 350                 goto recv;
 351
 352         /* lookup port vid from local table, the switch passes an invalid vlan id */
 353         vlan = priv->vlan_id[priv->pvid[port]];
 354
 355         buf[14 + 2] &= 0xf0;
 356         buf[14 + 2] |= vlan >> 8;
 357         buf[15 + 2] = vlan & 0xff;
 358
 359 recv:
 360         skb->protocol = eth_type_trans(skb, skb->dev);
 361
 362         if (napi)
 363                 return netif_receive_skb(skb);
 364         else
 365                 return netif_rx(skb);
 366
 367 error:
 368         /* no vlan? eat the packet! */
 369         dev_kfree_skb_any(skb);
 370         return NET_RX_DROP;
 371 }
 372
 373 static int
 374 ar8216_netif_rx(struct sk_buff *skb)
 375 {
 376         return ar8216_mangle_rx(skb, 0);
 377 }
 378
 379 static int
 380 ar8216_netif_receive_skb(struct sk_buff *skb)
 381 {
 382         return ar8216_mangle_rx(skb, 1);
 383 }
 384
 385
 386 static struct switch_attr ar8216_globals[] = {
 387         {
 388                 .type = SWITCH_TYPE_INT,
 389                 .name = "enable_vlan",
 390                 .description = "Enable VLAN mode",
 391                 .set = ar8216_set_vlan,
 392                 .get = ar8216_get_vlan,
 393                 .max = 1
 394         },
 395 };
 396
 397 static struct switch_attr ar8216_port[] = {
 398 };
 399
 400 static struct switch_attr ar8216_vlan[] = {
 401         {
 402                 .type = SWITCH_TYPE_INT,
 403                 .name = "vid",
 404                 .description = "VLAN ID (0-4094)",
 405                 .set = ar8216_set_vid,
 406                 .get = ar8216_get_vid,
 407                 .max = 4094,
 408         },
 409 };
 410
 411
 412 static int
 413 ar8216_get_ports(struct switch_dev *dev, struct switch_val *val)
 414 {
 415         struct ar8216_priv *priv = to_ar8216(dev);
 416         u8 ports = priv->vlan_table[val->port_vlan];
 417         int i;
 418
 419         val->len = 0;
 420         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 421                 struct switch_port *p;
 422
 423                 if (!(ports & (1 << i)))
 424                         continue;
 425
 426                 p = &val->value.ports[val->len++];
 427                 p->id = i;
 428                 if (priv->vlan_tagged & (1 << i))
 429                         p->flags = (1 << SWITCH_PORT_FLAG_TAGGED);
 430                 else
 431                         p->flags = 0;
 432         }
 433         return 0;
 434 }
 435
 436 static int
 437 ar8216_set_ports(struct switch_dev *dev, struct switch_val *val)
 438 {
 439         struct ar8216_priv *priv = to_ar8216(dev);
 440         u8 *vt = &priv->vlan_table[val->port_vlan];
 441         int i, j;
 442
 443         *vt = 0;
 444         for (i = 0; i < val->len; i++) {
 445                 struct switch_port *p = &val->value.ports[i];
 446
 447                 if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED))
 448                         priv->vlan_tagged |= (1 << p->id);
 449                 else {
 450                         priv->vlan_tagged &= ~(1 << p->id);
 451                         priv->pvid[p->id] = val->port_vlan;
 452
 453                         /* make sure that an untagged port does not
 454                          * appear in other vlans */
 455                         for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 456                                 if (j == val->port_vlan)
 457                                         continue;
 458                                 priv->vlan_table[j] &= ~(1 << p->id);
 459                         }
 460                 }
 461
 462                 *vt |= 1 << p->id;
 463         }
 464         return 0;
 465 }
 466
 467 static int
 468 ar8216_wait_bit(struct ar8216_priv *priv, int reg, u32 mask, u32 val)
 469 {
 470         int timeout = 20;
 471         u32 t = 0;
 472
 473         while (1) {
 474                 t = priv->read(priv, reg);
 475                 if ((t & mask) == val)
 476                         return 0;
 477
 478                 if (timeout-- <= 0)
 479                         break;
 480
 481                 udelay(10);
 482         }
 483
 484         pr_err("ar8216: timeout on reg %08x: %08x & %08x != %08x\n",
 485                (unsigned int) reg, t, mask, val);
 486         return -ETIMEDOUT;
 487 }
 488
 489 static void
 490 ar8216_vtu_op(struct ar8216_priv *priv, u32 op, u32 val)
 491 {
 492         if (ar8216_wait_bit(priv, AR8216_REG_VTU, AR8216_VTU_ACTIVE, 0))
 493                 return;
 494         if ((op & AR8216_VTU_OP) == AR8216_VTU_OP_LOAD) {
 495                 val &= AR8216_VTUDATA_MEMBER;
 496                 val |= AR8216_VTUDATA_VALID;
 497                 priv->write(priv, AR8216_REG_VTU_DATA, val);
 498         }
 499         op |= AR8216_VTU_ACTIVE;
 500         priv->write(priv, AR8216_REG_VTU, op);
 501 }
 502
 503 static void
 504 ar8216_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 505                   u32 members, u32 pvid)
 506 {
 507         u32 header;
 508
 509         if (priv->vlan && port == AR8216_PORT_CPU && priv->chip == AR8216)
 510                 header = AR8216_PORT_CTRL_HEADER;
 511         else
 512                 header = 0;
 513
 514         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 515                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 516                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 517                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 518                    AR8216_PORT_CTRL_LEARN | header |
 519                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 520                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 521
 522         ar8216_rmw(priv, AR8216_REG_PORT_VLAN(port),
 523                    AR8216_PORT_VLAN_DEST_PORTS | AR8216_PORT_VLAN_MODE |
 524                    AR8216_PORT_VLAN_DEFAULT_ID,
 525                    (members << AR8216_PORT_VLAN_DEST_PORTS_S) |
 526                    (ingress << AR8216_PORT_VLAN_MODE_S) |
 527                    (pvid << AR8216_PORT_VLAN_DEFAULT_ID_S));
 528 }
 529
 530 static void
 531 ar8236_setup_port(struct ar8216_priv *priv, int port, u32 egress, u32 ingress,
 532                   u32 members, u32 pvid)
 533 {
 534         ar8216_rmw(priv, AR8216_REG_PORT_CTRL(port),
 535                    AR8216_PORT_CTRL_LEARN | AR8216_PORT_CTRL_VLAN_MODE |
 536                    AR8216_PORT_CTRL_SINGLE_VLAN | AR8216_PORT_CTRL_STATE |
 537                    AR8216_PORT_CTRL_HEADER | AR8216_PORT_CTRL_LEARN_LOCK,
 538                    AR8216_PORT_CTRL_LEARN |
 539                    (egress << AR8216_PORT_CTRL_VLAN_MODE_S) |
 540                    (AR8216_PORT_STATE_FORWARD << AR8216_PORT_CTRL_STATE_S));
 541
 542         ar8216_rmw(priv, AR8236_REG_PORT_VLAN(port),
 543                    AR8236_PORT_VLAN_DEFAULT_ID,
 544                    (pvid << AR8236_PORT_VLAN_DEFAULT_ID_S));
 545
 546         ar8216_rmw(priv, AR8236_REG_PORT_VLAN2(port),
 547                    AR8236_PORT_VLAN2_VLAN_MODE |
 548                    AR8236_PORT_VLAN2_MEMBER,
 549                    (ingress << AR8236_PORT_VLAN2_VLAN_MODE_S) |
 550                    (members << AR8236_PORT_VLAN2_MEMBER_S));
 551 }
 552
 553 static int
 554 ar8216_hw_apply(struct switch_dev *dev)
 555 {
 556         struct ar8216_priv *priv = to_ar8216(dev);
 557         u8 portmask[AR8216_NUM_PORTS];
 558         int i, j;
 559
 560         mutex_lock(&priv->reg_mutex);
 561         /* flush all vlan translation unit entries */
 562         ar8216_vtu_op(priv, AR8216_VTU_OP_FLUSH, 0);
 563
 564         memset(portmask, 0, sizeof(portmask));
 565         if (!priv->init) {
 566                 /* calculate the port destination masks and load vlans
 567                  * into the vlan translation unit */
 568                 for (j = 0; j < AR8X16_MAX_VLANS; j++) {
 569                         u8 vp = priv->vlan_table[j];
 570
 571                         if (!vp)
 572                                 continue;
 573
 574                         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 575                                 u8 mask = (1 << i);
 576                                 if (vp & mask)
 577                                         portmask[i] |= vp & ~mask;
 578                         }
 579
 580                         ar8216_vtu_op(priv,
 581                                 AR8216_VTU_OP_LOAD |
 582                                 (priv->vlan_id[j] << AR8216_VTU_VID_S),
 583                                 priv->vlan_table[j]);
 584                 }
 585         } else {
 586                 /* vlan disabled:
 587                  * isolate all ports, but connect them to the cpu port */
 588                 for (i = 0; i < AR8216_NUM_PORTS; i++) {
 589                         if (i == AR8216_PORT_CPU)
 590                                 continue;
 591
 592                         portmask[i] = 1 << AR8216_PORT_CPU;
 593                         portmask[AR8216_PORT_CPU] |= (1 << i);
 594                 }
 595         }
 596
 597         /* update the port destination mask registers and tag settings */
 598         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 599                 int egress, ingress;
 600                 int pvid;
 601
 602                 if (priv->vlan) {
 603                         pvid = priv->vlan_id[priv->pvid[i]];
 604                 } else {
 605                         pvid = i;
 606                 }
 607
 608                 if (priv->vlan) {
 609                         if (priv->vlan_tagged & (1 << i))
 610                                 egress = AR8216_OUT_ADD_VLAN;
 611                         else
 612                                 egress = AR8216_OUT_STRIP_VLAN;
 613                 } else {
 614                         egress = AR8216_OUT_KEEP;
 615                 }
 616                 if (priv->vlan) {
 617                         ingress = AR8216_IN_SECURE;
 618                 } else {
 619                         ingress = AR8216_IN_PORT_ONLY;
 620                 }
 621
 622                 if (priv->chip == AR8236)
 623                         ar8236_setup_port(priv, i, egress, ingress, portmask[i],
 624                                           pvid);
 625                 else
 626                         ar8216_setup_port(priv, i, egress, ingress, portmask[i],
 627                                           pvid);
 628         }
 629         mutex_unlock(&priv->reg_mutex);
 630         return 0;
 631 }
 632
 633 static int
 634 ar8236_hw_init(struct ar8216_priv *priv) {
 635         static int initialized;
 636         int i;
 637         struct mii_bus *bus;
 638
 639         if (initialized)
 640                 return 0;
 641
 642         /* Initialize the PHYs */
 643         bus = priv->phy->bus;
 644         for (i = 0; i < 5; i++) {
 645                 mdiobus_write(bus, i, MII_ADVERTISE,
 646                               ADVERTISE_ALL | ADVERTISE_PAUSE_CAP |
 647                               ADVERTISE_PAUSE_ASYM);
 648                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 649         }
 650         msleep(1000);
 651
 652         initialized = true;
 653         return 0;
 654 }
 655
 656 static int
 657 ar8316_hw_init(struct ar8216_priv *priv) {
 658         int i;
 659         u32 val, newval;
 660         struct mii_bus *bus;
 661
 662         val = priv->read(priv, 0x8);
 663
 664         if (priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 665                 if (priv->port4_phy) {
 666                         /* value taken from Ubiquiti RouterStation Pro */
 667                         newval = 0x81461bea;
 668                         printk(KERN_INFO "ar8316: Using port 4 as PHY\n");
 669                 } else {
 670                         newval = 0x01261be2;
 671                         printk(KERN_INFO "ar8316: Using port 4 as switch port\n");
 672                 }
 673         } else if (priv->phy->interface == PHY_INTERFACE_MODE_GMII) {
 674                 /* value taken from AVM Fritz!Box 7390 sources */
 675                 newval = 0x010e5b71;
 676         } else {
 677                 /* no known value for phy interface */
 678                 printk(KERN_ERR "ar8316: unsupported mii mode: %d.\n",
 679                         priv->phy->interface);
 680                 return -EINVAL;
 681         }
 682
 683         if (val == newval)
 684                 goto out;
 685
 686         priv->write(priv, 0x8, newval);
 687
 688         /* standard atheros magic */
 689         priv->write(priv, 0x38, 0xc000050e);
 690
 691         /* Initialize the ports */
 692         bus = priv->phy->bus;
 693         for (i = 0; i < 5; i++) {
 694                 if ((i == 4) && priv->port4_phy &&
 695                     priv->phy->interface == PHY_INTERFACE_MODE_RGMII) {
 696                         /* work around for phy4 rgmii mode */
 697                         mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x12);
 698                         mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x480c);
 699                         /* rx delay */
 700                         mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x0);
 701                         mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x824e);
 702                         /* tx delay */
 703                         mdiobus_write(bus, i, MII_ATH_DBG_ADDR, 0x5);
 704                         mdiobus_write(bus, i, MII_ATH_DBG_DATA, 0x3d47);
 705                         msleep(1000);
 706                 }
 707
 708                 /* initialize the port itself */
 709                 mdiobus_write(bus, i, MII_ADVERTISE,
 710                         ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM);
 711                 mdiobus_write(bus, i, MII_CTRL1000, ADVERTISE_1000FULL);
 712                 mdiobus_write(bus, i, MII_BMCR, BMCR_RESET | BMCR_ANENABLE);
 713                 msleep(1000);
 714         }
 715
 716 out:
 717         priv->initialized = true;
 718         return 0;
 719 }
 720
 721 static int
 722 ar8216_reset_switch(struct switch_dev *dev)
 723 {
 724         struct ar8216_priv *priv = to_ar8216(dev);
 725         int i;
 726
 727         mutex_lock(&priv->reg_mutex);
 728         memset(&priv->vlan, 0, sizeof(struct ar8216_priv) -
 729                 offsetof(struct ar8216_priv, vlan));
 730         for (i = 0; i < AR8X16_MAX_VLANS; i++) {
 731                 priv->vlan_id[i] = i;
 732         }
 733         for (i = 0; i < AR8216_NUM_PORTS; i++) {
 734                 /* Enable port learning and tx */
 735                 priv->write(priv, AR8216_REG_PORT_CTRL(i),
 736                         AR8216_PORT_CTRL_LEARN |
 737                         (4 << AR8216_PORT_CTRL_STATE_S));
 738
 739                 priv->write(priv, AR8216_REG_PORT_VLAN(i), 0);
 740
 741                 /* Configure all PHYs */
 742                 if (i == AR8216_PORT_CPU) {
 743                         priv->write(priv, AR8216_REG_PORT_STATUS(i),
 744                                 AR8216_PORT_STATUS_LINK_UP |
 745                                 ((priv->chip == AR8316) ?
 746                                         AR8216_PORT_SPEED_1000M : AR8216_PORT_SPEED_100M) |
 747                                 AR8216_PORT_STATUS_TXMAC |
 748                                 AR8216_PORT_STATUS_RXMAC |
 749                                 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_RXFLOW : 0) |
 750                                 ((priv->chip == AR8316) ? AR8216_PORT_STATUS_TXFLOW : 0) |
 751                                 AR8216_PORT_STATUS_DUPLEX);
 752                 } else {
 753                         priv->write(priv, AR8216_REG_PORT_STATUS(i),
 754                                 AR8216_PORT_STATUS_LINK_AUTO);
 755                 }
 756         }
 757         /* XXX: undocumented magic from atheros, required! */
 758         priv->write(priv, 0x38, 0xc000050e);
 759
 760         if (priv->chip == AR8216) {
 761                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 762                         AR8216_GCTRL_MTU, 1518 + 8 + 2);
 763         } else if (priv->chip == AR8316 ||
 764                    priv->chip == AR8236) {
 765                 /* enable jumbo frames */
 766                 ar8216_rmw(priv, AR8216_REG_GLOBAL_CTRL,
 767                         AR8316_GCTRL_MTU, 9018 + 8 + 2);
 768         }
 769
 770         if (priv->chip == AR8316) {
 771                 /* enable cpu port to receive multicast and broadcast frames */
 772                 priv->write(priv, AR8216_REG_FLOOD_MASK, 0x003f003f);
 773         }
 774         mutex_unlock(&priv->reg_mutex);
 775         return ar8216_hw_apply(dev);
 776 }
 777
 778
 779 static const struct switch_dev_ops ar8216_ops = {
 780         .attr_global = {
 781                 .attr = ar8216_globals,
 782                 .n_attr = ARRAY_SIZE(ar8216_globals),
 783         },
 784         .attr_port = {
 785                 .attr = ar8216_port,
 786                 .n_attr = ARRAY_SIZE(ar8216_port),
 787         },
 788         .attr_vlan = {
 789                 .attr = ar8216_vlan,
 790                 .n_attr = ARRAY_SIZE(ar8216_vlan),
 791         },
 792         .get_port_pvid = ar8216_get_pvid,
 793         .set_port_pvid = ar8216_set_pvid,
 794         .get_vlan_ports = ar8216_get_ports,
 795         .set_vlan_ports = ar8216_set_ports,
 796         .apply_config = ar8216_hw_apply,
 797         .reset_switch = ar8216_reset_switch,
 798         .get_port_link = ar8216_get_port_link,
 799 };
 800
 801 static int
 802 ar8216_config_init(struct phy_device *pdev)
 803 {
 804         struct ar8216_priv *priv = pdev->priv;
 805         struct net_device *dev = pdev->attached_dev;
 806         struct switch_dev *swdev;
 807         int ret;
 808
 809         if (!priv) {
 810                 priv = kzalloc(sizeof(struct ar8216_priv), GFP_KERNEL);
 811                 if (priv == NULL)
 812                         return -ENOMEM;
 813         }
 814
 815         priv->phy = pdev;
 816
 817         priv->chip = ar8216_id_chip(priv);
 818
 819         if (pdev->addr != 0) {
 820                 if (priv->chip == AR8316) {
 821                         pdev->supported |= SUPPORTED_1000baseT_Full;
 822                         pdev->advertising |= ADVERTISED_1000baseT_Full;
 823
 824                         /* check if we're attaching to the switch twice */
 825                         pdev = pdev->bus->phy_map[0];
 826                         if (!pdev) {
 827                                 kfree(priv);
 828                                 return 0;
 829                         }
 830
 831                         /* switch device has not been initialized, reuse priv */
 832                         if (!pdev->priv) {
 833                                 priv->port4_phy = true;
 834                                 pdev->priv = priv;
 835                                 return 0;
 836                         }
 837
 838                         kfree(priv);
 839
 840                         /* switch device has been initialized, reinit */
 841                         priv = pdev->priv;
 842                         priv->dev.ports = (AR8216_NUM_PORTS - 1);
 843                         priv->initialized = false;
 844                         priv->port4_phy = true;
 845                         ar8316_hw_init(priv);
 846                         return 0;
 847                 }
 848
 849                 kfree(priv);
 850                 return 0;
 851         }
 852
 853         printk(KERN_INFO "%s: AR%d switch driver attached.\n",
 854                 pdev->attached_dev->name, priv->chip);
 855
 856         pdev->supported = priv->chip == AR8316 ?
 857                 SUPPORTED_1000baseT_Full : SUPPORTED_100baseT_Full;
 858         pdev->advertising = pdev->supported;
 859
 860         mutex_init(&priv->reg_mutex);
 861         priv->read = ar8216_mii_read;
 862         priv->write = ar8216_mii_write;
 863
 864         pdev->priv = priv;
 865
 866         swdev = &priv->dev;
 867         swdev->cpu_port = AR8216_PORT_CPU;
 868         swdev->ops = &ar8216_ops;
 869         swdev->ports = AR8216_NUM_PORTS;
 870
 871         if (priv->chip == AR8316) {
 872                 swdev->name = "Atheros AR8316";
 873                 swdev->vlans = AR8X16_MAX_VLANS;
 874
 875                 if (priv->port4_phy) {
 876                         /* port 5 connected to the other mac, therefore unusable */
 877                         swdev->ports = (AR8216_NUM_PORTS - 1);
 878                 }
 879         } else if (priv->chip == AR8236) {
 880                 swdev->name = "Atheros AR8236";
 881                 swdev->vlans = AR8216_NUM_VLANS;
 882                 swdev->ports = AR8216_NUM_PORTS;
 883         } else {
 884                 swdev->name = "Atheros AR8216";
 885                 swdev->vlans = AR8216_NUM_VLANS;
 886         }
 887
 888         if ((ret = register_switch(&priv->dev, pdev->attached_dev)) < 0) {
 889                 kfree(priv);
 890                 goto done;
 891         }
 892
 893         priv->init = true;
 894
 895         if (priv->chip == AR8316) {
 896                 ret = ar8316_hw_init(priv);
 897                 if (ret) {
 898                         kfree(priv);
 899                         goto done;
 900                 }
 901         }
 902
 903         if (priv->chip == AR8236) {
 904                 ret = ar8236_hw_init(priv);
 905                 if (ret) {
 906                         kfree(priv);
 907                         goto done;
 908                 }
 909         }
 910
 911         ret = ar8216_reset_switch(&priv->dev);
 912         if (ret) {
 913                 kfree(priv);
 914                 goto done;
 915         }
 916
 917         dev->phy_ptr = priv;
 918
 919         /* VID fixup only needed on ar8216 */
 920         if (pdev->addr == 0 && priv->chip == AR8216) {
 921                 pdev->pkt_align = 2;
 922                 pdev->netif_receive_skb = ar8216_netif_receive_skb;
 923                 pdev->netif_rx = ar8216_netif_rx;
 924                 priv->ndo_old = dev->netdev_ops;
 925                 memcpy(&priv->ndo, priv->ndo_old, sizeof(struct net_device_ops));
 926                 priv->ndo.ndo_start_xmit = ar8216_mangle_tx;
 927                 dev->netdev_ops = &priv->ndo;
 928         }
 929
 930         priv->init = false;
 931
 932 done:
 933         return ret;
 934 }
 935
 936 static int
 937 ar8216_read_status(struct phy_device *phydev)
 938 {
 939         struct ar8216_priv *priv = phydev->priv;
 940         struct switch_port_link link;
 941         int ret;
 942         if (phydev->addr != 0) {
 943                 return genphy_read_status(phydev);
 944         }
 945
 946         ar8216_read_port_link(priv, phydev->addr, &link);
 947         phydev->link = !!link.link;
 948         if (!phydev->link)
 949                 return 0;
 950
 951         switch (link.speed) {
 952         case SWITCH_PORT_SPEED_10:
 953                 phydev->speed = SPEED_10;
 954                 break;
 955         case SWITCH_PORT_SPEED_100:
 956                 phydev->speed = SPEED_100;
 957                 break;
 958         case SWITCH_PORT_SPEED_1000:
 959                 phydev->speed = SPEED_1000;
 960                 break;
 961         default:
 962                 phydev->speed = 0;
 963         }
 964         phydev->duplex = link.duplex ? DUPLEX_FULL : DUPLEX_HALF;
 965
 966         /* flush the address translation unit */
 967         mutex_lock(&priv->reg_mutex);
 968         ret = ar8216_wait_bit(priv, AR8216_REG_ATU, AR8216_ATU_ACTIVE, 0);
 969         if (!ret)
 970                 priv->write(priv, AR8216_REG_ATU, AR8216_ATU_OP_FLUSH);
 971         mutex_unlock(&priv->reg_mutex);
 972
 973         phydev->state = PHY_RUNNING;
 974         netif_carrier_on(phydev->attached_dev);
 975         phydev->adjust_link(phydev->attached_dev);
 976
 977         return ret;
 978 }
 979
 980 static int
 981 ar8216_config_aneg(struct phy_device *phydev)
 982 {
 983         if (phydev->addr == 0)
 984                 return 0;
 985
 986         return genphy_config_aneg(phydev);
 987 }
 988
 989 static int
 990 ar8216_probe(struct phy_device *pdev)
 991 {
 992         struct ar8216_priv priv;
 993         u16 chip;
 994
 995         priv.phy = pdev;
 996         chip = ar8216_id_chip(&priv);
 997         if (chip == UNKNOWN)
 998                 return -ENODEV;
 999
1000         return 0;
1001 }
1002
1003 static void
1004 ar8216_remove(struct phy_device *pdev)
1005 {
1006         struct ar8216_priv *priv = pdev->priv;
1007         struct net_device *dev = pdev->attached_dev;
1008
1009         if (!priv)
1010                 return;
1011
1012         if (priv->ndo_old && dev)
1013                 dev->netdev_ops = priv->ndo_old;
1014         if (pdev->addr == 0)
1015                 unregister_switch(&priv->dev);
1016         kfree(priv);
1017 }
1018
1019 static struct phy_driver ar8216_driver = {
1020         .phy_id         = 0x004d0000,
1021         .name           = "Atheros AR8216/AR8236/AR8316",
1022         .phy_id_mask    = 0xffff0000,
1023         .features       = PHY_BASIC_FEATURES,
1024         .probe          = ar8216_probe,
1025         .remove         = ar8216_remove,
1026         .config_init    = &ar8216_config_init,
1027         .config_aneg    = &ar8216_config_aneg,
1028         .read_status    = &ar8216_read_status,
1029         .driver         = { .owner = THIS_MODULE },
1030 };
1031
1032 int __init
1033 ar8216_init(void)
1034 {
1035         return phy_driver_register(&ar8216_driver);
1036 }
1037
1038 void __exit
1039 ar8216_exit(void)
1040 {
1041         phy_driver_unregister(&ar8216_driver);
1042 }
1043
1044 module_init(ar8216_init);
1045 module_exit(ar8216_exit);
1046 MODULE_LICENSE("GPL");
1047