lantiq: Add support for linux 4.4

[openwrt.git] / target / linux / lantiq / patches-4.4 / 0017-MTD-xway-fix-nand-locking.patch

diff --git a/target/linux/lantiq/patches-4.4/0017-MTD-xway-fix-nand-locking.patch b/target/linux/lantiq/patches-4.4/0017-MTD-xway-fix-nand-locking.patch
new file mode 100644 (file)
index 0000000..737469a
--- /dev/null
+++ b/target/linux/lantiq/patches-4.4/0017-MTD-xway-fix-nand-locking.patch
@@ -0,0 +1,89 @@
+From aa705c1b0860da91f2ed1a4c0b57337e6de689e1 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Thu, 7 Aug 2014 18:55:31 +0200
+Subject: [PATCH 17/36] MTD: xway: fix nand locking
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+---
+ drivers/mtd/nand/xway_nand.c |   15 +++------------
+ 1 file changed, 3 insertions(+), 12 deletions(-)
+
+--- a/drivers/mtd/nand/xway_nand.c
++++ b/drivers/mtd/nand/xway_nand.c
+@@ -80,13 +80,16 @@ static void xway_reset_chip(struct nand_
+ 
+ static void xway_select_chip(struct mtd_info *mtd, int chip)
+ {
++      static unsigned long csflags;
+ 
+       switch (chip) {
+       case -1:
+               ltq_ebu_w32_mask(NAND_CON_CE, 0, EBU_NAND_CON);
+               ltq_ebu_w32_mask(NAND_CON_NANDM, 0, EBU_NAND_CON);
++              spin_unlock_irqrestore(&ebu_lock, csflags);
+               break;
+       case 0:
++              spin_lock_irqsave(&ebu_lock, csflags);
+               ltq_ebu_w32_mask(0, NAND_CON_NANDM, EBU_NAND_CON);
+               ltq_ebu_w32_mask(0, NAND_CON_CE, EBU_NAND_CON);
+               break;
+@@ -99,7 +102,6 @@ static void xway_cmd_ctrl(struct mtd_inf
+ {
+       struct nand_chip *this = mtd->priv;
+       unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
+-      unsigned long flags;
+ 
+       if (ctrl & NAND_CTRL_CHANGE) {
+               if (ctrl & NAND_CLE)
+@@ -109,11 +111,9 @@ static void xway_cmd_ctrl(struct mtd_inf
+       }
+ 
+       if (cmd != NAND_CMD_NONE) {
+-              spin_lock_irqsave(&ebu_lock, flags);
+               writeb(cmd, (void __iomem *) (nandaddr | xway_latchcmd));
+               while ((ltq_ebu_r32(EBU_NAND_WAIT) & NAND_WAIT_WR_C) == 0)
+                       ;
+-              spin_unlock_irqrestore(&ebu_lock, flags);
+       }
+ }
+ 
+@@ -126,12 +126,9 @@ static unsigned char xway_read_byte(stru
+ {
+       struct nand_chip *this = mtd->priv;
+       unsigned long nandaddr = (unsigned long) this->IO_ADDR_R;
+-      unsigned long flags;
+       int ret;
+ 
+-      spin_lock_irqsave(&ebu_lock, flags);
+       ret = ltq_r8((void __iomem *)(nandaddr | NAND_READ_DATA));
+-      spin_unlock_irqrestore(&ebu_lock, flags);
+ 
+       return ret;
+ }
+@@ -140,26 +137,20 @@ static void xway_read_buf(struct mtd_inf
+ {
+       struct nand_chip *this = mtd->priv;
+       unsigned long nandaddr = (unsigned long) this->IO_ADDR_R;
+-      unsigned long flags;
+       int i;
+ 
+-      spin_lock_irqsave(&ebu_lock, flags);
+       for (i = 0; i < len; i++)
+               buf[i] = ltq_r8((void __iomem *)(nandaddr | NAND_READ_DATA));
+-      spin_unlock_irqrestore(&ebu_lock, flags);
+ }
+ 
+ static void xway_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
+ {
+       struct nand_chip *this = mtd->priv;
+       unsigned long nandaddr = (unsigned long) this->IO_ADDR_W;
+-      unsigned long flags;
+       int i;
+ 
+-      spin_lock_irqsave(&ebu_lock, flags);
+       for (i = 0; i < len; i++)
+               ltq_w8(buf[i], (void __iomem *)(nandaddr | NAND_WRITE_DATA));
+-      spin_unlock_irqrestore(&ebu_lock, flags);
+ }
+ 
+ static int xway_nand_probe(struct platform_device *pdev)