kernel: update 4.1 to 4.1.5

[openwrt.git] / target / linux / generic / patches-4.1 / 132-mips_inline_dma_ops.patch

diff --git a/target/linux/generic/patches-4.1/132-mips_inline_dma_ops.patch b/target/linux/generic/patches-4.1/132-mips_inline_dma_ops.patch
index 199cd01..f7543cc 100644 (file)
--- a/target/linux/generic/patches-4.1/132-mips_inline_dma_ops.patch
+++ b/target/linux/generic/patches-4.1/132-mips_inline_dma_ops.patch
@@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
 
 --- a/arch/mips/Kconfig
 +++ b/arch/mips/Kconfig
-@@ -1570,6 +1570,7 @@ config CPU_CAVIUM_OCTEON
+@@ -1571,6 +1571,7 @@ config CPU_CAVIUM_OCTEON
        select CPU_SUPPORTS_HUGEPAGES
        select USB_EHCI_BIG_ENDIAN_MMIO
        select MIPS_L1_CACHE_SHIFT_7
@@ -27,7 +27,7 @@ Signed-off-by: Felix Fietkau <nbd@openwrt.org>
        help
          The Cavium Octeon processor is a highly integrated chip containing
          many ethernet hardware widgets for networking tasks. The processor
-@@ -1865,6 +1866,9 @@ config MIPS_MALTA_PM
+@@ -1866,6 +1867,9 @@ config MIPS_MALTA_PM
        bool
        default y