brcm47xx: backport MIPS BCM47XX changes queued for 4.2

[openwrt.git] / target / linux / brcm47xx / patches-4.0 / 031-06-MIPS-BCM77xx-Remove-legacy-__cpuinit-data-sections-t.patch

diff --git a/target/linux/brcm47xx/patches-4.0/031-06-MIPS-BCM77xx-Remove-legacy-__cpuinit-data-sections-t.patch b/target/linux/brcm47xx/patches-4.0/031-06-MIPS-BCM77xx-Remove-legacy-__cpuinit-data-sections-t.patch
new file mode 100644 (file)
index 0000000..329fe81
--- /dev/null
+++ b/target/linux/brcm47xx/patches-4.0/031-06-MIPS-BCM77xx-Remove-legacy-__cpuinit-data-sections-t.patch
@@ -0,0 +1,69 @@
+From 50d68dfef385127a1da2957813272c610c691157 Mon Sep 17 00:00:00 2001
+From: Paul Gortmaker <paul.gortmaker@windriver.com>
+Date: Mon, 27 Apr 2015 18:47:56 -0400
+Subject: [PATCH] MIPS: BCM77xx: Remove legacy __cpuinit{,data} sections that
+ crept in
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+We removed __cpuinit support (leaving no-op stubs) quite some time ago.
+However a few more crept in as of commit 6ee1d93455384cef8a0426effe85da2
+("MIPS: BCM47XX: Detect more then 128 MiB of RAM (HIGHMEM)")
+
+Since we want to clobber the stubs soon, get this removed now.
+
+Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
+Cc: Rafał Miłecki <zajec5@gmail.com>
+Cc: linux-mips@linux-mips.org
+Cc: linux-kernel@vger.kernel.org
+Patchwork: https://patchwork.linux-mips.org/patch/9892/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/bcm47xx/prom.c           | 2 +-
+ arch/mips/include/asm/pgtable-32.h | 2 +-
+ arch/mips/mm/tlb-r4k.c             | 2 +-
+ 3 files changed, 3 insertions(+), 3 deletions(-)
+
+diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c
+index ab698ba..135a540 100644
+--- a/arch/mips/bcm47xx/prom.c
++++ b/arch/mips/bcm47xx/prom.c
+@@ -126,7 +126,7 @@ void __init prom_free_prom_memory(void)
+ /* Stripped version of tlb_init, with the call to build_tlb_refill_handler
+  * dropped. Calling it at this stage causes a hang.
+  */
+-void __cpuinit early_tlb_init(void)
++void early_tlb_init(void)
+ {
+       write_c0_pagemask(PM_DEFAULT_MASK);
+       write_c0_wired(0);
+diff --git a/arch/mips/include/asm/pgtable-32.h b/arch/mips/include/asm/pgtable-32.h
+index 7d56686..832e216 100644
+--- a/arch/mips/include/asm/pgtable-32.h
++++ b/arch/mips/include/asm/pgtable-32.h
+@@ -18,7 +18,7 @@
+ 
+ #include <asm-generic/pgtable-nopmd.h>
+ 
+-extern int temp_tlb_entry __cpuinitdata;
++extern int temp_tlb_entry;
+ 
+ /*
+  * - add_temporary_entry() add a temporary TLB entry. We use TLB entries
+diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
+index 08318ec..5037d58 100644
+--- a/arch/mips/mm/tlb-r4k.c
++++ b/arch/mips/mm/tlb-r4k.c
+@@ -411,7 +411,7 @@ int __init has_transparent_hugepage(void)
+  * lifetime of the system
+  */
+ 
+-int temp_tlb_entry __cpuinitdata;
++int temp_tlb_entry;
+ 
+ __init int add_temporary_entry(unsigned long entrylo0, unsigned long entrylo1,
+                              unsigned long entryhi, unsigned long pagemask)
+-- 
+1.8.4.5
+