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[ar71xx] fix MISC IRQ handling on the AR7240
[openwrt.git]
/
target
/
linux
/
ar71xx
/
files
/
arch
/
mips
/
ar71xx
/
irq.c
2009-08-02
juhosg
[ar71xx] fix MISC IRQ handling on the AR7240
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commitdiff
2009-07-07
juhosg
[ar71xx] make irq_chip definitions static
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2009-07-07
juhosg
[ar71xx] AR7240 requires different IRQ unmasking code
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2009-07-05
juhosg
[ar71xx] add missing break statement
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2009-07-04
juhosg
[ar71xx] fix AR7240 PCI IRQ support
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2009-07-01
juhosg
[ar71xx] initialize IRQs for the AR7240 SoC
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2009-06-11
juhosg
[ar71xx] flush more register writings
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2009-06-07
juhosg
[ar71xx] flush AR71XX_RESET_PCI_INT_ENABLE register...
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2009-06-06
juhosg
[ar71xx] handle PCI_CORE interrupt as well
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2008-12-23
juhosg
[ar71xx] use SoC specific irq dispatch code
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2008-12-04
juhosg
[ar71xx] rename reset register definitions
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2008-07-21
juhosg
surprise :p
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