mac80211: update to wireless-testing 2010-11-16

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@24017 3c298f89-4303-0410-b956-a3cf2f4a3e73

diff --git a/package/mac80211/Makefile b/package/mac80211/Makefile
index 211a8bd..769fcec 100644 (file)
--- a/package/mac80211/Makefile
+++ b/package/mac80211/Makefile
@@ -10,12 +10,12 @@ include $(INCLUDE_DIR)/kernel.mk
 
 PKG_NAME:=mac80211
 
-PKG_VERSION:=2010-11-10
+PKG_VERSION:=2010-11-16
 PKG_RELEASE:=1
 PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
 #      http://www.orbit-lab.org/kernel/compat-wireless-2.6/2010/11 \
 #      http://wireless.kernel.org/download/compat-wireless-2.6
-PKG_MD5SUM:=b0df7d2a89818ae96aaa1b3723a51fb7
+PKG_MD5SUM:=eb996cb637326203544753d3a05a3979
 
 PKG_SOURCE:=compat-wireless-$(PKG_VERSION).tar.bz2
 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/compat-wireless-$(PKG_VERSION)

diff --git a/package/mac80211/patches/002-disable_rfkill.patch b/package/mac80211/patches/002-disable_rfkill.patch
index f1d45ad..d6b7cf2 100644 (file)
--- a/package/mac80211/patches/002-disable_rfkill.patch
+++ b/package/mac80211/patches/002-disable_rfkill.patch
@@ -9,7 +9,7 @@
  
  ifeq ($(CONFIG_MAC80211),y)
  $(error "ERROR: you have MAC80211 compiled into the kernel, CONFIG_MAC80211=y, as such you cannot replace its mac80211 driver. You need this set to CONFIG_MAC80211=m. If you are using Fedora upgrade your kernel as later version should this set as modular. For further information on Fedora see https://bugzilla.redhat.com/show_bug.cgi?id=470143. If you are using your own kernel recompile it and make mac80211 modular")
-@@ -585,8 +585,8 @@ endif #CONFIG_COMPAT_KERNEL_27
+@@ -587,8 +587,8 @@ endif #CONFIG_COMPAT_KERNEL_27
  # We need the backported rfkill module on kernel < 2.6.31.
  # In more recent kernel versions use the in kernel rfkill module.
  ifdef CONFIG_COMPAT_KERNEL_31

diff --git a/package/mac80211/patches/008-led_default.patch b/package/mac80211/patches/008-led_default.patch
index be4f8e8..cdfe19b 100644 (file)
--- a/package/mac80211/patches/008-led_default.patch
+++ b/package/mac80211/patches/008-led_default.patch
@@ -27,7 +27,7 @@
  # CONFIG_B43LEGACY_DEBUG=y
  CONFIG_B43LEGACY_DMA=y
  CONFIG_B43LEGACY_PIO=y
-@@ -542,7 +542,7 @@ endif
+@@ -544,7 +544,7 @@ endif
  
  # p54
  CONFIG_P54_COMMON=m

diff --git a/package/mac80211/patches/011-no_sdio.patch b/package/mac80211/patches/011-no_sdio.patch
index 2e906f5..ff50c97 100644 (file)
--- a/package/mac80211/patches/011-no_sdio.patch
+++ b/package/mac80211/patches/011-no_sdio.patch
@@ -8,4 +8,4 @@
 +# CONFIG_B43_SDIO=y
  
  ifdef CONFIG_CRC7
- CONFIG_WL1251_SDIO=m
+ ifdef CONFIG_WL12XX_PLATFORM_DATA

diff --git a/package/mac80211/patches/018-revert_printk_va_format.patch b/package/mac80211/patches/018-revert_printk_va_format.patch
new file mode 100644 (file)
index 0000000..d50022e
--- /dev/null
+++ b/package/mac80211/patches/018-revert_printk_va_format.patch
@@ -0,0 +1,212 @@
+--- a/drivers/net/wireless/ath/debug.c
++++ b/drivers/net/wireless/ath/debug.c
+@@ -19,19 +19,14 @@
+ 
+ void ath_print(struct ath_common *common, int dbg_mask, const char *fmt, ...)
+ {
+-      struct va_format vaf;
+       va_list args;
+ 
+       if (likely(!(common->debug_mask & dbg_mask)))
+               return;
+ 
+       va_start(args, fmt);
+-
+-      vaf.fmt = fmt;
+-      vaf.va = &args;
+-
+-      printk(KERN_DEBUG "ath: %pV", &vaf);
+-
++      printk(KERN_DEBUG "ath: ");
++      vprintk(fmt, args);
+       va_end(args);
+ }
+ EXPORT_SYMBOL(ath_print);
+--- a/drivers/net/wireless/b43/main.c
++++ b/drivers/net/wireless/b43/main.c
+@@ -322,83 +322,59 @@ static int b43_ratelimit(struct b43_wl *
+ 
+ void b43info(struct b43_wl *wl, const char *fmt, ...)
+ {
+-      struct va_format vaf;
+       va_list args;
+ 
+       if (b43_modparam_verbose < B43_VERBOSITY_INFO)
+               return;
+       if (!b43_ratelimit(wl))
+               return;
+-
+       va_start(args, fmt);
+-
+-      vaf.fmt = fmt;
+-      vaf.va = &args;
+-
+-      printk(KERN_INFO "b43-%s: %pV",
+-             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
+-
++      printk(KERN_INFO "b43-%s: ",
++             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
++      vprintk(fmt, args);
+       va_end(args);
+ }
+ 
+ void b43err(struct b43_wl *wl, const char *fmt, ...)
+ {
+-      struct va_format vaf;
+       va_list args;
+ 
+       if (b43_modparam_verbose < B43_VERBOSITY_ERROR)
+               return;
+       if (!b43_ratelimit(wl))
+               return;
+-
+       va_start(args, fmt);
+-
+-      vaf.fmt = fmt;
+-      vaf.va = &args;
+-
+-      printk(KERN_ERR "b43-%s ERROR: %pV",
+-             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
+-
++      printk(KERN_ERR "b43-%s ERROR: ",
++             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
++      vprintk(fmt, args);
+       va_end(args);
+ }
+ 
+ void b43warn(struct b43_wl *wl, const char *fmt, ...)
+ {
+-      struct va_format vaf;
+       va_list args;
+ 
+       if (b43_modparam_verbose < B43_VERBOSITY_WARN)
+               return;
+       if (!b43_ratelimit(wl))
+               return;
+-
+       va_start(args, fmt);
+-
+-      vaf.fmt = fmt;
+-      vaf.va = &args;
+-
+-      printk(KERN_WARNING "b43-%s warning: %pV",
+-             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
+-
++      printk(KERN_WARNING "b43-%s warning: ",
++             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
++      vprintk(fmt, args);
+       va_end(args);
+ }
+ 
+ void b43dbg(struct b43_wl *wl, const char *fmt, ...)
+ {
+-      struct va_format vaf;
+       va_list args;
+ 
+       if (b43_modparam_verbose < B43_VERBOSITY_DEBUG)
+               return;
+-
+       va_start(args, fmt);
+-
+-      vaf.fmt = fmt;
+-      vaf.va = &args;
+-
+-      printk(KERN_DEBUG "b43-%s debug: %pV",
+-             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
+-
++      printk(KERN_DEBUG "b43-%s debug: ",
++             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
++      vprintk(fmt, args);
+       va_end(args);
+ }
+ 
+--- a/drivers/net/wireless/b43legacy/main.c
++++ b/drivers/net/wireless/b43legacy/main.c
+@@ -181,75 +181,52 @@ static int b43legacy_ratelimit(struct b4
+ 
+ void b43legacyinfo(struct b43legacy_wl *wl, const char *fmt, ...)
+ {
+-      struct va_format vaf;
+       va_list args;
+ 
+       if (!b43legacy_ratelimit(wl))
+               return;
+-
+       va_start(args, fmt);
+-
+-      vaf.fmt = fmt;
+-      vaf.va = &args;
+-
+-      printk(KERN_INFO "b43legacy-%s: %pV",
+-             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
+-
++      printk(KERN_INFO "b43legacy-%s: ",
++             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
++      vprintk(fmt, args);
+       va_end(args);
+ }
+ 
+ void b43legacyerr(struct b43legacy_wl *wl, const char *fmt, ...)
+ {
+-      struct va_format vaf;
+       va_list args;
+ 
+       if (!b43legacy_ratelimit(wl))
+               return;
+-
+       va_start(args, fmt);
+-
+-      vaf.fmt = fmt;
+-      vaf.va = &args;
+-
+-      printk(KERN_ERR "b43legacy-%s ERROR: %pV",
+-             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
+-
++      printk(KERN_ERR "b43legacy-%s ERROR: ",
++             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
++      vprintk(fmt, args);
+       va_end(args);
+ }
+ 
+ void b43legacywarn(struct b43legacy_wl *wl, const char *fmt, ...)
+ {
+-      struct va_format vaf;
+       va_list args;
+ 
+       if (!b43legacy_ratelimit(wl))
+               return;
+-
+       va_start(args, fmt);
+-
+-      vaf.fmt = fmt;
+-      vaf.va = &args;
+-
+-      printk(KERN_WARNING "b43legacy-%s warning: %pV",
+-             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
+-
++      printk(KERN_WARNING "b43legacy-%s warning: ",
++             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
++      vprintk(fmt, args);
+       va_end(args);
+ }
+ 
+ #if B43legacy_DEBUG
+ void b43legacydbg(struct b43legacy_wl *wl, const char *fmt, ...)
+ {
+-      struct va_format vaf;
+       va_list args;
+ 
+       va_start(args, fmt);
+-
+-      vaf.fmt = fmt;
+-      vaf.va = &args;
+-
+-      printk(KERN_DEBUG "b43legacy-%s debug: %pV",
+-             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan", &vaf);
+-
++      printk(KERN_DEBUG "b43legacy-%s debug: ",
++             (wl && wl->hw) ? wiphy_name(wl->hw->wiphy) : "wlan");
++      vprintk(fmt, args);
+       va_end(args);
+ }
+ #endif /* DEBUG */

diff --git a/package/mac80211/patches/040-fix_pm_qos_compat.patch b/package/mac80211/patches/040-fix_pm_qos_compat.patch
deleted file mode 100644 (file)
index 5a34eb9..0000000
--- a/package/mac80211/patches/040-fix_pm_qos_compat.patch
+++ /dev/null
@@ -1,16 +0,0 @@
---- a/include/linux/pm_qos_params.h
-+++ b/include/linux/pm_qos_params.h
-@@ -1,5 +1,8 @@
- #include <linux/version.h>
- 
-+#ifndef __COMPAT_LINUX_PM_QOS_PARAMS_H
-+#define __COMPAT_LINUX_PM_QOS_PARAMS_H
-+
- #if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25))
- #include_next <linux/pm_qos_params.h>
- #else
-@@ -30,3 +33,4 @@ int pm_qos_add_notifier(int qos, struct 
- int pm_qos_remove_notifier(int qos, struct notifier_block *notifier);
- #endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,25)) */
- 
-+#endif

diff --git a/package/mac80211/patches/041-fix_pm_qos_update.patch b/package/mac80211/patches/041-fix_pm_qos_update.patch
deleted file mode 100644 (file)
index 985da7b..0000000
--- a/package/mac80211/patches/041-fix_pm_qos_update.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/include/linux/compat-2.6.36.h
-+++ b/include/linux/compat-2.6.36.h
-@@ -83,7 +83,7 @@ struct pm_qos_request_list {
-     } while (0)
- 
- #define pm_qos_update_request(_req, _value)                           \
--      pm_qos_update_request((_req)->request, (_value)
-+      pm_qos_update_request((_req)->request, (_value))
- 
- #define pm_qos_remove_request(_req)                                   \
-       pm_qos_remove_request((_req)->request)

diff --git a/package/mac80211/patches/300-ath9k_gpio_settings.patch b/package/mac80211/patches/300-ath9k_gpio_settings.patch
index 2bee610..a7ef6fa 100644 (file)
--- a/package/mac80211/patches/300-ath9k_gpio_settings.patch
+++ b/package/mac80211/patches/300-ath9k_gpio_settings.patch
@@ -15,7 +15,7 @@
  err:
 --- a/drivers/net/wireless/ath/ath9k/hw.h
 +++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -751,6 +751,8 @@ struct ath_hw {
+@@ -789,6 +789,8 @@ struct ath_hw {
        int initPDADC;
        int PDADCdelta;
        u8 led_pin;

diff --git a/package/mac80211/patches/310-pending_work.patch b/package/mac80211/patches/310-pending_work.patch
new file mode 100644 (file)
index 0000000..b693b0a
--- /dev/null
+++ b/package/mac80211/patches/310-pending_work.patch
@@ -0,0 +1,114 @@
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+@@ -3271,6 +3271,18 @@ static bool ar9300_check_eeprom_header(s
+       return ar9300_check_header(header);
+ }
+ 
++static int ar9300_eeprom_restore_flash(struct ath_hw *ah, u8 *mptr,
++                                     int mdata_size)
++{
++      struct ath_common *common = ath9k_hw_common(ah);
++      u16 *data = (u16 *) mptr;
++      int i;
++
++      for (i = 0; i < mdata_size / 2; i++, data++)
++              ath9k_hw_nvram_read(common, i, data);
++
++      return 0;
++}
+ /*
+  * Read the configuration data from the eeprom.
+  * The data can be put in any specified memory buffer.
+@@ -3293,6 +3305,9 @@ static int ar9300_eeprom_restore_interna
+       struct ath_common *common = ath9k_hw_common(ah);
+       eeprom_read_op read;
+ 
++      if (ath9k_hw_use_flash(ah))
++              return ar9300_eeprom_restore_flash(ah, mptr, mdata_size);
++
+       word = kzalloc(2048, GFP_KERNEL);
+       if (!word)
+               return -1;
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -419,10 +419,6 @@ static void ath9k_hw_init_defaults(struc
+       ah->hw_version.magic = AR5416_MAGIC;
+       ah->hw_version.subvendorid = 0;
+ 
+-      ah->ah_flags = 0;
+-      if (!AR_SREV_9100(ah))
+-              ah->ah_flags = AH_USE_EEPROM;
+-
+       ah->atim_window = 0;
+       ah->sta_id1_defaults =
+               AR_STA_ID1_CRPT_MIC_ENABLE |
+--- a/drivers/net/wireless/ath/ath9k/init.c
++++ b/drivers/net/wireless/ath/ath9k/init.c
+@@ -533,6 +533,9 @@ static int ath9k_init_softc(u16 devid, s
+       ah->hw_version.subsysid = subsysid;
+       sc->sc_ah = ah;
+ 
++      if (!sc->dev->platform_data)
++              ah->ah_flags |= AH_USE_EEPROM;
++
+       common = ath9k_hw_common(ah);
+       common->ops = &ath9k_common_ops;
+       common->bus_ops = bus_ops;
+--- a/drivers/net/wireless/ath/ath9k/pci.c
++++ b/drivers/net/wireless/ath/ath9k/pci.c
+@@ -16,6 +16,7 @@
+ 
+ #include <linux/nl80211.h>
+ #include <linux/pci.h>
++#include <linux/ath9k_platform.h>
+ #include "ath9k.h"
+ 
+ static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
+@@ -53,21 +54,36 @@ static void ath_pci_read_cachesize(struc
+ 
+ static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
+ {
+-      struct ath_hw *ah = (struct ath_hw *) common->ah;
++      struct ath_softc *sc = (struct ath_softc *) common->priv;
++      struct ath9k_platform_data *pdata = sc->dev->platform_data;
+ 
+-      common->ops->read(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
++      if (pdata) {
++              if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
++                      ath_print(common, ATH_DBG_FATAL,
++                                "%s: eeprom read failed, offset %08x "
++                                "is out of range\n",
++                                __func__, off);
++              }
++
++              *data = pdata->eeprom_data[off];
++      } else {
++              struct ath_hw *ah = (struct ath_hw *) common->ah;
++
++              common->ops->read(ah, AR5416_EEPROM_OFFSET +
++                                    (off << AR5416_EEPROM_S));
++
++              if (!ath9k_hw_wait(ah,
++                                 AR_EEPROM_STATUS_DATA,
++                                 AR_EEPROM_STATUS_DATA_BUSY |
++                                 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
++                                 AH_WAIT_TIMEOUT)) {
++                      return false;
++              }
+ 
+-      if (!ath9k_hw_wait(ah,
+-                         AR_EEPROM_STATUS_DATA,
+-                         AR_EEPROM_STATUS_DATA_BUSY |
+-                         AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
+-                         AH_WAIT_TIMEOUT)) {
+-              return false;
++              *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
++                         AR_EEPROM_STATUS_DATA_VAL);
+       }
+ 
+-      *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
+-                 AR_EEPROM_STATUS_DATA_VAL);
+-
+       return true;
+ }
+ 

diff --git a/package/mac80211/patches/403-ath9k-fix-invalid-mac-address-handling.patch b/package/mac80211/patches/403-ath9k-fix-invalid-mac-address-handling.patch
index 1f3712a..c9839c1 100644 (file)
--- a/package/mac80211/patches/403-ath9k-fix-invalid-mac-address-handling.patch
+++ b/package/mac80211/patches/403-ath9k-fix-invalid-mac-address-handling.patch
@@ -8,7 +8,7 @@
  #include <asm/unaligned.h>
  
  #include "hw.h"
-@@ -449,8 +450,16 @@ static int ath9k_hw_init_macaddr(struct 
+@@ -445,8 +446,16 @@ static int ath9k_hw_init_macaddr(struct 
                common->macaddr[2 * i] = eeval >> 8;
                common->macaddr[2 * i + 1] = eeval & 0xff;
        }

diff --git a/package/mac80211/patches/405-ath9k-read-eeprom-data-from-platform-data-on-pci-bus.patch b/package/mac80211/patches/405-ath9k-read-eeprom-data-from-platform-data-on-pci-bus.patch
deleted file mode 100644 (file)
index bbf46a0..0000000
--- a/package/mac80211/patches/405-ath9k-read-eeprom-data-from-platform-data-on-pci-bus.patch
+++ /dev/null
@@ -1,58 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/pci.c
-+++ b/drivers/net/wireless/ath/ath9k/pci.c
-@@ -16,6 +16,7 @@
- 
- #include <linux/nl80211.h>
- #include <linux/pci.h>
-+#include <linux/ath9k_platform.h>
- #include "ath9k.h"
- 
- static DEFINE_PCI_DEVICE_TABLE(ath_pci_id_table) = {
-@@ -53,21 +54,36 @@ static void ath_pci_read_cachesize(struc
- 
- static bool ath_pci_eeprom_read(struct ath_common *common, u32 off, u16 *data)
- {
--      struct ath_hw *ah = (struct ath_hw *) common->ah;
-+      struct ath_softc *sc = (struct ath_softc *) common->priv;
-+      struct ath9k_platform_data *pdata = sc->dev->platform_data;
- 
--      common->ops->read(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
-+      if (pdata) {
-+              if (off >= (ARRAY_SIZE(pdata->eeprom_data))) {
-+                      ath_print(common, ATH_DBG_FATAL,
-+                                "%s: eeprom read failed, offset %08x "
-+                                "is out of range\n",
-+                                __func__, off);
-+              }
-+
-+              *data = pdata->eeprom_data[off];
-+      } else {
-+              struct ath_hw *ah = (struct ath_hw *) common->ah;
-+
-+              common->ops->read(ah, AR5416_EEPROM_OFFSET +
-+                                    (off << AR5416_EEPROM_S));
-+
-+              if (!ath9k_hw_wait(ah,
-+                                 AR_EEPROM_STATUS_DATA,
-+                                 AR_EEPROM_STATUS_DATA_BUSY |
-+                                 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
-+                                 AH_WAIT_TIMEOUT)) {
-+                      return false;
-+              }
- 
--      if (!ath9k_hw_wait(ah,
--                         AR_EEPROM_STATUS_DATA,
--                         AR_EEPROM_STATUS_DATA_BUSY |
--                         AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
--                         AH_WAIT_TIMEOUT)) {
--              return false;
-+              *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
-+                         AR_EEPROM_STATUS_DATA_VAL);
-       }
- 
--      *data = MS(common->ops->read(ah, AR_EEPROM_STATUS_DATA),
--                 AR_EEPROM_STATUS_DATA_VAL);
--
-       return true;
- }
- 

diff --git a/package/mac80211/patches/406-ath9k-set-AH_USE_EEPROM-only-if-no-platform-data-present.patch b/package/mac80211/patches/406-ath9k-set-AH_USE_EEPROM-only-if-no-platform-data-present.patch
deleted file mode 100644 (file)
index 87ea00a..0000000
--- a/package/mac80211/patches/406-ath9k-set-AH_USE_EEPROM-only-if-no-platform-data-present.patch
+++ /dev/null
@@ -1,44 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -16,6 +16,7 @@
- 
- #include <linux/nl80211.h>
- #include <linux/pm_qos_params.h>
-+#include <linux/ath9k_platform.h>
- #include "ath9k.h"
- #include "btcoex.h"
- 
---- a/drivers/net/wireless/ath/ath9k/init.c
-+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -522,6 +522,7 @@ static int ath9k_init_softc(u16 devid, s
- {
-       struct ath_hw *ah = NULL;
-       struct ath_common *common;
-+      struct ath9k_platform_data *pdata;
-       int ret = 0, i;
-       int csz = 0;
- 
-@@ -533,6 +534,10 @@ static int ath9k_init_softc(u16 devid, s
-       ah->hw_version.subsysid = subsysid;
-       sc->sc_ah = ah;
- 
-+      pdata = (struct ath9k_platform_data *) sc->dev->platform_data;
-+      if (!pdata)
-+              ah->ah_flags |= AH_USE_EEPROM;
-+
-       common = ath9k_hw_common(ah);
-       common->ops = &ath9k_common_ops;
-       common->bus_ops = bus_ops;
---- a/drivers/net/wireless/ath/ath9k/hw.c
-+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -420,10 +420,6 @@ static void ath9k_hw_init_defaults(struc
-       ah->hw_version.magic = AR5416_MAGIC;
-       ah->hw_version.subvendorid = 0;
- 
--      ah->ah_flags = 0;
--      if (!AR_SREV_9100(ah))
--              ah->ah_flags = AH_USE_EEPROM;
--
-       ah->atim_window = 0;
-       ah->sta_id1_defaults =
-               AR_STA_ID1_CRPT_MIC_ENABLE |

diff --git a/package/mac80211/patches/408-ath9k_tweak_rx_intr_mitigation.patch b/package/mac80211/patches/408-ath9k_tweak_rx_intr_mitigation.patch
deleted file mode 100644 (file)
index 0b0197a..0000000
--- a/package/mac80211/patches/408-ath9k_tweak_rx_intr_mitigation.patch
+++ /dev/null
@@ -1,11 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/hw.c
-+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -1438,7 +1438,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st
- 
-       if (ah->config.rx_intr_mitigation) {
-               REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500);
--              REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 2000);
-+              REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, 500);
-       }
- 
-       if (ah->config.tx_intr_mitigation) {

diff --git a/package/mac80211/patches/409-ath9k_platform_settings.patch b/package/mac80211/patches/409-ath9k_platform_settings.patch
index ef3035c..8c2a5e6 100644 (file)
--- a/package/mac80211/patches/409-ath9k_platform_settings.patch
+++ b/package/mac80211/patches/409-ath9k_platform_settings.patch
@@ -8,15 +8,24 @@
  #include "ath9k.h"
  
  static char *dev_info = "ath9k";
-@@ -535,8 +536,14 @@ static int ath9k_init_softc(u16 devid, s
+@@ -522,6 +523,7 @@ static int ath9k_init_softc(u16 devid, s
+ {
+       struct ath_hw *ah = NULL;
+       struct ath_common *common;
++      struct ath9k_platform_data *pdata;
+       int ret = 0, i;
+       int csz = 0;
+ 
+@@ -533,8 +535,15 @@ static int ath9k_init_softc(u16 devid, s
+       ah->hw_version.subsysid = subsysid;
        sc->sc_ah = ah;
  
-       pdata = (struct ath9k_platform_data *) sc->dev->platform_data;
--      if (!pdata)
-+      if (!pdata) {
+-      if (!sc->dev->platform_data)
++      if (!sc->dev->platform_data) {
                ah->ah_flags |= AH_USE_EEPROM;
 +              sc->sc_ah->led_pin = -1;
 +      } else {
++              pdata = (struct ath9k_platform_data *) sc->dev->platform_data;
 +              sc->sc_ah->gpio_mask = pdata->gpio_mask;
 +              sc->sc_ah->gpio_val = pdata->gpio_val;
 +              sc->sc_ah->led_pin = pdata->led_pin;
@@ -26,7 +35,7 @@
        common->ops = &ath9k_common_ops;
 --- a/drivers/net/wireless/ath/ath9k/hw.h
 +++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -750,7 +750,7 @@ struct ath_hw {
+@@ -788,7 +788,7 @@ struct ath_hw {
        u32 originalGain[22];
        int initPDADC;
        int PDADCdelta;

diff --git a/package/mac80211/patches/510-pending_work.patch b/package/mac80211/patches/510-pending_work.patch
deleted file mode 100644 (file)
index c4c589c..0000000
--- a/package/mac80211/patches/510-pending_work.patch
+++ /dev/null
@@ -1,3644 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-@@ -1579,6 +1579,37 @@ static void ar5008_hw_set_nf_limits(stru
-       ah->nf_5g.nominal = AR_PHY_CCA_NOM_VAL_5416_5GHZ;
- }
- 
-+static void ar5008_hw_set_radar_params(struct ath_hw *ah,
-+                                     struct ath_hw_radar_conf *conf)
-+{
-+      u32 radar_0 = 0, radar_1 = 0;
-+
-+      if (!conf) {
-+              REG_CLR_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_ENA);
-+              return;
-+      }
-+
-+      radar_0 |= AR_PHY_RADAR_0_ENA | AR_PHY_RADAR_0_FFT_ENA;
-+      radar_0 |= SM(conf->fir_power, AR_PHY_RADAR_0_FIRPWR);
-+      radar_0 |= SM(conf->radar_rssi, AR_PHY_RADAR_0_RRSSI);
-+      radar_0 |= SM(conf->pulse_height, AR_PHY_RADAR_0_HEIGHT);
-+      radar_0 |= SM(conf->pulse_rssi, AR_PHY_RADAR_0_PRSSI);
-+      radar_0 |= SM(conf->pulse_inband, AR_PHY_RADAR_0_INBAND);
-+
-+      radar_1 |= AR_PHY_RADAR_1_MAX_RRSSI;
-+      radar_1 |= AR_PHY_RADAR_1_BLOCK_CHECK;
-+      radar_1 |= SM(conf->pulse_maxlen, AR_PHY_RADAR_1_MAXLEN);
-+      radar_1 |= SM(conf->pulse_inband_step, AR_PHY_RADAR_1_RELSTEP_THRESH);
-+      radar_1 |= SM(conf->radar_inband, AR_PHY_RADAR_1_RELPWR_THRESH);
-+
-+      REG_WRITE(ah, AR_PHY_RADAR_0, radar_0);
-+      REG_WRITE(ah, AR_PHY_RADAR_1, radar_1);
-+      if (conf->ext_channel)
-+              REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
-+      else
-+              REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
-+}
-+
- void ar5008_hw_attach_phy_ops(struct ath_hw *ah)
- {
-       struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
-@@ -1609,6 +1640,7 @@ void ar5008_hw_attach_phy_ops(struct ath
-       priv_ops->restore_chainmask = ar5008_restore_chainmask;
-       priv_ops->set_diversity = ar5008_set_diversity;
-       priv_ops->do_getnf = ar5008_hw_do_getnf;
-+      priv_ops->set_radar_params = ar5008_hw_set_radar_params;
- 
-       if (modparam_force_new_ani) {
-               priv_ops->ani_control = ar5008_hw_ani_control_new;
---- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
-@@ -718,12 +718,19 @@ static bool ar9003_hw_init_cal(struct at
-                              struct ath9k_channel *chan)
- {
-       struct ath_common *common = ath9k_hw_common(ah);
-+      int val;
- 
--      /*
--       * 0x7 = 0b111 , AR9003 needs to be configured for 3-chain mode before
--       * running AGC/TxIQ cals
--       */
--      ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
-+      val = REG_READ(ah, AR_ENT_OTP);
-+      ath_print(common, ATH_DBG_CALIBRATE, "ath9k: AR_ENT_OTP 0x%x\n", val);
-+
-+      if (val & AR_ENT_OTP_CHAIN2_DISABLE)
-+              ar9003_hw_set_chain_masks(ah, 0x3, 0x3);
-+      else
-+              /*
-+               * 0x7 = 0b111 , AR9003 needs to be configured for 3-chain
-+               * mode before running AGC/TxIQ cals
-+               */
-+              ar9003_hw_set_chain_masks(ah, 0x7, 0x7);
- 
-       /* Do Tx IQ Calibration */
-       ar9003_hw_tx_iq_cal(ah);
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -22,12 +22,14 @@
- #define COMP_CKSUM_LEN 2
- 
- #define AR_CH0_TOP (0x00016288)
--#define AR_CH0_TOP_XPABIASLVL (0x3)
-+#define AR_CH0_TOP_XPABIASLVL (0x300)
- #define AR_CH0_TOP_XPABIASLVL_S (8)
- 
- #define AR_CH0_THERM (0x00016290)
--#define AR_CH0_THERM_SPARE (0x3f)
--#define AR_CH0_THERM_SPARE_S (0)
-+#define AR_CH0_THERM_XPABIASLVL_MSB 0x3
-+#define AR_CH0_THERM_XPABIASLVL_MSB_S 0
-+#define AR_CH0_THERM_XPASHORT2GND 0x4
-+#define AR_CH0_THERM_XPASHORT2GND_S 2
- 
- #define AR_SWITCH_TABLE_COM_ALL (0xffff)
- #define AR_SWITCH_TABLE_COM_ALL_S (0)
-@@ -55,15 +57,2327 @@
- #define SUB_NUM_CTL_MODES_AT_5G_40 2    /* excluding HT40, EXT-OFDM */
- #define SUB_NUM_CTL_MODES_AT_2G_40 3    /* excluding HT40, EXT-OFDM, EXT-CCK */
- 
-+static int ar9003_hw_power_interpolate(int32_t x,
-+                                     int32_t *px, int32_t *py, u_int16_t np);
- static const struct ar9300_eeprom ar9300_default = {
-       .eepromVersion = 2,
--      .templateVersion = 2,
--      .macAddr = {1, 2, 3, 4, 5, 6},
--      .custData = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
--                   0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
-+      .templateVersion = 2,
-+      .macAddr = {1, 2, 3, 4, 5, 6},
-+      .custData = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+                   0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
-+      .baseEepHeader = {
-+              .regDmn = { LE16(0), LE16(0x1f) },
-+              .txrxMask =  0x77, /* 4 bits tx and 4 bits rx */
-+              .opCapFlags = {
-+                      .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
-+                      .eepMisc = 0,
-+              },
-+              .rfSilent = 0,
-+              .blueToothOptions = 0,
-+              .deviceCap = 0,
-+              .deviceType = 5, /* takes lower byte in eeprom location */
-+              .pwrTableOffset = AR9300_PWR_TABLE_OFFSET,
-+              .params_for_tuning_caps = {0, 0},
-+              .featureEnable = 0x0c,
-+               /*
-+                * bit0 - enable tx temp comp - disabled
-+                * bit1 - enable tx volt comp - disabled
-+                * bit2 - enable fastClock - enabled
-+                * bit3 - enable doubling - enabled
-+                * bit4 - enable internal regulator - disabled
-+                * bit5 - enable pa predistortion - disabled
-+                */
-+              .miscConfiguration = 0, /* bit0 - turn down drivestrength */
-+              .eepromWriteEnableGpio = 3,
-+              .wlanDisableGpio = 0,
-+              .wlanLedGpio = 8,
-+              .rxBandSelectGpio = 0xff,
-+              .txrxgain = 0,
-+              .swreg = 0,
-+       },
-+      .modalHeader2G = {
-+      /* ar9300_modal_eep_header  2g */
-+              /* 4 idle,t1,t2,b(4 bits per setting) */
-+              .antCtrlCommon = LE32(0x110),
-+              /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
-+              .antCtrlCommon2 = LE32(0x22222),
-+
-+              /*
-+               * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r,
-+               * rx1, rx12, b (2 bits each)
-+               */
-+              .antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) },
-+
-+              /*
-+               * xatten1DB[AR9300_MAX_CHAINS];  3 xatten1_db
-+               * for ar9280 (0xa20c/b20c 5:0)
-+               */
-+              .xatten1DB = {0, 0, 0},
-+
-+              /*
-+               * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
-+               * for ar9280 (0xa20c/b20c 16:12
-+               */
-+              .xatten1Margin = {0, 0, 0},
-+              .tempSlope = 36,
-+              .voltSlope = 0,
-+
-+              /*
-+               * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur
-+               * channels in usual fbin coding format
-+               */
-+              .spurChans = {0, 0, 0, 0, 0},
-+
-+              /*
-+               * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check
-+               * if the register is per chain
-+               */
-+              .noiseFloorThreshCh = {-1, 0, 0},
-+              .ob = {1, 1, 1},/* 3 chain */
-+              .db_stage2 = {1, 1, 1}, /* 3 chain  */
-+              .db_stage3 = {0, 0, 0},
-+              .db_stage4 = {0, 0, 0},
-+              .xpaBiasLvl = 0,
-+              .txFrameToDataStart = 0x0e,
-+              .txFrameToPaOn = 0x0e,
-+              .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
-+              .antennaGain = 0,
-+              .switchSettling = 0x2c,
-+              .adcDesiredSize = -30,
-+              .txEndToXpaOff = 0,
-+              .txEndToRxOn = 0x2,
-+              .txFrameToXpaOn = 0xe,
-+              .thresh62 = 28,
-+              .papdRateMaskHt20 = LE32(0x0cf0e0e0),
-+              .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-+              .futureModal = {
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+              },
-+       },
-+      .base_ext1 = {
-+              .ant_div_control = 0,
-+              .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
-+      },
-+      .calFreqPier2G = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1),
-+       },
-+      /* ar9300_cal_data_per_freq_op_loop 2g */
-+      .calPierData2G = {
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+       },
-+      .calTarget_freqbin_Cck = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2484, 1),
-+       },
-+      .calTarget_freqbin_2G = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+       },
-+      .calTarget_freqbin_2GHT20 = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+       },
-+      .calTarget_freqbin_2GHT40 = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+       },
-+      .calTargetPowerCck = {
-+               /* 1L-5L,5S,11L,11S */
-+               { {36, 36, 36, 36} },
-+               { {36, 36, 36, 36} },
-+      },
-+      .calTargetPower2G = {
-+               /* 6-24,36,48,54 */
-+               { {32, 32, 28, 24} },
-+               { {32, 32, 28, 24} },
-+               { {32, 32, 28, 24} },
-+      },
-+      .calTargetPower2GHT20 = {
-+              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
-+              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
-+              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
-+      },
-+      .calTargetPower2GHT40 = {
-+              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
-+              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
-+              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
-+      },
-+      .ctlIndex_2G =  {
-+              0x11, 0x12, 0x15, 0x17, 0x41, 0x42,
-+              0x45, 0x47, 0x31, 0x32, 0x35, 0x37,
-+      },
-+      .ctl_freqbin_2G = {
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2457, 1),
-+                      FREQ2FBIN(2462, 1)
-+              },
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2462, 1),
-+                      0xFF,
-+              },
-+
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2462, 1),
-+                      0xFF,
-+              },
-+              {
-+                      FREQ2FBIN(2422, 1),
-+                      FREQ2FBIN(2427, 1),
-+                      FREQ2FBIN(2447, 1),
-+                      FREQ2FBIN(2452, 1)
-+              },
-+
-+              {
-+                      /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(2484, 1),
-+              },
-+
-+              {
-+                      /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      0,
-+              },
-+
-+              {
-+                      /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2472, 1),
-+                      0,
-+              },
-+
-+              {
-+                      /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
-+                      /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
-+                      /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
-+                      /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
-+              },
-+
-+              {
-+                      /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+              },
-+
-+              {
-+                      /* Data[9].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[9].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[9].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      0
-+              },
-+
-+              {
-+                      /* Data[10].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[10].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[10].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      0
-+              },
-+
-+              {
-+                      /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
-+                      /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
-+                      /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
-+                      /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
-+              }
-+       },
-+      .ctlPowerData_2G = {
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
-+
-+               { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+
-+               { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-+               { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-+       },
-+      .modalHeader5G = {
-+              /* 4 idle,t1,t2,b (4 bits per setting) */
-+              .antCtrlCommon = LE32(0x110),
-+              /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
-+              .antCtrlCommon2 = LE32(0x22222),
-+               /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
-+              .antCtrlChain = {
-+                      LE16(0x000), LE16(0x000), LE16(0x000),
-+              },
-+               /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
-+              .xatten1DB = {0, 0, 0},
-+
-+              /*
-+               * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
-+               * for merlin (0xa20c/b20c 16:12
-+               */
-+              .xatten1Margin = {0, 0, 0},
-+              .tempSlope = 68,
-+              .voltSlope = 0,
-+              /* spurChans spur channels in usual fbin coding format */
-+              .spurChans = {0, 0, 0, 0, 0},
-+              /* noiseFloorThreshCh Check if the register is per chain */
-+              .noiseFloorThreshCh = {-1, 0, 0},
-+              .ob = {3, 3, 3}, /* 3 chain */
-+              .db_stage2 = {3, 3, 3}, /* 3 chain */
-+              .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */
-+              .db_stage4 = {3, 3, 3},  /* don't exist for 2G */
-+              .xpaBiasLvl = 0,
-+              .txFrameToDataStart = 0x0e,
-+              .txFrameToPaOn = 0x0e,
-+              .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
-+              .antennaGain = 0,
-+              .switchSettling = 0x2d,
-+              .adcDesiredSize = -30,
-+              .txEndToXpaOff = 0,
-+              .txEndToRxOn = 0x2,
-+              .txFrameToXpaOn = 0xe,
-+              .thresh62 = 28,
-+              .papdRateMaskHt20 = LE32(0x0c80c080),
-+              .papdRateMaskHt40 = LE32(0x0080c080),
-+              .futureModal = {
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+              },
-+       },
-+      .base_ext2 = {
-+              .tempSlopeLow = 0,
-+              .tempSlopeHigh = 0,
-+              .xatten1DBLow = {0, 0, 0},
-+              .xatten1MarginLow = {0, 0, 0},
-+              .xatten1DBHigh = {0, 0, 0},
-+              .xatten1MarginHigh = {0, 0, 0}
-+      },
-+      .calFreqPier5G = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5220, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5725, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calPierData5G = {
-+                      {
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                      },
-+                      {
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                      },
-+                      {
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                      },
-+
-+      },
-+      .calTarget_freqbin_5G = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5220, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5725, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calTarget_freqbin_5GHT20 = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5240, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5700, 0),
-+              FREQ2FBIN(5745, 0),
-+              FREQ2FBIN(5725, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calTarget_freqbin_5GHT40 = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5240, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5700, 0),
-+              FREQ2FBIN(5745, 0),
-+              FREQ2FBIN(5725, 0),
-+              FREQ2FBIN(5825, 0)
-+       },
-+      .calTargetPower5G = {
-+              /* 6-24,36,48,54 */
-+              { {20, 20, 20, 10} },
-+              { {20, 20, 20, 10} },
-+              { {20, 20, 20, 10} },
-+              { {20, 20, 20, 10} },
-+              { {20, 20, 20, 10} },
-+              { {20, 20, 20, 10} },
-+              { {20, 20, 20, 10} },
-+              { {20, 20, 20, 10} },
-+       },
-+      .calTargetPower5GHT20 = {
-+              /*
-+               * 0_8_16,1-3_9-11_17-19,
-+               * 4,5,6,7,12,13,14,15,20,21,22,23
-+               */
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+       },
-+      .calTargetPower5GHT40 =  {
-+              /*
-+               * 0_8_16,1-3_9-11_17-19,
-+               * 4,5,6,7,12,13,14,15,20,21,22,23
-+               */
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+       },
-+      .ctlIndex_5G =  {
-+              0x10, 0x16, 0x18, 0x40, 0x46,
-+              0x48, 0x30, 0x36, 0x38
-+      },
-+      .ctl_freqbin_5G =  {
-+              {
-+                      /* Data[0].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[0].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[0].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
-+                      /* Data[0].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[0].ctlEdges[4].bChannel */ FREQ2FBIN(5600, 0),
-+                      /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[0].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[0].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
-+              },
-+              {
-+                      /* Data[1].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[1].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[1].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
-+                      /* Data[1].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[1].ctlEdges[4].bChannel */ FREQ2FBIN(5520, 0),
-+                      /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[1].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[1].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
-+              },
-+
-+              {
-+                      /* Data[2].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[2].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
-+                      /* Data[2].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[2].ctlEdges[3].bChannel */ FREQ2FBIN(5310, 0),
-+                      /* Data[2].ctlEdges[4].bChannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
-+                      /* Data[2].ctlEdges[6].bChannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[2].ctlEdges[7].bChannel */ FREQ2FBIN(5755, 0)
-+              },
-+
-+              {
-+                      /* Data[3].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[3].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
-+                      /* Data[3].ctlEdges[2].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[3].ctlEdges[3].bChannel */ FREQ2FBIN(5320, 0),
-+                      /* Data[3].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[3].ctlEdges[6].bChannel */ 0xFF,
-+                      /* Data[3].ctlEdges[7].bChannel */ 0xFF,
-+              },
-+
-+              {
-+                      /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[4].ctlEdges[4].bChannel */ 0xFF,
-+                      /* Data[4].ctlEdges[5].bChannel */ 0xFF,
-+                      /* Data[4].ctlEdges[6].bChannel */ 0xFF,
-+                      /* Data[4].ctlEdges[7].bChannel */ 0xFF,
-+              },
-+
-+              {
-+                      /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
-+                      /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
-+                      /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[5].ctlEdges[6].bChannel */ 0xFF,
-+                      /* Data[5].ctlEdges[7].bChannel */ 0xFF
-+              },
-+
-+              {
-+                      /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
-+                      /* Data[6].ctlEdges[2].bChannel */ FREQ2FBIN(5220, 0),
-+                      /* Data[6].ctlEdges[3].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[6].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
-+                      /* Data[6].ctlEdges[6].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[6].ctlEdges[7].bChannel */ FREQ2FBIN(5745, 0)
-+              },
-+
-+              {
-+                      /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(5320, 0),
-+                      /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[7].ctlEdges[4].bChannel */ FREQ2FBIN(5560, 0),
-+                      /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[7].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[7].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
-+              },
-+
-+              {
-+                      /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
-+                      /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[8].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[8].ctlEdges[4].bChannel */ FREQ2FBIN(5550, 0),
-+                      /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[8].ctlEdges[6].bChannel */ FREQ2FBIN(5755, 0),
-+                      /* Data[8].ctlEdges[7].bChannel */ FREQ2FBIN(5795, 0)
-+              }
-+       },
-+      .ctlPowerData_5G = {
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 0}, {60, 1}, {60, 0}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 0}, {60, 1}, {60, 1}, {60, 0},
-+                              {60, 1}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                              {60, 0}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 0}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 0}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 0}, {60, 1},
-+                      }
-+              },
-+       }
-+};
-+
-+static const struct ar9300_eeprom ar9300_x113 = {
-+      .eepromVersion = 2,
-+      .templateVersion = 6,
-+      .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0},
-+      .custData = {"x113-023-f0000"},
-+      .baseEepHeader = {
-+              .regDmn = { LE16(0), LE16(0x1f) },
-+              .txrxMask =  0x77, /* 4 bits tx and 4 bits rx */
-+              .opCapFlags = {
-+                      .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
-+                      .eepMisc = 0,
-+              },
-+              .rfSilent = 0,
-+              .blueToothOptions = 0,
-+              .deviceCap = 0,
-+              .deviceType = 5, /* takes lower byte in eeprom location */
-+              .pwrTableOffset = AR9300_PWR_TABLE_OFFSET,
-+              .params_for_tuning_caps = {0, 0},
-+              .featureEnable = 0x0d,
-+               /*
-+                * bit0 - enable tx temp comp - disabled
-+                * bit1 - enable tx volt comp - disabled
-+                * bit2 - enable fastClock - enabled
-+                * bit3 - enable doubling - enabled
-+                * bit4 - enable internal regulator - disabled
-+                * bit5 - enable pa predistortion - disabled
-+                */
-+              .miscConfiguration = 0, /* bit0 - turn down drivestrength */
-+              .eepromWriteEnableGpio = 6,
-+              .wlanDisableGpio = 0,
-+              .wlanLedGpio = 8,
-+              .rxBandSelectGpio = 0xff,
-+              .txrxgain = 0x21,
-+              .swreg = 0,
-+       },
-+      .modalHeader2G = {
-+      /* ar9300_modal_eep_header  2g */
-+              /* 4 idle,t1,t2,b(4 bits per setting) */
-+              .antCtrlCommon = LE32(0x110),
-+              /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
-+              .antCtrlCommon2 = LE32(0x44444),
-+
-+              /*
-+               * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r,
-+               * rx1, rx12, b (2 bits each)
-+               */
-+              .antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) },
-+
-+              /*
-+               * xatten1DB[AR9300_MAX_CHAINS];  3 xatten1_db
-+               * for ar9280 (0xa20c/b20c 5:0)
-+               */
-+              .xatten1DB = {0, 0, 0},
-+
-+              /*
-+               * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
-+               * for ar9280 (0xa20c/b20c 16:12
-+               */
-+              .xatten1Margin = {0, 0, 0},
-+              .tempSlope = 25,
-+              .voltSlope = 0,
-+
-+              /*
-+               * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur
-+               * channels in usual fbin coding format
-+               */
-+              .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0},
-+
-+              /*
-+               * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check
-+               * if the register is per chain
-+               */
-+              .noiseFloorThreshCh = {-1, 0, 0},
-+              .ob = {1, 1, 1},/* 3 chain */
-+              .db_stage2 = {1, 1, 1}, /* 3 chain  */
-+              .db_stage3 = {0, 0, 0},
-+              .db_stage4 = {0, 0, 0},
-+              .xpaBiasLvl = 0,
-+              .txFrameToDataStart = 0x0e,
-+              .txFrameToPaOn = 0x0e,
-+              .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
-+              .antennaGain = 0,
-+              .switchSettling = 0x2c,
-+              .adcDesiredSize = -30,
-+              .txEndToXpaOff = 0,
-+              .txEndToRxOn = 0x2,
-+              .txFrameToXpaOn = 0xe,
-+              .thresh62 = 28,
-+              .papdRateMaskHt20 = LE32(0x0c80c080),
-+              .papdRateMaskHt40 = LE32(0x0080c080),
-+              .futureModal = {
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+              },
-+       },
-+       .base_ext1 = {
-+              .ant_div_control = 0,
-+              .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
-+       },
-+      .calFreqPier2G = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1),
-+       },
-+      /* ar9300_cal_data_per_freq_op_loop 2g */
-+      .calPierData2G = {
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+       },
-+      .calTarget_freqbin_Cck = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2472, 1),
-+       },
-+      .calTarget_freqbin_2G = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+       },
-+      .calTarget_freqbin_2GHT20 = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+       },
-+      .calTarget_freqbin_2GHT40 = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+       },
-+      .calTargetPowerCck = {
-+               /* 1L-5L,5S,11L,11S */
-+               { {34, 34, 34, 34} },
-+               { {34, 34, 34, 34} },
-+      },
-+      .calTargetPower2G = {
-+               /* 6-24,36,48,54 */
-+               { {34, 34, 32, 32} },
-+               { {34, 34, 32, 32} },
-+               { {34, 34, 32, 32} },
-+      },
-+      .calTargetPower2GHT20 = {
-+              { {32, 32, 32, 32, 32, 28, 32, 32, 30, 28, 0, 0, 0, 0} },
-+              { {32, 32, 32, 32, 32, 28, 32, 32, 30, 28, 0, 0, 0, 0} },
-+              { {32, 32, 32, 32, 32, 28, 32, 32, 30, 28, 0, 0, 0, 0} },
-+      },
-+      .calTargetPower2GHT40 = {
-+              { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
-+              { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
-+              { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
-+      },
-+      .ctlIndex_2G =  {
-+              0x11, 0x12, 0x15, 0x17, 0x41, 0x42,
-+              0x45, 0x47, 0x31, 0x32, 0x35, 0x37,
-+      },
-+      .ctl_freqbin_2G = {
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2457, 1),
-+                      FREQ2FBIN(2462, 1)
-+              },
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2462, 1),
-+                      0xFF,
-+              },
-+
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2462, 1),
-+                      0xFF,
-+              },
-+              {
-+                      FREQ2FBIN(2422, 1),
-+                      FREQ2FBIN(2427, 1),
-+                      FREQ2FBIN(2447, 1),
-+                      FREQ2FBIN(2452, 1)
-+              },
-+
-+              {
-+                      /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(2484, 1),
-+              },
-+
-+              {
-+                      /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      0,
-+              },
-+
-+              {
-+                      /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2472, 1),
-+                      0,
-+              },
-+
-+              {
-+                      /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
-+                      /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
-+                      /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
-+                      /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
-+              },
-+
-+              {
-+                      /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+              },
-+
-+              {
-+                      /* Data[9].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[9].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[9].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      0
-+              },
-+
-+              {
-+                      /* Data[10].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[10].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[10].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      0
-+              },
-+
-+              {
-+                      /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
-+                      /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
-+                      /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
-+                      /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
-+              }
-+       },
-+      .ctlPowerData_2G = {
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
-+
-+               { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+
-+               { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+
-+               { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+               { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-+               { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-+       },
-+      .modalHeader5G = {
-+              /* 4 idle,t1,t2,b (4 bits per setting) */
-+              .antCtrlCommon = LE32(0x220),
-+              /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
-+              .antCtrlCommon2 = LE32(0x11111),
-+               /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
-+              .antCtrlChain = {
-+                      LE16(0x150), LE16(0x150), LE16(0x150),
-+              },
-+               /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
-+              .xatten1DB = {0, 0, 0},
-+
-+              /*
-+               * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
-+               * for merlin (0xa20c/b20c 16:12
-+               */
-+              .xatten1Margin = {0, 0, 0},
-+              .tempSlope = 68,
-+              .voltSlope = 0,
-+              /* spurChans spur channels in usual fbin coding format */
-+              .spurChans = {FREQ2FBIN(5500, 0), 0, 0, 0, 0},
-+              /* noiseFloorThreshCh Check if the register is per chain */
-+              .noiseFloorThreshCh = {-1, 0, 0},
-+              .ob = {3, 3, 3}, /* 3 chain */
-+              .db_stage2 = {3, 3, 3}, /* 3 chain */
-+              .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */
-+              .db_stage4 = {3, 3, 3},  /* don't exist for 2G */
-+              .xpaBiasLvl = 0,
-+              .txFrameToDataStart = 0x0e,
-+              .txFrameToPaOn = 0x0e,
-+              .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
-+              .antennaGain = 0,
-+              .switchSettling = 0x2d,
-+              .adcDesiredSize = -30,
-+              .txEndToXpaOff = 0,
-+              .txEndToRxOn = 0x2,
-+              .txFrameToXpaOn = 0xe,
-+              .thresh62 = 28,
-+              .papdRateMaskHt20 = LE32(0x0cf0e0e0),
-+              .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-+              .futureModal = {
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+              },
-+       },
-+      .base_ext2 = {
-+              .tempSlopeLow = 72,
-+              .tempSlopeHigh = 105,
-+              .xatten1DBLow = {0, 0, 0},
-+              .xatten1MarginLow = {0, 0, 0},
-+              .xatten1DBHigh = {0, 0, 0},
-+              .xatten1MarginHigh = {0, 0, 0}
-+       },
-+      .calFreqPier5G = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5240, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5745, 0),
-+              FREQ2FBIN(5785, 0)
-+      },
-+      .calPierData5G = {
-+                      {
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                      },
-+                      {
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                      },
-+                      {
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                              {0, 0, 0, 0, 0},
-+                      },
-+
-+      },
-+      .calTarget_freqbin_5G = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5220, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5745, 0),
-+              FREQ2FBIN(5785, 0)
-+      },
-+      .calTarget_freqbin_5GHT20 = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5240, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5700, 0),
-+              FREQ2FBIN(5745, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calTarget_freqbin_5GHT40 = {
-+              FREQ2FBIN(5190, 0),
-+              FREQ2FBIN(5230, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5410, 0),
-+              FREQ2FBIN(5510, 0),
-+              FREQ2FBIN(5670, 0),
-+              FREQ2FBIN(5755, 0),
-+              FREQ2FBIN(5825, 0)
-+       },
-+      .calTargetPower5G = {
-+              /* 6-24,36,48,54 */
-+              { {42, 40, 40, 34} },
-+              { {42, 40, 40, 34} },
-+              { {42, 40, 40, 34} },
-+              { {42, 40, 40, 34} },
-+              { {42, 40, 40, 34} },
-+              { {42, 40, 40, 34} },
-+              { {42, 40, 40, 34} },
-+              { {42, 40, 40, 34} },
-+       },
-+      .calTargetPower5GHT20 = {
-+              /*
-+               * 0_8_16,1-3_9-11_17-19,
-+               * 4,5,6,7,12,13,14,15,20,21,22,23
-+               */
-+              { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
-+              { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
-+              { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
-+              { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
-+              { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
-+              { {40, 40, 40, 40, 32, 28, 40, 40, 32, 28, 40, 40, 32, 20} },
-+              { {38, 38, 38, 38, 32, 28, 38, 38, 32, 28, 38, 38, 32, 26} },
-+              { {36, 36, 36, 36, 32, 28, 36, 36, 32, 28, 36, 36, 32, 26} },
-+       },
-+      .calTargetPower5GHT40 =  {
-+              /*
-+               * 0_8_16,1-3_9-11_17-19,
-+               * 4,5,6,7,12,13,14,15,20,21,22,23
-+               */
-+              { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
-+              { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
-+              { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
-+              { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
-+              { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
-+              { {40, 40, 40, 38, 30, 26, 40, 40, 30, 26, 40, 40, 30, 24} },
-+              { {36, 36, 36, 36, 30, 26, 36, 36, 30, 26, 36, 36, 30, 24} },
-+              { {34, 34, 34, 34, 30, 26, 34, 34, 30, 26, 34, 34, 30, 24} },
-+       },
-+      .ctlIndex_5G =  {
-+              0x10, 0x16, 0x18, 0x40, 0x46,
-+              0x48, 0x30, 0x36, 0x38
-+      },
-+      .ctl_freqbin_5G =  {
-+              {
-+                      /* Data[0].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[0].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[0].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
-+                      /* Data[0].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[0].ctlEdges[4].bChannel */ FREQ2FBIN(5600, 0),
-+                      /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[0].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[0].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
-+              },
-+              {
-+                      /* Data[1].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[1].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[1].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
-+                      /* Data[1].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[1].ctlEdges[4].bChannel */ FREQ2FBIN(5520, 0),
-+                      /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[1].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[1].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
-+              },
-+
-+              {
-+                      /* Data[2].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[2].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
-+                      /* Data[2].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[2].ctlEdges[3].bChannel */ FREQ2FBIN(5310, 0),
-+                      /* Data[2].ctlEdges[4].bChannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
-+                      /* Data[2].ctlEdges[6].bChannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[2].ctlEdges[7].bChannel */ FREQ2FBIN(5755, 0)
-+              },
-+
-+              {
-+                      /* Data[3].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[3].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
-+                      /* Data[3].ctlEdges[2].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[3].ctlEdges[3].bChannel */ FREQ2FBIN(5320, 0),
-+                      /* Data[3].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[3].ctlEdges[6].bChannel */ 0xFF,
-+                      /* Data[3].ctlEdges[7].bChannel */ 0xFF,
-+              },
-+
-+              {
-+                      /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[4].ctlEdges[4].bChannel */ 0xFF,
-+                      /* Data[4].ctlEdges[5].bChannel */ 0xFF,
-+                      /* Data[4].ctlEdges[6].bChannel */ 0xFF,
-+                      /* Data[4].ctlEdges[7].bChannel */ 0xFF,
-+              },
-+
-+              {
-+                      /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
-+                      /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
-+                      /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[5].ctlEdges[6].bChannel */ 0xFF,
-+                      /* Data[5].ctlEdges[7].bChannel */ 0xFF
-+              },
-+
-+              {
-+                      /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
-+                      /* Data[6].ctlEdges[2].bChannel */ FREQ2FBIN(5220, 0),
-+                      /* Data[6].ctlEdges[3].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[6].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
-+                      /* Data[6].ctlEdges[6].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[6].ctlEdges[7].bChannel */ FREQ2FBIN(5745, 0)
-+              },
-+
-+              {
-+                      /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(5320, 0),
-+                      /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[7].ctlEdges[4].bChannel */ FREQ2FBIN(5560, 0),
-+                      /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[7].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[7].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
-+              },
-+
-+              {
-+                      /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
-+                      /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[8].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[8].ctlEdges[4].bChannel */ FREQ2FBIN(5550, 0),
-+                      /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[8].ctlEdges[6].bChannel */ FREQ2FBIN(5755, 0),
-+                      /* Data[8].ctlEdges[7].bChannel */ FREQ2FBIN(5795, 0)
-+              }
-+       },
-+      .ctlPowerData_5G = {
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 0}, {60, 1}, {60, 0}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 0}, {60, 1}, {60, 1}, {60, 0},
-+                              {60, 1}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                              {60, 0}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 0}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 0}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 0}, {60, 1},
-+                      }
-+              },
-+       }
-+};
-+
-+
-+static const struct ar9300_eeprom ar9300_h112 = {
-+      .eepromVersion = 2,
-+      .templateVersion = 3,
-+      .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0},
-+      .custData = {"h112-241-f0000"},
-+      .baseEepHeader = {
-+              .regDmn = { LE16(0), LE16(0x1f) },
-+              .txrxMask =  0x77, /* 4 bits tx and 4 bits rx */
-+              .opCapFlags = {
-+                      .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
-+                      .eepMisc = 0,
-+              },
-+              .rfSilent = 0,
-+              .blueToothOptions = 0,
-+              .deviceCap = 0,
-+              .deviceType = 5, /* takes lower byte in eeprom location */
-+              .pwrTableOffset = AR9300_PWR_TABLE_OFFSET,
-+              .params_for_tuning_caps = {0, 0},
-+              .featureEnable = 0x0d,
-+              /*
-+               * bit0 - enable tx temp comp - disabled
-+               * bit1 - enable tx volt comp - disabled
-+               * bit2 - enable fastClock - enabled
-+               * bit3 - enable doubling - enabled
-+               * bit4 - enable internal regulator - disabled
-+               * bit5 - enable pa predistortion - disabled
-+               */
-+              .miscConfiguration = 0, /* bit0 - turn down drivestrength */
-+              .eepromWriteEnableGpio = 6,
-+              .wlanDisableGpio = 0,
-+              .wlanLedGpio = 8,
-+              .rxBandSelectGpio = 0xff,
-+              .txrxgain = 0x10,
-+              .swreg = 0,
-+      },
-+      .modalHeader2G = {
-+              /* ar9300_modal_eep_header  2g */
-+              /* 4 idle,t1,t2,b(4 bits per setting) */
-+              .antCtrlCommon = LE32(0x110),
-+              /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
-+              .antCtrlCommon2 = LE32(0x44444),
-+
-+              /*
-+               * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r,
-+               * rx1, rx12, b (2 bits each)
-+               */
-+              .antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) },
-+
-+              /*
-+               * xatten1DB[AR9300_MAX_CHAINS];  3 xatten1_db
-+               * for ar9280 (0xa20c/b20c 5:0)
-+               */
-+              .xatten1DB = {0, 0, 0},
-+
-+              /*
-+               * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
-+               * for ar9280 (0xa20c/b20c 16:12
-+               */
-+              .xatten1Margin = {0, 0, 0},
-+              .tempSlope = 25,
-+              .voltSlope = 0,
-+
-+              /*
-+               * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur
-+               * channels in usual fbin coding format
-+               */
-+              .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0},
-+
-+              /*
-+               * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check
-+               * if the register is per chain
-+               */
-+              .noiseFloorThreshCh = {-1, 0, 0},
-+              .ob = {1, 1, 1},/* 3 chain */
-+              .db_stage2 = {1, 1, 1}, /* 3 chain  */
-+              .db_stage3 = {0, 0, 0},
-+              .db_stage4 = {0, 0, 0},
-+              .xpaBiasLvl = 0,
-+              .txFrameToDataStart = 0x0e,
-+              .txFrameToPaOn = 0x0e,
-+              .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
-+              .antennaGain = 0,
-+              .switchSettling = 0x2c,
-+              .adcDesiredSize = -30,
-+              .txEndToXpaOff = 0,
-+              .txEndToRxOn = 0x2,
-+              .txFrameToXpaOn = 0xe,
-+              .thresh62 = 28,
-+              .papdRateMaskHt20 = LE32(0x80c080),
-+              .papdRateMaskHt40 = LE32(0x80c080),
-+              .futureModal = {
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+              },
-+      },
-+      .base_ext1 = {
-+              .ant_div_control = 0,
-+              .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
-+      },
-+      .calFreqPier2G = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1),
-+      },
-+      /* ar9300_cal_data_per_freq_op_loop 2g */
-+      .calPierData2G = {
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+      },
-+      .calTarget_freqbin_Cck = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2484, 1),
-+      },
-+      .calTarget_freqbin_2G = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+      },
-+      .calTarget_freqbin_2GHT20 = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+      },
-+      .calTarget_freqbin_2GHT40 = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+      },
-+      .calTargetPowerCck = {
-+              /* 1L-5L,5S,11L,11S */
-+              { {34, 34, 34, 34} },
-+              { {34, 34, 34, 34} },
-+      },
-+      .calTargetPower2G = {
-+              /* 6-24,36,48,54 */
-+              { {34, 34, 32, 32} },
-+              { {34, 34, 32, 32} },
-+              { {34, 34, 32, 32} },
-+      },
-+      .calTargetPower2GHT20 = {
-+              { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 28, 28, 28, 24} },
-+              { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 28, 28, 28, 24} },
-+              { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 28, 28, 28, 24} },
-+      },
-+      .calTargetPower2GHT40 = {
-+              { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 26, 26, 26, 22} },
-+              { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 26, 26, 26, 22} },
-+              { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 26, 26, 26, 22} },
-+      },
-+      .ctlIndex_2G =  {
-+              0x11, 0x12, 0x15, 0x17, 0x41, 0x42,
-+              0x45, 0x47, 0x31, 0x32, 0x35, 0x37,
-+      },
-+      .ctl_freqbin_2G = {
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2457, 1),
-+                      FREQ2FBIN(2462, 1)
-+              },
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2462, 1),
-+                      0xFF,
-+              },
-+
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2462, 1),
-+                      0xFF,
-+              },
-+              {
-+                      FREQ2FBIN(2422, 1),
-+                      FREQ2FBIN(2427, 1),
-+                      FREQ2FBIN(2447, 1),
-+                      FREQ2FBIN(2452, 1)
-+              },
-+
-+              {
-+                      /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(2484, 1),
-+              },
-+
-+              {
-+                      /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      0,
-+              },
-+
-+              {
-+                      /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2472, 1),
-+                      0,
-+              },
-+
-+              {
-+                      /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
-+                      /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
-+                      /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
-+                      /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
-+              },
-+
-+              {
-+                      /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+              },
-+
-+              {
-+                      /* Data[9].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[9].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[9].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      0
-+              },
-+
-+              {
-+                      /* Data[10].ctlEdges[0].bChannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[10].ctlEdges[1].bChannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[10].ctlEdges[2].bChannel */ FREQ2FBIN(2472, 1),
-+                      0
-+              },
-+
-+              {
-+                      /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
-+                      /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
-+                      /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
-+                      /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
-+              }
-+      },
-+      .ctlPowerData_2G = {
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
-+
-+              { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+
-+              { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-+              { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-+      },
-+      .modalHeader5G = {
-+              /* 4 idle,t1,t2,b (4 bits per setting) */
-+              .antCtrlCommon = LE32(0x220),
-+              /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
-+              .antCtrlCommon2 = LE32(0x44444),
-+              /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
-+              .antCtrlChain = {
-+                      LE16(0x150), LE16(0x150), LE16(0x150),
-+              },
-+              /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
-+              .xatten1DB = {0, 0, 0},
-+
-+              /*
-+               * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
-+               * for merlin (0xa20c/b20c 16:12
-+               */
-+              .xatten1Margin = {0, 0, 0},
-+              .tempSlope = 45,
-+              .voltSlope = 0,
-+              /* spurChans spur channels in usual fbin coding format */
-+              .spurChans = {0, 0, 0, 0, 0},
-+              /* noiseFloorThreshCh Check if the register is per chain */
-+              .noiseFloorThreshCh = {-1, 0, 0},
-+              .ob = {3, 3, 3}, /* 3 chain */
-+              .db_stage2 = {3, 3, 3}, /* 3 chain */
-+              .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */
-+              .db_stage4 = {3, 3, 3},  /* don't exist for 2G */
-+              .xpaBiasLvl = 0,
-+              .txFrameToDataStart = 0x0e,
-+              .txFrameToPaOn = 0x0e,
-+              .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
-+              .antennaGain = 0,
-+              .switchSettling = 0x2d,
-+              .adcDesiredSize = -30,
-+              .txEndToXpaOff = 0,
-+              .txEndToRxOn = 0x2,
-+              .txFrameToXpaOn = 0xe,
-+              .thresh62 = 28,
-+              .papdRateMaskHt20 = LE32(0x0cf0e0e0),
-+              .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-+              .futureModal = {
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+              },
-+      },
-+      .base_ext2 = {
-+              .tempSlopeLow = 40,
-+              .tempSlopeHigh = 50,
-+              .xatten1DBLow = {0, 0, 0},
-+              .xatten1MarginLow = {0, 0, 0},
-+              .xatten1DBHigh = {0, 0, 0},
-+              .xatten1MarginHigh = {0, 0, 0}
-+      },
-+      .calFreqPier5G = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5220, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5700, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calPierData5G = {
-+              {
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+              },
-+              {
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+              },
-+              {
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+              },
-+
-+      },
-+      .calTarget_freqbin_5G = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5240, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5700, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calTarget_freqbin_5GHT20 = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5240, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5700, 0),
-+              FREQ2FBIN(5745, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calTarget_freqbin_5GHT40 = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5240, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5700, 0),
-+              FREQ2FBIN(5745, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calTargetPower5G = {
-+              /* 6-24,36,48,54 */
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+      },
-+      .calTargetPower5GHT20 = {
-+              /*
-+               * 0_8_16,1-3_9-11_17-19,
-+               * 4,5,6,7,12,13,14,15,20,21,22,23
-+               */
-+              { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 20, 20, 20, 16} },
-+              { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 20, 20, 20, 16} },
-+              { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 18, 18, 18, 16} },
-+              { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 18, 18, 18, 16} },
-+              { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 16, 16, 16, 14} },
-+              { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 16, 16, 16, 14} },
-+              { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 14, 14, 14, 12} },
-+              { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 14, 14, 14, 12} },
-+      },
-+      .calTargetPower5GHT40 =  {
-+              /*
-+               * 0_8_16,1-3_9-11_17-19,
-+               * 4,5,6,7,12,13,14,15,20,21,22,23
-+               */
-+              { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 18, 18, 18, 14} },
-+              { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 18, 18, 18, 14} },
-+              { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 16, 16, 16, 12} },
-+              { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 16, 16, 16, 12} },
-+              { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 14, 14, 14, 10} },
-+              { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 14, 14, 14, 10} },
-+              { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 12, 12, 12, 8} },
-+              { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 12, 12, 12, 8} },
-+      },
-+      .ctlIndex_5G =  {
-+              0x10, 0x16, 0x18, 0x40, 0x46,
-+              0x48, 0x30, 0x36, 0x38
-+      },
-+      .ctl_freqbin_5G =  {
-+              {
-+                      /* Data[0].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[0].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[0].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
-+                      /* Data[0].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[0].ctlEdges[4].bChannel */ FREQ2FBIN(5600, 0),
-+                      /* Data[0].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[0].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[0].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
-+              },
-+              {
-+                      /* Data[1].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[1].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[1].ctlEdges[2].bChannel */ FREQ2FBIN(5280, 0),
-+                      /* Data[1].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[1].ctlEdges[4].bChannel */ FREQ2FBIN(5520, 0),
-+                      /* Data[1].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[1].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[1].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
-+              },
-+
-+              {
-+                      /* Data[2].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[2].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
-+                      /* Data[2].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[2].ctlEdges[3].bChannel */ FREQ2FBIN(5310, 0),
-+                      /* Data[2].ctlEdges[4].bChannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[2].ctlEdges[5].bChannel */ FREQ2FBIN(5550, 0),
-+                      /* Data[2].ctlEdges[6].bChannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[2].ctlEdges[7].bChannel */ FREQ2FBIN(5755, 0)
-+              },
-+
-+              {
-+                      /* Data[3].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[3].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
-+                      /* Data[3].ctlEdges[2].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[3].ctlEdges[3].bChannel */ FREQ2FBIN(5320, 0),
-+                      /* Data[3].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[3].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[3].ctlEdges[6].bChannel */ 0xFF,
-+                      /* Data[3].ctlEdges[7].bChannel */ 0xFF,
-+              },
-+
-+              {
-+                      /* Data[4].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[4].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[4].ctlEdges[2].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[4].ctlEdges[3].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[4].ctlEdges[4].bChannel */ 0xFF,
-+                      /* Data[4].ctlEdges[5].bChannel */ 0xFF,
-+                      /* Data[4].ctlEdges[6].bChannel */ 0xFF,
-+                      /* Data[4].ctlEdges[7].bChannel */ 0xFF,
-+              },
-+
-+              {
-+                      /* Data[5].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[5].ctlEdges[1].bChannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[5].ctlEdges[2].bChannel */ FREQ2FBIN(5310, 0),
-+                      /* Data[5].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[5].ctlEdges[4].bChannel */ FREQ2FBIN(5590, 0),
-+                      /* Data[5].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[5].ctlEdges[6].bChannel */ 0xFF,
-+                      /* Data[5].ctlEdges[7].bChannel */ 0xFF
-+              },
-+
-+              {
-+                      /* Data[6].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[6].ctlEdges[1].bChannel */ FREQ2FBIN(5200, 0),
-+                      /* Data[6].ctlEdges[2].bChannel */ FREQ2FBIN(5220, 0),
-+                      /* Data[6].ctlEdges[3].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[6].ctlEdges[4].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[6].ctlEdges[5].bChannel */ FREQ2FBIN(5600, 0),
-+                      /* Data[6].ctlEdges[6].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[6].ctlEdges[7].bChannel */ FREQ2FBIN(5745, 0)
-+              },
-+
-+              {
-+                      /* Data[7].ctlEdges[0].bChannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[7].ctlEdges[1].bChannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[7].ctlEdges[2].bChannel */ FREQ2FBIN(5320, 0),
-+                      /* Data[7].ctlEdges[3].bChannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[7].ctlEdges[4].bChannel */ FREQ2FBIN(5560, 0),
-+                      /* Data[7].ctlEdges[5].bChannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[7].ctlEdges[6].bChannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[7].ctlEdges[7].bChannel */ FREQ2FBIN(5825, 0)
-+              },
-+
-+              {
-+                      /* Data[8].ctlEdges[0].bChannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[8].ctlEdges[1].bChannel */ FREQ2FBIN(5230, 0),
-+                      /* Data[8].ctlEdges[2].bChannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[8].ctlEdges[3].bChannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[8].ctlEdges[4].bChannel */ FREQ2FBIN(5550, 0),
-+                      /* Data[8].ctlEdges[5].bChannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[8].ctlEdges[6].bChannel */ FREQ2FBIN(5755, 0),
-+                      /* Data[8].ctlEdges[7].bChannel */ FREQ2FBIN(5795, 0)
-+              }
-+      },
-+      .ctlPowerData_5G = {
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 0}, {60, 1}, {60, 0}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 0}, {60, 1}, {60, 1}, {60, 0},
-+                              {60, 1}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                              {60, 0}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 0}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 0}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 0}, {60, 1},
-+                      }
-+              },
-+      }
-+};
-+
-+
-+static const struct ar9300_eeprom ar9300_x112 = {
-+      .eepromVersion = 2,
-+      .templateVersion = 5,
-+      .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0},
-+      .custData = {"x112-041-f0000"},
-+      .baseEepHeader = {
-+              .regDmn = { LE16(0), LE16(0x1f) },
-+              .txrxMask =  0x77, /* 4 bits tx and 4 bits rx */
-+              .opCapFlags = {
-+                      .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
-+                      .eepMisc = 0,
-+              },
-+              .rfSilent = 0,
-+              .blueToothOptions = 0,
-+              .deviceCap = 0,
-+              .deviceType = 5, /* takes lower byte in eeprom location */
-+              .pwrTableOffset = AR9300_PWR_TABLE_OFFSET,
-+              .params_for_tuning_caps = {0, 0},
-+              .featureEnable = 0x0d,
-+              /*
-+               * bit0 - enable tx temp comp - disabled
-+               * bit1 - enable tx volt comp - disabled
-+               * bit2 - enable fastclock - enabled
-+               * bit3 - enable doubling - enabled
-+               * bit4 - enable internal regulator - disabled
-+               * bit5 - enable pa predistortion - disabled
-+               */
-+              .miscConfiguration = 0, /* bit0 - turn down drivestrength */
-+              .eepromWriteEnableGpio = 6,
-+              .wlanDisableGpio = 0,
-+              .wlanLedGpio = 8,
-+              .rxBandSelectGpio = 0xff,
-+              .txrxgain = 0x0,
-+              .swreg = 0,
-+      },
-+      .modalHeader2G = {
-+              /* ar9300_modal_eep_header  2g */
-+              /* 4 idle,t1,t2,b(4 bits per setting) */
-+              .antCtrlCommon = LE32(0x110),
-+              /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
-+              .antCtrlCommon2 = LE32(0x22222),
-+
-+              /*
-+               * antCtrlChain[ar9300_max_chains]; 6 idle, t, r,
-+               * rx1, rx12, b (2 bits each)
-+               */
-+              .antCtrlChain = { LE16(0x10), LE16(0x10), LE16(0x10) },
-+
-+              /*
-+               * xatten1DB[AR9300_max_chains];  3 xatten1_db
-+               * for ar9280 (0xa20c/b20c 5:0)
-+               */
-+              .xatten1DB = {0x1b, 0x1b, 0x1b},
-+
-+              /*
-+               * xatten1Margin[ar9300_max_chains]; 3 xatten1_margin
-+               * for ar9280 (0xa20c/b20c 16:12
-+               */
-+              .xatten1Margin = {0x15, 0x15, 0x15},
-+              .tempSlope = 50,
-+              .voltSlope = 0,
-+
-+              /*
-+               * spurChans[OSPrey_eeprom_modal_sPURS]; spur
-+               * channels in usual fbin coding format
-+               */
-+              .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0},
-+
-+              /*
-+               * noiseFloorThreshch[ar9300_max_cHAINS]; 3 Check
-+               * if the register is per chain
-+               */
-+              .noiseFloorThreshCh = {-1, 0, 0},
-+              .ob = {1, 1, 1},/* 3 chain */
-+              .db_stage2 = {1, 1, 1}, /* 3 chain  */
-+              .db_stage3 = {0, 0, 0},
-+              .db_stage4 = {0, 0, 0},
-+              .xpaBiasLvl = 0,
-+              .txFrameToDataStart = 0x0e,
-+              .txFrameToPaOn = 0x0e,
-+              .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
-+              .antennaGain = 0,
-+              .switchSettling = 0x2c,
-+              .adcDesiredSize = -30,
-+              .txEndToXpaOff = 0,
-+              .txEndToRxOn = 0x2,
-+              .txFrameToXpaOn = 0xe,
-+              .thresh62 = 28,
-+              .papdRateMaskHt20 = LE32(0x0c80c080),
-+              .papdRateMaskHt40 = LE32(0x0080c080),
-+              .futureModal = {
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+              },
-+      },
-+      .base_ext1 = {
-+              .ant_div_control = 0,
-+              .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
-+      },
-+      .calFreqPier2G = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1),
-+      },
-+      /* ar9300_cal_data_per_freq_op_loop 2g */
-+      .calPierData2G = {
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+              { {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0}, {0, 0, 0, 0, 0, 0} },
-+      },
-+      .calTarget_freqbin_Cck = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2472, 1),
-+      },
-+      .calTarget_freqbin_2G = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+      },
-+      .calTarget_freqbin_2GHT20 = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+      },
-+      .calTarget_freqbin_2GHT40 = {
-+              FREQ2FBIN(2412, 1),
-+              FREQ2FBIN(2437, 1),
-+              FREQ2FBIN(2472, 1)
-+      },
-+      .calTargetPowerCck = {
-+              /* 1L-5L,5S,11L,11s */
-+              { {38, 38, 38, 38} },
-+              { {38, 38, 38, 38} },
-+      },
-+      .calTargetPower2G = {
-+              /* 6-24,36,48,54 */
-+              { {38, 38, 36, 34} },
-+              { {38, 38, 36, 34} },
-+              { {38, 38, 34, 32} },
-+      },
-+      .calTargetPower2GHT20 = {
-+              { {36, 36, 36, 36, 36, 34, 34, 32, 30, 28, 28, 28, 28, 26} },
-+              { {36, 36, 36, 36, 36, 34, 36, 34, 32, 30, 30, 30, 28, 26} },
-+              { {36, 36, 36, 36, 36, 34, 34, 32, 30, 28, 28, 28, 28, 26} },
-+      },
-+      .calTargetPower2GHT40 = {
-+              { {36, 36, 36, 36, 34, 32, 32, 30, 28, 26, 26, 26, 26, 24} },
-+              { {36, 36, 36, 36, 34, 32, 34, 32, 30, 28, 28, 28, 28, 24} },
-+              { {36, 36, 36, 36, 34, 32, 32, 30, 28, 26, 26, 26, 26, 24} },
-+      },
-+      .ctlIndex_2G =  {
-+              0x11, 0x12, 0x15, 0x17, 0x41, 0x42,
-+              0x45, 0x47, 0x31, 0x32, 0x35, 0x37,
-+      },
-+      .ctl_freqbin_2G = {
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2457, 1),
-+                      FREQ2FBIN(2462, 1)
-+              },
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2462, 1),
-+                      0xFF,
-+              },
-+
-+              {
-+                      FREQ2FBIN(2412, 1),
-+                      FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2462, 1),
-+                      0xFF,
-+              },
-+              {
-+                      FREQ2FBIN(2422, 1),
-+                      FREQ2FBIN(2427, 1),
-+                      FREQ2FBIN(2447, 1),
-+                      FREQ2FBIN(2452, 1)
-+              },
-+
-+              {
-+                      /* Data[4].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[4].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[4].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
-+                      /* Data[4].ctledges[3].bchannel */ FREQ2FBIN(2484, 1),
-+              },
-+
-+              {
-+                      /* Data[5].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[5].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[5].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
-+                      0,
-+              },
-+
-+              {
-+                      /* Data[6].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[6].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
-+                      FREQ2FBIN(2472, 1),
-+                      0,
-+              },
-+
-+              {
-+                      /* Data[7].ctledges[0].bchannel */ FREQ2FBIN(2422, 1),
-+                      /* Data[7].ctledges[1].bchannel */ FREQ2FBIN(2427, 1),
-+                      /* Data[7].ctledges[2].bchannel */ FREQ2FBIN(2447, 1),
-+                      /* Data[7].ctledges[3].bchannel */ FREQ2FBIN(2462, 1),
-+              },
-+
-+              {
-+                      /* Data[8].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[8].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[8].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
-+              },
-+
-+              {
-+                      /* Data[9].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[9].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[9].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
-+                      0
-+              },
-+
-+              {
-+                      /* Data[10].ctledges[0].bchannel */ FREQ2FBIN(2412, 1),
-+                      /* Data[10].ctledges[1].bchannel */ FREQ2FBIN(2417, 1),
-+                      /* Data[10].ctledges[2].bchannel */ FREQ2FBIN(2472, 1),
-+                      0
-+              },
-+
-+              {
-+                      /* Data[11].ctledges[0].bchannel */ FREQ2FBIN(2422, 1),
-+                      /* Data[11].ctledges[1].bchannel */ FREQ2FBIN(2427, 1),
-+                      /* Data[11].ctledges[2].bchannel */ FREQ2FBIN(2447, 1),
-+                      /* Data[11].ctledges[3].bchannel */ FREQ2FBIN(2462, 1),
-+              }
-+      },
-+      .ctlPowerData_2G = {
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 1}, {60, 0}, {60, 0}, {60, 1} } },
-+
-+              { { {60, 1}, {60, 0}, {0, 0}, {0, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+
-+              { { {60, 0}, {60, 1}, {60, 1}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+
-+              { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-+              { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-+              { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-+      },
-+      .modalHeader5G = {
-+              /* 4 idle,t1,t2,b (4 bits per setting) */
-+              .antCtrlCommon = LE32(0x110),
-+              /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
-+              .antCtrlCommon2 = LE32(0x22222),
-+              /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
-+              .antCtrlChain = {
-+                      LE16(0x0), LE16(0x0), LE16(0x0),
-+              },
-+              /* xatten1DB 3 xatten1_db for ar9280 (0xa20c/b20c 5:0) */
-+              .xatten1DB = {0x13, 0x19, 0x17},
-+
-+              /*
-+               * xatten1Margin[ar9300_max_chains]; 3 xatten1_margin
-+               * for merlin (0xa20c/b20c 16:12
-+               */
-+              .xatten1Margin = {0x19, 0x19, 0x19},
-+              .tempSlope = 70,
-+              .voltSlope = 15,
-+              /* spurChans spur channels in usual fbin coding format */
-+              .spurChans = {0, 0, 0, 0, 0},
-+              /* noiseFloorThreshch check if the register is per chain */
-+              .noiseFloorThreshCh = {-1, 0, 0},
-+              .ob = {3, 3, 3}, /* 3 chain */
-+              .db_stage2 = {3, 3, 3}, /* 3 chain */
-+              .db_stage3 = {3, 3, 3}, /* doesn't exist for 2G */
-+              .db_stage4 = {3, 3, 3},  /* don't exist for 2G */
-+              .xpaBiasLvl = 0,
-+              .txFrameToDataStart = 0x0e,
-+              .txFrameToPaOn = 0x0e,
-+              .txClip = 3, /* 4 bits tx_clip, 4 bits dac_scale_cck */
-+              .antennaGain = 0,
-+              .switchSettling = 0x2d,
-+              .adcDesiredSize = -30,
-+              .txEndToXpaOff = 0,
-+              .txEndToRxOn = 0x2,
-+              .txFrameToXpaOn = 0xe,
-+              .thresh62 = 28,
-+              .papdRateMaskHt20 = LE32(0x0cf0e0e0),
-+              .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-+              .futureModal = {
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-+              },
-+      },
-+      .base_ext2 = {
-+              .tempSlopeLow = 72,
-+              .tempSlopeHigh = 105,
-+              .xatten1DBLow = {0x10, 0x14, 0x10},
-+              .xatten1MarginLow = {0x19, 0x19 , 0x19},
-+              .xatten1DBHigh = {0x1d, 0x20, 0x24},
-+              .xatten1MarginHigh = {0x10, 0x10, 0x10}
-+      },
-+      .calFreqPier5G = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5220, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5700, 0),
-+              FREQ2FBIN(5785, 0)
-+      },
-+      .calPierData5G = {
-+              {
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+              },
-+              {
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+              },
-+              {
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+                      {0, 0, 0, 0, 0},
-+              },
-+
-+      },
-+      .calTarget_freqbin_5G = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5220, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5725, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calTarget_freqbin_5GHT20 = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5220, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5725, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calTarget_freqbin_5GHT40 = {
-+              FREQ2FBIN(5180, 0),
-+              FREQ2FBIN(5220, 0),
-+              FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-+              FREQ2FBIN(5500, 0),
-+              FREQ2FBIN(5600, 0),
-+              FREQ2FBIN(5725, 0),
-+              FREQ2FBIN(5825, 0)
-+      },
-+      .calTargetPower5G = {
-+              /* 6-24,36,48,54 */
-+              { {32, 32, 28, 26} },
-+              { {32, 32, 28, 26} },
-+              { {32, 32, 28, 26} },
-+              { {32, 32, 26, 24} },
-+              { {32, 32, 26, 24} },
-+              { {32, 32, 24, 22} },
-+              { {30, 30, 24, 22} },
-+              { {30, 30, 24, 22} },
-+      },
-+      .calTargetPower5GHT20 = {
-+              /*
-+               * 0_8_16,1-3_9-11_17-19,
-+               * 4,5,6,7,12,13,14,15,20,21,22,23
-+               */
-+              { {32, 32, 32, 32, 28, 26, 32, 28, 26, 24, 24, 24, 22, 22} },
-+              { {32, 32, 32, 32, 28, 26, 32, 28, 26, 24, 24, 24, 22, 22} },
-+              { {32, 32, 32, 32, 28, 26, 32, 28, 26, 24, 24, 24, 22, 22} },
-+              { {32, 32, 32, 32, 28, 26, 32, 26, 24, 22, 22, 22, 20, 20} },
-+              { {32, 32, 32, 32, 28, 26, 32, 26, 24, 22, 20, 18, 16, 16} },
-+              { {32, 32, 32, 32, 28, 26, 32, 24, 20, 16, 18, 16, 14, 14} },
-+              { {30, 30, 30, 30, 28, 26, 30, 24, 20, 16, 18, 16, 14, 14} },
-+              { {30, 30, 30, 30, 28, 26, 30, 24, 20, 16, 18, 16, 14, 14} },
-+      },
-+      .calTargetPower5GHT40 =  {
-+              /*
-+               * 0_8_16,1-3_9-11_17-19,
-+               * 4,5,6,7,12,13,14,15,20,21,22,23
-+               */
-+              { {32, 32, 32, 30, 28, 26, 30, 28, 26, 24, 24, 24, 22, 22} },
-+              { {32, 32, 32, 30, 28, 26, 30, 28, 26, 24, 24, 24, 22, 22} },
-+              { {32, 32, 32, 30, 28, 26, 30, 28, 26, 24, 24, 24, 22, 22} },
-+              { {32, 32, 32, 30, 28, 26, 30, 26, 24, 22, 22, 22, 20, 20} },
-+              { {32, 32, 32, 30, 28, 26, 30, 26, 24, 22, 20, 18, 16, 16} },
-+              { {32, 32, 32, 30, 28, 26, 30, 22, 20, 16, 18, 16, 14, 14} },
-+              { {30, 30, 30, 30, 28, 26, 30, 22, 20, 16, 18, 16, 14, 14} },
-+              { {30, 30, 30, 30, 28, 26, 30, 22, 20, 16, 18, 16, 14, 14} },
-+      },
-+      .ctlIndex_5G =  {
-+              0x10, 0x16, 0x18, 0x40, 0x46,
-+              0x48, 0x30, 0x36, 0x38
-+      },
-+      .ctl_freqbin_5G =  {
-+              {
-+                      /* Data[0].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[0].ctledges[1].bchannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[0].ctledges[2].bchannel */ FREQ2FBIN(5280, 0),
-+                      /* Data[0].ctledges[3].bchannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[0].ctledges[4].bchannel */ FREQ2FBIN(5600, 0),
-+                      /* Data[0].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[0].ctledges[6].bchannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[0].ctledges[7].bchannel */ FREQ2FBIN(5825, 0)
-+              },
-+              {
-+                      /* Data[1].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[1].ctledges[1].bchannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[1].ctledges[2].bchannel */ FREQ2FBIN(5280, 0),
-+                      /* Data[1].ctledges[3].bchannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[1].ctledges[4].bchannel */ FREQ2FBIN(5520, 0),
-+                      /* Data[1].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[1].ctledges[6].bchannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[1].ctledges[7].bchannel */ FREQ2FBIN(5825, 0)
-+              },
-+
-+              {
-+                      /* Data[2].ctledges[0].bchannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[2].ctledges[1].bchannel */ FREQ2FBIN(5230, 0),
-+                      /* Data[2].ctledges[2].bchannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[2].ctledges[3].bchannel */ FREQ2FBIN(5310, 0),
-+                      /* Data[2].ctledges[4].bchannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[2].ctledges[5].bchannel */ FREQ2FBIN(5550, 0),
-+                      /* Data[2].ctledges[6].bchannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[2].ctledges[7].bchannel */ FREQ2FBIN(5755, 0)
-+              },
-+
-+              {
-+                      /* Data[3].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[3].ctledges[1].bchannel */ FREQ2FBIN(5200, 0),
-+                      /* Data[3].ctledges[2].bchannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[3].ctledges[3].bchannel */ FREQ2FBIN(5320, 0),
-+                      /* Data[3].ctledges[4].bchannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[3].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[3].ctledges[6].bchannel */ 0xFF,
-+                      /* Data[3].ctledges[7].bchannel */ 0xFF,
-+              },
-+
-+              {
-+                      /* Data[4].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[4].ctledges[1].bchannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[4].ctledges[2].bchannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[4].ctledges[3].bchannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[4].ctledges[4].bchannel */ 0xFF,
-+                      /* Data[4].ctledges[5].bchannel */ 0xFF,
-+                      /* Data[4].ctledges[6].bchannel */ 0xFF,
-+                      /* Data[4].ctledges[7].bchannel */ 0xFF,
-+              },
-+
-+              {
-+                      /* Data[5].ctledges[0].bchannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[5].ctledges[1].bchannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[5].ctledges[2].bchannel */ FREQ2FBIN(5310, 0),
-+                      /* Data[5].ctledges[3].bchannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[5].ctledges[4].bchannel */ FREQ2FBIN(5590, 0),
-+                      /* Data[5].ctledges[5].bchannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[5].ctledges[6].bchannel */ 0xFF,
-+                      /* Data[5].ctledges[7].bchannel */ 0xFF
-+              },
-+
-+              {
-+                      /* Data[6].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[6].ctledges[1].bchannel */ FREQ2FBIN(5200, 0),
-+                      /* Data[6].ctledges[2].bchannel */ FREQ2FBIN(5220, 0),
-+                      /* Data[6].ctledges[3].bchannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[6].ctledges[4].bchannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[6].ctledges[5].bchannel */ FREQ2FBIN(5600, 0),
-+                      /* Data[6].ctledges[6].bchannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[6].ctledges[7].bchannel */ FREQ2FBIN(5745, 0)
-+              },
-+
-+              {
-+                      /* Data[7].ctledges[0].bchannel */ FREQ2FBIN(5180, 0),
-+                      /* Data[7].ctledges[1].bchannel */ FREQ2FBIN(5260, 0),
-+                      /* Data[7].ctledges[2].bchannel */ FREQ2FBIN(5320, 0),
-+                      /* Data[7].ctledges[3].bchannel */ FREQ2FBIN(5500, 0),
-+                      /* Data[7].ctledges[4].bchannel */ FREQ2FBIN(5560, 0),
-+                      /* Data[7].ctledges[5].bchannel */ FREQ2FBIN(5700, 0),
-+                      /* Data[7].ctledges[6].bchannel */ FREQ2FBIN(5745, 0),
-+                      /* Data[7].ctledges[7].bchannel */ FREQ2FBIN(5825, 0)
-+              },
-+
-+              {
-+                      /* Data[8].ctledges[0].bchannel */ FREQ2FBIN(5190, 0),
-+                      /* Data[8].ctledges[1].bchannel */ FREQ2FBIN(5230, 0),
-+                      /* Data[8].ctledges[2].bchannel */ FREQ2FBIN(5270, 0),
-+                      /* Data[8].ctledges[3].bchannel */ FREQ2FBIN(5510, 0),
-+                      /* Data[8].ctledges[4].bchannel */ FREQ2FBIN(5550, 0),
-+                      /* Data[8].ctledges[5].bchannel */ FREQ2FBIN(5670, 0),
-+                      /* Data[8].ctledges[6].bchannel */ FREQ2FBIN(5755, 0),
-+                      /* Data[8].ctledges[7].bchannel */ FREQ2FBIN(5795, 0)
-+              }
-+      },
-+      .ctlPowerData_5G = {
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 0}, {60, 1}, {60, 0}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 0}, {60, 1}, {60, 1}, {60, 0},
-+                              {60, 1}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                              {60, 0}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 0}, {60, 0}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 1},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 1}, {60, 0}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 1}, {60, 0},
-+                      }
-+              },
-+              {
-+                      {
-+                              {60, 1}, {60, 0}, {60, 1}, {60, 1},
-+                              {60, 1}, {60, 1}, {60, 0}, {60, 1},
-+                      }
-+              },
-+      }
-+};
-+
-+static const struct ar9300_eeprom ar9300_h116 = {
-+      .eepromVersion = 2,
-+      .templateVersion = 4,
-+      .macAddr = {0x00, 0x03, 0x7f, 0x0, 0x0, 0x0},
-+      .custData = {"h116-041-f0000"},
-       .baseEepHeader = {
-               .regDmn = { LE16(0), LE16(0x1f) },
--              .txrxMask =  0x77, /* 4 bits tx and 4 bits rx */
-+              .txrxMask =  0x33, /* 4 bits tx and 4 bits rx */
-               .opCapFlags = {
-                       .opFlags = AR9300_OPFLAGS_11G | AR9300_OPFLAGS_11A,
-                       .eepMisc = 0,
-@@ -74,7 +2388,7 @@ static const struct ar9300_eeprom ar9300
-               .deviceType = 5, /* takes lower byte in eeprom location */
-               .pwrTableOffset = AR9300_PWR_TABLE_OFFSET,
-               .params_for_tuning_caps = {0, 0},
--              .featureEnable = 0x0c,
-+              .featureEnable = 0x0d,
-                /*
-                 * bit0 - enable tx temp comp - disabled
-                 * bit1 - enable tx volt comp - disabled
-@@ -84,11 +2398,11 @@ static const struct ar9300_eeprom ar9300
-                 * bit5 - enable pa predistortion - disabled
-                 */
-               .miscConfiguration = 0, /* bit0 - turn down drivestrength */
--              .eepromWriteEnableGpio = 3,
-+              .eepromWriteEnableGpio = 6,
-               .wlanDisableGpio = 0,
-               .wlanLedGpio = 8,
-               .rxBandSelectGpio = 0xff,
--              .txrxgain = 0,
-+              .txrxgain = 0x10,
-               .swreg = 0,
-        },
-       .modalHeader2G = {
-@@ -96,33 +2410,33 @@ static const struct ar9300_eeprom ar9300
-               /* 4 idle,t1,t2,b(4 bits per setting) */
-               .antCtrlCommon = LE32(0x110),
-               /* 4 ra1l1, ra2l1, ra1l2, ra2l2, ra12 */
--              .antCtrlCommon2 = LE32(0x22222),
-+              .antCtrlCommon2 = LE32(0x44444),
- 
-               /*
-                * antCtrlChain[AR9300_MAX_CHAINS]; 6 idle, t, r,
-                * rx1, rx12, b (2 bits each)
-                */
--              .antCtrlChain = { LE16(0x150), LE16(0x150), LE16(0x150) },
-+              .antCtrlChain = { LE16(0x10), LE16(0x10), LE16(0x10) },
- 
-               /*
-                * xatten1DB[AR9300_MAX_CHAINS];  3 xatten1_db
-                * for ar9280 (0xa20c/b20c 5:0)
-                */
--              .xatten1DB = {0, 0, 0},
-+              .xatten1DB = {0x1f, 0x1f, 0x1f},
- 
-               /*
-                * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
-                * for ar9280 (0xa20c/b20c 16:12
-                */
--              .xatten1Margin = {0, 0, 0},
--              .tempSlope = 36,
-+              .xatten1Margin = {0x12, 0x12, 0x12},
-+              .tempSlope = 25,
-               .voltSlope = 0,
- 
-               /*
-                * spurChans[OSPREY_EEPROM_MODAL_SPURS]; spur
-                * channels in usual fbin coding format
-                */
--              .spurChans = {0, 0, 0, 0, 0},
-+              .spurChans = {FREQ2FBIN(2464, 1), 0, 0, 0, 0},
- 
-               /*
-                * noiseFloorThreshCh[AR9300_MAX_CHAINS]; 3 Check
-@@ -144,13 +2458,16 @@ static const struct ar9300_eeprom ar9300
-               .txEndToRxOn = 0x2,
-               .txFrameToXpaOn = 0xe,
-               .thresh62 = 28,
--              .papdRateMaskHt20 = LE32(0x80c080),
--              .papdRateMaskHt40 = LE32(0x80c080),
-+              .papdRateMaskHt20 = LE32(0x0c80C080),
-+              .papdRateMaskHt40 = LE32(0x0080C080),
-               .futureModal = {
--                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
--                      0, 0, 0, 0, 0, 0, 0, 0
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-               },
-        },
-+       .base_ext1 = {
-+              .ant_div_control = 0,
-+              .future = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
-+       },
-       .calFreqPier2G = {
-               FREQ2FBIN(2412, 1),
-               FREQ2FBIN(2437, 1),
-@@ -164,7 +2481,7 @@ static const struct ar9300_eeprom ar9300
-        },
-       .calTarget_freqbin_Cck = {
-               FREQ2FBIN(2412, 1),
--              FREQ2FBIN(2484, 1),
-+              FREQ2FBIN(2472, 1),
-        },
-       .calTarget_freqbin_2G = {
-               FREQ2FBIN(2412, 1),
-@@ -183,24 +2500,24 @@ static const struct ar9300_eeprom ar9300
-        },
-       .calTargetPowerCck = {
-                /* 1L-5L,5S,11L,11S */
--               { {36, 36, 36, 36} },
--               { {36, 36, 36, 36} },
-+               { {34, 34, 34, 34} },
-+               { {34, 34, 34, 34} },
-       },
-       .calTargetPower2G = {
-                /* 6-24,36,48,54 */
--               { {32, 32, 28, 24} },
--               { {32, 32, 28, 24} },
--               { {32, 32, 28, 24} },
-+               { {34, 34, 32, 32} },
-+               { {34, 34, 32, 32} },
-+               { {34, 34, 32, 32} },
-       },
-       .calTargetPower2GHT20 = {
--              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
--              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
--              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
-+              { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 0, 0, 0, 0} },
-+              { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 0, 0, 0, 0} },
-+              { {32, 32, 32, 32, 32, 30, 32, 32, 30, 28, 0, 0, 0, 0} },
-       },
-       .calTargetPower2GHT40 = {
--              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
--              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
--              { {32, 32, 32, 32, 28, 20, 32, 32, 28, 20, 32, 32, 28, 20} },
-+              { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
-+              { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
-+              { {30, 30, 30, 30, 30, 28, 30, 30, 28, 26, 0, 0, 0, 0} },
-       },
-       .ctlIndex_2G =  {
-               0x11, 0x12, 0x15, 0x17, 0x41, 0x42,
-@@ -285,8 +2602,7 @@ static const struct ar9300_eeprom ar9300
-                       /* Data[11].ctlEdges[0].bChannel */ FREQ2FBIN(2422, 1),
-                       /* Data[11].ctlEdges[1].bChannel */ FREQ2FBIN(2427, 1),
-                       /* Data[11].ctlEdges[2].bChannel */ FREQ2FBIN(2447, 1),
--                      /* Data[11].ctlEdges[3].bChannel */
--                      FREQ2FBIN(2462, 1),
-+                      /* Data[11].ctlEdges[3].bChannel */ FREQ2FBIN(2462, 1),
-               }
-        },
-       .ctlPowerData_2G = {
-@@ -304,25 +2620,26 @@ static const struct ar9300_eeprom ar9300
- 
-                { { {60, 0}, {60, 1}, {60, 0}, {60, 0} } },
-                { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-+               { { {60, 0}, {60, 1}, {60, 1}, {60, 1} } },
-        },
-       .modalHeader5G = {
-               /* 4 idle,t1,t2,b (4 bits per setting) */
--              .antCtrlCommon = LE32(0x110),
-+              .antCtrlCommon = LE32(0x220),
-               /* 4 ra1l1, ra2l1, ra1l2,ra2l2,ra12 */
--              .antCtrlCommon2 = LE32(0x22222),
-+              .antCtrlCommon2 = LE32(0x44444),
-                /* antCtrlChain 6 idle, t,r,rx1,rx12,b (2 bits each) */
-               .antCtrlChain = {
--                      LE16(0x000), LE16(0x000), LE16(0x000),
-+                      LE16(0x150), LE16(0x150), LE16(0x150),
-               },
-                /* xatten1DB 3 xatten1_db for AR9280 (0xa20c/b20c 5:0) */
--              .xatten1DB = {0, 0, 0},
-+              .xatten1DB = {0x19, 0x19, 0x19},
- 
-               /*
-                * xatten1Margin[AR9300_MAX_CHAINS]; 3 xatten1_margin
-                * for merlin (0xa20c/b20c 16:12
-                */
--              .xatten1Margin = {0, 0, 0},
--              .tempSlope = 68,
-+              .xatten1Margin = {0x14, 0x14, 0x14},
-+              .tempSlope = 70,
-               .voltSlope = 0,
-               /* spurChans spur channels in usual fbin coding format */
-               .spurChans = {0, 0, 0, 0, 0},
-@@ -343,13 +2660,20 @@ static const struct ar9300_eeprom ar9300
-               .txEndToRxOn = 0x2,
-               .txFrameToXpaOn = 0xe,
-               .thresh62 = 28,
--              .papdRateMaskHt20 = LE32(0xf0e0e0),
--              .papdRateMaskHt40 = LE32(0xf0e0e0),
-+              .papdRateMaskHt20 = LE32(0x0cf0e0e0),
-+              .papdRateMaskHt40 = LE32(0x6cf0e0e0),
-               .futureModal = {
--                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
--                      0, 0, 0, 0, 0, 0, 0, 0
-+                      0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
-               },
-        },
-+      .base_ext2 = {
-+              .tempSlopeLow = 35,
-+              .tempSlopeHigh = 50,
-+              .xatten1DBLow = {0, 0, 0},
-+              .xatten1MarginLow = {0, 0, 0},
-+              .xatten1DBHigh = {0, 0, 0},
-+              .xatten1MarginHigh = {0, 0, 0}
-+       },
-       .calFreqPier5G = {
-               FREQ2FBIN(5180, 0),
-               FREQ2FBIN(5220, 0),
-@@ -357,8 +2681,8 @@ static const struct ar9300_eeprom ar9300
-               FREQ2FBIN(5400, 0),
-               FREQ2FBIN(5500, 0),
-               FREQ2FBIN(5600, 0),
--              FREQ2FBIN(5725, 0),
--              FREQ2FBIN(5825, 0)
-+              FREQ2FBIN(5700, 0),
-+              FREQ2FBIN(5785, 0)
-       },
-       .calPierData5G = {
-                       {
-@@ -395,72 +2719,72 @@ static const struct ar9300_eeprom ar9300
-       },
-       .calTarget_freqbin_5G = {
-               FREQ2FBIN(5180, 0),
--              FREQ2FBIN(5220, 0),
-+              FREQ2FBIN(5240, 0),
-               FREQ2FBIN(5320, 0),
-               FREQ2FBIN(5400, 0),
-               FREQ2FBIN(5500, 0),
-               FREQ2FBIN(5600, 0),
--              FREQ2FBIN(5725, 0),
-+              FREQ2FBIN(5700, 0),
-               FREQ2FBIN(5825, 0)
-       },
-       .calTarget_freqbin_5GHT20 = {
-               FREQ2FBIN(5180, 0),
-               FREQ2FBIN(5240, 0),
-               FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-               FREQ2FBIN(5500, 0),
-               FREQ2FBIN(5700, 0),
-               FREQ2FBIN(5745, 0),
--              FREQ2FBIN(5725, 0),
-               FREQ2FBIN(5825, 0)
-       },
-       .calTarget_freqbin_5GHT40 = {
-               FREQ2FBIN(5180, 0),
-               FREQ2FBIN(5240, 0),
-               FREQ2FBIN(5320, 0),
-+              FREQ2FBIN(5400, 0),
-               FREQ2FBIN(5500, 0),
-               FREQ2FBIN(5700, 0),
-               FREQ2FBIN(5745, 0),
--              FREQ2FBIN(5725, 0),
-               FREQ2FBIN(5825, 0)
-        },
-       .calTargetPower5G = {
-               /* 6-24,36,48,54 */
--              { {20, 20, 20, 10} },
--              { {20, 20, 20, 10} },
--              { {20, 20, 20, 10} },
--              { {20, 20, 20, 10} },
--              { {20, 20, 20, 10} },
--              { {20, 20, 20, 10} },
--              { {20, 20, 20, 10} },
--              { {20, 20, 20, 10} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-+              { {30, 30, 28, 24} },
-        },
-       .calTargetPower5GHT20 = {
-               /*
-                * 0_8_16,1-3_9-11_17-19,
-                * 4,5,6,7,12,13,14,15,20,21,22,23
-                */
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 0, 0, 0, 0} },
-+              { {30, 30, 30, 28, 24, 20, 30, 28, 24, 20, 0, 0, 0, 0} },
-+              { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 0, 0, 0, 0} },
-+              { {30, 30, 30, 26, 22, 18, 30, 26, 22, 18, 0, 0, 0, 0} },
-+              { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 0, 0, 0, 0} },
-+              { {30, 30, 30, 24, 20, 16, 30, 24, 20, 16, 0, 0, 0, 0} },
-+              { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 0, 0, 0, 0} },
-+              { {30, 30, 30, 22, 18, 14, 30, 22, 18, 14, 0, 0, 0, 0} },
-        },
-       .calTargetPower5GHT40 =  {
-               /*
-                * 0_8_16,1-3_9-11_17-19,
-                * 4,5,6,7,12,13,14,15,20,21,22,23
-                */
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
--              { {20, 20, 10, 10, 0, 0, 10, 10, 0, 0, 10, 10, 0, 0} },
-+              { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 0, 0, 0, 0} },
-+              { {28, 28, 28, 26, 22, 18, 28, 26, 22, 18, 0, 0, 0, 0} },
-+              { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 0, 0, 0, 0} },
-+              { {28, 28, 28, 24, 20, 16, 28, 24, 20, 16, 0, 0, 0, 0} },
-+              { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 0, 0, 0, 0} },
-+              { {28, 28, 28, 22, 18, 14, 28, 22, 18, 14, 0, 0, 0, 0} },
-+              { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 0, 0, 0, 0} },
-+              { {28, 28, 28, 20, 16, 12, 28, 20, 16, 12, 0, 0, 0, 0} },
-        },
-       .ctlIndex_5G =  {
-               0x10, 0x16, 0x18, 0x40, 0x46,
-@@ -623,6 +2947,28 @@ static const struct ar9300_eeprom ar9300
-        }
- };
- 
-+
-+static const struct ar9300_eeprom *ar9300_eep_templates[] = {
-+      &ar9300_default,
-+      &ar9300_x112,
-+      &ar9300_h116,
-+      &ar9300_h112,
-+      &ar9300_x113,
-+};
-+
-+static const struct ar9300_eeprom *ar9003_eeprom_struct_find_by_id(int id)
-+{
-+#define N_LOOP (sizeof(ar9300_eep_templates) / sizeof(ar9300_eep_templates[0]))
-+      int it;
-+
-+      for (it = 0; it < N_LOOP; it++)
-+              if (ar9300_eep_templates[it]->templateVersion == id)
-+                      return ar9300_eep_templates[it];
-+      return NULL;
-+#undef N_LOOP
-+}
-+
-+
- static u16 ath9k_hw_fbin2freq(u8 fbin, bool is2GHz)
- {
-       if (fbin == AR9300_BCHAN_UNUSED)
-@@ -636,6 +2982,16 @@ static int ath9k_hw_ar9300_check_eeprom(
-       return 0;
- }
- 
-+static int interpolate(int x, int xa, int xb, int ya, int yb)
-+{
-+      int bf, factor, plus;
-+
-+      bf = 2 * (yb - ya) * (x - xa) / (xb - xa);
-+      factor = bf / 2;
-+      plus = bf % 2;
-+      return ya + factor + plus;
-+}
-+
- static u32 ath9k_hw_ar9300_get_eeprom(struct ath_hw *ah,
-                                     enum eeprom_param param)
- {
-@@ -824,6 +3180,7 @@ static int ar9300_compress_decision(stru
- {
-       struct ath_common *common = ath9k_hw_common(ah);
-       u8 *dptr;
-+      const struct ar9300_eeprom *eep = NULL;
- 
-       switch (code) {
-       case _CompressNone:
-@@ -841,13 +3198,14 @@ static int ar9300_compress_decision(stru
-               if (reference == 0) {
-                       dptr = mptr;
-               } else {
--                      if (reference != 2) {
-+                      eep = ar9003_eeprom_struct_find_by_id(reference);
-+                      if (eep == NULL) {
-                               ath_print(common, ATH_DBG_EEPROM,
-                                         "cant find reference eeprom"
-                                         "struct %d\n", reference);
-                               return -1;
-                       }
--                      memcpy(mptr, &ar9300_default, mdata_size);
-+                      memcpy(mptr, eep, mdata_size);
-               }
-               ath_print(common, ATH_DBG_EEPROM,
-                         "restore eeprom %d: block, reference %d,"
-@@ -992,9 +3350,9 @@ static s32 ar9003_hw_xpa_bias_level_get(
- static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
- {
-       int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
--      REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, (bias & 0x3));
--      REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_SPARE,
--                    ((bias >> 2) & 0x3));
-+      REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
-+      REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPABIASLVL_MSB, bias >> 2);
-+      REG_RMW_FIELD(ah, AR_CH0_THERM, AR_CH0_THERM_XPASHORT2GND, 1);
- }
- 
- static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
-@@ -1097,6 +3455,82 @@ static void ar9003_hw_drive_strength_app
-       REG_WRITE(ah, AR_PHY_65NM_CH0_BIAS4, reg);
- }
- 
-+static u16 ar9003_hw_atten_chain_get(struct ath_hw *ah, int chain,
-+                                   struct ath9k_channel *chan)
-+{
-+      int f[3], t[3];
-+      u16 value;
-+      struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+
-+      if (chain >= 0 && chain < 3) {
-+              if (IS_CHAN_2GHZ(chan))
-+                      return eep->modalHeader2G.xatten1DB[chain];
-+              else if (eep->base_ext2.xatten1DBLow[chain] != 0) {
-+                      t[0] = eep->base_ext2.xatten1DBLow[chain];
-+                      f[0] = 5180;
-+                      t[1] = eep->modalHeader5G.xatten1DB[chain];
-+                      f[1] = 5500;
-+                      t[2] = eep->base_ext2.xatten1DBHigh[chain];
-+                      f[2] = 5785;
-+                      value = ar9003_hw_power_interpolate((s32) chan->channel,
-+                                                          f, t, 3);
-+                      return value;
-+              } else
-+                      return eep->modalHeader5G.xatten1DB[chain];
-+      }
-+
-+      return 0;
-+}
-+
-+
-+static u16 ar9003_hw_atten_chain_get_margin(struct ath_hw *ah, int chain,
-+                                          struct ath9k_channel *chan)
-+{
-+      int f[3], t[3];
-+      u16 value;
-+      struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+
-+      if (chain >= 0 && chain < 3) {
-+              if (IS_CHAN_2GHZ(chan))
-+                      return eep->modalHeader2G.xatten1Margin[chain];
-+              else if (eep->base_ext2.xatten1MarginLow[chain] != 0) {
-+                      t[0] = eep->base_ext2.xatten1MarginLow[chain];
-+                      f[0] = 5180;
-+                      t[1] = eep->modalHeader5G.xatten1Margin[chain];
-+                      f[1] = 5500;
-+                      t[2] = eep->base_ext2.xatten1MarginHigh[chain];
-+                      f[2] = 5785;
-+                      value = ar9003_hw_power_interpolate((s32) chan->channel,
-+                                                          f, t, 3);
-+                      return value;
-+              } else
-+                      return eep->modalHeader5G.xatten1Margin[chain];
-+      }
-+
-+      return 0;
-+}
-+
-+static void ar9003_hw_atten_apply(struct ath_hw *ah, struct ath9k_channel *chan)
-+{
-+      int i;
-+      u16 value;
-+      unsigned long ext_atten_reg[3] = {AR_PHY_EXT_ATTEN_CTL_0,
-+                                        AR_PHY_EXT_ATTEN_CTL_1,
-+                                        AR_PHY_EXT_ATTEN_CTL_2,
-+                                       };
-+
-+      /* Test value. if 0 then attenuation is unused. Don't load anything. */
-+      for (i = 0; i < 3; i++) {
-+              value = ar9003_hw_atten_chain_get(ah, i, chan);
-+              REG_RMW_FIELD(ah, ext_atten_reg[i],
-+                            AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value);
-+
-+              value = ar9003_hw_atten_chain_get_margin(ah, i, chan);
-+              REG_RMW_FIELD(ah, ext_atten_reg[i],
-+                            AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN, value);
-+      }
-+}
-+
- static void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
- {
-       int internal_regulator =
-@@ -1128,6 +3562,7 @@ static void ath9k_hw_ar9300_set_board_va
-       ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
-       ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
-       ar9003_hw_drive_strength_apply(ah);
-+      ar9003_hw_atten_apply(ah, chan);
-       ar9003_hw_internal_regulator_apply(ah);
- }
- 
-@@ -1189,7 +3624,7 @@ static int ar9003_hw_power_interpolate(i
-                       if (hx == lx)
-                               y = ly;
-                       else    /* interpolate  */
--                              y = ly + (((x - lx) * (hy - ly)) / (hx - lx));
-+                              y = interpolate(x, lx, hx, ly, hy);
-               } else          /* only low is good, use it */
-                       y = ly;
-       } else if (hhave)       /* only high is good, use it */
-@@ -1637,6 +4072,7 @@ static int ar9003_hw_power_control_overr
- {
-       int tempSlope = 0;
-       struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+      int f[3], t[3];
- 
-       REG_RMW(ah, AR_PHY_TPC_11_B0,
-               (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
-@@ -1665,7 +4101,16 @@ static int ar9003_hw_power_control_overr
-        */
-       if (frequency < 4000)
-               tempSlope = eep->modalHeader2G.tempSlope;
--      else
-+      else if (eep->base_ext2.tempSlopeLow != 0) {
-+              t[0] = eep->base_ext2.tempSlopeLow;
-+              f[0] = 5180;
-+              t[1] = eep->modalHeader5G.tempSlope;
-+              f[1] = 5500;
-+              t[2] = eep->base_ext2.tempSlopeHigh;
-+              f[2] = 5785;
-+              tempSlope = ar9003_hw_power_interpolate((s32) frequency,
-+                                                      f, t, 3);
-+      } else
-               tempSlope = eep->modalHeader5G.tempSlope;
- 
-       REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
-@@ -1769,25 +4214,23 @@ static int ar9003_hw_calibration_apply(s
-                       /* so is the high frequency, interpolate */
-                       if (hfrequency[ichain] - frequency < 1000) {
- 
--                              correction[ichain] = lcorrection[ichain] +
--                                  (((frequency - lfrequency[ichain]) *
--                                    (hcorrection[ichain] -
--                                     lcorrection[ichain])) /
--                                   (hfrequency[ichain] - lfrequency[ichain]));
--
--                              temperature[ichain] = ltemperature[ichain] +
--                                  (((frequency - lfrequency[ichain]) *
--                                    (htemperature[ichain] -
--                                     ltemperature[ichain])) /
--                                   (hfrequency[ichain] - lfrequency[ichain]));
--
--                              voltage[ichain] =
--                                  lvoltage[ichain] +
--                                  (((frequency -
--                                     lfrequency[ichain]) * (hvoltage[ichain] -
--                                                            lvoltage[ichain]))
--                                   / (hfrequency[ichain] -
--                                      lfrequency[ichain]));
-+                              correction[ichain] = interpolate(frequency,
-+                                              lfrequency[ichain],
-+                                              hfrequency[ichain],
-+                                              lcorrection[ichain],
-+                                              hcorrection[ichain]);
-+
-+                              temperature[ichain] = interpolate(frequency,
-+                                              lfrequency[ichain],
-+                                              hfrequency[ichain],
-+                                              ltemperature[ichain],
-+                                              htemperature[ichain]);
-+
-+                              voltage[ichain] = interpolate(frequency,
-+                                              lfrequency[ichain],
-+                                              hfrequency[ichain],
-+                                              lvoltage[ichain],
-+                                              hvoltage[ichain]);
-                       }
-                       /* only low is good, use it */
-                       else {
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
-@@ -236,7 +236,7 @@ struct ar9300_modal_eep_header {
-       u8 thresh62;
-       __le32 papdRateMaskHt20;
-       __le32 papdRateMaskHt40;
--      u8 futureModal[24];
-+      u8 futureModal[10];
- } __packed;
- 
- struct ar9300_cal_data_per_freq_op_loop {
-@@ -274,6 +274,20 @@ struct cal_ctl_data_5g {
-       struct cal_ctl_edge_pwr ctlEdges[AR9300_NUM_BAND_EDGES_5G];
- } __packed;
- 
-+struct ar9300_BaseExtension_1 {
-+      u8 ant_div_control;
-+      u8 future[13];
-+} __packed;
-+
-+struct ar9300_BaseExtension_2 {
-+      int8_t    tempSlopeLow;
-+      int8_t    tempSlopeHigh;
-+      u8   xatten1DBLow[AR9300_MAX_CHAINS];
-+      u8   xatten1MarginLow[AR9300_MAX_CHAINS];
-+      u8   xatten1DBHigh[AR9300_MAX_CHAINS];
-+      u8   xatten1MarginHigh[AR9300_MAX_CHAINS];
-+} __packed;
-+
- struct ar9300_eeprom {
-       u8 eepromVersion;
-       u8 templateVersion;
-@@ -283,6 +297,7 @@ struct ar9300_eeprom {
-       struct ar9300_base_eep_hdr baseEepHeader;
- 
-       struct ar9300_modal_eep_header modalHeader2G;
-+      struct ar9300_BaseExtension_1 base_ext1;
-       u8 calFreqPier2G[AR9300_NUM_2G_CAL_PIERS];
-       struct ar9300_cal_data_per_freq_op_loop
-        calPierData2G[AR9300_MAX_CHAINS][AR9300_NUM_2G_CAL_PIERS];
-@@ -302,6 +317,7 @@ struct ar9300_eeprom {
-       u8 ctl_freqbin_2G[AR9300_NUM_CTLS_2G][AR9300_NUM_BAND_EDGES_2G];
-       struct cal_ctl_data_2g ctlPowerData_2G[AR9300_NUM_CTLS_2G];
-       struct ar9300_modal_eep_header modalHeader5G;
-+      struct ar9300_BaseExtension_2 base_ext2;
-       u8 calFreqPier5G[AR9300_NUM_5G_CAL_PIERS];
-       struct ar9300_cal_data_per_freq_op_loop
-        calPierData5G[AR9300_MAX_CHAINS][AR9300_NUM_5G_CAL_PIERS];
---- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-@@ -410,12 +410,36 @@ static void ar9003_hw_set11n_ratescenari
- static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
-                                       u32 aggrLen)
- {
-+#define FIRST_DESC_NDELIMS 60
-       struct ar9003_txc *ads = (struct ar9003_txc *) ds;
- 
-       ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
- 
--      ads->ctl17 &= ~AR_AggrLen;
--      ads->ctl17 |= SM(aggrLen, AR_AggrLen);
-+      if (ah->ent_mode & AR_ENT_OTP_MPSD) {
-+              u32 ctl17, ndelim;
-+              /*
-+               * Add delimiter when using RTS/CTS with aggregation
-+               * and non enterprise AR9003 card
-+               */
-+              ctl17 = ads->ctl17;
-+              ndelim = MS(ctl17, AR_PadDelim);
-+
-+              if (ndelim < FIRST_DESC_NDELIMS) {
-+                      aggrLen += (FIRST_DESC_NDELIMS - ndelim) * 4;
-+                      ndelim = FIRST_DESC_NDELIMS;
-+              }
-+
-+              ctl17 &= ~AR_AggrLen;
-+              ctl17 |= SM(aggrLen, AR_AggrLen);
-+
-+              ctl17 &= ~AR_PadDelim;
-+              ctl17 |= SM(ndelim, AR_PadDelim);
-+
-+              ads->ctl17 = ctl17;
-+      } else {
-+              ads->ctl17 &= ~AR_AggrLen;
-+              ads->ctl17 |= SM(aggrLen, AR_AggrLen);
-+      }
- }
- 
- static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-@@ -1113,6 +1113,37 @@ static void ar9003_hw_ani_cache_ini_regs
-       aniState->mrcCCKOff = !ATH9K_ANI_ENABLE_MRC_CCK;
- }
- 
-+static void ar9003_hw_set_radar_params(struct ath_hw *ah,
-+                                     struct ath_hw_radar_conf *conf)
-+{
-+      u32 radar_0 = 0, radar_1 = 0;
-+
-+      if (!conf) {
-+              REG_CLR_BIT(ah, AR_PHY_RADAR_0, AR_PHY_RADAR_0_ENA);
-+              return;
-+      }
-+
-+      radar_0 |= AR_PHY_RADAR_0_ENA | AR_PHY_RADAR_0_FFT_ENA;
-+      radar_0 |= SM(conf->fir_power, AR_PHY_RADAR_0_FIRPWR);
-+      radar_0 |= SM(conf->radar_rssi, AR_PHY_RADAR_0_RRSSI);
-+      radar_0 |= SM(conf->pulse_height, AR_PHY_RADAR_0_HEIGHT);
-+      radar_0 |= SM(conf->pulse_rssi, AR_PHY_RADAR_0_PRSSI);
-+      radar_0 |= SM(conf->pulse_inband, AR_PHY_RADAR_0_INBAND);
-+
-+      radar_1 |= AR_PHY_RADAR_1_MAX_RRSSI;
-+      radar_1 |= AR_PHY_RADAR_1_BLOCK_CHECK;
-+      radar_1 |= SM(conf->pulse_maxlen, AR_PHY_RADAR_1_MAXLEN);
-+      radar_1 |= SM(conf->pulse_inband_step, AR_PHY_RADAR_1_RELSTEP_THRESH);
-+      radar_1 |= SM(conf->radar_inband, AR_PHY_RADAR_1_RELPWR_THRESH);
-+
-+      REG_WRITE(ah, AR_PHY_RADAR_0, radar_0);
-+      REG_WRITE(ah, AR_PHY_RADAR_1, radar_1);
-+      if (conf->ext_channel)
-+              REG_SET_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
-+      else
-+              REG_CLR_BIT(ah, AR_PHY_RADAR_EXT, AR_PHY_RADAR_EXT_ENA);
-+}
-+
- void ar9003_hw_attach_phy_ops(struct ath_hw *ah)
- {
-       struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
-@@ -1141,6 +1172,7 @@ void ar9003_hw_attach_phy_ops(struct ath
-       priv_ops->ani_control = ar9003_hw_ani_control;
-       priv_ops->do_getnf = ar9003_hw_do_getnf;
-       priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs;
-+      priv_ops->set_radar_params = ar9003_hw_set_radar_params;
- 
-       ar9003_hw_set_nf_limits(ah);
-       memcpy(ah->nf_regs, ar9300_cca_regs, sizeof(ah->nf_regs));
---- a/drivers/net/wireless/ath/ath9k/ath9k.h
-+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -177,8 +177,8 @@ void ath_descdma_cleanup(struct ath_soft
- 
- /* returns delimiter padding required given the packet length */
- #define ATH_AGGR_GET_NDELIM(_len)                                     \
--      (((((_len) + ATH_AGGR_DELIM_SZ) < ATH_AGGR_MINPLEN) ?           \
--        (ATH_AGGR_MINPLEN - (_len) - ATH_AGGR_DELIM_SZ) : 0) >> 2)
-+       (((_len) >= ATH_AGGR_MINPLEN) ? 0 :                             \
-+        DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
- 
- #define BAW_WITHIN(_start, _bawsz, _seqno) \
-       ((((_seqno) - (_start)) & 4095) < (_bawsz))
-@@ -229,6 +229,7 @@ struct ath_buf_state {
-       unsigned long bfs_paprd_timestamp;
-       u32 bfs_keyix;
-       enum ath9k_key_type bfs_keytype;
-+      enum ath9k_internal_frame_type bfs_ftype;
- };
- 
- struct ath_buf {
-@@ -712,7 +713,7 @@ void ath9k_ps_restore(struct ath_softc *
- void ath9k_set_bssid_mask(struct ieee80211_hw *hw, struct ieee80211_vif *vif);
- int ath9k_wiphy_add(struct ath_softc *sc);
- int ath9k_wiphy_del(struct ath_wiphy *aphy);
--void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb);
-+void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, int ftype);
- int ath9k_wiphy_pause(struct ath_wiphy *aphy);
- int ath9k_wiphy_unpause(struct ath_wiphy *aphy);
- int ath9k_wiphy_select(struct ath_wiphy *aphy);
---- a/drivers/net/wireless/ath/ath9k/hw.c
-+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -1991,6 +1991,9 @@ int ath9k_hw_fill_cap_info(struct ath_hw
-       if (AR_SREV_9300_20_OR_LATER(ah))
-               pCap->hw_caps |= ATH9K_HW_CAP_RAC_SUPPORTED;
- 
-+      if (AR_SREV_9300_20_OR_LATER(ah))
-+              ah->ent_mode = REG_READ(ah, AR_ENT_OTP);
-+
-       if (AR_SREV_9287_11_OR_LATER(ah) || AR_SREV_9271(ah))
-               pCap->hw_caps |= ATH9K_HW_CAP_SGI_20;
- 
---- a/drivers/net/wireless/ath/ath9k/hw.h
-+++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -485,6 +485,40 @@ struct ath_hw_antcomb_conf {
- };
- 
- /**
-+ * struct ath_hw_radar_conf - radar detection initialization parameters
-+ *
-+ * @pulse_inband: threshold for checking the ratio of in-band power
-+ *    to total power for short radar pulses (half dB steps)
-+ * @pulse_inband_step: threshold for checking an in-band power to total
-+ *    power ratio increase for short radar pulses (half dB steps)
-+ * @pulse_height: threshold for detecting the beginning of a short
-+ *    radar pulse (dB step)
-+ * @pulse_rssi: threshold for detecting if a short radar pulse is
-+ *    gone (dB step)
-+ * @pulse_maxlen: maximum pulse length (0.8 us steps)
-+ *
-+ * @radar_rssi: RSSI threshold for starting long radar detection (dB steps)
-+ * @radar_inband: threshold for checking the ratio of in-band power
-+ *    to total power for long radar pulses (half dB steps)
-+ * @fir_power: threshold for detecting the end of a long radar pulse (dB)
-+ *
-+ * @ext_channel: enable extension channel radar detection
-+ */
-+struct ath_hw_radar_conf {
-+      unsigned int pulse_inband;
-+      unsigned int pulse_inband_step;
-+      unsigned int pulse_height;
-+      unsigned int pulse_rssi;
-+      unsigned int pulse_maxlen;
-+
-+      unsigned int radar_rssi;
-+      unsigned int radar_inband;
-+      int fir_power;
-+
-+      bool ext_channel;
-+};
-+
-+/**
-  * struct ath_hw_private_ops - callbacks used internally by hardware code
-  *
-  * This structure contains private callbacks designed to only be used internally
-@@ -549,6 +583,8 @@ struct ath_hw_private_ops {
-       bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd,
-                           int param);
-       void (*do_getnf)(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]);
-+      void (*set_radar_params)(struct ath_hw *ah,
-+                               struct ath_hw_radar_conf *conf);
- 
-       /* ANI */
-       void (*ani_cache_ini_regs)(struct ath_hw *ah);
-@@ -806,6 +842,9 @@ struct ath_hw {
-        * this register when in sleep states.
-        */
-       u32 WARegVal;
-+
-+      /* Enterprise mode cap */
-+      u32 ent_mode;
- };
- 
- static inline struct ath_common *ath9k_hw_common(struct ath_hw *ah)
---- a/drivers/net/wireless/ath/ath9k/rc.c
-+++ b/drivers/net/wireless/ath/ath9k/rc.c
-@@ -1354,23 +1354,7 @@ static void ath_tx_status(void *priv, st
-               tx_info->status.ampdu_len = 1;
-       }
- 
--      /*
--       * If an underrun error is seen assume it as an excessive retry only
--       * if max frame trigger level has been reached (2 KB for singel stream,
--       * and 4 KB for dual stream). Adjust the long retry as if the frame was
--       * tried hw->max_rate_tries times to affect how ratectrl updates PER for
--       * the failed rate. In case of congestion on the bus penalizing these
--       * type of underruns should help hardware actually transmit new frames
--       * successfully by eventually preferring slower rates. This itself
--       * should also alleviate congestion on the bus.
--       */
--      if ((tx_info->pad[0] & ATH_TX_INFO_UNDERRUN) &&
--          (sc->sc_ah->tx_trig_level >= ath_rc_priv->tx_triglevel_max)) {
--              tx_status = 1;
--              is_underrun = 1;
--      }
--
--      if (tx_info->pad[0] & ATH_TX_INFO_XRETRY)
-+      if (!(tx_info->flags & IEEE80211_TX_STAT_ACK))
-               tx_status = 1;
- 
-       ath_rc_tx_status(sc, ath_rc_priv, tx_info, final_ts_idx, tx_status,
-@@ -1596,8 +1580,6 @@ static void *ath_rate_alloc_sta(void *pr
-               return NULL;
-       }
- 
--      rate_priv->tx_triglevel_max = sc->sc_ah->caps.tx_triglevel_max;
--
-       return rate_priv;
- }
- 
---- a/drivers/net/wireless/ath/ath9k/rc.h
-+++ b/drivers/net/wireless/ath/ath9k/rc.h
-@@ -215,7 +215,6 @@ struct ath_rate_priv {
-       u32 per_down_time;
-       u32 probe_interval;
-       u32 prev_data_rix;
--      u32 tx_triglevel_max;
-       struct ath_rateset neg_rates;
-       struct ath_rateset neg_ht_rates;
-       struct ath_rate_softc *asc;
-@@ -225,11 +224,6 @@ struct ath_rate_priv {
-       struct ath_rc_stats rcstats[RATE_TABLE_SIZE];
- };
- 
--#define ATH_TX_INFO_FRAME_TYPE_INTERNAL       (1 << 0)
--#define ATH_TX_INFO_FRAME_TYPE_PAUSE  (1 << 1)
--#define ATH_TX_INFO_XRETRY            (1 << 3)
--#define ATH_TX_INFO_UNDERRUN          (1 << 4)
--
- enum ath9k_internal_frame_type {
-       ATH9K_IFT_NOT_INTERNAL,
-       ATH9K_IFT_PAUSE,
---- a/drivers/net/wireless/ath/ath9k/reg.h
-+++ b/drivers/net/wireless/ath/ath9k/reg.h
-@@ -1066,6 +1066,9 @@ enum {
- #define AR_INTR_PRIO_ASYNC_MASK   0x40c8
- #define AR_INTR_PRIO_SYNC_MASK    0x40cc
- #define AR_INTR_PRIO_ASYNC_ENABLE 0x40d4
-+#define AR_ENT_OTP              0x40d8
-+#define AR_ENT_OTP_CHAIN2_DISABLE               0x00020000
-+#define AR_ENT_OTP_MPSD               0x00800000
- 
- #define AR_RTC_9300_PLL_DIV          0x000003ff
- #define AR_RTC_9300_PLL_DIV_S        0
---- a/drivers/net/wireless/ath/ath9k/virtual.c
-+++ b/drivers/net/wireless/ath/ath9k/virtual.c
-@@ -305,13 +305,12 @@ void ath9k_wiphy_chan_work(struct work_s
-  * ath9k version of ieee80211_tx_status() for TX frames that are generated
-  * internally in the driver.
-  */
--void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb)
-+void ath9k_tx_status(struct ieee80211_hw *hw, struct sk_buff *skb, int ftype)
- {
-       struct ath_wiphy *aphy = hw->priv;
-       struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
- 
--      if ((tx_info->pad[0] & ATH_TX_INFO_FRAME_TYPE_PAUSE) &&
--          aphy->state == ATH_WIPHY_PAUSING) {
-+      if (ftype == ATH9K_IFT_PAUSE && aphy->state == ATH_WIPHY_PAUSING) {
-               if (!(tx_info->flags & IEEE80211_TX_STAT_ACK)) {
-                       printk(KERN_DEBUG "ath9k: %s: no ACK for pause "
-                              "frame\n", wiphy_name(hw->wiphy));
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -48,9 +48,9 @@ static u16 bits_per_symbol[][2] = {
- 
- #define IS_HT_RATE(_rate)     ((_rate) & 0x80)
- 
--static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq,
--                                struct ath_atx_tid *tid,
--                                struct list_head *bf_head);
-+static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
-+                             struct ath_atx_tid *tid,
-+                             struct list_head *bf_head);
- static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf,
-                               struct ath_txq *txq, struct list_head *bf_q,
-                               struct ath_tx_status *ts, int txok, int sendbar);
-@@ -160,7 +160,7 @@ static void ath_tx_flush_tid(struct ath_
-                       ath_tx_update_baw(sc, tid, bf->bf_seqno);
-                       ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0, 0);
-               } else {
--                      ath_tx_send_ht_normal(sc, txq, tid, &bf_head);
-+                      ath_tx_send_normal(sc, txq, tid, &bf_head);
-               }
-       }
- 
-@@ -1322,9 +1322,9 @@ static void ath_tx_send_ampdu(struct ath
-       ath_tx_txqaddbuf(sc, txctl->txq, bf_head);
- }
- 
--static void ath_tx_send_ht_normal(struct ath_softc *sc, struct ath_txq *txq,
--                                struct ath_atx_tid *tid,
--                                struct list_head *bf_head)
-+static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
-+                             struct ath_atx_tid *tid,
-+                             struct list_head *bf_head)
- {
-       struct ath_buf *bf;
- 
-@@ -1332,7 +1332,8 @@ static void ath_tx_send_ht_normal(struct
-       bf->bf_state.bf_type &= ~BUF_AMPDU;
- 
-       /* update starting sequence number for subsequent ADDBA request */
--      INCR(tid->seq_start, IEEE80211_SEQ_MAX);
-+      if (tid)
-+              INCR(tid->seq_start, IEEE80211_SEQ_MAX);
- 
-       bf->bf_nframes = 1;
-       bf->bf_lastbf = bf;
-@@ -1341,20 +1342,6 @@ static void ath_tx_send_ht_normal(struct
-       TX_STAT_INC(txq->axq_qnum, queued);
- }
- 
--static void ath_tx_send_normal(struct ath_softc *sc, struct ath_txq *txq,
--                             struct list_head *bf_head)
--{
--      struct ath_buf *bf;
--
--      bf = list_first_entry(bf_head, struct ath_buf, list);
--
--      bf->bf_lastbf = bf;
--      bf->bf_nframes = 1;
--      ath_buf_set_rate(sc, bf);
--      ath_tx_txqaddbuf(sc, txq, bf_head);
--      TX_STAT_INC(txq->axq_qnum, queued);
--}
--
- static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
- {
-       struct ieee80211_hdr *hdr;
-@@ -1411,7 +1398,7 @@ static void assign_aggr_tid_seqno(struct
-       INCR(tid->seq_next, IEEE80211_SEQ_MAX);
- }
- 
--static int setup_tx_flags(struct sk_buff *skb, bool use_ldpc)
-+static int setup_tx_flags(struct sk_buff *skb)
- {
-       struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
-       int flags = 0;
-@@ -1422,7 +1409,7 @@ static int setup_tx_flags(struct sk_buff
-       if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
-               flags |= ATH9K_TXDESC_NOACK;
- 
--      if (use_ldpc)
-+      if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
-               flags |= ATH9K_TXDESC_LDPC;
- 
-       return flags;
-@@ -1567,30 +1554,25 @@ static void ath_buf_set_rate(struct ath_
-               ath9k_hw_set11n_burstduration(sc->sc_ah, bf->bf_desc, 8192);
- }
- 
--static int ath_tx_setup_buffer(struct ieee80211_hw *hw, struct ath_buf *bf,
--                              struct sk_buff *skb,
--                              struct ath_tx_control *txctl)
-+static struct ath_buf *ath_tx_setup_buffer(struct ieee80211_hw *hw,
-+                                         struct sk_buff *skb)
- {
-       struct ath_wiphy *aphy = hw->priv;
-       struct ath_softc *sc = aphy->sc;
-+      struct ath_common *common = ath9k_hw_common(sc->sc_ah);
-       struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
-       struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
-+      struct ath_buf *bf;
-       int hdrlen;
-       __le16 fc;
-       int padpos, padsize;
--      bool use_ldpc = false;
- 
--      tx_info->pad[0] = 0;
--      switch (txctl->frame_type) {
--      case ATH9K_IFT_NOT_INTERNAL:
--              break;
--      case ATH9K_IFT_PAUSE:
--              tx_info->pad[0] |= ATH_TX_INFO_FRAME_TYPE_PAUSE;
--              /* fall through */
--      case ATH9K_IFT_UNPAUSE:
--              tx_info->pad[0] |= ATH_TX_INFO_FRAME_TYPE_INTERNAL;
--              break;
-+      bf = ath_tx_get_buffer(sc);
-+      if (!bf) {
-+              ath_print(common, ATH_DBG_XMIT, "TX buffers are full\n");
-+              return NULL;
-       }
-+
-       hdrlen = ieee80211_get_hdrlen_from_skb(skb);
-       fc = hdr->frame_control;
- 
-@@ -1605,16 +1587,13 @@ static int ath_tx_setup_buffer(struct ie
-               bf->bf_frmlen -= padsize;
-       }
- 
--      if (!txctl->paprd && conf_is_ht(&hw->conf)) {
-+      if (ieee80211_is_data_qos(fc) && conf_is_ht(&hw->conf)) {
-               bf->bf_state.bf_type |= BUF_HT;
--              if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
--                      use_ldpc = true;
-+              if (sc->sc_flags & SC_OP_TXAGGR)
-+                      assign_aggr_tid_seqno(skb, bf);
-       }
- 
--      bf->bf_state.bfs_paprd = txctl->paprd;
--      if (txctl->paprd)
--              bf->bf_state.bfs_paprd_timestamp = jiffies;
--      bf->bf_flags = setup_tx_flags(skb, use_ldpc);
-+      bf->bf_flags = setup_tx_flags(skb);
- 
-       bf->bf_keytype = ath9k_cmn_get_hw_crypto_keytype(skb);
-       if (bf->bf_keytype != ATH9K_KEY_TYPE_CLEAR) {
-@@ -1624,10 +1603,6 @@ static int ath_tx_setup_buffer(struct ie
-               bf->bf_keyix = ATH9K_TXKEYIX_INVALID;
-       }
- 
--      if (ieee80211_is_data_qos(fc) && bf_isht(bf) &&
--          (sc->sc_flags & SC_OP_TXAGGR))
--              assign_aggr_tid_seqno(skb, bf);
--
-       bf->bf_mpdu = skb;
- 
-       bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
-@@ -1637,12 +1612,13 @@ static int ath_tx_setup_buffer(struct ie
-               bf->bf_buf_addr = 0;
-               ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
-                         "dma_mapping_error() on TX\n");
--              return -ENOMEM;
-+              ath_tx_return_buffer(sc, bf);
-+              return NULL;
-       }
- 
-       bf->bf_tx_aborted = false;
- 
--      return 0;
-+      return bf;
- }
- 
- /* FIXME: tx power */
-@@ -1690,11 +1666,6 @@ static void ath_tx_start_dma(struct ath_
-               an = (struct ath_node *)tx_info->control.sta->drv_priv;
-               tid = ATH_AN_2_TID(an, bf->bf_tidno);
- 
--              if (!ieee80211_is_data_qos(fc)) {
--                      ath_tx_send_normal(sc, txctl->txq, &bf_head);
--                      goto tx_done;
--              }
--
-               WARN_ON(tid->ac->txq != txctl->txq);
-               if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
-                       /*
-@@ -1707,14 +1678,18 @@ static void ath_tx_start_dma(struct ath_
-                        * Send this frame as regular when ADDBA
-                        * exchange is neither complete nor pending.
-                        */
--                      ath_tx_send_ht_normal(sc, txctl->txq,
--                                            tid, &bf_head);
-+                      ath_tx_send_normal(sc, txctl->txq, tid, &bf_head);
-               }
-       } else {
--              ath_tx_send_normal(sc, txctl->txq, &bf_head);
-+              bf->bf_state.bfs_ftype = txctl->frame_type;
-+              bf->bf_state.bfs_paprd = txctl->paprd;
-+
-+              if (txctl->paprd)
-+                      bf->bf_state.bfs_paprd_timestamp = jiffies;
-+
-+              ath_tx_send_normal(sc, txctl->txq, NULL, &bf_head);
-       }
- 
--tx_done:
-       spin_unlock_bh(&txctl->txq->axq_lock);
- }
- 
-@@ -1724,39 +1699,15 @@ int ath_tx_start(struct ieee80211_hw *hw
- {
-       struct ath_wiphy *aphy = hw->priv;
-       struct ath_softc *sc = aphy->sc;
--      struct ath_common *common = ath9k_hw_common(sc->sc_ah);
-       struct ath_txq *txq = txctl->txq;
-       struct ath_buf *bf;
--      int q, r;
-+      int q;
- 
--      bf = ath_tx_get_buffer(sc);
--      if (!bf) {
--              ath_print(common, ATH_DBG_XMIT, "TX buffers are full\n");
--              return -1;
--      }
-+      bf = ath_tx_setup_buffer(hw, skb);
-+      if (unlikely(!bf))
-+              return -ENOMEM;
- 
-       q = skb_get_queue_mapping(skb);
--      r = ath_tx_setup_buffer(hw, bf, skb, txctl);
--      if (unlikely(r)) {
--              ath_print(common, ATH_DBG_FATAL, "TX mem alloc failure\n");
--
--              /* upon ath_tx_processq() this TX queue will be resumed, we
--               * guarantee this will happen by knowing beforehand that
--               * we will at least have to run TX completionon one buffer
--               * on the queue */
--              spin_lock_bh(&txq->axq_lock);
--              if (txq == sc->tx.txq_map[q] && !txq->stopped &&
--                  txq->axq_depth > 1) {
--                      ath_mac80211_stop_queue(sc, q);
--                      txq->stopped = 1;
--              }
--              spin_unlock_bh(&txq->axq_lock);
--
--              ath_tx_return_buffer(sc, bf);
--
--              return r;
--      }
--
-       spin_lock_bh(&txq->axq_lock);
-       if (txq == sc->tx.txq_map[q] &&
-           ++txq->pending_frames > ATH_MAX_QDEPTH && !txq->stopped) {
-@@ -1828,7 +1779,7 @@ exit:
- /*****************/
- 
- static void ath_tx_complete(struct ath_softc *sc, struct sk_buff *skb,
--                          struct ath_wiphy *aphy, int tx_flags,
-+                          struct ath_wiphy *aphy, int tx_flags, int ftype,
-                           struct ath_txq *txq)
- {
-       struct ieee80211_hw *hw = sc->hw;
-@@ -1872,8 +1823,8 @@ static void ath_tx_complete(struct ath_s
-                                       PS_WAIT_FOR_TX_ACK));
-       }
- 
--      if (unlikely(tx_info->pad[0] & ATH_TX_INFO_FRAME_TYPE_INTERNAL))
--              ath9k_tx_status(hw, skb);
-+      if (unlikely(ftype))
-+              ath9k_tx_status(hw, skb, ftype);
-       else {
-               q = skb_get_queue_mapping(skb);
-               if (txq == sc->tx.txq_map[q]) {
-@@ -1917,7 +1868,8 @@ static void ath_tx_complete_buf(struct a
-                       complete(&sc->paprd_complete);
-       } else {
-               ath_debug_stat_tx(sc, bf, ts);
--              ath_tx_complete(sc, skb, bf->aphy, tx_flags, txq);
-+              ath_tx_complete(sc, skb, bf->aphy, tx_flags,
-+                              bf->bf_state.bfs_ftype, txq);
-       }
-       /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't
-        * accidentally reference it later.
-@@ -1968,6 +1920,8 @@ static void ath_tx_rc_status(struct ath_
-       struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
-       struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
-       struct ieee80211_hw *hw = bf->aphy->hw;
-+      struct ath_softc *sc = bf->aphy->sc;
-+      struct ath_hw *ah = sc->sc_ah;
-       u8 i, tx_rateindex;
- 
-       if (txok)
-@@ -1989,14 +1943,24 @@ static void ath_tx_rc_status(struct ath_
- 
-       if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 &&
-           (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) {
--              if (ieee80211_is_data(hdr->frame_control)) {
--                      if (ts->ts_flags &
--                          (ATH9K_TX_DATA_UNDERRUN | ATH9K_TX_DELIM_UNDERRUN))
--                              tx_info->pad[0] |= ATH_TX_INFO_UNDERRUN;
--                      if ((ts->ts_status & ATH9K_TXERR_XRETRY) ||
--                          (ts->ts_status & ATH9K_TXERR_FIFO))
--                              tx_info->pad[0] |= ATH_TX_INFO_XRETRY;
--              }
-+              /*
-+               * If an underrun error is seen assume it as an excessive
-+               * retry only if max frame trigger level has been reached
-+               * (2 KB for single stream, and 4 KB for dual stream).
-+               * Adjust the long retry as if the frame was tried
-+               * hw->max_rate_tries times to affect how rate control updates
-+               * PER for the failed rate.
-+               * In case of congestion on the bus penalizing this type of
-+               * underruns should help hardware actually transmit new frames
-+               * successfully by eventually preferring slower rates.
-+               * This itself should also alleviate congestion on the bus.
-+               */
-+              if (ieee80211_is_data(hdr->frame_control) &&
-+                  (ts->ts_flags & (ATH9K_TX_DATA_UNDERRUN |
-+                                   ATH9K_TX_DELIM_UNDERRUN)) &&
-+                  ah->tx_trig_level >= sc->sc_ah->caps.tx_triglevel_max)
-+                      tx_info->status.rates[tx_rateindex].count =
-+                              hw->max_rate_tries;
-       }
- 
-       for (i = tx_rateindex + 1; i < hw->max_rates; i++) {

diff --git a/package/mac80211/patches/520-ath9k_fix_paprd.patch b/package/mac80211/patches/520-ath9k_fix_paprd.patch
deleted file mode 100644 (file)
index 718d2da..0000000
--- a/package/mac80211/patches/520-ath9k_fix_paprd.patch
+++ /dev/null
@@ -1,22 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -1656,9 +1656,6 @@ static void ath_tx_start_dma(struct ath_
-                           bf->bf_buf_addr,
-                           txctl->txq->axq_qnum);
- 
--      if (bf->bf_state.bfs_paprd)
--              ar9003_hw_set_paprd_txdesc(ah, ds, bf->bf_state.bfs_paprd);
--
-       spin_lock_bh(&txctl->txq->axq_lock);
- 
-       if (bf_isht(bf) && (sc->sc_flags & SC_OP_TXAGGR) &&
-@@ -1684,6 +1681,9 @@ static void ath_tx_start_dma(struct ath_
-               bf->bf_state.bfs_ftype = txctl->frame_type;
-               bf->bf_state.bfs_paprd = txctl->paprd;
- 
-+              if (bf->bf_state.bfs_paprd)
-+                      ar9003_hw_set_paprd_txdesc(ah, ds, bf->bf_state.bfs_paprd);
-+
-               if (txctl->paprd)
-                       bf->bf_state.bfs_paprd_timestamp = jiffies;
- 

diff --git a/package/mac80211/patches/530-ath9k_otp_rom.patch b/package/mac80211/patches/530-ath9k_otp_rom.patch
deleted file mode 100644 (file)
index 81f8de5..0000000
--- a/package/mac80211/patches/530-ath9k_otp_rom.patch
+++ /dev/null
@@ -1,149 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -3104,6 +3104,36 @@ error:
-       return false;
- }
- 
-+static bool ar9300_otp_read_word(struct ath_hw *ah, int addr, u32 *data)
-+{
-+      REG_READ(ah, AR9300_OTP_BASE + (4 * addr));
-+
-+      if (!ath9k_hw_wait(ah, AR9300_OTP_STATUS, AR9300_OTP_STATUS_TYPE,
-+                         AR9300_OTP_STATUS_VALID, 1000))
-+              return false;
-+
-+      *data = REG_READ(ah, AR9300_OTP_READ_DATA);
-+      return true;
-+}
-+
-+static bool ar9300_read_otp(struct ath_hw *ah, int address, u8 *buffer,
-+                          int count)
-+{
-+      u32 data;
-+      int i;
-+
-+      for (i = 0; i < count; i++) {
-+              int offset = 8 * ((address - i) % 4);
-+              if (!ar9300_otp_read_word(ah, (address - i) / 4, &data))
-+                      return false;
-+
-+              buffer[i] = (data >> offset) & 0xff;
-+      }
-+
-+      return true;
-+}
-+
-+
- static void ar9300_comp_hdr_unpack(u8 *best, int *code, int *reference,
-                                  int *length, int *major, int *minor)
- {
-@@ -3221,6 +3251,26 @@ static int ar9300_compress_decision(stru
-       return 0;
- }
- 
-+typedef bool (*eeprom_read_op)(struct ath_hw *ah, int address, u8 *buffer,
-+                             int count);
-+
-+static bool ar9300_check_header(void *data)
-+{
-+      u32 *word = data;
-+      return !(*word == 0 || *word == ~0);
-+}
-+
-+static bool ar9300_check_eeprom_header(struct ath_hw *ah, eeprom_read_op read,
-+                                     int base_addr)
-+{
-+      u8 header[4];
-+
-+      if (!read(ah, base_addr, header, 4))
-+              return false;
-+
-+      return ar9300_check_header(header);
-+}
-+
- /*
-  * Read the configuration data from the eeprom.
-  * The data can be put in any specified memory buffer.
-@@ -3241,6 +3291,7 @@ static int ar9300_eeprom_restore_interna
-       int it;
-       u16 checksum, mchecksum;
-       struct ath_common *common = ath9k_hw_common(ah);
-+      eeprom_read_op read;
- 
-       word = kzalloc(2048, GFP_KERNEL);
-       if (!word)
-@@ -3248,14 +3299,42 @@ static int ar9300_eeprom_restore_interna
- 
-       memcpy(mptr, &ar9300_default, mdata_size);
- 
-+      read = ar9300_read_eeprom;
-       cptr = AR9300_BASE_ADDR;
-+      ath_print(common, ATH_DBG_EEPROM,
-+              "Trying EEPROM accesss at Address 0x%04x\n", cptr);
-+      if (ar9300_check_eeprom_header(ah, read, cptr))
-+              goto found;
-+
-+      cptr = AR9300_BASE_ADDR_512;
-+      ath_print(common, ATH_DBG_EEPROM,
-+              "Trying EEPROM accesss at Address 0x%04x\n", cptr);
-+      if (ar9300_check_eeprom_header(ah, read, cptr))
-+              goto found;
-+
-+      read = ar9300_read_otp;
-+      cptr = AR9300_BASE_ADDR;
-+      ath_print(common, ATH_DBG_EEPROM,
-+              "Trying OTP accesss at Address 0x%04x\n", cptr);
-+      if (ar9300_check_eeprom_header(ah, read, cptr))
-+              goto found;
-+
-+      cptr = AR9300_BASE_ADDR_512;
-+      ath_print(common, ATH_DBG_EEPROM,
-+              "Trying OTP accesss at Address 0x%04x\n", cptr);
-+      if (ar9300_check_eeprom_header(ah, read, cptr))
-+              goto found;
-+
-+      goto fail;
-+
-+found:
-+      ath_print(common, ATH_DBG_EEPROM, "Found valid EEPROM data");
-+
-       for (it = 0; it < MSTATE; it++) {
--              if (!ar9300_read_eeprom(ah, cptr, word, COMP_HDR_LEN))
-+              if (!read(ah, cptr, word, COMP_HDR_LEN))
-                       goto fail;
- 
--              if ((word[0] == 0 && word[1] == 0 && word[2] == 0 &&
--                   word[3] == 0) || (word[0] == 0xff && word[1] == 0xff
--                                     && word[2] == 0xff && word[3] == 0xff))
-+              if (!ar9300_check_header(word))
-                       break;
- 
-               ar9300_comp_hdr_unpack(word, &code, &reference,
-@@ -3272,8 +3351,7 @@ static int ar9300_eeprom_restore_interna
-               }
- 
-               osize = length;
--              ar9300_read_eeprom(ah, cptr, word,
--                                 COMP_HDR_LEN + osize + COMP_CKSUM_LEN);
-+              read(ah, cptr, word, COMP_HDR_LEN + osize + COMP_CKSUM_LEN);
-               checksum = ar9300_comp_cksum(&word[COMP_HDR_LEN], length);
-               mchecksum = word[COMP_HDR_LEN + osize] |
-                   (word[COMP_HDR_LEN + osize + 1] << 8);
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.h
-@@ -79,6 +79,15 @@
- #define FIXED_CCA_THRESHOLD 15
- 
- #define AR9300_BASE_ADDR 0x3ff
-+#define AR9300_BASE_ADDR_512 0x1ff
-+
-+#define AR9300_OTP_BASE                       0x14000
-+#define AR9300_OTP_STATUS             0x15f18
-+#define AR9300_OTP_STATUS_TYPE                0x7
-+#define AR9300_OTP_STATUS_VALID               0x4
-+#define AR9300_OTP_STATUS_ACCESS_BUSY 0x2
-+#define AR9300_OTP_STATUS_SM_BUSY     0x1
-+#define AR9300_OTP_READ_DATA          0x15f1c
- 
- enum targetPowerHTRates {
-       HT_TARGET_RATE_0_8_16,

diff --git a/package/mac80211/patches/601-rt2x00-fix-hang-on-ifdown.patch b/package/mac80211/patches/601-rt2x00-fix-hang-on-ifdown.patch
index 75e9c9f..50658f1 100644 (file)
--- a/package/mac80211/patches/601-rt2x00-fix-hang-on-ifdown.patch
+++ b/package/mac80211/patches/601-rt2x00-fix-hang-on-ifdown.patch
@@ -16,7 +16,7 @@ Signed-off-by: Helmut Schaa <helmut.schaa@googlemail.com>
 
 --- a/drivers/net/wireless/rt2x00/rt2800pci.c
 +++ b/drivers/net/wireless/rt2x00/rt2800pci.c
-@@ -590,6 +590,10 @@ static void rt2800pci_kill_tx_queue(stru
+@@ -592,6 +592,10 @@ static void rt2800pci_kill_tx_queue(stru
                return;
        }
  

diff --git a/package/mac80211/patches/700-mwl8k-missing-pci-id-for-WNR854T.patch b/package/mac80211/patches/700-mwl8k-missing-pci-id-for-WNR854T.patch
index 6e75048..14a9947 100644 (file)
--- a/package/mac80211/patches/700-mwl8k-missing-pci-id-for-WNR854T.patch
+++ b/package/mac80211/patches/700-mwl8k-missing-pci-id-for-WNR854T.patch
@@ -1,7 +1,7 @@
 --- a/drivers/net/wireless/mwl8k.c
 +++ b/drivers/net/wireless/mwl8k.c
-@@ -3902,6 +3902,7 @@ MODULE_FIRMWARE("mwl8k/helper_8366.fw");
- MODULE_FIRMWARE("mwl8k/fmimage_8366.fw");
+@@ -4056,6 +4056,7 @@ MODULE_FIRMWARE("mwl8k/fmimage_8366.fw")
+ MODULE_FIRMWARE(MWL8K_8366_AP_FW(MWL8K_8366_AP_FW_API));
  
  static DEFINE_PCI_DEVICE_TABLE(mwl8k_pci_id_table) = {
 +      { PCI_VDEVICE(MARVELL, 0x2a02), .driver_data = MWL8363, },