ar71xx: fix pll value for the eth0 interface on the TL-WR1043ND board
authorGabor Juhos <juhosg@openwrt.org>
Wed, 24 Feb 2010 13:38:51 +0000 (13:38 +0000)
committerGabor Juhos <juhosg@openwrt.org>
Wed, 24 Feb 2010 13:38:51 +0000 (13:38 +0000)
commit6dcdbc894c6a6e26c3f25f5d35a67ffba3657ae9
tree96fef0cce1aa72514f975a3be7b4bfbfbc81fa22
parent7ef0d8adf860be15e41507b7b4b8dfde5bf43437
ar71xx: fix pll value for the eth0 interface on the TL-WR1043ND board

Thanks to Andrew Tarabaras

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19835 3c298f89-4303-0410-b956-a3cf2f4a3e73
target/linux/ar71xx/files/arch/mips/ar71xx/mach-tl-wr1043nd.c