[brcm63xx] fix SPI message control handling for BCM6338/6348
authorflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 17 Jun 2012 16:17:29 +0000 (16:17 +0000)
committerflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Sun, 17 Jun 2012 16:17:29 +0000 (16:17 +0000)
commit4666e9b56d1d587f6cc55e6609ddcd7127d46035
treeab78b31e2a8b3061e8e66012ae64fc9cab965bee
parente200a200fa5c3f7cec184fa8694125f824397daa
[brcm63xx] fix SPI message control handling for BCM6338/6348

BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of
16-bits. We were previously using a 16-bits write which corrupted the first
byte of the TX FIFO. Also the message type was always set to Full-duplex even
in the case of half-duplex messages.

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32409 3c298f89-4303-0410-b956-a3cf2f4a3e73
target/linux/brcm63xx/patches-3.3/016-spi-bcm63xx-fix-bcm6348-38.patch [new file with mode: 0644]
target/linux/brcm63xx/patches-3.3/103-MIPS-BCM63XX-add-TRNG-peripheral-definitions.patch
target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch
target/linux/brcm63xx/patches-3.3/316-MIPS-BCM63XX-Add-PCIe-register-set-definitions.patch
target/linux/brcm63xx/patches-3.3/419-SPI-MIPS-BCM63XX-Add-HS-SPI-driver.patch