+#include <dt-bindings/interrupt-controller/mips-gic.h>
+
/ {
#address-cells = <1>;
#size-cells = <1>;
compatible = "mti,cpu-interrupt-controller";
};
+ cpuclock: cpuclock@0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+
+ /* FIXME: there should be way to detect this */
+ clock-frequency = <880000000>;
+ };
+
+ sysclock: sysclock@0 {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+
+ /* FIXME: there should be way to detect this */
+ clock-frequency = <50000000>;
+ };
+
palmbus@1E000000 {
compatible = "palmbus";
reg = <0x1E000000 0x100000>;
reg = <0x300 0x100>;
};
+ cpc@1fbf0000 {
+ compatible = "mtk,mt7621-cpc";
+ reg = <0x1fbf0000 0x8000>;
+ };
+
+ mc@1fbf8000 {
+ compatible = "mtk,mt7621-mc";
+ reg = <0x1fbf8000 0x8000>;
+ };
+
uartlite@c00 {
compatible = "ns16550a";
reg = <0xc00 0x100>;
+ clocks = <&sysclock>;
+
interrupt-parent = <&gic>;
- interrupts = <0 26 4>;
+ interrupts = <GIC_SHARED 26 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
compatible = "ralink,mt7621-spi";
reg = <0xb00 0x100>;
+ clocks = <&sysclock>;
+
resets = <&rstctrl 18>;
reset-names = "spi";
reg = <0x1E130000 4000>;
interrupt-parent = <&gic>;
- interrupts = <0 20 4>;
+ interrupts = <GIC_SHARED 20 IRQ_TYPE_LEVEL_HIGH>;
};
xhci@1E1C0000 {
reg = <0x1E1C0000 4000>;
interrupt-parent = <&gic>;
- interrupts = <0 22 4>;
+ interrupts = <GIC_SHARED 22 IRQ_TYPE_LEVEL_HIGH>;
};
gic: interrupt-controller@1fbc0000 {
compatible = "mti,gic";
- reg = <0x1fbc0000 0x80>;
+ reg = <0x1fbc0000 0x2000>;
interrupt-controller;
#interrupt-cells = <3>;
mti,reserved-cpu-vectors = <7>;
+
+ timer {
+ compatible = "mti,gic-timer";
+ interrupts = <GIC_LOCAL 1 IRQ_TYPE_NONE>;
+ clocks = <&cpuclock>;
+ };
};
nand@1e003000 {
0x1e003800 0x800>;
#address-cells = <1>;
#size-cells = <1>;
-
- partition@0 {
- label = "uboot";
- reg = <0x00000 0x80000>; /* 64 KB */
- };
-
- partition@80000 {
- label = "uboot_env";
- reg = <0x80000 0x80000>; /* 64 KB */
- };
-
- partition@100000 {
- label = "factory";
- reg = <0x100000 0x40000>;
- };
-
- partition@140000 {
- label = "rootfs";
- reg = <0x140000 0xec0000>;
- };
};
ethernet@1e100000 {
reset-names = "fe", "eth";
interrupt-parent = <&gic>;
- interrupts = <0 3 4>;
+ interrupts = <GIC_SHARED 3 IRQ_TYPE_LEVEL_HIGH>;
mdio-bus {
#address-cells = <1>;
compatible = "ralink,mt7620a-gsw";
reg = <0x1e110000 8000>;
interrupt-parent = <&gic>;
- interrupts = <0 23 4>;
+ interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
};
pcie@1e140000 {
>;
interrupt-parent = <&gic>;
- interrupts = <0 4 4
- 0 24 4
- 0 25 4>;
+ interrupts = <GIC_SHARED 4 IRQ_TYPE_LEVEL_HIGH
+ GIC_SHARED 24 IRQ_TYPE_LEVEL_HIGH
+ GIC_SHARED 25 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";